Transient voltage suppression system

By integrating TVS diodes with different polarities into a single component, an asymmetric bidirectional transient voltage suppression device is designed, which solves the problem that existing technologies cannot cope with voltage changes in different directions, improves the reliability and efficiency of the device, and saves PCB space.

CN224165047UActive Publication Date: 2026-04-24LITTELFUSE SEMICON WUXI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
LITTELFUSE SEMICON WUXI
Filing Date
2025-02-20
Publication Date
2026-04-24

AI Technical Summary

Technical Problem

Existing bidirectional transient voltage suppression devices cannot effectively cope with voltage changes in different directions, resulting in parasitic effects and wasted PCB space, which affects the reliability and efficiency of high-speed switching applications.

Method used

By integrating two independent TVS diodes into a single component, and utilizing substrates and base layers of different polarities, an asymmetric bidirectional transient voltage suppression device is formed. It is coupled with conductive solder to achieve voltage clamping in different directions.

Benefits of technology

It improves device reliability and efficiency, reduces parasitic effects, saves PCB space, and adapts to voltage variations in different directions.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a bidirectional asymmetric transient voltage suppressor. A transient voltage suppression system, device, apparatus, structure, and related methods. The system includes a first voltage suppression device having a first voltage suppression device substrate, a first voltage suppression device first layer, and a first voltage suppression device second layer. The first voltage suppression device substrate is coupled to the first voltage suppression device first layer and to the first voltage suppression device second layer. The system includes a second voltage suppression device having a second voltage suppression device substrate, a second voltage suppression device first layer, and a second voltage suppression device second layer. The second voltage suppression device substrate is coupled to the second voltage suppression device first layer and is coupled to the second voltage suppression device second layer. The first voltage suppression device is coupled to the second voltage suppression device.
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Description

Technical Field

[0001] This disclosure relates generally to the field of power semiconductor discrete devices, and more particularly to bidirectional asymmetric transient voltage suppressor devices. Background Technology

[0002] Discrete semiconductors are devices designed to perform basic electronic functions and cannot be divided into independent components that have their own functions. Power semiconductors are used as switches or rectifiers in power electronics. Diodes, transistors, thyristors, and rectifiers are all examples of discrete power semiconductors. Discrete power semiconductors exist in a wide variety of environments, from very low power systems to very high power systems.

[0003] Asymmetric bidirectional transient voltage suppression (TVS) devices are designed to protect sensitive electronic components from voltage spikes by clamping overvoltage transients. Unlike symmetrical TVS devices, which have the same clamping voltage in both directions, asymmetric bidirectional TVS devices have different clamping voltages for positive and negative transients. By integrating two independent TVS diodes into a single component, these devices help reduce parasitic effects and save PCB space, thereby improving the reliability and efficiency of high-speed switching applications. However, existing TVS devices cannot provide for variations in breakdown voltage across the device. Utility Model Content

[0004] The following overview is provided in a simplified form to introduce some concepts that will be further described in the detailed description below. This overview is not intended to identify key or essential features of the claimed subject matter, nor is it intended to help determine the scope of the claimed subject matter.

[0005] In some embodiments, this subject matter relates to a transient voltage suppression system. The system may include a first voltage suppression device having a first voltage suppression device substrate, a first voltage suppression device first layer, and a first voltage suppression device second layer. The first voltage suppression device substrate may be coupled to both the first voltage suppression device first layer and the first voltage suppression device second layer. The system may also include a second voltage suppression device having a second voltage suppression device substrate, a second voltage suppression device first layer, and a second voltage suppression device second layer. The second voltage suppression device substrate may be coupled to both the second voltage suppression device first layer and the second voltage suppression device second layer. The first voltage suppression device may be coupled to the second voltage suppression device.

[0006] In some embodiments, this subject matter may include one or more of the following optional features. The first voltage suppression device substrate and the second voltage suppression device substrate may be at least one of an N-type substrate or a P-type substrate. The first layer of the first voltage suppression device and the second first layer of the second voltage suppression device may be at least one of an N-type layer or a P-type layer. The second base layer of the first voltage suppression device and the second second layer of the second voltage suppression device may be at least one of an N-type layer, a P-type layer, an N+ type layer, or a P+ layer.

[0007] In some embodiments, the first layer of the first voltage suppression device may be a P-type layer. The substrate of the first voltage suppression device may be an N-type substrate. The second layer of the first voltage suppression device may be an N+ type layer. The first layer of the first voltage suppression device may be an N-type layer. The substrate of the first voltage suppression device may be a P-type substrate, and the second layer of the first voltage suppression device may be a P+ type layer.

[0008] In some embodiments, the first layer of the second voltage suppression device may be an N+ type layer. The substrate of the second voltage suppression device may be an N-type substrate, and the second layer of the second voltage suppression device may be a P-type layer.

[0009] In some embodiments, the first layer of the second voltage suppression device may be a P+ type layer, the substrate of the second voltage suppression device may be a P type substrate, and the second layer of the second voltage suppression device may be an N type layer.

[0010] In some embodiments, the first layer of the second voltage suppression device may be a P-type layer, the substrate of the second voltage suppression device may be an N-type substrate, and the second layer of the second voltage suppression device may be a P-type layer.

[0011] In some embodiments, the first layer of the second voltage suppression device may be an N-type layer, the substrate of the second voltage suppression device may be a P-type substrate, and the second layer of the second voltage suppression device may be an N-type layer.

[0012] In some embodiments, the system may include one or more terminals coupled to one or more of the first and second layers of the first and second voltage suppression devices. The transient voltage suppression devices may be characterized by a clamping voltage. The clamping voltage may be determined based on the bias of the one or more terminals.

[0013] In some embodiments, each of the first and second voltage suppression devices may be characterized by its respective breakdown voltage.

[0014] In some embodiments, the first voltage suppression device may be at least one of a unidirectional transient voltage suppression device or a bidirectional transient voltage suppression device. The second voltage suppression device may be at least one of a unidirectional transient voltage suppression device or a bidirectional transient voltage suppression device. The transient voltage suppression system may be an asymmetric transient voltage suppression system.

[0015] In some implementations, a conductive solder can be used to couple a first voltage suppression device to a second voltage suppression device. The conductive solder can couple a second layer of the first voltage suppression device to a first layer of the second voltage suppression device.

[0016] In some embodiments, the first layer of the first voltage suppression device can be coupled to the anode or cathode terminal layer, and the second layer of the second voltage suppression device can be coupled to another anode or another cathode terminal layer.

[0017] In some embodiments, this subject matter relates to a method of manufacturing a semiconductor device. The method may include: providing a first voltage suppression device having a first voltage suppression device substrate, a first voltage suppression device first layer, and a first voltage suppression device second layer, the first voltage suppression device substrate being coupled to the first voltage suppression device first layer and also coupled to the first voltage suppression device second layer; providing a second voltage suppression device having a second voltage suppression device substrate, a second voltage suppression device first layer, and a second voltage suppression device second layer, the second voltage suppression device substrate being coupled to the second voltage suppression device first layer and also coupled to the second voltage suppression device second layer; and coupling the first voltage suppression device to the second voltage suppression device.

[0018] Details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the following description. Further features and advantages of the subject matter described herein will become apparent from the specification, the accompanying drawings, and the claims. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate certain aspects of the subject matter disclosed herein and, together with the specification, help explain some principles related to the disclosed embodiments. In the drawings,

[0020] Figure 1a An example of a transient voltage suppressor (TVS) device is shown;

[0021] Figure 1b The display shows Figure 1a Example current-voltage diagrams of clamping voltage and breakdown voltage of the TVS device shown;

[0022] Figure 2aExemplary bidirectional asymmetric TVS devices according to some embodiments of this subject are shown;

[0023] Figure 2b Some embodiments of this topic are shown. Figure 2a An example of a current-voltage diagram for the device shown;

[0024] Figures 3a-3b Examples of bidirectional semiconductor devices comprising two TVS devices according to some embodiments of this subject are shown;

[0025] Figures 4a-4d Further examples of bidirectional semiconductor devices according to some embodiments of this subject are shown, comprising two TVS devices having various types of substrates and base layers; and

[0026] Figure 5 Exemplary processes according to some implementations of this topic are shown.

[0027] The accompanying drawings are not necessarily drawn to scale. The drawings are merely illustrative and not intended to depict specific parameters of this disclosure. The drawings are intended to depict exemplary embodiments of the subject matter and should therefore not be considered as limiting the scope. In the drawings, the same numbers represent the same elements.

[0028] Furthermore, for clarity, some elements in certain figures may be omitted, and / or not shown to scale. Cross-sectional views may be in the form of "slice" and / or "close-up" cross-sections, and for clarity, some background lines visible in "true" cross-sectional views have been omitted. Additionally, for clarity, some reference numerals may be omitted in certain figures. Detailed Implementation

[0029] Various methods according to this disclosure will be described more fully below with reference to the accompanying drawings, which illustrate embodiments of the systems and methods. Devices, one or more systems, one or more components, etc., may be embodied in many different forms and should not be construed as limited to the exemplary embodiments described herein. Rather, these exemplary embodiments are provided to make this disclosure thorough and complete and to fully convey the scope of the subject matter to those skilled in the art.

[0030] To address these and other potential shortcomings of currently available solutions, one or more embodiments of this subject matter relate to methods, systems, articles of manufacture, etc., which, among other possible advantages, can also provide bidirectional asymmetric transient voltage suppressor (TVS) devices.

[0031] Voltage transients are defined as short-duration surges in electrical energy, resulting from the sudden release of previously stored energy and / or induced by other means, such as, for example, heavy inductive loads, lightning, etc. Voltage transients can be categorized into predictable or repeatable transients and random transients. In electrical or electronic circuits, this energy can be released in a predictable manner via controlled switching actions or randomly introduced into the circuit from external sources. Repeatable transients are often caused by the operation of motors, generators, and / or the switching of reactive power circuit components. On the other hand, random transients are often caused by electrostatic discharge (ESD) and lightning, which are typically unpredictable.

[0032] ESD is characterized by rapid rise times and high peak voltages and currents, which can result from an imbalance of positive and negative charges between objects. ESD generated by everyday activities can exceed the vulnerability thresholds of standard semiconductor technology. In the case of lightning, while a direct lightning strike is destructive, the voltage transients caused by lightning are not a direct result of the strike. When lightning strikes, the event generates a magnetic field, which in turn induces significant voltage transients in nearby cables. For example, cloud-to-cloud lightning strikes affect not only overhead cables but also buried cables. Even a lightning strike from 1 mile (1.6 km) away can generate 70 volts in a cable. The impact of voltage transients in cloud-to-ground lightning strikes is much greater.

[0033] A transient voltage suppressor (TVS) diode is an electronic component designed to protect sensitive electronic devices from high-voltage transients. TVS diodes can respond to overvoltage events faster than most other types of circuit protection devices and are available in a variety of surface mount and through-hole board mounting configurations. TVS diodes are commonly used to protect against electrical overloads, such as those caused by lightning strikes, inductive load switching, and ESD-related overloads associated with data lines and transmissions in electronic circuits.

[0034] Figure 1a An example of a bidirectional symmetrical transient voltage suppressor (TVS) device 100 is shown (and corresponding polarity designation 110). The TVS device 100 can be formed in a semiconductor substrate such as silicon. Specifically, the TVS device 100 may include a substrate 104, a first base layer 102, and a second base layer 106. The substrate 104 can be formed to have a first type of polarity. The substrate 104 can be formed between the first base layer 102 and the second base layer 106. The first base layer 102 and the second base layer 106 can be formed to have a second type of polarity. The second type of polarity can be opposite to the first type of polarity. As shown in FIG1, the substrate 104 can be an N-type substrate. The first base layer 102 and the second base layer 106 can be P-type base layers. Furthermore, the first base layer 102 can form a PN junction 105 with the substrate 104. The second base layer 106 can form a PN junction 107 with the substrate 104.

[0035] It is understood that although Figure 1 shows a device 100 based on an N-type substrate, the TVS device 100 may have a P-type substrate with N-type first and second base layers disposed on opposite surfaces. In some embodiments, the TVS device 100 may be a bidirectional symmetrical device; however, it is understood that the TVS 100 may be any other type of device.

[0036] Furthermore, the TVS device 100 may also include terminals 101 and 103 for connecting the TVS device 10 to various circuit components (e.g., printed circuit boards, etc.). The first terminal 101 may be referred to as the anode terminal. The anode terminal 101 may be formed above the first base layer 101. The second terminal 103 may be referred to as the cathode terminal. The cathode terminal 103 may be formed below the second base layer 106. It is understood that the terms "above" and "below" are for illustrative purposes only and are intended to limit the subject matter. The first and second terminals 101, 103 may be made of any conductive material, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, etc., and / or any combination thereof.

[0037] Figure 1b Example current-voltage marking 120 is shown, which shows Figure 1a The clamping voltage (V) of the TVS device 100 shown cl ) and breakdown voltage (V BR The breakdown voltage (V) of the symmetrical TVS device 100. BR ) at its clamping voltage (V cl ) and reverse cutoff voltage (V R )between.

[0038] Figure 2a An exemplary bidirectional asymmetric TVS device 200 according to some embodiments of this subject is shown. Figure 1a Similar to the illustrated device 100, the TVS device 200 can be configured to be formed in a semiconductor substrate such as, for example, silicon. It is understood that other substrate materials can be used. However, the device 200 can be configured to provide an advantageous structure that can accommodate different breakdown voltages. In particular, the TVS device 200 may comprise two or more stacked TVS devices connected together using solder and / or any other bonding material. This can help improve the performance of the TVS device, which may be useful in various industries such as automotive applications.

[0039] As described herein, TVS 200 can be configured to include a combination of devices. It may include a first TVS device 230 (“TVS1”) and a second TVS device 240 (“TVS2”), which may be coupled to TVS device 230 using solder 209 and / or any other bonding method. Polarity markings 210 are shown next to TVS devices 200, using black triangles to indicate the polarity of each device 230, 240.

[0040] The TVS device 230 may include a substrate 204, a base layer 202, and a reinforcement layer 206. The substrate 204 may have a first type of polarity (e.g., N-type). The substrate 204 may be formed between the base layer 202 and the reinforcement layer 206. The base layer 202 may have a second type of polarity (e.g., P-type). The reinforcement layer 206 may have a third type of polarity (e.g., N+ type). The base layer 202 may form a PN junction 205 with the substrate 204. Although... Figure 2a The device 230 shown is based on an N-type substrate, but the device 230 may have a P-type substrate, wherein the N-type first base / reinforcement layer is disposed on the opposing surfaces (as discussed herein). In some embodiments, the TVS device 230 may be a unidirectional device, a bidirectional device, and / or any other type of device.

[0041] Furthermore, the TVS device 230 may also include terminal layers 201 and 211. The first terminal layer 201 may be formed above and coupled to the base layer 202. It may also be coupled to the anode and / or cathode terminals of the device 200. The second terminal layer 211 may be formed below the reinforcement layer 206. It is understood that the terms "above" and "below" are for illustrative purposes only and are intended to limit the subject matter. The first terminal layer 201 and the second terminal layer 211 may be made of conductive materials, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof.

[0042] TVS device 240 may include a substrate 214, a base layer 212, and a reinforcement layer 216. The substrate 214 may have a second type of polarity (e.g., P-type). The substrate 214 may be formed between the base layer 212 and the reinforcement layer 216. The base layer 212 may have a first type of polarity (e.g., N-type). The reinforcement layer 216 may have a fourth type of polarity (e.g., P+ type). Although TVS device 240 is shown as being based on a P-type substrate, it may have an N-type substrate, wherein a corresponding first base / reinforcement layer (disposed on opposing surfaces as discussed herein) is formed. The base layer 212 may form a PN junction 215 with the substrate 214. In some embodiments, TVS device 240 may be a unidirectional device, a bidirectional device, and / or any other type of device.

[0043] TVS device 240 may also include terminal layers 203 and 213. The first terminal layer 213 may be formed above and coupled to the first base layer 212. The second terminal layer 203 may be formed below the reinforcement layer 216 and may also be coupled to the anode and / or cathode terminals of device 200.

[0044] Furthermore, as described herein, terminal layers 201 and 203 may be made of conductive materials, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof. Terminals to which terminal layers 201 and 203 may be coupled respectively may be used to couple device 200 to one or more electronic components (e.g., printed circuit boards, etc.).

[0045] Solder 209 can be used to couple TVS devices 230 and 240 to form semiconductor device 200. The solder can be conductive, thereby allowing current conduction between TVS devices 230 and 240. Solder 209 can be made of any desired conductive material, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, etc., and / or any combination thereof.

[0046] To achieve the polarity of layers 202-206 and 212-216, each layer can be doped with one or more dopant materials. Dopant materials may include, for example, phosphorus, boron, arsenic, gallium, and / or any other desired material. Each layer 202-206 and 212-216 can be formed using the same dopant material and / or different dopant materials.

[0047] Furthermore, the dopant concentration in layers 202-206 and 212-216 can be uniform and / or non-uniform. This allows for different characteristics of the TVS device 200. Each layer 202-206 and 212-216 can also have its own predetermined thickness. The thickness of layers 202 and 206 can be less than the thickness of substrate 204. Similarly, the thickness of layers 212 and 216 can be less than the thickness of substrate 214. It is understood that any other type of doping and / or any other thickness of layers 202-206 and 212-216 (and / or any other component of the TVS device 200) is possible.

[0048] The arrangement of TVS devices 230 and 240 within semiconductor device 200 can be configured to define a specific clamping voltage (V) for TVS devices 200. C1 V C2 (corresponding to the clamping voltage and breakdown voltage of devices 230 and 240, respectively) BR1 V BR2 Corresponding to devices 230 and 240 respectively, such as Figure 2bCurve 220 is shown in the figure. The breakdown voltage (V) of each TVS device 230, 240 of the asymmetric bidirectional TVS device 200 is shown. BR1 V BR2 At their respective clamping voltages (V) C1 V C2 ) and their respective reverse cutoff voltages (V R1 V R2 Between these devices, each has a different rated voltage, thus allowing the TVS device 200 to be a bidirectional device.

[0049] In some implementations, TVS devices 230 and 240 can be configured to clamp voltages from different directions during operation. For example, TVS device 230 can be configured to clamp the voltage when terminal 203 is forward biased relative to terminal 201. TVS device 240 can be configured to clamp the voltage when terminal 201 is forward biased relative to terminal 203. This allows for bidirectional asymmetric characteristics of the semiconductor device 200.

[0050] Figures 3a-3b An example of a bidirectional semiconductor device is shown, comprising two unidirectional TVS devices with the same type of substrate, for example, Figure 3a A TVS device with an N-type substrate is shown. Figure 3b A TVS device with a P-type substrate is shown. Figures 4a-4d Further examples of bidirectional semiconductor devices are shown, including a unidirectional TVS and a bidirectional TVS device with various types of substrates and base layers.

[0051] Figure 3a An exemplary bidirectional asymmetric TVS device 300 according to some embodiments of this subject matter is illustrated. The TVS device 300 may be configured to be formed in a semiconductor substrate such as, for example, silicon. It will be understood that other substrate materials may be used. The TVS device 300 may include a first TVS device 330 (“TVS1”) and a second TVS device 340 (“TVS2”), which may be coupled to the TVS device 330 using solder 309 and / or any other bonding material / method. Polarity markings 310 are shown next to the TVS devices 300, with the polarity of each device 330, 340 indicated by a black triangle. Each TVS device 330, 340 may have its own breakdown voltage.

[0052] TVS device 330 may include a substrate 304, a base layer 302, and a reinforcement layer 306. The substrate 304 may have a first type of polarity (e.g., N-type). The substrate 304 may be formed between the base layer 302 and the reinforcement layer 306. The base layer 302 may have a second type of polarity (e.g., P-type). The reinforcement layer 306 may have a third type of polarity (e.g., N+ type). The base layer 302 may form a PN junction 305 with the substrate 304. TVS device 330 may be a unidirectional device.

[0053] The TVS device 330 may further include terminal layers 301 and 311. A first terminal layer 311 may be formed above and coupled to the base layer 302. It may also be coupled to the anode and / or cathode terminals of the device 300. A second terminal layer 311 may be formed below the reinforcement layer 306. The first and second terminal layers 301 and 311 may be made of conductive materials, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof.

[0054] TVS device 340 may include a substrate 314, a reinforcement layer 312, and a base layer 316. The substrate 314 may have a first type of polarity (e.g., N-type), which may be the same polarity as the substrate 304 of TVS device 330. The substrate 314 may be formed between the reinforcement layer 312 and the base layer 316. The reinforcement layer 312 may have a third type of polarity (e.g., N+ type). The base layer 316 may have a second type of polarity (e.g., P-type). The base layer 316 may form a PN junction 317 with the substrate 314. In some embodiments, TVS device 340 may be a unidirectional device. TVS device 340 may also include terminal layers 303 and 313. A first terminal layer 313 may be formed above and coupled to the reinforcement layer 312. A second terminal layer 303 may be formed below the base layer 316 and may also be coupled to the anode and / or cathode terminals of device 300.

[0055] Furthermore, as described herein, the second terminal layers 301 and 303 may be made of conductive materials, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof. Terminals to which terminal layers 301 and 303 may be coupled respectively may be used to couple device 300 to one or more electronic components (e.g., printed circuit boards, etc.).

[0056] Solder 309 can be used to couple TVS devices 330 and 340 to form semiconductor device 300. The solder can be a conductive solder, thereby allowing current conduction between TVS devices 330 and 340. Solder 309 can be made of any desired conductive material, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, etc., and / or any combination thereof.

[0057] The dopant concentration in layers 302-306 and 312-316 can be uniform and / or non-uniform, which allows for variations in the characteristics of the TVS device 300. Each layer 302-306 and 312-316 can also have its own predetermined thickness. The thickness of layers 302 and 306 can be less than the thickness of substrate 304, and the thickness of layers 312 and 316 can be less than the thickness of substrate 314. It is understood that any other type of doping and / or any other thickness of layers 302-306 and 312-316 (and / or any other component of the TVS device 300) is possible.

[0058] In some implementations, TVS devices 330 and 340 can be configured to clamp voltages from different directions during operation. For example, TVS device 330 can be configured to clamp the voltage when terminal 303 is forward biased relative to terminal 301. TVS device 340 can be configured to clamp the voltage when terminal 301 is forward biased relative to terminal 303. This allows for bidirectional asymmetric properties of the semiconductor device 300.

[0059] Figure 3b Another exemplary bidirectional asymmetric TVS device 350 according to some embodiments of this subject is shown. TVS device 350 may include a first TVS device 360 ​​(“TVS1”) and a second TVS device 370 (“TVS2”), which may be coupled to TVS device 360 ​​using solder 369 and / or any other bonding material / method. Polarity markings 390 are shown next to TVS devices 350, using black triangles to indicate the polarity of each device 360, 370. Each TVS device 360, 370 may have its own breakdown voltage.

[0060] TVS device 360 ​​may include a substrate 364, a base layer 362, and a reinforcement layer 366. The substrate 364 may have a second type of polarity (e.g., P-type). The substrate 364 may be formed between the base layer 362 and the reinforcement base layer 366. The base layer 362 may have a first type of polarity (e.g., N-type). The reinforcement layer 366 may have a fourth type of polarity (e.g., P+ type). The base layer 362 may form a PN junction 365 with the substrate 364. TVS device 360 ​​may be a unidirectional device.

[0061] TVS device 360 ​​may further include terminal layers 361 and 371. A first terminal layer 371 may be formed above and coupled to the base layer 362. It may also be coupled to the anode and / or cathode terminals of device 350. A second terminal layer 371 may be formed below the reinforcement layer 366. The first terminal layer 361 and the second terminal layer 371 may be made of conductive materials, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof.

[0062] TVS device 370 may include a substrate 374, a reinforcement layer 372, and a base layer 376. The substrate 374 may have a second type of polarity (e.g., P-type), which may be the same polarity as the substrate 364 of TVS device 360. The substrate 374 may be formed between the reinforcement layer 372 and the base layer 376. The reinforcement layer 372 may have a fourth type of polarity (e.g., P+ type). The base layer 376 may have a first type of polarity (e.g., N-type). The base layer 376 may form a PN junction 377 with the substrate 374. In some embodiments, TVS device 370 may be a unidirectional device. TVS device 370 may also include terminal layers 363 and 373. A first terminal layer 373 may be formed above and coupled to the reinforcement layer 372. A second terminal layer 363 may be formed below the base layer 376 and may also be coupled to the anode and / or cathode terminals of device 350.

[0063] and Figure 3a Similar to the device 300 shown, conductive solder 369 can be used to couple TVS devices 360 and 370 to form semiconductor device 350 and allow current conduction between TVS devices 360 and 370.

[0064] Similar to semiconductor device 300, semiconductor device 350 may include various dopant materials, and the dopant material concentration in layers 362-366 and 372-376 may be uniform and / or non-uniform. This allows for different characteristics of the TVS device 350. Each layer 362-366 and 372-376 may also have its own predetermined thickness. The thickness of layers 362 and 366 may be less than the thickness of substrate 364, and the thickness of layers 372 and 376 may be less than the thickness of substrate 374. It is understood that any other type of doping and / or any other thickness of layers 362-366 and 372-376 (and / or any other component of the TVS device 350) is possible.

[0065] In some implementations, during operation, TVS devices 360 and 370 can be configured to clamp voltages from different directions. For example, TVS device 360 ​​can be configured to clamp the voltage when terminal 363 is reverse biased relative to terminal 361. TVS device 370 can be configured to clamp the voltage when terminal 361 is reverse biased relative to terminal 363. This allows for bidirectional asymmetric properties of the semiconductor device 300.

[0066] Figure 4a Another exemplary bidirectional asymmetric TVS device 400a according to some embodiments of this subject matter is shown. TVS device 400a may include a first TVS device 430a (“TVS1”) and a second TVS device 440a (“TVS2”), which may be coupled to TVS device 430a using solder 409a and / or any other bonding material / method. Polarity markings 410a are shown next to TVS device 400a, using black triangles to indicate the polarity of each device 430a, 440a. Each TVS device 430a, 440a may have its own breakdown voltage.

[0067] Similar to the semiconductor devices discussed herein, TVS device 430a may include a substrate 404a, a base layer 402a, and a reinforcement layer 406a. The substrate 404a may have a first type of polarity (e.g., N-type). The substrate 404a may be formed between the base layer 402a and the reinforcement layer 406a. The base layer 402a may have a second type of polarity (e.g., P-type). The reinforcement layer 406a may have a third type of polarity (e.g., N+ type). The base layer 402a may form a PN junction 405a with the substrate 404a. TVS device 430a may be a unidirectional device. TVS device 430a may also include terminal layers 401a and 411a. The first terminal layer 411a may be formed above and coupled to the base layer 402a. It may also be coupled to the anode and / or cathode terminals of device 400a. The second terminal layer 411a may be formed below the reinforcement layer 406a.

[0068] TVS device 440a may include a substrate 414a, a first base layer 412a, and a second base layer 416a. The substrate 414a may have a first type of polarity (e.g., N-type). The substrate 414a may be formed between the first base layer 412a and the second base layer 416a. The first base layer 412a may have a second type of polarity (e.g., P-type). The second base layer 416a may have a second polarity (e.g., P-type). The first base layer 412a may form a PN junction 415a with the substrate 414a. The second base layer 416a may form a PN junction 417a with the substrate 414a. In some embodiments, TVS device 440a may be a symmetrical bidirectional device. TVS device 440a may also include terminal layers 403a and 413a. The first terminal layer 413a may be formed above and coupled to the first base layer 412a. The second terminal layer 403a may be formed beneath the second base layer 416a and may also be coupled to the cathode terminal of device 400a. The terminal layers of devices 430a and 440a may be made of conductive materials, such as, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof. The terminals to which terminal layers 401a and 403a may be coupled may be used to couple device 400a to one or more electronic components (e.g., printed circuit boards, etc.).

[0069] Solder 409a can be used to couple TVS devices 430a and 440a to form semiconductor device 400a. The solder can be a conductive solder, thereby allowing current conduction between TVS devices 430a and 440a. Solder 409a can be made of any desired conductive material, such as, for example, but not limited to, copper, copper alloys, silver, metal alloys, etc., and / or any combination thereof.

[0070] Each layer 402a-406a, 412a-416a may also have its own predetermined thickness and / or doping concentration. The thickness of layers 402a and 406a may be less than the thickness of substrate 404a, and the thickness of layers 412a and 416a may be less than the thickness of substrate 414a. It is understood that any other type of doping and / or any other thickness of layers 402a-406a, 412a-416a (and / or any other component of TVS device 400a) is possible.

[0071] In some implementations, TVS devices 430a and 440a can be configured to clamp voltages from different directions during operation. For example, TVS device 430a can be configured to clamp the voltage when terminal 403a is forward biased relative to terminal 401a. TVS device 440a can be configured to clamp the voltage regardless of the bias of terminal 401a.

[0072] Figure 4b Another exemplary bidirectional asymmetric TVS device 400b according to some embodiments of this subject matter is shown. TVS device 400b may include a first TVS device 430b (“TVS1”) and a second TVS device 440b (“TVS2”), which may be coupled to TVS device 430b using solder 409b and / or any other bonding material / method. Polarity markings 410b are shown next to TVS device 400b, using black triangles to indicate the polarity of each device 430b, 440b. Each TVS device 430b, 440b may have its own breakdown voltage.

[0073] Similar to the semiconductor devices discussed herein, the TVS device 430b may include a substrate 404b, a base layer 402b, and a reinforcement layer 406b. The substrate 404b may have a first type of polarity (e.g., N-type). The substrate 404b may be formed between the base layer 402b and the reinforcement layer 406b. The base layer 402b may have a second type of polarity (e.g., P-type). The reinforcement layer 406b may have a third type of polarity (e.g., N+ type). The base layer 402b may form a PN junction 405b with the substrate 404b. The TVS device 430b may be a unidirectional device. The TVS device 430b may also include terminal layers 401b and 411b. The first terminal layer 411b may be formed above and coupled to the base layer 402b. It may also be coupled to the anode and / or cathode terminals of the device 400b. The second terminal layer 411b may be formed below the reinforcement layer 406b.

[0074] TVS device 440b may include a substrate 414b, a first base layer 412b, and a second base layer 416b. The substrate 414b may have a second type of polarity (e.g., P-type). The substrate 414b may be formed between the first base layer 412b and the second base layer 416b. The first base layer 412b may have a first type of polarity (e.g., N-type). The second base layer 416b may have a first type of polarity (e.g., N-type). The first base layer 412b may form a PN junction 415b with the substrate 414b. The second base layer 416b may form a PN junction 417b with the substrate 414b. In some embodiments, TVS device 440b may be a symmetrical bidirectional device. TVS device 440b may also include terminal layers 403b and 413b. The first terminal layer 413b may be formed above and coupled to the first base layer 412b. The second terminal layer 403b may be formed beneath the second base layer 416b and may also be coupled to the anode and / or cathode terminals of device 400b. The terminal layers of devices 430b and 440b may be made of conductive materials, such as, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof. The terminals to which terminal layers 401b and 403b may be coupled may be used to couple device 400b to one or more electronic components (e.g., printed circuit boards, etc.).

[0075] Solder 409b can be used to couple TVS devices 430b and 440b to form semiconductor device 400b, and can be similar to solder 409a. Figure 4a Similar to the device 400a shown, each layer 402b-406b, 412b-416b can also have its own predetermined thickness and / or doping concentration.

[0076] TVS device 400b can be configured to perform similar actions Figure 4a The voltage clamping of the TVS device 400a shown.

[0077] Figure 4c Another exemplary bidirectional asymmetric TVS device 400c according to some embodiments of this subject matter is shown. TVS device 400c may include a first TVS device 430c (“TVS1”) and a second TVS device 440c (“TVS2”), which may be coupled to TVS device 430c using solder 409c (similar to solders 409a and 409b) and / or any other bonding material / method. Polarity markings 410c are shown next to TVS device 400c, using black triangles to indicate the polarity of each device 430c, 440c. Each TVS device 430c, 440c may have its own breakdown voltage.

[0078] Similar to the semiconductor devices discussed herein, the TVS device 430c may include a substrate 404c, a base layer 402c, and a reinforcement layer 406c. The substrate 404c may have a second type of polarity (e.g., P-type). The substrate 404c may be formed between the base layer 402c and the reinforcement layer 406c. The base layer 402c may have a first type of polarity (e.g., N-type). The reinforcement layer 406c may have a fourth type of polarity (e.g., P+ type). The base layer 402c may form a PN junction 405c with the substrate 404c. The TVS device 430c may be a unidirectional device. The TVS device 430c may also include terminal layers 401c and 411c. The first terminal layer 411c may be formed above and coupled to the base layer 402c. It may also be coupled to the anode and / or cathode terminals of the device 400c. The second terminal layer 411c may be formed below the reinforcement layer 406c.

[0079] TVS device 440c may include a substrate 414c, a first base layer 412c, and a second base layer 416c. The substrate 414c may have a first type of polarity (e.g., N-type). The substrate 414c may be formed between the first base layer 412c and the second base layer 416c. The first base layer 412c may have a second type of polarity (e.g., P-type). The second base layer 416c may have a second type of polarity (e.g., P-type). The first base layer 412c may form a PN junction 415c with the substrate 414c. The second base layer 416c may form a PN junction 417c with the substrate 414c. In some embodiments, TVS device 440c may be a symmetrical bidirectional device. TVS device 440c may also include terminal layers 403c and 413c. The first terminal layer 413c may be formed above and coupled to the first base layer 412c. The second terminal layer 403c may be formed beneath the second base layer 416c and may also be coupled to the anode and / or cathode terminals of device 400c. The terminal layers of devices 430c and 440c may be made of conductive materials, such as, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof. The terminals to which terminal layers 401c and 403c may be coupled may be used to couple device 400c to one or more electronic components (e.g., printed circuit boards, etc.).

[0080] During operation, the TVS device 400c can be configured to... Figure 4b The TVS device 400a shown operates in the opposite manner.

[0081] Figure 4dAnother exemplary bidirectional asymmetric TVS device 400d according to some embodiments of this subject matter is shown. TVS device 400d may include a first TVS device 430d (“TVS1”) and a second TVS device 440d (“TVS2”), which are coupled to TVS device 430d using solder 409d (similar to solders 409a, 409b, 409c) and / or any other bonding material / method. Polarity markings 410d are shown next to TVS device 400d, using black triangles to indicate the polarity of each device 430d, 440d. Each TVS device 430d, 440d may have its own breakdown voltage.

[0082] Similar to the semiconductor devices discussed herein, the TVS device 430d may include a substrate 404d, a base layer 402d, and a reinforcement layer 406d. The substrate 404d may have a second type of polarity (e.g., P-type). The substrate 404d may be formed between the base layer 402d and the reinforcement layer 406d. The base layer 402d may have a first type of polarity (e.g., N-type). The reinforcement layer 406d may have a fourth type of polarity (e.g., P+ type). The base layer 402d may form a PN junction 405d with the substrate 404d. The TVS device 430d may be a unidirectional device. The TVS device 430d may also include terminal layers 401d and 411d. The first terminal layer 411d may be formed above and coupled to the base layer 402d. It may also be coupled to the anode and / or cathode terminals of the device 400d. The second terminal layer 411d may be formed below the reinforcement layer 406d.

[0083] TVS device 440d may include a substrate 414d, a first base layer 412d, and a second base layer 416d. The substrate 414d may have a second type of polarity (e.g., P-type). The substrate 414d may be formed between the first base layer 412d and the second base layer 416d. The first base layer 412d may have a first type of polarity (e.g., N-type). The second base layer 416d may have a first type of polarity (e.g., N-type). The first base layer 412d may form a PN junction 415d with the substrate 414d. The second base layer 416d may form a PN junction 417d with the substrate 414d. In some embodiments, TVS device 440d may be a symmetrical bidirectional device. TVS device 440d may also include terminal layers 403d and 413d. The first terminal layer 413d may be formed above and coupled to the first base layer 412d. The second terminal layer 403d may be formed beneath the second base layer 416d and may also be coupled to the anode and / or cathode terminals of device 400d. The terminal layers of devices 430d and 440d may be made of conductive materials, such as, but not limited to, copper, copper alloys, silver, metal alloys, and / or any combination thereof. The terminals to which terminal layers 401d and 403d may be coupled may be used to couple device 400d to one or more electronic components (e.g., printed circuit boards, etc.).

[0084] TVS device 400d can be configured to... Figure 4c The TVS device 400c shown operates similarly.

[0085] Combination Figures 2a-4d The semiconductor devices shown and described herein are provided by way of example only and not for limiting purposes. It is understood that any other combination of TVS devices is possible. Each TVS device forming a semiconductor device can be a unidirectional and / or bidirectional device, wherein any combination of these devices is possible (e.g., unidirectional-unidirectional TVS device combination, unidirectional-bidirectional TVS device combination, bidirectional-unidirectional TVS device combination, bidirectional-bidirectional TVS device combination, etc.). Each TVS device forming a semiconductor device can have a substrate with any desired polarity and a base and / or enhancement layer with any desired polarity. Each semiconductor device and / or its respective TVS device composition may be characterized by specific parameters (e.g., polarity of each layer and / or substrate, thickness of one or more layers, doping concentration of one or more layers, breakdown voltage, clamping voltage, current, direction of one or more currents, etc.). Furthermore, multiple (e.g., more than two) TVS devices can be coupled together to form a multi-layer semiconductor device.

[0086] Figure 5 An exemplary process 500 for manufacturing a transient voltage suppressor device according to some embodiments of this subject is illustrated. Process 500 can be used to manufacture, for example... Figures 2a-4d The TVS device shown.

[0087] At position 502, a first voltage suppression device may be provided, which may include a substrate, a first layer, and a second layer. For example, the substrate may be substrate 204, 304, 364, 404a-d; the first layer may be one or more layers 202, 302, 362, 402a-d; and the second layer may be one or more layers 206, 306, 366, 406a-d. The substrate may be an N-type and / or P-type substrate. The first layer may be one or more P-base layers and N-base layers, and the second layer may be one or more N+ base layers and P+ base layers. The substrate may be coupled to the first layer on one side. The substrate may also be coupled to the second layer on the opposite side, for example, as shown below. Figures 2a-4d As shown. In some exemplary non-limiting embodiments, the coupling between the substrate and the first layer can be configured to form a coupling between the first junction and the substrate (alternatively, or otherwise, no junction is formed). Similarly, in some exemplary non-limiting embodiments, the second layer can be configured to form a second junction (alternatively, or otherwise, no junction is formed). The first voltage suppression device can be a TVS device (e.g., TVS devices 230, 330, 360, 430a-d).

[0088] At position 504, a second voltage suppression device may be provided. The second voltage suppression device may include a substrate (e.g., substrates 214, 314, 374, 414a-d), a first layer (e.g., layers 212, 312, 372, 412a-d), and a second layer (e.g., layers 216, 316, 376, 416a-d). The substrate may be formed between the first and second layers. The substrate may be an N-type and / or P-type substrate; the first and second layers may be P-type, P+-type, N-type, or N+-type layers. In some exemplary non-limiting embodiments, the first layer may form a first junction with the substrate (alternatively or additionally, no junction may be formed). In some exemplary non-limiting embodiments, the second layer may form a second junction with the substrate (alternatively or additionally, no junction may be formed). The second voltage suppression device may be a TVS device (e.g., devices 240, 340, 370, 442a-d).

[0089] At point 506, the first voltage suppression device can be coupled to the second voltage suppression device. The first voltage suppression device can also be coupled to the anode and / or cathode terminals of the transient voltage suppression device, and the second voltage suppression device can be coupled to the anode and / or cathode terminals of the transient voltage suppression device.

[0090] The components and features of the aforementioned devices can be implemented using any combination of discrete circuits, application-specific integrated circuits (ASICs), logic gates, and / or single-chip architectures. Furthermore, where appropriate, microcontrollers, programmable logic arrays, and / or microprocessors, or any combination thereof, can be used to implement the features of the devices. It should be noted that hardware, firmware, and / or software elements may be collectively referred to herein or individually as "logic" or "circuit".

[0091] It should be understood that the exemplary devices shown in the above block diagrams may represent a functional description example of many potential implementations. Therefore, the division, omission, or inclusion of block functions depicted in the figures does not imply that hardware components, circuits, software, and / or elements used to implement these functions must be divided, omitted, or included in the embodiments.

[0092] Certain embodiments may be described using the terms "an embodiment" or "embodiment" and their derivatives. These terms mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment. The phrase "in one embodiment" (or its derivatives) appearing in different places in the specification does not necessarily refer to the same embodiment. Furthermore, unless otherwise stated, the foregoing features are considered to be used in any combination. Thus, any feature discussed individually may be used in combination with each other unless it is noted that these features are incompatible with each other.

[0093] It is important to emphasize that this abstract of the disclosure is provided to allow the reader to quickly determine the nature of this technical disclosure. It is submitted on the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Furthermore, as can be seen from the foregoing detailed description, various features are combined in a single embodiment for the purpose of simplifying the disclosure. This method of disclosure should not be construed as reflecting an intention that the claimed embodiments require more features than expressly recited in each claim. Rather, as reflected in the following claims, the inventive subject matter lies in the fact that a single disclosed embodiment has fewer features than all features. Therefore, the following claims are hereby incorporated into the detailed description, each claim existing independently as a separate embodiment. In the appended claims, the terms “comprising” and “in...wherein” are used as concise English equivalents of the respective terms “comprising” and “wherein”. Furthermore, the terms “first,” “second,” “third,” etc., are used merely as denoting words and are not intended to impose numerical requirements on their objects. Additionally, the use of “comprising,” “including,” or “having,” and variations thereof herein is intended to cover the items listed thereafter and their equivalents, as well as additional items. Therefore, the terms “including,” “contains,” or “has,” and their variations are open-ended expressions and can be used interchangeably in this document.

[0094] For convenience and clarity, terms such as “top,” “bottom,” “upper,” “lower,” “vertical,” “horizontal,” “lateral,” “radial,” “inner,” “outer,” “left,” and “right” may be used throughout this document to describe the relative position and orientation of features and components, each relative to the geometry and orientation of other features and components appearing in the perspective, exploded perspective, and sectional views provided herein. The terminology is not intended to be limiting and includes specifically mentioned words, their derivatives, and words with similar meanings.

[0095] The foregoing description includes examples of the disclosed architecture. It is certainly impossible to describe every possible combination of components and / or methods, but those skilled in the art will recognize that many other combinations and permutations are possible. Therefore, the novel architecture is intended to encompass all such changes, modifications, and variations that fall within the spirit and scope of the appended claims.

[0096] For purposes of illustration and description, the above description of exemplary embodiments has been given. It is not intended to be exhaustive or to limit this disclosure to the precise forms disclosed. Many modifications and variations are possible based on this disclosure. The scope of this disclosure is not intended to be limited by this detailed description, but rather by the appended claims. Future applications claiming priority to this application may claim the disclosed subject matter in different ways and may generally include one or more sets of limitations disclosed herein or otherwise shown.

[0097] All directional references (e.g., proximal, distal, upper, lower, upward, downward, left, right, lateral, longitudinal, front, rear, top, bottom, above, below, vertical, horizontal, radial, axial, clockwise, and counterclockwise) are used for identification purposes only to aid the reader's understanding of this disclosure and do not constitute a limitation, particularly regarding the location, orientation, or use of this disclosure. Unless otherwise stated, connection references (e.g., attachment, coupling, connection, and joining) should be interpreted broadly and may include intermediate members between sets of elements and relative movement between elements. Similarly, connection references do not necessarily infer that two elements are directly connected and that a fixed relationship exists between them.

[0098] Furthermore, reference numerals (e.g., primary, secondary, first, second, third, fourth, etc.) do not imply importance or priority, but are used to distinguish one feature from another. The accompanying drawings are for illustrative purposes only, and the dimensions, positions, order, and relative dimensions reflected in the drawings may vary.

[0099] The scope of this disclosure is not limited to the specific embodiments described herein. In fact, various other embodiments and modifications of this disclosure will be apparent to those skilled in the art, in addition to those described herein, based on the foregoing description and drawings. Therefore, such other embodiments and modifications are intended to fall within the scope of this disclosure. Furthermore, this disclosure has been described herein in the context of specific embodiments in specific environments for specific purposes. Those skilled in the art will recognize that its usefulness is not limited thereto, and that this disclosure can be advantageously practiced in any number of environments for any purpose. Therefore, the claims set forth below should be interpreted in accordance with the full breadth and spirit of the disclosure described herein.

Claims

1. A transient voltage suppression system, characterized in that, include: A first voltage suppression device, the first voltage suppression device having a first voltage suppression device substrate, a first voltage suppression device first layer and a first voltage suppression device second layer, the first voltage suppression device substrate being coupled to the first voltage suppression device first layer and coupled to the first voltage suppression device second layer; The second voltage suppression device has a second voltage suppression device substrate, a second voltage suppression device first layer and a second voltage suppression device second layer, wherein the second voltage suppression device substrate is coupled to the second voltage suppression device first layer and is coupled to the second voltage suppression device second layer; and The first voltage suppression device is coupled to the second voltage suppression device.

2. The transient voltage suppression system according to claim 1, characterized in that, The first voltage suppression device substrate and the second voltage suppression device substrate are at least one of N-type substrate or P-type substrate.

3. The transient voltage suppression system according to claim 2, characterized in that, The first layer of the first voltage suppression device and the first layer of the second voltage suppression device are at least one of N-type layers or P-type layers; and The second base layer of the first voltage suppression device and the second layer of the second voltage suppression device are at least one of N-type layer, P-type layer, N+ type layer or P+ type layer.

4. The transient voltage suppression system according to claim 3, characterized in that, The first voltage suppression device has a first layer that is a P-type layer, a substrate that is an N-type substrate, and a second layer that is an N+ type layer.

5. The transient voltage suppression system according to claim 3, characterized in that, The first voltage suppression device has an N-type first layer, a P-type substrate, and a P+ type second layer.

6. The transient voltage suppression system according to claim 3, characterized in that, The first layer of the second voltage suppression device is an N+ type layer, the substrate of the second voltage suppression device is an N type substrate, and the second layer of the second voltage suppression device is a P type layer.

7. The transient voltage suppression system according to claim 3, characterized in that, The first layer of the second voltage suppression device is a P+ type layer, the substrate of the second voltage suppression device is a P type substrate, and the second layer of the second voltage suppression device is an N type layer.

8. The transient voltage suppression system according to claim 3, characterized in that, The first layer of the second voltage suppression device is a P-type layer, the substrate of the second voltage suppression device is an N-type substrate, and the second layer of the second voltage suppression device is a P-type layer.

9. The transient voltage suppression system according to claim 3, characterized in that, The first layer of the second voltage suppression device is an N-type layer, the substrate of the second voltage suppression device is a P-type substrate, and the second layer of the second voltage suppression device is an N-type layer.

10. The transient voltage suppression system according to claim 1, characterized in that, It also includes one or more terminals coupled to one or more layers of the first and second layers of the first and second voltage suppression devices, wherein the first and second voltage suppression devices are characterized by clamping voltages, wherein the clamping voltages are determined based on the bias of the one or more terminals.

11. The transient voltage suppression system according to claim 1, characterized in that, Each of the first voltage suppression device and the second voltage suppression device is characterized by its respective breakdown voltage.

12. The transient voltage suppression system according to claim 1, characterized in that, The first voltage suppression device is at least one of a unidirectional transient voltage suppression device or a bidirectional transient voltage suppression device.

13. The transient voltage suppression system according to claim 12, characterized in that, The second voltage suppression device is at least one of a unidirectional transient voltage suppression device or a bidirectional transient voltage suppression device.

14. The transient voltage suppression system according to claim 13, characterized in that, The transient voltage suppression system is an asymmetric transient voltage suppression system.

15. The transient voltage suppression system according to claim 1, characterized in that, The first voltage suppression device is coupled to the second voltage suppression device using conductive solder.

16. The transient voltage suppression system according to claim 15, characterized in that, The conductive solder couples the second layer of the first voltage suppression device and the first layer of the second voltage suppression device.

17. The transient voltage suppression system according to claim 1, characterized in that, The first layer of the first voltage suppression device is coupled to the anode or cathode terminal layer, and the second layer of the second voltage suppression device is coupled to another anode or another cathode terminal layer.