Low-side switching circuit for fault diagnosis and battery management system
By constructing a low-side switching circuit using discrete components and combining it with multiple fault detection units, the problem of single fault detection in low-side drive switching chips is solved, enabling comprehensive diagnosis of various faults, improving the reliability and flexibility of the circuit, and making it suitable for fields such as battery management systems.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- REPT BATTERO ENERGY CO LTD
- Filing Date
- 2025-04-30
- Publication Date
- 2026-04-28
AI Technical Summary
Existing low-side drive switch chips have a single fault detection type, resulting in incomplete fault diagnosis, affecting reliability, and are prone to damage under special loads, with high cost and poor flexibility.
A low-side switching circuit is constructed using discrete components. Through the coordinated operation of the low-side driving unit, the first fault detection unit, and the second fault detection unit, multiple faults can be detected simultaneously, including adhesion, short circuit, and open circuit diagnosis.
It improves the comprehensiveness and reliability of fault diagnosis, reduces costs, enhances adaptability and stability under special loads, and meets the needs of different application scenarios.
Smart Images
Figure CN224178154U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of fault diagnosis technology, and in particular to a low-side switching circuit and battery management system for fault diagnosis. Background Technology
[0002] With the rapid development of new energy electric vehicles, energy storage systems, and other fields, battery management systems (BMS) are playing an increasingly important role in battery protection, condition monitoring, and equalization control. Low-side drive, as a function of the BMS system, primarily controls the grounding terminal of the load, achieving power control of the load by connecting or disconnecting the connection between the load and ground.
[0003] In related technologies, low-side drive switches are mainly implemented using low-side switch chips. However, low-side switch chips can usually only diagnose one type of fault, which affects the comprehensiveness of fault diagnosis during low-side drive and reduces the reliability of low-side drive switches. Utility Model Content
[0004] This application provides a low-side switching circuit and battery management system for fault diagnosis, which solves the technical problems of single fault detection type and poor reliability of low-side drive switches in related technologies. This application constructs a low-side switching circuit by using discrete components, and through the collaborative work of the low-side drive unit, the first fault detection unit and the second fault detection unit, it can simultaneously detect multiple types of faults, improve the comprehensiveness of fault detection and greatly improve the reliability of the low-side switching circuit.
[0005] To achieve the above objectives, the main technical solutions adopted in this application include:
[0006] In a first aspect, embodiments of this application provide a low-side switching circuit for fault diagnosis. The low-side switching circuit includes: a low-side driving unit, a first fault detection unit, and a second fault detection unit. The low-side driving unit is adapted to receive a switching control signal and control whether a load is powered on based on the switching control signal. The first fault detection unit is connected to the low-side driving unit and the load, respectively. The first fault detection unit is adapted to detect the current in the circuit where the load is located to generate a first fault detection signal. The second fault detection unit is connected to...
[0007] The low-side drive unit and the load are respectively connected. The second fault detection unit is adapted to detect whether an open circuit occurs in the circuit where the load is located, so as to generate a second fault detection signal. The low-side drive unit is diagnosed as sticking, and the load is short-circuited or open-circuited based on the first fault detection signal, the second fault detection signal and the switch control signal.
[0008] The low-side switching circuit proposed in this application detects the current in the circuit containing the load through a first fault detection unit and controls whether the load is powered on through a low-side drive unit. Based on the corresponding first fault detection signal, it quickly identifies whether the load line has switch sticking or short-circuit faults. Furthermore, a second fault detection unit detects whether the circuit containing the load has an open circuit. Based on the first and second fault detection signals, it can promptly determine whether the load is disconnected, avoiding low-side drive failure due to open circuits. Therefore, this application uses discrete components to construct the low-side switching circuit, which not only improves the flexibility of hardware design and reduces costs, but also enables simultaneous diagnosis of various types of faults, such as sticking, open-circuit faults, and short-circuit faults. Compared with related technologies, it improves the comprehensiveness of fault diagnosis, meets different application scenarios, greatly improves the effectiveness and reliability of fault diagnosis, enhances the stability of the low-side switching circuit, and helps ensure the normal operation of the system.
[0009] Optionally, in some embodiments of this application, the low-side driving unit includes:
[0010] First switching transistor;
[0011] A first resistor, the first end of which is connected to the gate of the first switching transistor, and the second end of which is adapted to receive the switching control signal;
[0012] The second resistor has a first end connected to the gate of the first switching transistor, a second end connected to the source of the first switching transistor, and the second end grounded.
[0013] A third resistor, the first end of which is connected to the drain of the first switching transistor, and the second end of which is adapted to be connected to the load.
[0014] Optionally, in some embodiments of this application, the first switching transistor is an N-channel MOS transistor.
[0015] In this embodiment, the first switching transistor is set as an N-channel MOSFET, and the appropriate maximum drain-source voltage of the MOSFET is used to effectively avoid voltage spikes generated by special loads such as inductive loads and capacitive loads at the moment the first switching transistor is turned off. This ensures that the components in the low-side switching circuit will not be damaged or oscillate, thus improving the adaptability and reliability of the low-side switching circuit in special application scenarios with inductive loads, capacitive loads, etc.
[0016] Optionally, in some embodiments of this application, the first fault detection unit includes a first detection path and a second switch. One end of the first detection path is connected to the second end of the third resistor, the first end of the second switch is connected to the other end of the first detection path, the second end of the second switch is grounded, and the control terminal of the second switch is adapted to receive the switch control signal so that the first detection path detects the current of the circuit where the load is located when the second switch is turned on.
[0017] Optionally, in some embodiments of this application, the first detection path includes:
[0018] A fourth resistor, the first end of which is connected to the first end of the third resistor;
[0019] The fifth resistor has its first end connected to the second end of the fourth resistor, and its first end is adapted to output the first fault detection signal. The second end of the fifth resistor is connected to the first end of the second switching transistor.
[0020] This embodiment detects current changes in the load circuit through a first detection path and outputs a first fault detection signal, thereby diagnosing switch sticking and short-circuit faults based on the first fault detection signal. Furthermore, this embodiment maintains the second switch in the on state, thus limiting the short-circuit current when a short-circuit fault occurs, preventing damage to the devices in the first fault detection unit, and improving the reliability of the low-side switching circuit.
[0021] Optionally, in some embodiments of this application, the second fault detection unit includes a second detection path and a third switch. The first end of the third switch is connected to the first end of the third resistor, the second end of the third switch is connected to the second detection path, and the control end of the third switch is connected to the second end of the third resistor, so that the second detection path detects whether an open circuit has occurred in the circuit where the load is located based on the conduction state of the third switch.
[0022] Optionally, in some embodiments of this application, the second detection path includes:
[0023] The eighth resistor, the first end of which is connected to the collector of the third switching transistor;
[0024] The fourth switch is connected to the second terminal of the eighth resistor, and the first terminal of the fourth switch is adapted to be connected to a reference power supply.
[0025] The ninth resistor has its first end connected to the second end of the fourth switching transistor, and its second end is adapted to output the second fault detection signal.
[0026] The tenth resistor has its first end connected to the second end of the ninth resistor, and its second end is grounded.
[0027] In this embodiment, the first terminal and control terminal of the third switch are connected to the two ends of the third resistor, respectively, enabling the third switch to turn on and off according to voltage changes across the third resistor. Furthermore, the eighth resistor is connected to the second terminal of the third switch and the control terminal of the fourth switch, controlling the on / off state of the fourth switch based on the on / off state of the third switch. A second fault detection signal is then output through the ninth resistor to diagnose open-circuit faults in the load circuit, increasing the types of faults that can be diagnosed in the low-side switching circuit and thus improving the circuit's fault diagnosis capability and stability.
[0028] Optionally, in some embodiments of this application, the third switching transistor is an NPN transistor.
[0029] Optionally, in some embodiments of this application, the fourth switching transistor is a PNP transistor or a PMOS transistor.
[0030] Secondly, embodiments of this application provide a battery management system, including:
[0031] power supply;
[0032] Controller;
[0033] And the low-side switching circuit described in the above embodiments, wherein the low-side switching circuit is connected to the power supply and the controller respectively.
[0034] The battery management system proposed in this application uses discrete components to construct the aforementioned low-side switching circuit, controls the load to power on through the low-side driving unit, and performs different types of detection on the circuit where the load is located based on the corresponding fault detection signal. This not only improves the flexibility of hardware design and reduces costs, but also enables simultaneous diagnosis of various types of faults such as adhesion diagnosis, load open circuit diagnosis, and short circuit to power supply diagnosis. Compared with related technologies, it improves the comprehensiveness of fault diagnosis, can meet different application scenarios, greatly improves the effectiveness and reliability of fault diagnosis, enhances the fault diagnosis performance of the battery management system, and helps ensure the normal operation of the system. Attached Figure Description
[0035] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0036] Figure 1 This is a schematic diagram of a low-side switching circuit for fault diagnosis proposed in an embodiment of this application;
[0037] Figure 2 This is a circuit diagram of one embodiment of the low-side switching circuit proposed in this application;
[0038] Figure 3 The circuit diagram is shown in another embodiment of the low-side switching circuit proposed in this application.
[0039] Figure 4 This is a circuit diagram of the low-side switching circuit proposed in this application in yet another embodiment;
[0040] Figure 5 This is a schematic diagram of the battery management system proposed in an embodiment of this application. Detailed Implementation
[0041] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0042] Low-side drive, a function in a BMS system, is primarily responsible for controlling the load's grounding terminal. It connects or disconnects the load from ground by controlling the main positive and negative relays, thus controlling the load's power supply. In related technologies, low-side drive switches are typically implemented using low-side switch chips. When the switching device in the low-side drive switch is turned on, the load's grounding terminal is connected to ground, forming a closed loop. Current flows from the positive terminal of the power supply through the load, then through the switching device to ground, and the load begins to operate. When the switching device in the low-side drive switch is turned off, the load's grounding terminal is disconnected from ground, the loop is interrupted, and the load stops operating.
[0043] In some applications, low-side switching chips are used to control the on / off state of load relays. However, low-side switching chips have relatively limited fault detection capabilities, typically only able to diagnose one type of fault, which affects the comprehensiveness of fault diagnosis during low-side driving.
[0044] In other application scenarios, such as systems with special loads like inductive or capacitive loads, the low-side switching chips in related technologies are easily affected by instantaneous current spikes, leading to component damage or oscillation, which seriously affects the stability and reliability of the low-side switching chips.
[0045] In addition, the low-side switching chips used in the related technologies have a high degree of integration, which limits their application flexibility. Furthermore, the low-side switching chips have high cost and power consumption, making it difficult to meet the low-cost requirements.
[0046] This application provides a low-side switching circuit 10 for fault diagnosis, such as... Figure 1 As shown, the low-side switching circuit 10 can be used in power supply equipment such as battery management systems, energy storage systems, and new energy vehicle batteries. The low-side switching circuit 10 includes a low-side driving unit 11, a first fault detection unit 12, and a second fault detection unit 13. The low-side driving unit 11 is adapted to receive a switch control signal and control whether the load 20 is powered on based on the switch control signal. The first fault detection unit 12 is connected to both the low-side driving unit 11 and the load 20, and is adapted to detect the current in the circuit containing the load 20 to generate a first fault detection signal. The second fault detection unit 13 is connected to both the low-side driving unit 11 and the load 20, and is adapted to detect whether an open circuit has occurred in the circuit containing the load 20 to generate a second fault detection signal. The circuit diagnoses whether the low-side driving unit 11 is stuck, and whether the load 20 is short-circuited or open-circuited based on the first fault detection signal, the second fault detection signal, and the switch control signal.
[0047] Specifically, in some embodiments of this application, if the received switch control signal is valid, the low-side drive unit 11 connects the ground terminal of the load 20 to ground, thereby realizing low-side drive of the load and powering on the load 20. If the received switch control signal is invalid, the connection between the ground terminal of the load 20 and ground is disconnected, thereby cutting off the power supply to the load 20.
[0048] The first fault detection unit 12 and the second fault detection unit 13 generate corresponding first fault detection signals and second fault detection signals under the action of the low-side driving unit 11, respectively. The first fault detection unit 12 is connected to the line between the low-side driving unit 11 and the load 20, and works in conjunction with the aforementioned switch control signal. It can generate different first fault detection signals under the following conditions: normal operation of the low-side switching circuit 10, low-side driving unit 11 sticking, and load 20 short-circuiting. This allows for simultaneous detection of whether the low-side driving unit 11 is sticking and whether the load 20 is short-circuited. Therefore, the low-side switching circuit 10 provided in this embodiment detects the current in the circuit containing the load 20 through the first fault detection unit 12 and controls whether the load 20 is powered on through the low-side driving unit 11, thereby quickly identifying whether the load 20 line has switch sticking or short-circuit faults based on the corresponding first fault detection signals.
[0049] Furthermore, the second fault detection unit 13 is connected to the low-side drive unit 11 and the load 20 respectively, and works in conjunction with the aforementioned switch control signal. It can generate different second fault detection signals in the normal working state of the low-side switch circuit 10 and in the case of an open circuit in the load 20, respectively. It can detect whether the load 20 is open-circuited and avoid low-side drive failure caused by an open circuit.
[0050] This application embodiment uses discrete components to construct the aforementioned low-side switching circuit, which exhibits stable and reliable performance, is less affected by environmental factors, and, compared to low-side switching chips, has a lower cost, thus optimizing circuit design costs. Therefore, this application embodiment not only improves hardware design flexibility and reduces costs but also enables simultaneous diagnosis of various fault types, such as adhesion diagnosis, load open-circuit diagnosis, and short-circuit to power supply diagnosis. Compared with related technologies, this application embodiment enhances the comprehensiveness of fault diagnosis, meeting diverse application scenarios, significantly improving the effectiveness and reliability of fault diagnosis, and increasing the stability of the low-side switching circuit 10, thereby ensuring normal system operation.
[0051] In some embodiments of this application, such as Figure 2As shown, the low-side driving unit 11 includes a first switch Q1, a first resistor R1, a second resistor R2, and a third resistor R3. The first end of the first resistor R1 is connected to the gate of the first switch Q1, and the second end of the first resistor R1 is adapted to receive a switch control signal. The first end of the second resistor R2 is connected to the gate of the first switch Q1, and the second end of the second resistor R2 is connected to the source of the first switch Q1 and grounded. The first end of the third resistor R3 is connected to the drain of the first switch Q1, and the second end of the third resistor R3 is adapted to connect to the load 20.
[0052] It should be noted that in this embodiment, the load 20 is connected between the low-side drive unit 11 and the power supply 30, and the supply voltage of the power supply 30 is U0. Furthermore, in some embodiments of this application, the aforementioned switch control signal is generated by a controller (Microcontroller Unit, MCU), wherein the second end of the first resistor R1 is connected to the first control terminal MCU / IO_1 of the MCU. Under normal operating conditions, if the first control terminal MCU / IO_1 outputs a high-level switch control signal, the first switch transistor Q1 is turned on, connecting the ground terminal of the load 20 to ground, thus forming a loop between the load 20 and the power supply 30, and powering on the load 20. If the first control terminal MCU / IO_1 outputs a low-level switch control signal, the first switch transistor Q1 is turned off, and the loop between the power supply 30, the load 20, and the first switch transistor Q1 is broken, causing the load 20 to de-energize. The first switch transistor Q1 is an N-channel MOSFET.
[0053] Because the relays and other components in load 20 have inductive characteristics, the inductor stores energy when current flows through it. When the current is suddenly interrupted, the inductor attempts to maintain current continuity, thus generating a back electromotive force (EMF). If the first switch Q1 is suddenly turned off, the current in the inductive load 20 will decrease rapidly, causing the inductor to generate a back EMF. This back EMF will produce a voltage spike at the drain of the first switch Q1. The capacitors and other components in load 20 have capacitive characteristics. When voltage is applied to the capacitive load 20, the capacitors will charge and store energy. If the first switch Q1 is suddenly turned on, the capacitors in load 20 will discharge rapidly, generating a large transient current. Therefore, in some embodiments of this application, a MOS transistor with a suitable maximum drain-source voltage (VDSS) is selected to prevent the first switching transistor Q1 from being broken down, thereby effectively avoiding the influence of transient reverse electromotive force or transient current, ensuring that the discrete components in the low-side switching circuit 10 will not be damaged or oscillate, thus improving the adaptability and reliability of the low-side switching circuit 10 in special application scenarios with inductive load 20, capacitive load 20, etc.
[0054] In addition, in some other embodiments of this application, a clamping diode may be connected in parallel across the inductive load to clamp the transient voltage generated by special loads such as inductive or capacitive loads.
[0055] In some embodiments of this application, the first fault detection unit 12 includes a first detection path and a second switch Q2. One end of the first detection path is connected to the second end of the third resistor R3, the first end of the second switch Q2 is connected to the other end of the first detection path, the second end of the second switch Q2 is grounded, and the control terminal of the second switch Q2 is adapted to receive a switch control signal so that the first detection path can detect the current of the circuit where the load 20 is located when the second switch is turned on.
[0056] Specifically, in this embodiment, a voltage divider sampling circuit composed of several resistors connected in series is used as the first detection path to sample the current in the circuit where the load 20 is located when the second switch Q2 is turned on, thereby obtaining the first fault detection signal.
[0057] Furthermore, in some embodiments of this application, such as Figure 2 As shown, the first detection path includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7. The first end of the fourth resistor R4 is connected to the second end of the third resistor R3, the first end of the fifth resistor R5 is connected to the second end of the fourth resistor R4, and the first end of the fifth resistor R5 is adapted to output a first fault detection signal. The second end of the fifth resistor R5 is connected to the first end of the second switch Q2. The first end of the sixth resistor R6 is connected to the control terminal of the second switch Q2 and is grounded. The first end of the seventh resistor R7 is connected to the control terminal of the second switch Q2, and the second end of the seventh resistor R7 is adapted to receive a protection control signal to perform short-circuit protection according to the protection control signal.
[0058] Among them, such as Figure 2 As shown, in some embodiments of this application, the second switch Q2 is an N-channel MOS transistor. The drain of the second switch Q2 is connected to the second terminal of the fifth resistor R5 as the first terminal, the source of the second switch Q2 is grounded as the second terminal, and the gate of the second switch Q2 is connected to the first terminal of the seventh resistor R7 as the control terminal.
[0059] like Figure 3 As shown, in some other embodiments of this application, the second switch Q2 is an NPN transistor. The collector of the second switch Q2 is connected to the second terminal of the fifth resistor R5 as the first terminal, the emitter of the second switch Q2 is grounded as the second terminal, and the base of the second switch Q2 is connected to the first terminal of the seventh resistor R7 as the control terminal.
[0060] Specifically, in this embodiment, the first fault detection unit 12 detects the current in the circuit where the load 20 is located to generate a first fault detection signal, and then diagnoses whether the low-side drive unit 11 is stuck based on the synergistic effect of the first fault detection signal and the switch control signal.
[0061] The "sticking" of the low-side drive unit 11 refers to the sticking of the first switch Q1. Under normal operating conditions, the first switch Q1 responds to the switching control signal issued by the first control terminal MCU / IO_1, quickly switching between on and off states. When the first switch Q1 is on, the current in the circuit containing load 20 can flow smoothly; when it is off, the current in the circuit containing load 20 cannot flow.
[0062] However, the switching transistor may experience sticking failure during operation. On the one hand, long-term use of the switching transistor will cause the device to gradually age and its performance to degrade, making it unable to respond properly to the switching control signal, eventually leading to sticking. On the other hand, when the switching transistor experiences overload, overheating, or breakdown, its internal semiconductor material will be damaged, resulting in sticking. When the first switching transistor Q1 experiences a sticking failure, it cannot respond to the switching control signal. Therefore, if the first control terminal MCU / IO_1 sends a low-level switching control signal, expecting to de-energize load 20, the sticking failure of the first switching transistor Q1 prevents it from responding to the low-level switching control signal and turning off, causing the load 20 to fail to de-energize.
[0063] In this embodiment, the first fault detection unit 12 is used to detect the current change in the load 20 circuit, and the connection node of the fourth resistor R4 and the fifth resistor R5 is connected to the first detection terminal MCU / ADC_1 of the MCU, so as to send the first fault detection signal generated by the first fault detection unit 12 into the MCU, and then the MCU performs analog-to-digital conversion on the first fault detection signal, so that the MCU can obtain the diagnostic result of whether the low-side drive unit 11 has stuck.
[0064] It should be noted that, considering that the on-resistance RDS(ON) of the switching transistors Q1, Q2, Q3, and Q4 is relatively small, the on-resistance of the switching transistors Q1, Q2, Q3, and Q4 is ignored in this embodiment for ease of calculation. The calculation results have no adverse effect on the diagnostic results of the low-side drive unit, and this embodiment is not limited thereto.
[0065] When the switch control signal issued by the first control terminal MCU / IO_1 is high, if the low-side switch circuit is in normal working condition, the voltage detected by the first detection terminal MCU / ADC_1 is as shown in formula (1):
[0066]
[0067] In the formula, R' represents the series resistance of the fourth resistor R4 and the fifth resistor R5 and the parallel resistance of the third resistor R3. The calculation result of R' is shown in formula (2):
[0068]
[0069] If the first switch Q1 is not stuck, then when the switch control signal sent by the first control terminal MCU / IO_1 goes low, the first switch Q1 is turned off. At this time, the first detection terminal MCU / ADC_1 receives the first fault detection signal V. ADC_1 The calculation results are shown in formula (3):
[0070]
[0071] In the formula, U0 is the supply voltage of the power source, and R L This is the equivalent resistance value of the load 20.
[0072] If the first switch Q1 is stuck together, when the switch control signal sent by the first control terminal MCU / IO_1 becomes low, the first switch Q1 will still be in the conducting state. At this time, the voltage of the first fault detection signal output by the first detection terminal MCU / ADC_1 will remain unchanged by the voltage value calculated by the above formula (1).
[0073] Therefore, if the switch control signal sent by the first control terminal MCU / IO_1 changes from high level to low level, the first fault detection signal V received by the first detection terminal MCU / ADC_1 will be... ADC_1 If the voltage value calculated by formula (1) remains unchanged, it is determined that the first switching transistor Q1 has a sticking fault. Similarly, if the switching control signal sent by the first control terminal MCU / IO_1 changes from low level to high level, and the first detection terminal MCU / ADC_1 receives the first fault detection signal, and the voltage value calculated by formula (3) remains unchanged, it can also be determined that the first switching transistor Q1 has a sticking fault, that is, the low-side drive unit 11 has sticked. In addition, the MCU can determine the first fault detection signal V received by the first detection terminal MCU / ADC_1 based on the voltage value calculated by formula (3). ADC_1 In the event of adhesion, diagnostic information for adhesion of the low-side drive unit 11 is generated and reported.
[0074] Furthermore, in this embodiment of the application, the load 20 is diagnosed as short-circuited based on the synergistic effect of the first fault detection signal and the switch control signal.
[0075] Load 20 short circuit refers to Figure 2The diagram shows a short circuit between node A and node B, meaning load 20 is short-circuited to the power supply. In this case, the voltage at node A will rise to the supply voltage U0 of power supply 30. This embodiment uses a first fault detection unit 12 to detect current changes in the load 20 circuit and sends the first fault detection signal generated by the first fault detection unit 12 to the MCU. The MCU then performs analog-to-digital conversion on the first fault detection signal, thereby obtaining a diagnostic result regarding whether a short circuit has occurred in load 20.
[0076] If load 20 does not short-circuit power supply 30, then the first detection terminal MCU / ADC_1 receives the first fault detection signal V. ADC_1 The calculation result is shown in the above formula (1). If the load 20 short-circuits the power supply 30, the voltage at node A becomes U0. If the first switch Q1 is turned on at this time, the first detection terminal MCU / ADC_1 receives the first fault detection signal V. ADC_1 The calculation results are shown in formula (4):
[0077]
[0078] If the first switch Q1 is turned off at this time, the first detection terminal MCU / ADC_1 will receive the first fault detection signal V. ADC_1 The calculation results are shown in formula (5):
[0079]
[0080] Therefore, if the first fault detection signal is the voltage value calculated by formula (4) or formula (5) above, it is determined that a short circuit fault has occurred in load 20. Furthermore, the MCU can determine the first fault detection signal V received by the first detection terminal MCU / ADC_1 based on the voltage value calculated by formula (4) or formula (5) above. ADC_1 In the event of a short circuit in load 20, diagnostic information is generated and reported.
[0081] Therefore, the first fault detection unit 12 proposed in the above embodiment can diagnose whether the low-side drive unit 11 is stuck or whether the load 20 is short-circuited, thus optimizing the comprehensiveness of fault diagnosis.
[0082] Furthermore, in some embodiments of this application, the second terminal of the seventh resistor R7 is connected to the second control terminal MCU / IO_2 of the MCU to receive the protection control signal issued by the second control terminal MCU / IO_2. In this embodiment, when a short circuit occurs in the load 20, the voltage at node A is the supply voltage U0 of the power supply 30. If the first switch Q1 is in the off state at this time, it will generate an overcurrent in the first fault detection unit 12, resulting in an excessive current flowing through the fourth resistor R4, which may damage the first detection terminal MCU / ADC_1. Therefore, in this embodiment, the protection control signal issued by the second control terminal MCU / IO_2 is always kept at a high level to keep the second switch Q2 in the on state. Thus, when the load 20 is short-circuited, the overcurrent is grounded after being limited by the fifth resistor R5, thereby providing overcurrent protection for the first detection terminal MCU / ADC_1 and preventing damage to the first detection terminal MCU / ADC_1, thereby improving the reliability of the low-side switching circuit 10.
[0083] In some embodiments of this application, the second fault detection unit 13 includes a second detection path and a third switch Q3. The first end of the third switch Q3 is connected to the first end of the third resistor R3, the second end of the third switch Q3 is connected to the second detection path, and the control end of the third switch Q3 is connected to the second end of the third resistor R3, so that the second detection path detects whether an open circuit occurs in the circuit where the load 20 is located according to the conduction state of the third switch Q3.
[0084] Specifically, when the first switch Q1 is turned on, this embodiment of the application responds to the open circuit fault in the circuit where the load 20 is located by the on state of the third switch Q3, thereby causing the second detection path to be disconnected when there is an open circuit fault, thus realizing the detection of the open circuit fault.
[0085] Furthermore, in some embodiments of this application, such as Figure 2As shown, the third switch Q3 is an NPN transistor, with its base serving as the control terminal, its emitter as the first terminal, and its collector as the second terminal. The second detection path includes a fourth switch Q4, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and an eleventh resistor R11. The first terminal of the eighth resistor R8 is connected to the collector of the third switch Q3. The control terminal of the fourth switch Q4 is connected to the second terminal of the eighth resistor R8, and the first terminal of the fourth switch Q4 is suitable for connecting to the reference power supply VCC. The first terminal of the ninth resistor R9 is connected to the second terminal of the fourth switch Q4, and the second terminal of the ninth resistor R9 is suitable for outputting a second fault detection signal. The first terminal of the tenth resistor R10 is connected to the second terminal of the ninth resistor R9, and the second terminal of the tenth resistor R10 is grounded. The first terminal of the eleventh resistor R11 is connected to the control terminal of the fourth switch Q4, and the second terminal of the eleventh resistor R11 is connected to the first terminal of the fourth switch Q4.
[0086] In some embodiments of this application, such as Figure 2 and Figure 3 As shown, the fourth switch Q4 is a PNP transistor. The base of the fourth switch Q4 is connected to the second terminal of the eighth resistor R8 as the control terminal, the emitter of the fourth switch Q4 is connected to the second terminal of the eleventh resistor R11 as the first terminal, and the collector of the fourth switch Q4 is connected to the first terminal of the ninth resistor R9 as the second terminal.
[0087] In other embodiments of this application, such as Figure 4 As shown, the fourth switch Q4 is a PMOS transistor. The gate of the fourth switch Q4 is connected to the second terminal of the eighth resistor R8 as the control terminal. The source of the fourth switch Q4 is connected to the second terminal of the eleventh resistor R11 as the first terminal. The drain of the fourth switch Q4 is connected to the first terminal of the ninth resistor R9 as the second terminal.
[0088] Specifically, in this embodiment, the second fault detection unit 13 detects the current in the circuit where the load 20 is located to generate a second fault detection signal, and then diagnoses whether the load 20 is open-circuited based on the synergistic effect of the second fault detection signal and the switch control signal.
[0089] Among them, the second end of the ninth resistor R9 is connected to the second detection terminal MCU / ADC_2 of the MCU. The second detection terminal MCU / ADC_2 receives the second fault detection signal sent by the second fault detection unit 13, and then performs analog-to-digital conversion on the second fault detection signal, so that the MCU can obtain the diagnostic result of whether the load 20 is open circuit.
[0090] Typically, an open-circuit fault in load 20 occurs during the power-on phase. Therefore, in this embodiment, open-circuit diagnosis is performed when the first control terminal MCU / IO_1 sends a high-level switching control signal. If the low-side switching circuit 10 is in normal operating condition, and both the third switch Q3 and the fourth switch Q4 are in saturation conduction state, the base of the third switch Q3 is at a high level, causing the third switch Q3 to conduct. Consequently, the base voltage of the fourth switch Q4 is pulled low, causing the fourth switch Q4 to conduct. At this time, the second detection terminal MCU / ADC_2 receives the second fault detection signal V. ADC_2 The calculation results are shown in formula (6):
[0091]
[0092] In the formula, U VCC The voltage of the reference power supply VCC is as described above.
[0093] It should be noted that if the low-side switching circuit is in normal operating condition, and the third switch Q3 and the fourth switch Q4 are in a non-saturated conduction state, then the second detection terminal MCU / ADC_2 will receive the second fault detection signal V. ADC_2 The result will be less than the calculation result of the above formula (6). In this embodiment, it is ensured that the third switch is in a saturated conduction state.
[0094] If an open-circuit fault occurs in load 20, meaning the loop between node A and node B is broken, the current flowing through the third resistor R3 will be 0A, causing the third switch Q3 and the fourth switch Q4 to be in the off state. At this time, the first fault detection signal V... ADC_1 =0V, and the second fault detection signal V ADC_2 =0V. The MCU can receive the first fault detection signal V. ADC_1 Second fault detection signal V ADC_2 In such cases, generate and report diagnostic information indicating that load 20 has an open circuit.
[0095] Therefore, in this embodiment, the emitter and base of the third switch Q3 are connected to the two ends of the third resistor R3, respectively, so that the third switch Q3 can turn on and off according to the voltage change across the third resistor R3. Furthermore, the eighth resistor R8 is connected to the collector of the third switch Q3 and the base of the fourth switch Q4, so as to control the turn-on and turn-off of the fourth switch Q4 based on the conduction state of the third switch Q3. This, in turn, outputs a second fault detection signal through the ninth resistor R9, and diagnoses open-circuit faults in the load 20 circuit based on the second fault detection signal. This increases the fault diagnosis types of the low-side switching circuit 10, thereby improving the circuit's fault diagnosis capability and stability.
[0096] Therefore, the embodiments of this application use discrete components to build the low-side switching circuit 10. While realizing the low-side driving function of the load 20 through the low-side driving unit 11, the first fault detection unit 12 and the second fault detection unit 13 in the low-side switching circuit 10 can also diagnose whether the low-side driving unit 11 is stuck, and whether the load 20 is short-circuited or open-circuited.
[0097] Specifically, the embodiments of this application solve the problems of adhesion, short circuit and open circuit that may occur in the low-side switching circuit during long-term operation. It can also use a single circuit structure to detect multiple faults at the same time. Compared with the method of using a dedicated low-side switching chip, it overcomes the limitation of related technologies that cannot detect multiple faults at the same time. The embodiments of this application improve the comprehensiveness of fault diagnosis, greatly improve the effectiveness and reliability of fault diagnosis, improve the stability of the low-side switching circuit 10, and help ensure the normal operation of the system.
[0098] Furthermore, compared to the complex and costly circuit structure of low-side switching chips, the low-side switching circuit 10 proposed in this application has a simple structure and significantly reduces costs. Moreover, the selection and procurement of discrete components offer greater flexibility, allowing users to optimize costs according to their actual needs without sacrificing performance.
[0099] Accordingly, please refer to Figure 5 This application also provides a battery management system 1, including the low-side switching circuit 10, power supply 30 and controller 40 described in the above embodiments. The low-side switching circuit 10 is connected to the power supply 30 and the controller (MCU) 40 respectively. The low-side switching circuit 10 is also connected to the load 20 to realize low-side driving.
[0100] In this embodiment, the controller 40 includes a first control terminal MCUO / IO_1, a second control terminal MCU / IO_2, a first detection terminal MCU / ADC_1, and a second detection terminal MCU / ADC_2. The first control terminal MCU / IO_1 and the second control terminal MCU / IO_2 are high-speed output interfaces used to output switch control signals. The first detection terminal MCU / ADC_1 and the second detection terminal MCU / ADC_2 are high-speed input ports used to receive a first fault detection signal and a second fault detection signal, and perform analog-to-digital conversion on them.
[0101] The controller 40 may be a central processing unit, a network processor, or a combination thereof. The controller 40 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CPL), a field-programmable gate array (FPGA), a general-purpose array logic (GPA), or any combination thereof.
[0102] The controller 40 can report the first fault detection signal and the second fault detection signal after analog-to-digital conversion to the computer equipment, so that the user can obtain various fault diagnosis results such as adhesion diagnosis, load open circuit diagnosis, and short circuit to power supply of the low-side switch circuit 10, and thus deal with the fault situation in a timely manner.
[0103] The specific configurations and further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.
[0104] The battery management system 1 proposed in this application uses discrete components to construct the aforementioned low-side switching circuit, controls the load to power on through the low-side driving unit, and performs different types of detection on the circuit where the load is located based on the corresponding fault detection signal. This not only improves the flexibility of hardware design and reduces costs, but also enables simultaneous diagnosis of various types of faults such as adhesion diagnosis, load open circuit diagnosis, and short circuit to power supply diagnosis. Compared with related technologies, it improves the comprehensiveness of fault diagnosis, can meet different application scenarios, greatly improves the effectiveness and reliability of fault diagnosis, and enhances the fault diagnosis performance of the battery management system 1, which is conducive to ensuring the normal operation of the system.
[0105] Accordingly, this application provides a new energy vehicle, including the battery management system 1 described in the above embodiments.
[0106] The specific configurations and further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.
[0107] The new energy vehicle proposed in this application uses the aforementioned battery management system to power on the load and detects the circuit where the load is located based on the corresponding fault detection signal. This not only improves the flexibility of hardware design and reduces costs, but also enables simultaneous diagnosis of various types of faults, such as adhesion diagnosis, load open circuit diagnosis, and short circuit to power supply diagnosis. Compared with related technologies, this improves the comprehensiveness of fault diagnosis, meets different application scenarios, greatly improves the effectiveness and reliability of fault diagnosis, enhances the fault diagnosis performance of the battery management system, and helps ensure the normal operation of the system.
[0108] For ease of description, the above devices are described separately by function as various units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware.
[0109] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0110] The various embodiments in this specification are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.
[0111] The above description is merely an embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this application should be included within the scope of the claims of this application.
[0112] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and such modifications and variations all fall within the scope defined by the appended claims.
Claims
1. A low-side switching circuit for fault diagnosis, characterized in that, The low-side switching circuit includes a low-side driving unit, a first fault detection unit, and a second fault detection unit. The low-side driving unit is adapted to receive a switch control signal and control whether the load is powered on based on the switch control signal. The first fault detection unit is connected to the low-side driving unit and the load, respectively. The first fault detection unit is adapted to detect the current in the circuit where the load is located to generate a first fault detection signal. The second fault detection unit is connected to the low-side driving unit and the load, respectively. The second fault detection unit is adapted to detect whether an open circuit occurs in the circuit where the load is located to generate a second fault detection signal. The circuit is used to diagnose whether the low-side driving unit is stuck, and whether the load is short-circuited or open-circuited, based on the first fault detection signal, the second fault detection signal, and the switch control signal.
2. The low-side switching circuit according to claim 1, characterized in that, The low-side driving unit includes: First switching transistor; A first resistor, the first end of which is connected to the gate of the first switching transistor, and the second end of which is adapted to receive the switching control signal; The second resistor has a first end connected to the gate of the first switching transistor, a second end connected to the source of the first switching transistor, and the second end grounded. A third resistor, the first end of which is connected to the drain of the first switching transistor, and the second end of which is adapted to be connected to the load.
3. The low-side switching circuit according to claim 2, characterized in that, The first switching transistor is an N-channel MOSFET.
4. The low-side switching circuit according to claim 2 or 3, characterized in that, The first fault detection unit includes a first detection path and a second switch. One end of the first detection path is connected to the second end of the third resistor, and the first end of the second switch is connected to the other end of the first detection path. The second end of the second switch is grounded, and the control terminal of the second switch is adapted to receive the switch control signal so that the first detection path can detect the current of the circuit where the load is located when the second switch is turned on.
5. The low-side switching circuit according to claim 4, characterized in that, The first detection path includes: A fourth resistor, the first end of which is connected to the second end of the third resistor; The fifth resistor has its first end connected to the second end of the fourth resistor, and its first end is adapted to output the first fault detection signal. The second end of the fifth resistor is connected to the first end of the second switching transistor.
6. The low-side switching circuit according to claim 2 or 3, characterized in that, The second fault detection unit includes a second detection path and a third switch. The first end of the third switch is connected to the first end of the third resistor, the second end of the third switch is connected to the second detection path, and the control end of the third switch is connected to the second end of the third resistor, so that the second detection path can detect whether an open circuit has occurred in the circuit where the load is located based on the conduction state of the third switch.
7. The low-side switching circuit according to claim 6, characterized in that, The second detection path includes: The eighth resistor, the first end of which is connected to the second end of the third switching transistor; The fourth switch is connected to the second terminal of the eighth resistor, and the first terminal of the fourth switch is adapted to be connected to a reference power supply. The ninth resistor has its first end connected to the second end of the fourth switching transistor, and its second end is adapted to output the second fault detection signal. The tenth resistor has its first end connected to the second end of the ninth resistor, and its second end is grounded.
8. The low-side switching circuit according to claim 6, characterized in that, The third switching transistor is an NPN transistor.
9. The low-side switching circuit according to claim 7, characterized in that, The fourth switching transistor is a PNP transistor or a PMOS transistor.
10. A battery management system, characterized in that, The battery management system includes: power supply; Controller; And the low-side switching circuit according to any one of claims 1-9, wherein the low-side switching circuit is connected to the power supply and the controller respectively.