Circuit utilizing LDO to turn on or turn off DSP power supply in delayed mode

Abstract

The utility model discloses a circuit utilizing an LDO (Low Dropout Regulator) to turn on or turn off DSP (Digital Signal Processor) power supply in a delayed manner, which comprises a low dropout regulator, and an access circuit, a delayed turn-on circuit and a delayed turn-off circuit are arranged in the low dropout regulator. The circuit overcomes the defect of harmful detonation sound generated when the DSP is turned on and turned off in the prior art, and can realize the control of the delay turn-on and delay turn-off circuit of the vehicle-mounted DSP by utilizing a simple and low-cost circuit, thereby solving the detonation sound caused by the fact that the current vehicle-mounted DSP is turned on when being powered on and turned off when being powered off; according to the circuit, the LDO is utilized, the low dropout regulator is changed to have four pins which are the power input end, the power output end, the grounding end and the enabling end, the power input and output range of the LDO can well meet the requirement of automobile voltage, and in the delay starting circuit, the delay of the starting circuit is flexibly adjusted by setting the configuration values of a resistor and a capacitor.

Description

Technical Field

[0001] This utility model relates to the field of DSP power supply control circuit technology, specifically a circuit that uses an LDO to delay turning on or off the DSP power supply. Background Technology

[0002] With economic development and the improvement of people's living standards, car audio systems are becoming increasingly integrated into people's lives, leading to higher demands for precise and practical car audio control.

[0003] However, traditional DSP circuits have the following drawbacks:

[0004] Currently, most DSPs do not have circuitry to control the device's delayed on / off state. Turning on the DSP too quickly when starting music playback can easily cause popping noises during startup. Similarly, turning off the DSP too slowly or too quickly when ending music playback can also cause popping noises, affecting the driver's music listening experience and even interfering with normal driving. Utility Model Content

[0005] The purpose of this invention is to provide a circuit that uses an LDO to delay the on or off of the DSP power supply, in order to solve the problem mentioned in the background art that most DSPs do not have circuits to control the device to delay the on or off of itself. When music starts playing, turning on the DSP too quickly can easily cause a popping sound at startup; at the same time, turning off the DSP too slowly or too quickly when music ends can also cause a popping sound, affecting the driver's music listening experience, and even affecting the driver's normal driving.

[0006] To achieve the above objectives, this utility model provides the following technical solution: a circuit for powering a DSP using an LDO with a delay to enable or disable it, comprising a low-dropout regulator. From left to right, a power input connector, a power output connector, a grounding connector, and an enable connector are fixedly installed on one side of the low-dropout regulator. The low-dropout regulator contains an access circuit, a delay-on circuit, and a delay-off circuit.

[0007] Preferably, the access circuit includes a four-pole circuit breaker P4, with pin 1 of the four-pole circuit breaker P4 connected to a 12V+ power supply, pin 2 of the four-pole circuit breaker P4 grounded, pin 3 of the four-pole circuit breaker P4 connected to an input power supply 1K resistor, and pin 4 of the four-pole circuit breaker P4 connected to an output power supply 1K resistor -OUT.

[0008] Preferably, the delay-on circuit includes an integrated circuit U1, a resistor R1, a capacitor C2, a fuse F1, a MOSFET Q1, a resistor R4, and a resistor R5. One pin of the integrated circuit U1 is connected to one end of the fuse F1, and the other end of the fuse F1 is connected to one end of the MOSFET Q1. The other end of the MOSFET Q1 is connected to one end of the resistor R4 and one end of the resistor R5. The four pins of the integrated circuit U1 are connected to one end of the resistor R1 and one end of the capacitor C2. The other end of the resistor R5, the three pins of the integrated circuit U1, the other end of the resistor R1, and the other end of the capacitor C2 are all grounded.

[0009] Preferably, the delayed shutdown circuit includes an integrated circuit U2, a capacitor C1, a resistor R2, and a resistor R3. The four pins of the integrated circuit are respectively connected to one end of the capacitor C1, one end of the resistor R2, and one end of the resistor R3. The three pins of the integrated circuit U2, the other end of the capacitor C1, and the other end of the resistor R2 are all grounded.

[0010] Preferably, a field-effect transistor (FET) SI2308 is provided on one side of the low-dropout regulator. A 1K resistor and a 10K resistor are respectively provided at both ends of one side of the FET SI2308. A 10MΩ resistor is provided at one end of the low-dropout regulator, and a 1uF capacitor is provided at the other end of the low-dropout regulator. One end of the 1K resistor and one end of the 10K resistor are both connected to one end of the FET SI2308. A resettable fuse is fixedly connected to the other end of the FET SI2308. One end of the resettable fuse, one end of the 10MΩ resistor, and one end of the 1uF capacitor are all connected to the end of the low-dropout regulator that is directly opposite it.

[0011] Preferably, one end of the low dropout regulator is provided with an 8.06K resistor, and the other end of the low dropout regulator is provided with a 220uf capacitor and a 1K resistor. One end of the 1K resistor is connected to one end of the 220uf capacitor, and the other end of the 220uf capacitor and one end of the 8.06K resistor are both connected to the side of the low dropout regulator that is facing it.

[0012] Compared with the prior art, the beneficial effects of this utility model are:

[0013] 1. This circuit overcomes the harmful popping noise generated by the DSP during power-on and power-off in the existing technology. It can realize the control of the delayed start-up and delayed shutdown circuit of the vehicle DSP by using a simple and low-cost circuit, thereby solving the popping noise caused by the current vehicle DSP that starts when power is supplied and shuts down when power is cut off.

[0014] 2. This circuit utilizes an LDO (Low Dropout Regulator), which has four pins: power input, power output, ground, and enable. The LDO's power input and output range can well adapt to the requirements of automotive voltage. In the delayed start circuit, the delay of the start circuit can be flexibly adjusted by setting the configuration values ​​of resistors and capacitors. Attached Figure Description

[0015] Figure 1 This is one of the connection diagrams of this utility model;

[0016] Figure 2 This is a circuit diagram of the access circuit of this utility model;

[0017] Figure 3 This is a circuit diagram of the time-delay start-up circuit of this utility model;

[0018] Figure 4 This is a circuit diagram of the time-delayed turn-off circuit of this utility model;

[0019] Figure 5 This is the second connection diagram of this utility model.

[0020] In the diagram: 1. 1K resistor; 2. 10K resistor; 3. SI2308 MOSFET; 4. Low dropout voltage regulator; 5. 10MΩ resistor; 6. 1uF capacitor; 7. Resettable fuse; 8. Power input connector; 9. Power output connector; 10. Ground connector; 11. Enable connector; 12. 8.06K resistor; 13. 220uF capacitor. Detailed Implementation

[0021] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention.

[0022] Please see Figure 1-5 This utility model provides a circuit for using an LDO to delay-on or delay-off DSP power supply, including a low dropout regulator 4. From left to right, a power input terminal connector 8, a power output terminal connector 9, a ground terminal connector 10, and an enable terminal connector 11 are fixedly installed on one side of the low dropout regulator 4. The low dropout regulator 4 is provided with an access circuit, a delay-on circuit, and a delay-off circuit.

[0023] The circuit includes a four-pole circuit breaker P4. Pin 1 of the four-pole circuit breaker P4 is connected to a 12V+ power supply, pin 2 of the four-pole circuit breaker P4 is grounded, pin 3 of the four-pole circuit breaker P4 is connected to an input power supply 1K resistor, and pin 4 of the four-pole circuit breaker P4 is connected to an output power supply 1K resistor -OUT.

[0024] The time-delay turn-on circuit includes integrated circuit U1, resistor R1, capacitor C2, fuse F1, MOSFET Q1, resistor R4, and resistor R5. Pin 1 of integrated circuit U1 is connected to one end of fuse F1, and the other end of fuse F1 is connected to one end of MOSFET Q1. The other end of MOSFET Q1 is connected to one end of resistor R4 and one end of resistor R5. Pin 4 of integrated circuit U1 is connected to one end of resistor R1 and one end of capacitor C2. The other end of resistor R5, pin 3 of integrated circuit U1, the other end of resistor R1, and the other end of capacitor C2 are all grounded.

[0025] The time-delay shutdown circuit includes integrated circuit U2, capacitor C1, resistor R2 and resistor R3. The four pins of the integrated circuit are connected to one end of capacitor C1, one end of resistor R2 and one end of resistor R3, respectively. The three pins of integrated circuit U2, the other end of capacitor C1 and the other end of resistor R2 are all grounded.

[0026] A field-effect transistor SI23083 is provided on one side of the low dropout regulator 4. A 1K resistor 1 and a 10K resistor 2 are respectively provided at the two ends of one side of the field-effect transistor SI23083. A 10MΩ resistor 5 is provided at one end of the low dropout regulator 4. A 1uF capacitor 6 is provided at the other end of the low dropout regulator 4. One end of the 1K resistor 1 and one end of the 10K resistor 2 are both connected to one end of the field-effect transistor SI23083. A resettable fuse 7 is fixedly connected to the other end of the field-effect transistor SI23083. One end of the resettable fuse 7, one end of the 10MΩ resistor 5, and one end of the 1uF capacitor 6 are all connected to the end of the low dropout regulator 4 that is directly opposite to it.

[0027] One end of the low dropout regulator 4 is equipped with an 8.06K resistor 12, and the other end of the low dropout regulator 4 is equipped with a 220uf capacitor 13 and a 1K resistor 1. One end of the 1K resistor 1 is connected to one end of the 220uf capacitor 13, and the other end of the 220uf capacitor 13 and one end of the 8.06K resistor 12 are both connected to the side of the low dropout regulator 4 facing the voltage regulator 4.

[0028] Example 1:

[0029] In this embodiment, the following steps are taken: The ACC pin is connected to the gate of an N-channel MOSFET (e.g., SI23083) via a 1K resistor 1, and grounded via a 10K resistor 2. Pin 2 of the SI23083 is directly connected to the vehicle's constant power supply. Pin 3 of the SI23083 is connected to the input pin of a 378R12 low-dropout regulator 4 via a resettable fuse 7. The output pin of the 378R12 low-dropout regulator 4 is connected to the control terminal of the DSP. A 10MΩ resistor 5 is connected between the ground and enable pins of the 378R12 low-dropout regulator 4, and a 1µF capacitor 6 is also connected between the ground and enable pins of the 378R12 low-dropout regulator 4. The ground pin is then connected to the vehicle's ground wire. Finally, pin 2 of the 378R12 low-dropout regulator 4 is connected to the control pin of the DSP, thus enabling the DSP to start with a delay.

[0030] Example 2:

[0031] In this embodiment, the ACC is connected to pin 4 of a 2K resistor 378R12 low-dropout regulator 4. Simultaneously, an 8.06K resistor 13 and a 220uf capacitor 14 are connected in parallel between pin 3 (ground) and pin 4 (enable) of the 378R12 low-dropout regulator 4. Pin 3 is grounded. The input pin of the 378R12 low-dropout regulator 4 is connected to the vehicle's constant power supply, and the output pin of the 378R12 low-dropout regulator 4 is connected to the control terminal of the DSP. When the vehicle's ACC is turned off, the DSP can be delayed and shut down.

[0032] Example 3:

[0033] In this embodiment, the delayed start circuit uses a 10MΩ resistor (2) and a 1µF capacitor (6) connected in parallel between ground and the enable terminal. The input terminal is connected to the 1K resistor (1) of the Adaptive Cruise Control circuit of the car via an N-channel MOSFET. The LDO output terminal is connected to the DSP enable signal input. When the 1K resistor supplies power to the LDO input terminal, current flows into the pull-up pin through the internal circuit of the LDO. Due to the presence of the voltage divider resistor and the charging capacitor, and because the internal pull-up resistor has a high resistance value, the pull-up circuit cannot directly pull the enable pin potential up to the threshold required for output start. Instead, it discharges through the voltage divider resistor while charging the charging capacitor until the capacitor is fully charged, thus achieving the purpose of delayed start. The delayed start of this circuit is approximately 5 seconds. The delay of the start circuit can be flexibly adjusted by setting the configuration values ​​of the resistor and capacitor. In the delayed shutdown circuit, an 8.6K resistor (12) and a 220µF capacitor (13) are connected in parallel between the enable terminal and ground. Simultaneously, connect the 1K resistor 1 to the LDO's enable pin, the automotive constant power to the LDO's input pin, and the output to the DSP's enable pin. When music playback needs to be stopped, the 1K resistor 1 will be de-energized. However, since the 220uf capacitor 13 is already fully charged during normal use, when the 1K resistor 1 is disconnected, the capacitor will provide reverse power to the LDO's enable pin. Due to the internal pull-up resistor of the LDO, this discharge circuit will be slowly delayed until the capacitor is fully discharged, at which point the enable pin is pulled down to the bottom by the 8.6K resistor 12, and the LDO's output pin is turned off. The specific delay time can be flexibly set by adjusting the values ​​of the capacitor and resistor. The delay time of the above circuit is approximately 5 seconds. The input pin supply voltage range of the low dropout regulator 4 is 12.5V-35V. The output pin voltage is 12V DC, and the power supply input range of the enable pin is 12.5-35V DC. It has an internal pull-up resistor, so even if the enable pin is floating, the LDO output will be enabled due to the internal pull-up resistor. The power input and output range of this LDO can be well adapted to the requirements of automotive voltage. According to experimental data, the resistance value of the internal pull-up resistor is 750K.

[0034] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A circuit that uses an LDO to delay-start or delay-off DSP power supply, comprising a low-dropout regulator (4), characterized in that: The low-dropout regulator (4) has a power input terminal connector (8), a power output terminal connector (9), a ground terminal connector (10), and an enable terminal connector (11) fixedly installed on one side from left to right. The low-dropout regulator (4) is provided with an access circuit, a delay-on circuit, and a delay-off circuit.

2. The circuit for using an LDO to delay-start or delay-disconnect the DSP power supply according to claim 1, characterized in that: The access circuit is equipped with a four-pole circuit breaker P4. Pin 1 of the four-pole circuit breaker P4 is connected to a 12V+ power supply, pin 2 of the four-pole circuit breaker P4 is grounded, pin 3 of the four-pole circuit breaker P4 is connected to an input power supply 1K resistor, and pin 4 of the four-pole circuit breaker P4 is connected to an output power supply 1K resistor -OUT.

3. The circuit for delaying or deactivating DSP power supply using an LDO as described in claim 1, characterized in that: The delayed-on circuit includes an integrated circuit U1, a resistor R1, a capacitor C2, a fuse F1, a MOSFET Q1, a resistor R4, and a resistor R5. Pin 1 of the integrated circuit U1 is connected to one end of the fuse F1, and the other end of the fuse F1 is connected to one end of the MOSFET Q1. The other end of the MOSFET Q1 is connected to one end of the resistor R4 and one end of the resistor R5. Pin 4 of the integrated circuit U1 is connected to one end of the resistor R1 and one end of the capacitor C2. The other end of the resistor R5, pin 3 of the integrated circuit U1, the other end of the resistor R1, and the other end of the capacitor C2 are all grounded.

4. The circuit for using an LDO to delay-start or delay-disconnect the DSP power supply according to claim 1, characterized in that: The delayed shutdown circuit includes an integrated circuit U2, a capacitor C1, a resistor R2, and a resistor R3. The four pins of the integrated circuit are connected to one end of the capacitor C1, one end of the resistor R2, and one end of the resistor R3, respectively. The three pins of the integrated circuit U2, the other end of the capacitor C1, and the other end of the resistor R2 are all grounded.

5. The circuit for using an LDO to delay-start or delay-disconnect the DSP power supply according to claim 1, characterized in that: The low dropout regulator (4) has a field-effect transistor SI2308 (3) on one side. A 1K resistor (1) and a 10K resistor (2) are respectively provided at both ends of the field-effect transistor SI2308 (3). A 10MΩ resistor (5) is provided at one end of the low dropout regulator (4). A 1uF capacitor (6) is provided at the other end of the low dropout regulator (4). One end of the 1K resistor (1) and one end of the 10K resistor (2) are both connected to one end of the field-effect transistor SI2308 (3). A resettable fuse (7) is fixedly connected to the other end of the field-effect transistor SI2308 (3). One end of the resettable fuse (7), one end of the 10MΩ resistor (5) and one end of the 1uF capacitor are all connected to the end of the low dropout regulator (4) that is directly opposite to it.

6. The circuit for using an LDO to delay-start or delay-disconnect the DSP power supply according to claim 1, characterized in that: One end of the low dropout regulator (4) is provided with an 8.06K resistor (12), and the other end of the low dropout regulator (4) is provided with a 220uf capacitor (13) and a 1K resistor (1). One end of the 1K resistor (1) is connected to one end of the 220uf capacitor (13), and the other end of the 220uf capacitor (13) and one end of the 8.06K resistor (12) are both connected to the side of the low dropout regulator (4) facing each other.

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