A multi-lane high-speed memory backplane

Abstract

The utility model provides a kind of multi-channel high-speed storage backplane, including high-speed interface module, hard disk interface module, power supply module, management and control module and protection and maintenance module;The high-speed interface module is connected with mainboard by PCIe protocol;The hard disk interface module is connected with the high-speed interface module, for connecting and managing NVMe hard disk and SATA / SAS hard disk;The power supply module is for providing redundant power input for each module;The management and control module is connected with the hard disk interface module, for realizing the state monitoring and communication control to hard disk;The protection and maintenance module is connected with the power supply module and hard disk interface module, for realizing the circuit protection and hot plug function support to power supply and hard disk interface.The utility model has realized high-speed, stable and scalable data storage capacity, significantly improve the performance, reliability and operation efficiency under large-scale storage scene.

Description

Technical Field

[0001] This utility model relates to the field of computer storage device technology, and in particular to a multi-channel high-speed storage backplane suitable for scenarios such as high-performance computing, artificial intelligence training, data centers and edge computing. Background Technology

[0002] With the rapid development of big data, artificial intelligence, and cloud computing technologies, information processing and data storage systems are facing multiple challenges, including high bandwidth, low latency, large capacity, and high scalability. For a long time, traditional storage systems have been widely built on the SATA (Serial ATA) and SAS (Serial Attached SCSI) protocols, which have provided reliable support for servers, workstations, and enterprise-level storage for over a decade. However, faced with the exponential growth of data volume, the SATA / SAS architecture is gradually revealing its performance bottlenecks.

[0003] In terms of bandwidth, SATA III's theoretical maximum transfer rate is only 6Gb / s, with an actual transfer bandwidth of approximately 600MB / s. Even with the SAS 12Gb / s protocol, while performance is improved, it still falls short of the demands of high-concurrency read / write scenarios such as distributed training, deep learning model access, and large-scale data analysis. Regarding latency, limited by complex command sets and bus communication mechanisms, SATA / SAS access latency is typically in the microsecond range, making it unsuitable for applications highly sensitive to low latency, such as artificial intelligence inference, real-time transaction processing, and edge computing.

[0004] Furthermore, while SATA and SAS protocols offer some interoperability, their architectures differ fundamentally from high-speed PCIe-based storage protocols. Their interface forms and bus designs are incompatible, making unified deployment and management difficult within a single system. Data centers often require dedicated backplanes or servers for different hard drive types, increasing system complexity and hardware costs while limiting resource scheduling flexibility. Traditional backplanes also have significant limitations in scalability. A single server can only support a limited number of hard drives, making high-density expansion to dozens or hundreds of drives difficult. In large-scale storage deployments, additional racks or expansion backplanes are often required, leading to increased energy consumption and maintenance costs. Moreover, existing backplanes generally lack intelligent management capabilities, with most unable to automatically collect hard drive information or provide LED location indicators. In hyperscale data centers, maintenance personnel often need to manually troubleshoot hard drive failures, which is inefficient and prone to errors.

[0005] In recent years, NVMe (Non-Volatile Memory Express) technology has gradually become the next-generation storage standard due to its high bandwidth, low latency, and excellent scalability. Based on the PCIe architecture, NVMe can fully leverage the advantages of multi-channel parallel transmission: PCIe 4.0 single-channel speeds reach 16GT / s, and four channels can achieve a total bandwidth of 64Gb / s, far exceeding the performance limits of SATA / SAS. Its streamlined protocol stack design significantly reduces access latency, even reaching one-tenth of that of SATA, effectively supporting high-concurrency I / O and real-time computing. Furthermore, NVMe possesses multi-queue parallel processing capabilities, significantly improving I / O throughput performance.

[0006] However, NVMe backplanes currently on the market still have significant shortcomings. Most products only support NVMe hard drives and cannot meet the needs of mixed SATA / SAS storage; their power supply design, circuit protection, and hot-swapping mechanisms are not perfect, posing potential data security and equipment risks; at the same time, they lack intelligent management functions (such as SMBUS interface, BIOS linkage, etc.), which brings inconvenience to operation and maintenance management.

[0007] Therefore, the industry urgently needs to launch a new type of storage backplane solution that can be compatible with both NVMe and SATA / SAS protocols, support multi-channel high-speed interconnection, integrate intelligent management and a sound protection mechanism to meet the ever-growing storage demands of future high-performance computing and large-scale data centers. Utility Model Content

[0008] The purpose of this invention is to address the shortcomings of existing storage backplanes in terms of performance, compatibility, and reliability, and to propose a multi-channel high-speed storage backplane suitable for scenarios such as high-performance computing, artificial intelligence training, data centers, and edge computing.

[0009] This utility model discloses a multi-channel high-speed storage backplane, which includes a high-speed interface module, a hard disk interface module, a power supply module, a management and control module, and a protection and maintenance module.

[0010] The high-speed interface module is used to connect to the motherboard via the PCIe protocol to achieve high-speed data communication;

[0011] The hard disk interface module is connected to the high-speed interface module and is used to connect and manage NVMe hard disks and SATA / SAS hard disks;

[0012] The power supply module is connected to the high-speed interface module, hard disk interface module, management and control module and protection and maintenance module respectively, and is used to provide redundant power input for each module.

[0013] The management and control module is connected to the hard disk interface module and is used to monitor the status of the hard disk and control communication.

[0014] The protection and maintenance module is connected to the power supply module and the hard disk interface module, and is used to realize circuit protection and hot-swapping function support for the power supply and hard disk interface.

[0015] This invention achieves high-speed, stable, and scalable data storage capabilities through the coordinated connection and cooperation of various modules. It supports the hybrid deployment of multi-protocol hard drives and has comprehensive power management, status monitoring, and circuit protection functions, significantly improving performance, reliability, and operational efficiency in large-scale storage scenarios.

[0016] Further explanation of the above solution: the high-speed interface module includes 16 MCIO X8 interfaces and 1 SFF-8643 interface, supports PCIe 4.0 lanes, and is backward compatible with PCIe 3.0 and earlier versions. This high-speed interface module design provides extremely high data transmission bandwidth and excellent backward compatibility, adapting to various existing motherboard platforms, effectively ensuring investment continuity and system integration flexibility.

[0017] Further explanation of the above solution: the hard drive interface module includes 32 SFF-8639 interfaces for connecting NVMe U.2 2.5-inch hard drives; and 3 SAS 29-pin interfaces for connecting SATA / SAS 2.5-inch hard drives. By providing a large number of NVMe hard drive interfaces and retaining some SAS / SATA interfaces, this backplane can achieve high-density hard drive deployment on a single board, simultaneously meeting users' mixed needs for extreme performance and high-capacity, low-cost storage, thus improving the flexibility and economy of storage configuration.

[0018] Further explanation of the above solution: the power supply module includes four ATX 8PIN CPU power connectors and one ATX 4PIN connector for providing redundant power input. This multi-redundant power input design significantly enhances the power supply stability and reliability of the backplane when all hard drives are operating at full load, effectively avoiding the risk of system crashes or data loss due to insufficient power capacity or single-channel failure.

[0019] Further explanation of the above solution: the management and control module includes an SMBUS interface for reading hard drive manufacturer information and operating status, and supports LED positioning indication. Here, the SMBUS interface enables automatic collection of hard drive information and LED positioning indication, simplifying the operation and maintenance process, supporting rapid location of faulty hard drives in large data center environments, and reducing operation and maintenance complexity and labor costs.

[0020] Further explanation of the above solution: the management and control module also includes a CPLD expansion interface to support BIOS customization functions. This CPLD expansion interface provides the backplane with powerful programmability, enabling users to customize BIOS functions to adapt to specific application scenarios or future protocol evolutions, significantly improving the backplane's adaptability and lifespan.

[0021] Further explanation of the above solution: the protection and maintenance module includes an EFUSE circuit for overcurrent protection. The EFUSE circuit provides a precise overcurrent protection mechanism, capable of quickly disconnecting faulty lines and preventing damage to the backplane or other storage hardware due to hard drive short circuits or other electrical anomalies, thus improving the overall stability and security of the system.

[0022] Further explanation of the above solution: the protection and maintenance module supports hard drive hot-swapping. This hot-swapping function allows users to replace faulty or upgradeable hard drives without power interruption, improving system maintainability and business continuity, and meeting the stringent high availability requirements of data centers.

[0023] Compared with the prior art, the beneficial effects of this utility model are:

[0024] 1. Compared with existing technologies, this utility model achieves significant improvements and innovations in many aspects. In terms of scalability and protocol compatibility, this backplane can simultaneously support up to 35 hard drives, including 32 NVMe hard drives and 3 SATA / SAS hard drives, greatly enhancing single-machine storage density and expansion flexibility. Its groundbreaking hybrid deployment capability allows users to flexibly configure high-performance NVMe hard drives and large-capacity SATA / SAS hard drives according to business needs, effectively balancing performance and cost, and adapting to diverse application scenarios from real-time analysis to cold data storage.

[0025] 2. In terms of transmission performance and operation and maintenance management, the backplane is based on the PCIe 4.0 channel architecture, with a single disk bandwidth of up to 64Gb / s, which is several times higher than the traditional SATA / SAS solutions, fully meeting the requirements of high throughput and low latency data access. At the same time, the backplane integrates advanced intelligent management functions, which can obtain hard drive attributes and health status in real time through the SMBUS interface, and use LED indicators to realize rapid fault location and hard drive replacement, greatly improving operation and maintenance efficiency and reducing maintenance complexity and labor costs in large-scale deployment environments.

[0026] 3. Regarding system security and reliability, the backplane incorporates the EFUSE overcurrent protection mechanism and redundant power supply design, significantly enhancing power supply stability and fault response capabilities, effectively preventing equipment damage and data loss risks caused by power abnormalities or short circuits. In summary, this invention not only excels in scalability, transmission performance, and protocol compatibility, but also achieves comprehensive optimization in intelligent operation and maintenance and hardware protection, providing a more efficient, reliable, and secure storage infrastructure solution for high-performance computing and large-scale data centers. Attached Figure Description

[0027] Figure 1 This is a structural block diagram of the multi-channel high-speed storage backplane of this utility model.

[0028] In the diagram, 1. High-speed interface module; 2. Hard disk interface module; 3. Power supply module; 4. Management and control module; 5. Protection and maintenance module; 6. Motherboard. Detailed Implementation

[0029] The present invention will be further described below with reference to the accompanying drawings.

[0030] like Figure 1 As shown, this utility model discloses a multi-channel high-speed storage backplane, which includes a high-speed interface module 1, a hard disk interface module 2, a power supply module 3, a management and control module 4, and a protection and maintenance module 5.

[0031] The high-speed interface module 1 is used to connect to the motherboard 6 via the PCIe protocol to achieve high-speed data communication. The high-speed interface module 1 includes 16 MCIO X8 interfaces and 1 SFF-8643 interface, supports PCIe 4.0 channels, and is backward compatible with PCIe 3.0 and earlier versions.

[0032] The hard disk interface module 2 is connected to the high-speed interface module 1 and is used to connect and manage NVMe hard disks and SATA / SAS hard disks. The hard disk interface module 2 includes 32 SFF-8639 interfaces for connecting NVMe U.2 2.5-inch hard disks and 3 SAS29PIN interfaces for connecting SATA / SAS 2.5-inch hard disks.

[0033] The power supply module 3 is connected to the high-speed interface module 1, the hard disk interface module 2, the management and control module 4, and the protection and maintenance module 5 respectively, and is used to provide redundant power input for each module; the power supply module 3 includes 4 ATX 8PIN CPU power interfaces and 1 ATX 4PIN interface, which are used to provide redundant power input.

[0034] The management and control module 4 is connected to the hard disk interface module 2 and is used to monitor the status and control the communication of the hard disk. The management and control module 4 includes an SMBUS interface for reading hard disk manufacturer information and operating status, and supports LED positioning indication function. The management and control module 4 also includes a CPLD expansion interface for supporting BIOS customization functions.

[0035] The protection and maintenance module 5 is connected to the power supply module 3 and the hard disk interface module, and is used to realize circuit protection and hot-swapping function support for the power supply and hard disk interface. The protection and maintenance module 5 includes an EFUSE circuit for overcurrent protection and supports hard disk hot-swapping function.

[0036] In this invention, the high-speed interface module 1 serves as the physical and logical bridge for high-speed data exchange between the backplane and the server motherboard. Its core consists of multiple high-speed connectors and their underlying PCB traces, specifically including:

[0037] 16 MCIO (Multi-Chip I / O) x8 interfaces:

[0038] Physical form factor: MCIO is a high-density, high-speed cable connector standard that is smaller in physical size than traditional SAS HD or SFF-8643, but provides more pins in a single interface.

[0039] Channel configuration: Each "X8" indicates that the interface supports 8 channels of PCIe data transmission. 16 interfaces provide a total of 16 interfaces × 8 channels / interface = 128 PCIe channels.

[0040] Function: These interfaces are the primary source of backplane data throughput and are specifically designed for connecting NVMe drives. Each MCIO interface can be connected via a single cable to a PCIe slot or PLX (switching) chip on the motherboard, providing an independent, non-blocking PCIe link for multiple NVMe drives.

[0041] One SFF-8643 interface:

[0042] Physical form: The SFF-8643 is an early but very mature high-speed Mini-SAS HD interface, widely used in SAS and NVMe applications.

[0043] Channel configuration: A standard SFF-8643 interface provides 4 channels.

[0044] Function: This interface is primarily used as an expansion port or compatibility port. Its uses may include: connecting additional NVMe hard drive groups; providing SAS channel connectivity for three SATA / SAS hard drives on the backplane (the SAS protocol allows multiple hard drives to be connected on a single interface via an expander); and serving as a system backup or management path.

[0045] Key features of the high-speed interface module: The PCB design of this module is critical, and all high-speed signal lines must be routed as impedance-controlled differential pairs.

[0046] Equal length matching: TX (transmit) and RX (receive) differential pairs belonging to the same PCIe channel need to be wired with equal lengths and their length matching with other signal pairs should be strictly controlled to ensure signal synchronization and reduce bit error rate.

[0047] Signal integrity: The design employs measures such as ground plane shielding, avoiding sharp bends, and maintaining impedance continuity to ensure the integrity of PCIe 4.0 high-speed signals (16GT / s).

[0048] The high-speed interface module operates as follows:

[0049] Physical connection and link establishment: Use high-speed cables compliant with the PCIe 4.0 standard to connect the MCIO and SFF-8643 interfaces on the backplane to the corresponding interfaces on the motherboard.

[0050] After the system is powered on, the PCIe controller (Root Complex) on the motherboard initiates link training with the NVMe hard drives on the backplane. This is an automatic negotiation process designed to determine the highest available speed and maximum available bandwidth that both sides can support, and to optimize signal parameters.

[0051] Data Transfer: Parallel Transfer: This is the core advantage of the NVMe over PCIe architecture compared to the traditional SAS / SAS ring architecture. The 128 PCIe lanes provided by 16 MCIO interfaces allow 32 NVMe drives to perform near-simultaneous, parallel data read and write operations with the motherboard. Point-to-Point Topology: Each NVMe drive is directly connected to an independent PCIe lane via backplane cabling (multiple lanes are aggregated into an x4 link for a single drive). This topology eliminates any form of lane contention, ensuring extremely low latency and extremely high bandwidth aggregation capabilities.

[0052] Data routing: Data originates from the NVMe hard drive, passes through the hard drive interface module on the backplane, then immediately enters the corresponding channel of the high-speed interface module, and finally reaches the motherboard PCIe controller via a cable. The entire process requires no protocol conversion or switching on the backplane.

[0053] Backward compatibility mechanism: This module's "backward compatibility with PCIe 3.0 and earlier versions" capability is automatically achieved through electrical signal negotiation. If the connected motherboard or hard drive only supports PCIe 3.0 (8.0GT / s), during the aforementioned link training phase, both parties will negotiate and lock onto the PCIe 3.0 speed. The physical connector and PCB trace design of the interface simultaneously support the electrical characteristics of both PCIe 4.0 and 3.0, thus allowing for seamless downgrading and ensuring platform adaptability and flexibility.

[0054] In this invention, the hard disk interface module 2 is the physical portal through which the entire backplane interacts directly with the storage medium. Its core design goal is to achieve compatibility and reliable connection of high-density, multi-protocol hard disks. It is not a simple collection of connectors, but a complex subsystem that integrates precision circuit design and signal routing.

[0055] It includes 32 SFF-8639 (U.2) interfaces: its physical form is similar to the SATA / SAS interface, but it has more pins (typically 4 ports, 68 pins in total). The pins of this interface integrate:

[0056] PCIe lanes: 4 pairs of high-speed differential signal pairs (TX / RX) for transmitting NVMe protocol data.

[0057] SATA / SAS channels: The reserved pins also support SATA or SAS signals, but in this module, these pins are usually used for spare or compatibility design and are not the primary function.

[0058] Auxiliary signals include SMBUS (for management), 12V / 3.3V power supply pins, reserved pins, etc.

[0059] Three SAS 29-pin connectors are typically physically compatible with SATA hard drives. Their pin definitions are as follows:

[0060] SAS channel: Used to transmit SAS or SATA protocol data.

[0061] Power supply pins: provide +12V and +5V power.

[0062] Management signals: such as SGPIO (Serial General Purpose Input / Output), used for ACT / LOC (Active / Local) LED control signal transmission and hard disk status diagnostics.

[0063] Signal Separation and Routing: This is the most critical design aspect of the module. PCIe channel signals from the high-speed interface module are routed directly, point-to-point, to the corresponding 32 U.2 interfaces via precise PCB traces. Each U.2 interface has a dedicated x4 PCIe link. A robust power layer is designed within the PCB, drawing power from the power supply module and distributing it evenly and with low impedance to all 35 hard drive interfaces, ensuring each hard drive slot receives stable and sufficient power for startup and operation. Decoupling capacitors and filtering circuits are deployed near the power pins of each hard drive interface to filter out high-frequency noise, ensuring high-speed signal quality and the purity of the hard drive power supply.

[0064] The hard drive interface module 2 operates as follows: Hard drive detection and identification: When a hard drive is inserted into the backplane, the module first detects the new device connection via the presence detection pin (PRSNT#) on the interface. Subsequently, the management and control module accesses the hard drive's VPD area via SMBUS to read its identity information, including protocol type (NVMe or SATA / SAS), model, serial number, power consumption, etc. It also includes protocol adaptation and data path switching: this is the core of achieving "hybrid deployment." Based on the identified hard drive type, the module automatically activates the corresponding data path: For NVMe hard drives: the PCIe differential signal line in the U.2 interface is activated. Data is sent from the hard drive, directly through the preset PCIe channel on the backplane PCB, to the high-speed interface module, and finally reaches the CPU via the PCIe bus. This path completely bypasses the SAS controller, resulting in extremely low latency. For SATA / SAS hard drives: after inserting into the SAS 29PIN interface, its SAS / SATA signals are activated. These signals typically need to be routed to the SAS controller on the motherboard via a centralized channel. The SAS controller converts the protocol and then interacts with the system via the PCIe bus.

[0065] Power Supply: Regardless of hard drive type, power is uniformly provided by the power supply module and delivered to each slot through the power distribution network of the hard drive interface module. The protection and maintenance module monitors the current of each slot in real time to prevent overcurrent. The management and control module continuously monitors the health status (temperature, SMART information, etc.) of all hard drives via SMBUS. When the system or administrator needs to locate a specific hard drive, the management and control module controls the LED indicator of that specific slot to light up via SGPIO signals or NVMe-MI commands for rapid location.

[0066] In this invention, the management and control module 4, through hardware and software collaboration, achieves refined monitoring, visual management, and customizable control of the storage device, which is the core of improving operational efficiency and system reliability. This module mainly consists of a hardware interface and a programmable logic unit, and is typically embedded on the backplane PCB. It includes:

[0067] SMBUS (System Management Bus) interface: an I-based interface 2 The C protocol is a low-speed, two-wire (clock line SCL and data line SDA) serial bus interface. It is typically present on the backplane as pins or solder points, used to connect to the BMC (Baseboard Management Controller) or related chips on the motherboard via cables.

[0068] Functional Positioning: This is the key channel for out-of-band management. It includes the CPLD (Complex Programmable Logic Device) expansion interface: This typically refers to a set of programming interfaces connected to the CPLD chip, or the circuit itself integrating the CPLD chip. A CPLD is a user-programmable logic device, offering greater flexibility than fixed logic chips and a greater focus on control logic than an FPGA. It forms the physical basis for hardware-level customization and expansion. Through it, firmware can be programmed and updated.

[0069] In this invention, the core mission of the power supply module 3 is to provide an extremely stable, sufficient, and safe power supply for all connected high-power hard drives (especially NVMe hard drives) and various functional modules, which is the cornerstone for ensuring the stable operation of the entire storage system under high load.

[0070] The design focus of power supply module 3 is on power input, internal distribution, and stable filtering, including:

[0071] Four ATX 8-pin CPU power connectors: These are standard high-power server power connectors, each theoretically capable of providing over 150W of power. These four connectors are the primary high-current input channels. The parallel input of multiple connectors aims to reduce the current density of a single path, minimizing heat generation and line voltage drop, and providing ample current headroom for driving a large number of hard drives.

[0072] One ATX 4-pin connector: This is an auxiliary power connector. Its primary function is not to provide high current, but rather as a redundancy backup and logic control. It can form redundancy with the main input power supply, ensuring that even if one of the main power paths fails, the basic management and control circuitry on the backplane can still function normally, providing power for upper-level fault diagnosis and early warning.

[0073] The internal power distribution network of the PCB: This is not a separate component, but refers to the power supply network laid out inside the PCB through multiple layers of thick copper power and ground layers. It is a low-impedance, low-inductive "power highway network" that efficiently and evenly distributes the input power to every hard drive slot and functional chip on the backplane. Its design directly determines the power supply quality.

[0074] Filtering and decoupling circuitry: An array of numerous tantalum capacitors, ceramic capacitors, and inductors, deployed near the power input port, each hard drive interface, and around key chips. It filters out high-frequency noise and ripple generated by the external power supply and the hard drive itself during operation, stabilizing the voltage and providing a "clean" power environment for the high-speed SSD and control chips, which are extremely sensitive to voltage fluctuations.

[0075] The power supply module 3 operates and functions as follows:

[0076] The module operates as a complete link from power reception → distribution → stabilization → output.

[0077] Redundant power input and current sharing: The module can connect to two or more independent server power supplies via 4+1 power interfaces, which operate in parallel. During normal system operation, the input current is automatically distributed among the interfaces according to the load, sharing the total load and preventing overload of any single interface or cable. If one power supply fails, its load is immediately taken over by another healthy power supply, achieving seamless switching without causing any hard drive power loss or system crashes.

[0078] NVMe SSDs generate a massive surge current during startup; the combined current from dozens of SSDs starting simultaneously can overwhelm a poorly designed power supply system. Power Supply Module 3, with its powerful multi-interface input capabilities and thick copper internal PCB design, provides extremely low source impedance, easily absorbing and meeting this instantaneous current demand, preventing system restarts or SSD initialization failures triggered by voltage drops. It also provides differentiated power supply for mixed loads, capable of simultaneously powering SSDs with varying power consumption.

[0079] NVMe SSDs: High power consumption (typically 15-25W), requiring stable 12V and 3.3V power supplies. The power layer provides a dedicated low-impedance path for them.

[0080] SATA / SAS HDD / SSD: These have relatively low power consumption and mainly require 12V and 5V power supplies.

[0081] The module's PDN design ensures that even when all hard drive bays are fully utilized, the voltage of each slot remains within strict specifications.

[0082] Power supply module 3 is the "protected object" and "upstream power source" of the EFUSE circuit in the protection and maintenance module. EFUSE acts like a series of intelligent switches, guarding the final branch of the power distribution network leading to each hard drive. Once a hard drive short-circuits, the corresponding EFUSE will activate instantly, isolating the fault within a minimal range without affecting the power supply to other hard drives on the same backplane, and without back-currently impacting the power supply module itself.

[0083] In this utility model, the management and control module 4 operates and functions as follows: the module operates by combining hardware and software, and its process can be summarized as: information acquisition → logic processing → instruction execution.

[0084] 1. Intelligent status monitoring and indication based on SMBUS:

[0085] Information Acquisition (Polling and Response): The module continuously polls or receives instructions from the BMC via SMBUS to access the NVMe-MI management interface of each NVMe hard drive or the controller register of the SATA / SAS hard drive. It reads the hard drive's unique identification information (such as manufacturer, model, serial number, firmware version) and real-time operating status (such as temperature, SMART health status, read / write error count, power consumption mode).

[0086] Logical processing (state judgment):

[0087] The collected data is aggregated and processed. Pre-defined logic determines whether the status is abnormal, such as whether the temperature exceeds a threshold or whether the SMART warning has failed.

[0088] Hard drive location: When maintenance personnel trigger the "locate" command on the management software, the BMC will send a command to the module via SMBUS. The module then drives the tri-color LED indicator (usually blue / amber / green) of the corresponding hard drive slot to emit a specific flashing pattern, helping personnel quickly locate the target drive among thousands of hard drives.

[0089] Status display: LED lights can also display the hard drive status in real time.

[0090] Solid green light: Hard drive is online and operating normally.

[0091] Green flashing: The hard drive is reading and writing data.

[0092] Solid amber light / flickering: Hard drive failure, predictive failure, or marked as needing replacement.

[0093] Off: No hard drive in the slot or the hard drive is not ready.

[0094] 2. Hardware-level customization and expansion based on CPLD:

[0095] Functional customization: The CPLD acts as a programmable "traffic policeman." Its logic is not fixed and can be reprogrammed through the aforementioned interface.

[0096] Example 1: Power-on sequence control. It allows for programmable control of the power-on order of multiple hard drives, preventing the massive inrush current generated by all hard drives starting simultaneously from impacting the power supply system.

[0097] Example 2: Reset Control. It can respond to BMC commands to perform a hardware reset on a specified or all hard drives, resolving "freezing" issues caused by system software malfunctions.

[0098] Example 3: Custom LED logic. The blinking mode and the meaning of each color of the LED can be redefined according to customer needs.

[0099] BIOS Integration and Enhanced Compatibility: This is a crucial advanced feature of CPLDs. During the POST (Power-On Self-Test) phase of server startup, the BIOS enumerates all PCIe devices.

[0100] CPLDs can work with the BIOS to manage the visibility of hard drives on the backplane. For example, they can be configured to hide certain hard drives during the boot phase, only to be activated by the driver after the operating system has finished booting. This is crucial for implementing advanced features such as hard drive boot grouping and hot spare disk isolation. It can also handle potential compatibility issues between hard drives from different manufacturers, ensuring all hard drives are correctly recognized by fine-tuning timings and signals.

[0101] In this invention, the core mission of the protection and maintenance module 5 is to ensure that the backplane and the large number of expensive hard drives connected to it are protected from damage under various abnormal conditions, and to allow maintenance operations to be performed while the system is running continuously. This is the key to achieving a high availability and high reliability data center.

[0102] The protection and maintenance module 5 consists of dedicated protection circuits and control logic, and is physically distributed in the power input area of ​​the backplane PCB and near each hard disk interface.

[0103] EFUSE (Electronic Fuse) Circuit: This is not a traditional fusible fuse, but an integrated semiconductor circuit that typically includes a MOSFET power switch, a current-sensing amplifier, a comparator, a logic control unit, and a latch. It is usually configured "per channel" or "per group." In high-performance backplanes, best practice is to configure an independent EFUSE for each hard drive slot or every few slots, thus achieving precise fault isolation.

[0104] Hot-swap control circuit: This circuit is built around a hot-swap controller chip, supplemented by external precision sampling resistors, MOSFETs and bypass capacitors.

[0105] Functional Units:

[0106] Power Switch: A dedicated MOSFET that acts as a switch on the hard drive power path.

[0107] Current Sense: Monitors the current flowing into the hard drive in real time using a precision resistor at the milliohm level.

[0108] Soft-start: An integrated or external capacitor used to control the power-on slope of the power supply.

[0109] The working mode and function implementation of the protection and maintenance module 5: The working mode of this module is a closed-loop process of active monitoring, rapid response and intelligent control.

[0110] 1. Overcurrent and short-circuit protection based on EFUSE:

[0111] Real-time monitoring: The EFUSE circuit continuously measures the load current of its branch (e.g., measures the voltage drop across the MOSFET and converts it into a current value).

[0112] Quick determination: The measured current value is compared with the preset overcurrent threshold (OCP) and short circuit threshold (SCP) in real time.

[0113] Intelligent Response:

[0114] Over-Current: When the current exceeds the OCP threshold but does not reach the level of a short circuit (for example, abnormal power consumption due to hard drive failure), EFUSE will respond within microseconds to quickly limit the output current and prevent the fault from escalating.

[0115] Short-Circuit: When a severe short circuit (a sharp increase in current) is detected in the load, EFUSE will completely turn off the power MOSFET within nanoseconds (far exceeding the speed of a traditional fuse), thus cutting off the circuit.

[0116] Self-recovery or manual recovery. In more cases, the system needs to send a reset signal through the management interface to clear the latched state of EFUSE and restore it to normal operation. This avoids the hassle of replacing the physical fuse.

[0117] 2. Safe online maintenance based on hot-swap control:

[0118] The hot-swapping process is divided into two scenarios: removal and insertion. This module ensures operational safety throughout the entire process.

[0119] Safe Removal: Maintenance personnel initiate a "Prepare to Remove" command through the software system. Upon receiving the command, the management and control module will disconnect the corresponding hard drive's I / O bus signal to ensure data communication is stopped and prevent data corruption. After the software confirms the hard drive is offline, it illuminates the "Safe to Remove" LED indicator on the slot. Personnel can then directly remove the hard drive. At this time, the backplane power supply circuit remains stable and does not affect the operation of other hard drives on the same backplane.

[0120] Safe insertion: When a new hard drive is inserted into a running backplane, the hot-swap control circuitry immediately intervenes.

[0121] Soft start: This is the most critical step. The capacitors in the hard drive slot experience a near-short circuit momentarily, generating a huge inrush current that could cause the system power to drop and trigger a restart. The hot-swap controller controls the gate voltage of the MOSFETs, allowing the output voltage to rise slowly and linearly, thus limiting the inrush current to a safe range.

[0122] Continuous monitoring: During power-on, the controller continuously monitors the current. If any abnormality is detected, the power-on process will be immediately terminated, and an error will be reported. After power-on, the hard drive enters normal operation, is recognized by the operating system, and added to the storage pool.

[0123] The protection and maintenance module 5 does not work independently, but rather works in deep collaboration with other modules on the backplane:

[0124] Working in conjunction with the power supply module: EFUSE directly protects the power input from the power supply module, providing another robust line of defense after redundant power supplies.

[0125] In collaboration with the management and control module: The status and hot-plugging process of EFUSE are monitored and reported by SMBUS, and the CPLD may participate in controlling the precise timing of hard drive power-on and power-off. Fault information will be immediately reported to the BMC, triggering alarms and LED indicator changes.

[0126] Example 1:

[0127] A company needed to build a high-performance server for AI model training, and they adopted the multi-channel high-speed storage backplane of this utility model.

[0128] Configuration: All 32 NVMe U.2 interfaces on the back panel are filled with high-performance PCIe 4.0 NVMe SSDs, forming a large-capacity high-speed data pool.

[0129] How it works: The massive datasets required for training are pre-loaded into this NVMe data pool. When the GPU cluster begins model training, it can read data from all SSDs in parallel at extremely high speeds through the ultra-high total PCIe bandwidth provided by the backplane (thanks to 16 MCIO interfaces), completely eliminating I / O bottlenecks.

[0130] In this embodiment, the data loading time for training jobs is reduced from hours to minutes, GPU computing resources are fully utilized, and model training efficiency is improved several times over. Meanwhile, maintenance personnel can quickly locate the hard drive using the LED indicators on the backplane and hot-swap faulty drives without affecting training tasks, ensuring the long-term stable operation of the platform.

[0131] Example 2:

[0132] A video surveillance service provider needs a server to simultaneously process popular real-time analysis videos and long-term cold storage recordings.

[0133] Configuration: Utilizing the hybrid deployment capability of the backplane of this utility model, half of the 32 NVMe interfaces are equipped with high-speed NVMe SSDs for storing hot data that needs to be analyzed in real time; at the same time, high-capacity SATA SSDs or HDDs are installed on 3 SATA / SAS interfaces and the remaining NVMe interfaces for storing cold data.

[0134] Operating mode: The latest video streams are written at high speed to NVMe hard drives for real-time AI analysis. After analysis, the data is automatically migrated to a large-capacity SATA hard drive for long-term archiving.

[0135] This embodiment perfectly balances performance and capacity within a single server, meeting the low-latency, high-bandwidth requirements of real-time processing while reducing overall storage costs through large-capacity hard drives. The intelligent management function of the backplane allows maintenance personnel to uniformly monitor all different types of hard drives, and the EFUSE circuit ensures power supply safety during 24 / 7 operation.

[0136] This invention proposes a multi-channel high-speed storage backplane solution. Through a highly integrated design, it effectively solves the common bottlenecks faced by traditional storage architectures in terms of performance, scalability, and operation and maintenance management. This backplane innovatively enables the hybrid deployment of multi-protocol hard drives, fully leveraging the high bandwidth and low latency advantages of NVMe hard drives while also considering the large capacity and cost-effectiveness of SATA / SAS hard drives, providing users with flexible storage configuration options. In terms of performance, relying on the high-speed interconnect capability of PCIe 4.0, it significantly improves data access efficiency. Regarding reliability, the introduction of redundant power supply and intelligent circuit protection mechanisms ensures continuous and stable system operation. Simultaneously, its built-in advanced management functions support status monitoring and rapid fault location, greatly reducing the operational complexity of large-scale storage clusters. In summary, this backplane not only possesses excellent overall performance but also excels in security, maintainability, and compatibility, providing core support for a new generation of storage infrastructure for modern data centers and high-performance computing scenarios.

[0137] It should be noted that the above embodiments are only used to illustrate the technical solution of this utility model and not to limit the technical solution. Although the applicant has described the utility model in detail with reference to the preferred embodiments, those skilled in the art should understand that any modifications or equivalent substitutions made to the technical solution of this utility model that do not depart from the spirit and scope of this technical solution should be covered within the scope of the claims of this utility model.

Claims

1. A multi-channel high-speed storage backplane, characterized in that, It includes a high-speed interface module (1), a hard disk interface module (2), a power supply module (3), a management and control module (4), and a protection and maintenance module (5); The high-speed interface module (1) is used to connect to the motherboard (6) via the PCIe protocol to achieve high-speed data communication; The hard disk interface module (2) is connected to the high-speed interface module (1) and is used to connect and manage NVMe hard disks and SATA / SAS hard disks; The power supply module (3) is connected to the high-speed interface module (1), the hard disk interface module (2), the management and control module (4) and the protection and maintenance module (5) respectively, and is used to provide redundant power input for each module; The management and control module (4) is connected to the hard disk interface module (2) and is used to monitor the status of the hard disk and control communication. The protection and maintenance module (5) is connected to the power supply module (3) and the hard disk interface module, and is used to realize circuit protection and hot-swap function support for the power supply and hard disk interface.

2. The multi-channel high-speed storage backplane according to claim 1, characterized in that, The high-speed interface module (1) includes 16 MCIO X8 interfaces and 1 SFF-8643 interface, supports PCIe 4.0 channels, and is backward compatible with PCIe 3.0 and earlier versions.

3. The multi-channel high-speed storage backplane as described in claim 1, characterized in that, The hard disk interface module (2) includes 32 SFF-8639 interfaces for connecting NVMe U.2 2.5-inch hard disks; and 3 SAS29PIN interfaces for connecting SATA / SAS 2.5-inch hard disks.

4. The multi-channel high-speed storage backplane as described in claim 1, characterized in that, The power supply module (3) includes four ATX 8PIN CPU power interfaces and one ATX 4PIN interface for providing redundant power input.

5. The multi-channel high-speed storage backplane as described in claim 1, characterized in that, The management and control module (4) includes an SMBUS interface for reading hard drive manufacturer information and operating status, and supports LED positioning indication function.

6. The multi-channel high-speed storage backplane as described in claim 1 or 5, characterized in that, The management and control module (4) also includes a CPLD expansion interface for supporting BIOS customization functions.

7. The multi-channel high-speed storage backplane as described in claim 1, characterized in that, The protection and maintenance module (5) includes an EFUSE circuit for overcurrent protection.

8. The multi-channel high-speed storage backplane as described in claim 1 or 7, characterized in that, The protection and maintenance module (5) supports hard disk hot-swapping.

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