Solar cells

Abstract

This invention provides a solar cell, comprising: a substrate layer including a side surface and opposing first and second surfaces, including a first region and a second region; the first surface having an emission structure, a first passivation layer, a first plating layer, and a first electrode; a tunneling dielectric layer, a doped conductive layer, a second passivation layer, a conductive transport layer, and a second electrode located on the second surface; the second surface having a groove located in the second region, with a portion of the second passivation layer and a portion of the conductive transport layer located within the groove; the doped conductive layer located on the side of the tunneling dielectric layer away from the substrate layer; the conductive transport layer located on the side of the second passivation layer away from the substrate layer; and the second electrode located on the side of the doped conductive layer away from the substrate layer; a third passivation layer and a second plating layer located on the side surface, with the second plating layer located on the side of the third passivation layer away from the side surface. This solar cell solves the technical problem of improving solar cell efficiency.

Description

Technical Field

[0001] This application relates to the field of solar cells, and more specifically, to a solar cell. Background Technology

[0002] The thickness of the doped conductive layer on the surface of a solar cell affects the number of photogenerated carriers, the short-circuit current, and the photoelectric conversion efficiency. Therefore, optimizing the thickness of the doped conductive layer can reduce parasitic absorption and contact resistance, thereby improving the photoelectric conversion efficiency of the solar cell. However, current optimization methods have not achieved satisfactory results.

[0003] Therefore, there is an urgent need for a type of solar cell that can solve the problem of how to improve the efficiency of solar cells.

[0004] The information disclosed in the background section is only intended to enhance the understanding of the background art of the art described herein. Therefore, the background art may contain information that does not constitute prior art known to those skilled in the art in this country. Utility Model Content

[0005] The main objective of this invention is to provide a solar cell to address the problem of how to improve the efficiency of solar cells in the prior art.

[0006] To achieve the above objectives, according to one aspect of the present invention, a solar cell is provided, comprising a substrate layer including a side surface and opposing first and second surfaces, the second surface including a first region and a second region; an emitter structure, a first passivation layer, a first plating layer, and a plurality of first electrodes located on the first surface, the emitter structure being located on the first surface, the first passivation layer being located between the emitter structure and the first plating layer, and the plurality of first electrodes being located on the side of the emitter structure away from the substrate layer; a tunneling dielectric layer, a doped conductive layer, a second passivation layer, a conductive transport layer, and a plurality of second electrodes located on the second surface, the tunneling dielectric layer and the doped conductive layer being located in the first region, the second surface having a groove located in the second region, a portion of the second passivation layer and a portion of the conductive transport layer being located within the groove, the doped conductive layer being located on the side of the tunneling dielectric layer away from the substrate layer, the conductive transport layer being located on the side of the second passivation layer away from the substrate layer, and the second electrodes being located in the first region and electrically connected to the doped conductive layer; a third passivation layer and a second plating layer located on the side surface, the second plating layer being located on the side of the third passivation layer away from the side surface.

[0007] Furthermore, the first surface includes a third region and a fourth region, the emission structure includes a first emitter and a second emitter, the second emitter is located on the side of the first emitter away from the substrate layer, the first emitter is located in the third region, the first electrode is located in the third region and is electrically connected to the emission structure, and the doping concentration of the first emitter is less than the doping concentration of the second emitter.

[0008] Furthermore, the thickness of the second coating is 10 nm to 100 nm.

[0009] Furthermore, the thickness of the third passivation layer is 20nm to 200nm.

[0010] Furthermore, in the first direction, the thickness of the conductive transport layer is 50 nm to 300 nm, and the first direction is the thickness direction of the substrate layer.

[0011] Furthermore, in the second direction, the thickness of the conductive transport layer is 30 nm to 150 nm, and the second direction is perpendicular to the thickness direction of the substrate layer.

[0012] Furthermore, the material of the conductive transport layer is aluminum-doped zinc oxide.

[0013] Furthermore, in the first direction, the thickness of the second passivation layer is 10 nm to 100 nm, and the first direction is the thickness direction of the substrate layer.

[0014] Furthermore, in the second direction, the thickness of the second passivation layer is 15nm to 120nm, and the second direction is perpendicular to the thickness direction of the substrate layer.

[0015] Furthermore, the conductivity of the second passivation layer is less than that of the conductive transport layer.

[0016] According to the technical solution of this utility model, the solar cell includes: a substrate layer, including a side surface and a first surface and a second surface opposite to each other, the second surface including a first region and a second region; an emitting structure, a first passivation layer, a first plating layer, and a plurality of first electrodes located on the first surface, the emitting structure being located on the first surface, the first passivation layer being located between the emitting structure and the first plating layer, and the plurality of first electrodes being located on the side of the emitting structure away from the substrate layer; the second surface having a tunneling dielectric layer, a doped conductive layer, a second passivation layer, a conductive transport layer, and a second electrode, the second surface having a groove located in the second region, part of the second passivation layer and part of the conductive transport layer being located in the groove, the doped conductive layer being located on the side of the tunneling dielectric layer away from the substrate layer, the conductive transport layer being located on the side of the second passivation layer away from the substrate layer, the second electrode being located in the first region and electrically connected to the doped conductive layer; a third passivation layer and a second plating layer located on the side surface, the second plating layer being located on the side of the third passivation layer away from the side surface. In this solution, on the second surface of the solar cell, there is no doped conductive layer in the groove region, which can reduce parasitic absorption of light, prevent the short-circuit current from decreasing rapidly as the doped conductive layer thickens, maximize the utilization of the short-circuit current, and improve the cell efficiency. In addition, the aforementioned conductive transport layer can further increase the lateral current transport and improve battery efficiency, thereby solving the problem of how to improve the efficiency of solar cells in the prior art. Attached Figure Description

[0017] The accompanying drawings, which form part of this specification, are used to provide a further understanding of this utility model. The illustrative embodiments and descriptions of this utility model are used to explain this utility model and do not constitute an undue limitation thereof.

[0018] In the picture:

[0019] Figure 1 A schematic diagram of the structure of a solar cell provided according to an embodiment of this application is shown.

[0020] The above figures include the following reference numerals:

[0021] 10. Substrate layer; 11. First region; 12. Second region; 13. Emitter structure; 131. First emitter; 132. Second emitter; 14. First passivation layer; 15. First plating layer; 16. First electrode; 17. Tunneling dielectric layer; 18. Second passivation layer; 19. Doped conductive layer; 20. Conductive transport layer; 21. Second electrode; 22. Groove; 23. Third passivation layer; 24. Second plating layer; 25. Third region; 26. Fourth region. Detailed Implementation

[0022] It should be noted that, where there is no conflict, the embodiments and features in the embodiments of this utility model can be combined with each other. The present utility model will now be described in detail with reference to the accompanying drawings and embodiments.

[0023] The present application will be further described in detail below with reference to specific embodiments, which should not be construed as limiting the scope of protection claimed in the present application.

[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of the utility model described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, system, product, or device that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, products, or devices.

[0026] As described in the background section, existing solar cells have low efficiency. To address the aforementioned technical problems, this application proposes a solar cell.

[0027] Figure 1 This is a schematic diagram of the structure of a solar cell according to an embodiment of this application. Figure 1 As shown, it includes:

[0028] The base layer 10 includes a side surface and an opposing first surface and a second surface, wherein the second surface includes a first region 11 and a second region 12.

[0029] Specifically, the substrate 10 is used to receive incident light and generate photogenerated carriers. The substrate can be an N-type substrate, which can be doped with any one of the pentavalent elements such as phosphorus (P), bismuth (Bi), arsenic (As), or antimony (Sb). The side surface is a surface connecting the first and second surfaces. It should be noted that a second electrode 21 will be formed on the second surface of the substrate 10 in a subsequent step. The orthographic projection of the second electrode 21 onto the second surface of the substrate 10 lies within the first region 11. The second region corresponds to the region outside the orthographic projection of the second electrode 21 on the second surface. Alternatively, the second region 12 can also be any region on the second surface of the substrate 10 other than the first region 11.

[0030] In some embodiments, the solar cell is a tunnel oxide passivated contact (TOPCon cell), and both the first and second surfaces of the substrate 10 can be used to receive incident light.

[0031] The first surface includes an emission structure 13, a first passivation layer 14, a first plating layer 15, and a plurality of first electrodes 16. The emission structure 13 is located on the first surface, the first passivation layer 14 is located between the emission structure 13 and the first plating layer 15, and the plurality of first electrodes 16 are located on the side of the emission structure 13 away from the substrate layer 10.

[0032] Specifically, the emitter structure 13 can promote the separation of photogenerated carriers, reduce recombination, and improve the photoelectric efficiency of the battery. The emitter structure 13 includes a first emitter 131 and a second emitter 132. The emitter structure 13 can be obtained by diffusion doping the surface layer of the substrate layer 10 with P-type ions, forming a PN junction with the substrate layer 10. In some embodiments, the P-type doping element can be any one of trivalent elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In). Furthermore, the doping concentrations of the first emitter 131 and the second emitter 132 are different. The first passivation layer 14 is located on the side of the emitter structure 13 away from the substrate layer 10. The first passivation layer 14 can be one or more materials such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, titanium oxide, hafnium oxide, or aluminum oxide. The first coating 15 is located on the side of the first passivation layer 14 away from the base layer 10, that is, the first passivation layer 14 is located between the emitting structure 13 and the first coating 15. The first coating 15 can effectively reduce the reflectivity of the battery surface, thereby improving the transmittance and enhancing the light absorption rate of the battery. The orthogonal projection of the plurality of first electrodes 16, which are usually composed of silicon oxide, silicon nitride or one or more, on the first surface of the base layer 10 is located in the third region 25. The first electrodes 16 pass through the first coating 15 and the first passivation layer 14 and contact the emitting structure 13. The first electrodes 16 may include one or more of aluminum, silver, gold, nickel, molybdenum or copper, and are located on the side of the emitting structure 13 away from the base layer 10.

[0033] The second surface includes a tunneling dielectric layer 17, a doped conductive layer 19, a second passivation layer 18, a conductive transport layer 20, and a plurality of second electrodes 21. The tunneling dielectric layer 17 and the doped conductive layer 19 are located in the first region 11. The second surface has a groove 22 located in the second region. Part of the second passivation layer 18 and part of the conductive transport layer 20 are located in the groove 22. The doped conductive layer 19 is located on the side of the tunneling dielectric layer 17 away from the substrate layer 10. The conductive transport layer 20 is located on the side of the second passivation layer 18 away from the substrate layer 10. The second electrodes 21 are located in the first region 11 and are electrically connected to the doped conductive layer 19.

[0034] Specifically, the tunneling dielectric layer 17 is typically composed of at least one of silicon oxide, aluminum oxide, hafnium oxide, or high oxides, and is fabricated using methods such as plasma-enhanced chemical vapor deposition (PECVD) or physical vapor deposition (PVD). The tunneling dielectric layer 17 is located on the second surface. The doped conductive layer 19 is formed by doping polycrystalline silicon with pentavalent elements such as phosphorus (P), bismuth (Bi), arsenic (As), or antimony (Sb) on the substrate layer 10. The second passivation layer 18 can be one or more of the following materials: silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, titanium oxide, hafnium oxide, or aluminum oxide. It can be the same as or different from the material of the first passivation layer 14. Those skilled in the art can set a second passivation layer 18 of the same material or a second passivation layer 18 of a different material according to the actual situation. The conductive transport layer 20 can be a transparent conductive oxide (TCO), typically composed of at least one of indium tin oxide, aluminum-doped zinc oxide, and tin fluoride oxide. The plurality of second electrodes 21 pass through the conductive transport layer 20, the second passivation layer 18, and form an electrical connection with the doped conductive layer 19. The material of the second electrodes 21 can include one or more of aluminum, silver, gold, nickel, molybdenum, or copper, and can be the same as or different from the material of the first electrode 16. Those skilled in the art can configure second electrodes 21 of the same material or different materials according to the actual situation.

[0035] The third passivation layer 23 and the second plating layer 24 are located on the side mentioned above, with the second plating layer 24 located on the side of the third passivation layer 23 away from the side mentioned above.

[0036] Specifically, the third passivation layer 23 can be one or more materials selected from silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, titanium oxide, hafnium oxide, or aluminum oxide. It can be the same material as or different from the first passivation layer 14 or the second passivation layer 18. Those skilled in the art can set the third passivation layer 23 of the same material or a different material according to the actual situation. The second coating layer 24 can effectively reduce the reflectivity of the battery surface, thereby improving the light transmittance and enhancing the light absorption rate of the battery. It is usually composed of one or more materials such as silicon oxide and silicon nitride. It can be the same material as or different from the first coating layer 15. Those skilled in the art can set the second coating layer 24 of the same material or a different material according to the actual situation.

[0037] The solar cell of this invention includes: a substrate layer, including a side surface and opposing first and second surfaces, including a first region and a second region; an emitter structure, a first passivation layer, a first plating layer, and a plurality of first electrodes located on the first surface, wherein the emitter structure is located on the first surface, the first passivation layer is located between the emitter structure and the first plating layer, and the plurality of first electrodes are located on the side of the emitter structure away from the substrate layer; the first surface has an emitter structure, a first passivation layer, a first plating layer, and a first electrode; a tunneling dielectric layer, a doped conductive layer, a second passivation layer, a conductive transport layer, and a second electrode located on the second surface, wherein the second surface has a groove located in the second region, a portion of the second passivation layer and a portion of the conductive transport layer are located in the groove, the doped conductive layer is located on the side of the tunneling dielectric layer away from the substrate layer, the conductive transport layer is located on the side of the second passivation layer away from the substrate layer, and the second electrode is located in the first region and electrically connected to the doped conductive layer; a third passivation layer and a second plating layer located on the side surface, wherein the second plating layer is located on the side of the third passivation layer away from the side surface. In this design, no conductive layer is doped in the grooved region on the second surface of the solar cell. This reduces parasitic light absorption and prevents the short-circuit current from decreasing rapidly as the doped conductive layer thickens, maximizing the utilization of the short-circuit current and improving cell efficiency. Furthermore, the aforementioned conductive transport layer further enhances lateral current transport, further improving cell efficiency. This solar cell solves the technical problem of improving solar cell efficiency.

[0038] In some specific embodiments of this application, such as Figure 1 As shown, the first surface includes a third region 25 and a fourth region 26. The emission structure 13 includes a first emitter 131 and a second emitter 132. The second emitter 132 is located on the side of the first emitter 131 away from the substrate layer 10. The first emitter 131 is located in the third region 25. The first electrode 16 is located in the third region 25 and is electrically connected to the emission structure 13. The doping concentration of the first emitter 131 is less than that of the second emitter 132. Since the doping concentration of the second emitter 132 is higher than that of the first emitter 131, the second emitter 132 is a heavily doped region, and the first emitter 131 is a lightly doped region. The second emitter 132 can contact the first electrode 16, thereby achieving contact between the heavily doped region and the metal electrode. The heavily doped region has a higher hole concentration. Furthermore, the high concentration of holes can effectively fill the potential barrier at the contact interface, thereby reducing the height of the contact barrier. A lower contact barrier means a reduction in the resistance to electron and hole transport between the metal and semiconductor, which in turn lowers the contact resistance. Therefore, the contact resistivity can be further improved, thereby increasing the fill factor.

[0039] Specifically, the fourth region 26 corresponds to the region other than the orthographic projection of the first electrode 16 on the first surface, or the fourth region 26 can also be the region of the first surface in the substrate layer 10 other than the third region 25. The doping concentration of the first emitter is 10. 17 ~10 19 cm -3 The doping concentration of the second emitter mentioned above is 10. 20 ~10 21 cm -3 .

[0040] In some specific embodiments of this application, the thickness of the second coating is 10 nm to 100 nm. The thickness of the second coating should not be too thick. The thickness setting of the second coating can further reduce contact resistance and improve light absorption efficiency, thereby improving photoelectric conversion efficiency.

[0041] In practical applications, the thickness of the second coating can be selected from any value within the above range, specifically 10nm~20nm, 20nm~30nm, 30nm~40nm, 40nm~50nm, 50nm~60nm, 60nm~70nm, 70nm~80nm, 80nm~90nm, and 90nm~100nm.

[0042] In some specific embodiments of this application, the thickness of the third passivation layer is 20 nm to 200 nm. The passivation layer reduces the defect states on the silicon wafer surface, thereby decreasing the recombination rate of charge carriers and improving photoelectric conversion efficiency. Therefore, the thickness of the third passivation layer should not be too thick. The aforementioned thickness setting of the third passivation layer can further ensure the effective reduction of defect states on the silicon wafer surface and the reduction of charge carrier recombination, thereby improving photoelectric conversion efficiency.

[0043] In practical applications, the thickness of the third passivation layer can be selected from any value within the above range, specifically 20nm~40nm, 40nm~60nm, 60nm~80nm, 80nm~100nm, 100nm~120nm, 120nm~140nm, 140nm~160nm, 160nm~180nm, and 180nm~200nm.

[0044] In some specific embodiments of this application, the thickness of the conductive transport layer is 50 nm to 300 nm in the first direction, which is the thickness direction of the substrate layer. The conductive transport layer is disposed at the bottom of the groove. The thickness of the conductive transport layer should not be too thick. Setting the thickness of the conductive transport layer allows for a better balance between transmittance and resistance, thereby further increasing the conductive transport efficiency and improving the photoelectric conversion rate.

[0045] In practical applications, the thickness of the conductive transport layer in the first direction can be selected from any value within the above range, specifically 50nm~100nm, 100nm~150nm, 150nm~200nm and 250nm~300nm.

[0046] In some specific embodiments of this application, the thickness of the conductive transport layer in the second direction is 30 nm to 150 nm, and the second direction is perpendicular to the thickness direction of the substrate layer. The conductive transport layer is disposed on the sidewall of the groove. The thickness of the conductive transport layer should not be too thick. The thickness setting of the conductive transport layer can improve light transmittance and reduce resistance, thereby further increasing the conductive transport efficiency and improving the photoelectric conversion efficiency.

[0047] In practical applications, the thickness of the conductive transport layer in the second direction can be selected from any value within the above range, specifically 30nm~50nm, 50nm~70nm, 70nm~90nm, 90nm~110nm, 110nm~130nm and 130nm~150nm.

[0048] In some specific embodiments of this application, the material of the conductive transport layer is aluminum-doped zinc oxide. This material possesses good lateral conductivity, low optical absorption, and high thermal stability, which can further improve the photoelectric conversion efficiency of the battery.

[0049] Specifically, aluminum-doped zinc oxide exhibits excellent optical properties, with high average transmittance and low optical absorption. Simultaneously, it possesses low resistivity, providing good lateral conductivity. Furthermore, its stable crystal structure and high-bond-energy chemical bonds allow it to maintain its conductivity and optical properties at high temperatures.

[0050] In some specific embodiments of this application, the thickness of the second passivation layer is 10 nm to 100 nm in the first direction, and the first direction is the thickness direction of the substrate layer.

[0051] In practical applications, the thickness of the second passivation layer in the first direction can be selected from any value within the aforementioned range, specifically 10nm–20nm, 20nm–30nm, 30nm–40nm, 40nm–50nm, 50nm–60nm, 60nm–70nm, 70nm–80nm, 80nm–90nm, and 90nm–100nm. The passivation layer can reduce the recombination rate of charge carriers and improve photoelectric conversion efficiency. Therefore, the thickness of the second passivation layer should not be too thick. The aforementioned thickness setting of the second passivation layer can further effectively reduce surface defect states and reduce charge carrier recombination, thereby improving photoelectric conversion efficiency.

[0052] In some specific embodiments of this application, the thickness of the second passivation layer is 15 nm to 120 nm in the second direction, which is perpendicular to the thickness direction of the substrate layer. The passivation layer reduces defect states on the silicon wafer surface, lowers the recombination rate of charge carriers, and improves photoelectric conversion efficiency. Therefore, the thickness of the second passivation layer should not be too thick. The aforementioned thickness setting of the second passivation layer can further ensure the effective reduction of defect states on the silicon wafer surface and the reduction of charge carrier recombination, thereby improving photoelectric conversion efficiency.

[0053] In practical applications, the thickness of the second passivation layer in the second direction can be selected from any value within the above range, specifically 15nm~30nm, 30nm~45nm, 45nm~60nm, 60nm~75nm, 75nm~90nm, 90nm~105nm and 105nm~120nm.

[0054] In some specific embodiments of this application, the conductivity of the second passivation layer is lower than that of the conductive transport layer. The high conductivity of the conductive transport layer can effectively collect photogenerated carriers, reduce carrier recombination, improve the fill factor of the battery, and further improve the photoelectric conversion efficiency of the battery.

[0055] As can be seen from the above description, the embodiments of this utility model achieve the following technical effects:

[0056] The solar cell of this application includes: a substrate layer, including a side surface and a first surface and a second surface opposite to each other, including a first region and a second region; an emitter structure, a first passivation layer, a first plating layer, and a plurality of first electrodes located on the first surface, wherein the emitter structure is located on the first surface, the first passivation layer is located between the emitter structure and the first plating layer, and the plurality of first electrodes are located on the side of the emitter structure away from the substrate layer; the first surface has an emitter structure, a first passivation layer, a first plating layer, and a first electrode; a tunneling dielectric layer, a doped conductive layer, a second passivation layer, a conductive transport layer, and a second electrode located on the second surface, wherein the second surface has a groove located in the second region, a portion of the second passivation layer and a portion of the conductive transport layer are located in the groove, the doped conductive layer is located on the side of the tunneling dielectric layer away from the substrate layer, the conductive transport layer is located on the side of the second passivation layer away from the substrate layer, and the second electrode is located in the first region and is electrically connected to the doped conductive layer; a third passivation layer and a second plating layer located on the side surface, wherein the second plating layer is located on the side of the third passivation layer away from the side surface. In this design, no conductive layer is doped in the grooved region on the second surface of the solar cell. This reduces parasitic light absorption and prevents the short-circuit current from decreasing rapidly as the doped conductive layer thickens, maximizing the utilization of the short-circuit current and improving cell efficiency. Furthermore, the aforementioned conductive transport layer further enhances lateral current transport, further improving cell efficiency. This solar cell solves the technical problem of improving solar cell efficiency.

[0057] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A solar cell, characterized by, include: A base layer, the base layer including a side surface and an opposing first surface and a second surface, the second surface including a first region and a second region; The first surface includes an emission structure, a first passivation layer, a first plating layer, and a plurality of first electrodes. The emission structure is located on the first surface, the first passivation layer is located between the emission structure and the first plating layer, and the plurality of first electrodes are located on the side of the emission structure away from the substrate layer. The second surface comprises a tunneling dielectric layer, a doped conductive layer, a second passivation layer, a conductive transport layer, and a plurality of second electrodes. The tunneling dielectric layer and the doped conductive layer are located in the first region. The second surface has a groove located in the second region. A portion of the second passivation layer and a portion of the conductive transport layer are located in the groove. The doped conductive layer is located on the side of the tunneling dielectric layer away from the substrate layer. The conductive transport layer is located on the side of the second passivation layer away from the substrate layer. The second electrodes are located in the first region and are electrically connected to the doped conductive layer. A third passivation layer and a second plating layer are located on the side of the third passivation layer away from the side.

2. The solar cell according to claim 1, characterized in that, The first surface includes a third region and a fourth region. The emission structure includes a first emitter and a second emitter. The second emitter is located on the side of the first emitter away from the substrate layer. The first emitter is located in the third region. The first electrode is located in the third region and is electrically connected to the emission structure. The doping concentration of the first emitter is less than that of the second emitter.

3. The solar cell according to claim 1, characterized in that, The thickness of the second coating is 10nm to 100nm.

4. The solar cell of claim 1, wherein The thickness of the third passivation layer is 20nm to 200nm.

5. The solar cell of claim 1, wherein In a first direction, the thickness of the conductive transport layer is 50 nm to 300 nm, and the first direction is the thickness direction of the substrate layer.

6. The solar cell of claim 1, wherein In the second direction, the thickness of the conductive transport layer is 30 nm to 150 nm, and the second direction is perpendicular to the thickness direction of the substrate layer.

7. The solar cell of claim 1, wherein The conductive transport layer is made of aluminum-doped zinc oxide.

8. The solar cell of claim 1, wherein, In the first direction, the thickness of the second passivation layer is 10 nm to 100 nm, and the first direction is the thickness direction of the substrate layer.

9. The solar cell of claim 1, wherein, In the second direction, the thickness of the second passivation layer is 15nm to 120nm, and the second direction is perpendicular to the thickness direction of the substrate layer.

10. The solar cell of claim 1, wherein, The conductivity of the second passivation layer is less than that of the conductive transport layer.

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