Adaptive linearization bias circuit, radio frequency module, chip and electronic device

Abstract

The utility model provides a kind of adaptive linearization bias circuit, radio frequency module, chip and electronic equipment.The adaptive linearization bias circuit includes biasing subcircuit and rectifier subcircuit;The output end of biasing subcircuit, the control end of rectifier subcircuit and the radio frequency input end of power amplifier are coupled first node, the output end of rectifier subcircuit is coupled the voltage division node of biasing subcircuit, rectifier subcircuit, it is configured to generate feedback signal according to the compensation current of biasing subcircuit to the power amplifier, so that biasing subcircuit reduces compensation current while not affecting linearity compensation function.The utility model can reduce the current of power amplifier while not deteriorating AM-AM distortion, so as to realize optimizing efficiency while not affecting linearity compensation function.

Description

Technical Field

[0001] This utility model relates to the field of power amplifier technology, and in particular to an adaptive linearization bias circuit, radio frequency module, chip and electronic device. Background Technology

[0002] With the rapid development and continuous evolution of wireless communication technology, the requirements for front-end communication systems are becoming increasingly stringent. For example, higher throughput and linearity are required, along with lower power consumption. As a crucial component of wireless transmitter systems, the performance of power amplifiers has a decisive impact on the overall performance of the communication system.

[0003] With the continuous updates and iterations of cellular and WLAN (Wireless Local Area Network) standards, signal transmission schemes have become increasingly complex. This is mainly reflected in the requirements for higher peak-to-average power ratio (PAPR), larger channel bandwidth, and higher-order quadrature amplitude modulation. Reflecting on the requirements for power amplifiers, to meet the high PAPR signal transmission, the power amplifier needs to operate at its back-off power. While this ensures linearity, it sacrifices efficiency. Therefore, how to provide a circuit structure that effectively improves back-off efficiency without affecting saturation power and linearity is one of the main research topics for those skilled in the art.

[0004] From the perspective of power amplifier design type, there are three traditional methods to improve efficiency: (1) reduce the current conduction angle, from Class A to Class C; (2) use switching power amplifiers and harmonic control power amplifiers; (3) use Doherty power amplifiers. These three methods are common PA (Power Amplifier) ​​types and are the underlying logic of the design. From the perspective of bias adjustment technology, there are two main solutions in the existing technology: one is average power tracking (APT), which controls the power supply voltage by tracking the average power of the signal; the other is envelope tracking (ET), which controls the power amplifier operating voltage by detecting the amplitude of the envelope signal.

[0005] However, the above solutions typically require additional control chips besides the power amplifier (APA) for implementation, resulting in complex structures and high costs. Therefore, those skilled in the art prefer to use a simple bias circuit directly applied to the APA's bias network to achieve a trade-off between linearity and efficiency. Specifically, the bias network of most power amplifiers is now called an adaptive linearization bias network, usually composed of two diodes and a transistor. Its function is to prevent AM-AM (Amplitude Modulation) distortion caused by the self-heating effect of the transistor and the rectification effect of the PN junction when the APA operates at high power. Its basic principle is a transistor-based emitter follower, which uses the rectification effect of its base-emitter junction to provide compensation current and voltage to suppress gain compression and phase distortion of the power amplifier transistor under large signal conditions. This compensation current, plus the current of the power amplifier transistor itself, is amplified by the transistor current and directly determines the efficiency of the power amplifier. Therefore, without affecting the linearity of the power amplifier, reducing the amount of compensation current required by the power amplifier tube is the key technology for optimizing the power amplifier efficiency. The current bias circuit structure cannot provide both linearity compensation and efficiency optimization at the same time.

[0006] It should be noted that the information disclosed in the background section of this utility model is intended only to enhance the understanding of the general background of this utility model, and should not be regarded as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Utility Model Content

[0007] This invention addresses the problem that existing bias circuits cannot simultaneously optimize efficiency and provide linearity compensation. It provides an adaptive linearization bias circuit, RF module, chip, and electronic device. This invention can reduce the current of the power amplifier without worsening AM-AM distortion, thereby optimizing efficiency without affecting the linearity compensation function.

[0008] To achieve the above objectives, this utility model provides the following technical solution: an adaptive linearization bias circuit for a power amplifier, the adaptive linearization bias circuit comprising a bias sub-circuit and a rectifier sub-circuit; the output terminal of the bias sub-circuit, the control terminal of the rectifier sub-circuit, and the RF input terminal of the power amplifier are coupled to a first node, the output terminal of the rectifier sub-circuit is coupled to a voltage divider node of the bias sub-circuit, and the rectifier sub-circuit is configured to generate a feedback signal based on the compensation current of the power amplifier by the bias sub-circuit, so that the bias sub-circuit reduces the compensation current without affecting the linearity compensation function.

[0009] Optionally, the rectifier circuit includes a first bipolar junction transistor and at least one first resistor, wherein the base of the first bipolar junction transistor is coupled to the first node, its collector is coupled to the voltage divider node, and its emitter is coupled to ground; at least one first resistor is connected in series with the base, collector, or emitter of the first bipolar junction transistor.

[0010] Optionally, the bias sub-circuit includes a second resistor, a first diode, a second diode, and a second bipolar junction transistor (BJT). The first terminal of the second resistor receives a first voltage. The second terminal of the second resistor, the base of the second BJT, and the anode of the first diode are coupled to a second node. The common junction of the cathode of the first diode and the anode of the second diode forms the voltage divider node. The cathode of the second diode is coupled to ground. The collector of the second BJT receives a second voltage. The emitter of the second BJT is coupled to the first node.

[0011] Optionally, the first diode and / or the second diode may be transistors with their base and collector shorted.

[0012] Optionally, the bias subcircuit further includes a capacitor, with a first end of the capacitor coupled to the second node and a second end of the capacitor coupled to ground.

[0013] To achieve the above objectives, the present invention also provides a radio frequency (RF) module, which includes a power amplifier circuit and an adaptive linearization bias circuit as described in any of the above claims. The power amplifier circuit includes a power amplifier, and the RF input terminal of the power amplifier is coupled to the output terminal of the adaptive linearization bias circuit.

[0014] Optionally, the power amplifier circuit further includes a third resistor, the first end of which is coupled to the first node, and the second end of which is coupled to the radio frequency input terminal of the power amplifier.

[0015] Optionally, the power amplifier includes a third bipolar junction transistor.

[0016] To achieve the above objectives, the present invention also provides a chip, wherein the chip integrates the adaptive linearization bias circuit described in any one of the above claims, or the radio frequency module described in any one of the above claims.

[0017] To achieve the above objectives, the present invention also provides an electronic device, which includes the adaptive linearization bias circuit described in any one of the above claims, or the radio frequency module described in any one of the above claims, or the chip described in the above claims.

[0018] Compared with existing technologies, the adaptive linearization bias circuit, RF module, chip, and electronic device provided by this invention have the following advantages: The adaptive linearization bias circuit provided by this invention includes a bias sub-circuit and a rectifier sub-circuit. The bias sub-circuit provides a stable static operating point for the power amplifier, ensuring that it operates in the linear region when amplifying signals and avoiding signal distortion or entering the nonlinear region. Furthermore, the rectifier sub-circuit provides a real-time feedback signal to the bias sub-circuit, thereby reducing the compensation current without affecting the linearity compensation function. Therefore, this invention can reduce the current of the power amplifier without worsening AM-AM distortion, thus optimizing efficiency without affecting the linearity compensation function.

[0019] Furthermore, since the RF module, chip, and electronic device provided by this utility model belong to the same inventive concept as the adaptive linearization bias circuit provided by this utility model, the RF module, chip, and electronic device provided by this utility model at least have all the advantages of the adaptive linearization bias circuit provided by this utility model. For details on the beneficial effects of the RF module, chip, and electronic device provided by this utility model, please refer to the above description of the beneficial effects of the adaptive linearization bias circuit provided by this utility model, which will not be repeated here. Attached Figure Description

[0020] Figure 1 The structural block diagram of the adaptive linearization bias circuit provided by this utility model.

[0021] Figure 2 This is a structural block diagram of a radio frequency module provided in one embodiment of the present invention.

[0022] Figure 3 A schematic diagram of the topology of an adaptive linearization bias circuit provided in one embodiment of this utility model.

[0023] Figure 4 for Figure 3 A specific example diagram of the first and second diodes.

[0024] Figure 5a This is a schematic diagram showing the AM-AM curves as a function of power before and after lowering the quiescent operating point of the power amplifier.

[0025] Figure 5b This is a schematic diagram showing the efficiency of a power amplifier as a function of power before and after lowering its quiescent operating point.

[0026] The accompanying figure is labeled as follows:

[0027] Adaptive linearization bias circuit -100;

[0028] Rectifier circuit-110, first bipolar junction transistor-HBT1, first resistor-R1;

[0029] Bias sub-circuit - 120, second resistor - R2, first diode - D1, second diode - D2, second bipolar junction transistor - HBT2, capacitor - C1;

[0030] First node - N1, second node - N2, voltage divider node - N3;

[0031] First voltage -V1, second voltage -V2;

[0032] Power amplifier circuit-200, power amplifier-HBT3, third resistor-R3. Detailed Implementation

[0033] The following detailed description, in conjunction with the accompanying drawings, provides a further detailed explanation of the adaptive linearization bias circuit, RF module, chip, and electronic device proposed in this utility model. The advantages and features of this utility model will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, intended only to facilitate and clarify the illustration of the embodiments of this utility model. Please refer to the drawings to make the objectives, features, and advantages of this utility model more apparent and understandable. It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes and to enable those skilled in the art to understand and read them, and are not intended to limit the implementation conditions of this utility model. Any modifications to the structure, changes in proportions, or adjustments to the size, provided they produce the same or similar effects and achieve the same objectives as this utility model, should still fall within the scope of the technical content disclosed in this utility model. Specific design features of this utility model disclosed herein, including, for example, specific dimensions, orientations, positions, and shapes, will be determined in part by the specific application and usage environment. Furthermore, in the embodiments described below, the same reference numerals are sometimes used across different figures to denote the same parts or parts having the same function, and their repeated descriptions are omitted. In this specification, similar reference numerals and letters are used to denote similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0034] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The singular forms “a,” “an,” and “the” include plural objects. The term “or” is generally used to mean “and / or,” the term “several” is generally used to mean “at least one,” and the term “at least two” is generally used to mean “two or more.” Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated.

[0035] It should be understood that when a component is referred to as "connected," "connected to," or "coupled to" other components, it may be directly connected to other components, or there may be intermediary components. Conversely, when a component is referred to as "directly connected" or "directly connected to" other components, there are no intermediary components.

[0036] The core idea of ​​this invention is to provide an adaptive linearization bias circuit, RF module, chip and electronic device. This invention can reduce the current of the power amplifier without worsening AM-AM distortion, thereby optimizing efficiency without affecting the linearity compensation function.

[0037] It should be noted that the adaptive linearization bias circuit provided by this utility model can be used in the radio frequency module and electronic device provided by this utility model, and the adaptive linearization bias circuit, radio frequency module, and chip provided by this utility model can be used in the electronic device provided by this utility model. It should be noted that those skilled in the art should understand that this utility model does not limit the electronic device in any way. Exemplarily, the electronic device includes, but is not limited to, video products such as televisions, video recorders, and digital cameras; communication products such as mobile phones, communication switching equipment, and communication transmission equipment; learning aids such as translators, learning machines, and electronic dictionaries; and medical devices such as medical imaging equipment and medical testing equipment, etc., without exhaustive list.

[0038] To achieve the above objectives, this invention provides an adaptive linearization bias circuit for a power amplifier. For an example, please refer to... Figure 1 , Figure 1 This is a block diagram of the adaptive linearization bias circuit provided by this utility model. From... Figure 1 As can be seen, the adaptive linearization bias circuit 100 includes a bias sub-circuit 120 and a rectifier sub-circuit 110. The output terminal of the bias sub-circuit 120, the control terminal of the rectifier sub-circuit 110, and the RF input terminal of the power amplifier HBT3 are coupled to the first node N1. The output terminal of the rectifier sub-circuit 110 is coupled to the voltage divider node of the bias sub-circuit 120. Figure 1 Not shown in the image; please refer to the following for details. Figure 3 In the N3), the rectifier circuit 110 is configured to generate a feedback signal based on the compensation current of the power amplifier HBT3 by the bias circuit 120, so that the bias circuit 120 reduces the compensation current without affecting the linearity compensation function.

[0039] The adaptive linearization bias circuit 100 provided by this invention includes a bias sub-circuit 120 and a rectifier sub-circuit 110. The bias sub-circuit 120 provides a stable static operating point for the power amplifier HBT3, ensuring it operates in the linear region when amplifying signals and avoiding signal distortion or entry into the nonlinear region. Furthermore, the rectifier sub-circuit 110 provides a real-time feedback signal to the bias sub-circuit 120, thereby reducing the compensation current of the bias sub-circuit 120 without affecting the linearity compensation function. Therefore, this invention can reduce the current of the power amplifier HBT3 without worsening AM-AM distortion, thus optimizing efficiency without affecting the linearity compensation function.

[0040] It should be noted that those skilled in the art should understand that this invention does not limit the specific application scenarios of the adaptive linearization bias circuit 100. For example, please refer to [link to relevant documentation]. Figure 2 , Figure 2 This is a structural block diagram of an RF module provided in one embodiment of the present invention, which represents one application scenario of the adaptive linearization bias circuit 100 provided by the present invention.

[0041] For example, please see Figure 3 , Figure 3 This is a schematic diagram of the topology of an adaptive linearization bias circuit provided in one embodiment of the present invention. Figure 3As shown, in some exemplary embodiments, the rectifier circuit 110 includes a first bipolar junction transistor (BJT) HBT1 and at least one first resistor R1. The base of the first BJT HBT1 is coupled to the first node N1, its collector is coupled to the voltage divider node N3, and its emitter is connected in series with the first resistor R1 and then coupled to ground. Thus, by using a BJT to implement the rectifier circuit 110, based on the good high-frequency performance, high carrier mobility, and good power carrying capacity of the BJT, not only can the adaptive linearization bias circuit 100 provided by this invention have better applicability, but it can also effectively improve efficiency and reduce noise interference. Furthermore, by coupling the first resistor R1 to the emitter of the first BJT HBT1, the stability and reliability of this invention can be further improved.

[0042] It should be noted that those skilled in the art should understand that the present invention does not limit the specific type of the first bipolar junction transistor HBT1. For example, in some exemplary embodiments, the first bipolar junction transistor HBT1 can be, but is not limited to, a heterojunction bipolar transistor (HBT) and a bipolar junction transistor (BJT). As a preferred embodiment, the first bipolar junction transistor HBT1 is a heterojunction bipolar transistor.

[0043] It should be further noted that, as those skilled in the art will understand, the present invention does not impose excessive limitations on the specific location of the first resistor R1. Exemplarily, in some exemplary embodiments, the first resistor R1 may also be connected in series between the first node N1 and the base of the first bipolar junction transistor HBT1; in other embodiments, the first resistor R1 may also be connected in series between the collector of the first bipolar junction transistor HBT1 and the voltage divider node N3.

[0044] Furthermore, it is understood that this invention does not impose excessive limitations on the dimensions of the first bipolar junction transistor HBT1 or the specific value of the first resistor R1. When implementing this invention, the dimensions of the first bipolar junction transistor HBT1 and the resistance value of the first resistor R1 should be reasonably set according to actual needs to achieve the goal of reducing the compensation current and optimizing efficiency without affecting the linearity compensation function of the bias sub-circuit 120 for the power amplifier HBT3.

[0045] For example, please continue to see Figure 3 ,like Figure 3As shown, in some exemplary embodiments, the bias sub-circuit 120 includes a second resistor R2, a first diode D1, a second diode D2, and a second bipolar junction transistor HBT2. The first terminal of the second resistor R2 receives a first voltage V1. The second terminal of the second resistor R2, the base of the second bipolar junction transistor HBT2, and the anode of the first diode D1 are coupled to a second node N2. The common junction of the cathode of the first diode D1 and the anode of the second diode D2 forms the voltage divider node N3. The cathode of the second diode D2 is coupled to ground. The collector of the second bipolar junction transistor HBT2 receives a second voltage V2. The emitter of the second bipolar junction transistor HBT2 is coupled to the first node N1. Therefore, the bias sub-circuit 120 of the adaptive linearization bias circuit 100 provided by this utility model adopts a design of a second resistor R2, a first diode D1, a second diode D2, and a second bipolar junction transistor HBT2. On the one hand, by increasing the resistance value of the second resistor R2, the static operating point of the power amplifier HBT3 can be effectively reduced, that is, the current conduction angle of the amplifier can be reduced, thereby improving the overall efficiency of the power amplifier HBT3. On the other hand, by forming the voltage divider node N3 through the common junction of the negative terminal of the first diode D1 and the positive terminal of the second diode D2, the feedback signal of the rectifier sub-circuit 110 can be received, thereby effectively ensuring the stability and sensitivity of the bias sub-circuit 120. This lays a good foundation for this utility model to reduce the current of the power amplifier HBT3 without deteriorating AM-AM distortion and to optimize efficiency without affecting the linearity compensation function.

[0046] It should be noted that those skilled in the art should understand that this invention does not impose excessive limitations on the specific implementation of the first diode D1 and the second diode D2. For example, please refer to [link to relevant documentation]. Figure 4 , Figure 4 for Figure 3 A specific example diagram of the first diode D1 and the second diode D2 is shown. Figure 4As shown, in some exemplary embodiments, the first diode D1 and / or the second diode D2 comprises a transistor with its base and collector shorted. Specifically, in some exemplary embodiments, the first diode D1 is implemented using a transistor with its base and collector shorted. In this case, the emitter of the transistor used to implement the first diode D1 is coupled to the voltage divider node N3, and the base and collector are coupled to the second terminal of the second resistor R2. In still other exemplary embodiments, the second diode D2 is implemented using a transistor with its base and collector shorted. In this case, the base and collector of the transistor used to implement the second diode D2 are coupled to the voltage divider node N3, and the emitter is coupled to ground. In some other exemplary embodiments, both the first diode D1 and the second diode are transistors with their base and collector shorted. In this case, the base and collector of the first diode D1 are coupled to the second end of the second resistor R2, the emitter of the first diode D1 is coupled to the voltage divider node N3, and the emitter of the second diode D2 is grounded.

[0047] Furthermore, it should be noted that those skilled in the art should understand that the present invention does not limit the specific type of the second bipolar junction transistor HBT2. For example, in some exemplary embodiments, the second bipolar junction transistor HBT2 can be, but is not limited to, a heterojunction bipolar transistor (HBT) and a bipolar junction transistor (BJT). As a preferred embodiment, the second bipolar junction transistor HBT2 is a heterojunction bipolar transistor.

[0048] For example, please continue to see Figure 3 ,like Figure 3 As shown, in some exemplary embodiments, the bias sub-circuit 120 further includes a capacitor C1, with a first terminal of the capacitor C1 coupled to the second node N2 and a second terminal of the capacitor C1 coupled to ground. Thus, the capacitor C1 can improve the stability of the base voltage of the second bipolar junction transistor HBT2, thereby further improving the stability and reliability of the adaptive linearization bias circuit 100 provided by this invention.

[0049] To better understand this utility model, the following will be combined with... Figure 2 and Figure 3 The working principle of the adaptive linearization bias circuit 100 provided by this utility model is explained as follows:

[0050] In practical applications, the core of the power amplifier circuit 200 in the RF module is the power amplifier HBT3. Existing technologies often improve the overall efficiency of the power amplifier HBT3 by increasing the second resistor R2, i.e., reducing its current conduction angle (e.g., changing it from Class A to Class AB). However, this sacrifices linearity. For an example, please refer to... Figure 5a and Figure 5b , Figure 5a This is a schematic diagram showing the AM-AM curves as a function of power before and after lowering the quiescent operating point of power amplifier HBT3. Figure 5b This is a schematic diagram showing the efficiency versus power curves of power amplifier HBT3 before and after lowering its quiescent operating point. Specifically, Figure 5a The solid line in the middle is a schematic diagram of the AM-AM curve as a function of power before the quiescent operating point is lowered. Figure 5a The dashed line represents a schematic diagram of the AM-AM curve as a function of power after lowering the quiescent operating point in the prior art. Figure 5b The solid line is a schematic diagram of the efficiency versus power curve before the quiescent operating point is reduced. Figure 5b The dashed line represents a schematic diagram of the efficiency versus power curve of this invention after lowering the static operating point. From... Figure 5a and Figure 5b It can be seen that before lowering the static operating point, such as Figure 5a The solid line in the figure shows relatively small AM-AM distortion; by using existing technology to reduce current and quiescent operating point, as Figure 5a As the dashed line in the diagram shows, increased AM-AM distortion will worsen the linearity of the power amplifier HBT3; however, as... Figure 5b As shown by the dashed line, the efficiency of power amplifier HBT3 increases due to the decrease in quiescent current.

[0051] Specifically, in combination Figure 3The working principle of the adaptive linearization bias circuit provided by this utility model is as follows: the base-emitter junction of the first bipolar junction transistor HBT1 also participates in rectification when the power signal is high. Since the original conventional bias circuit only has the base-emitter junction of the second bipolar junction transistor HBT2 participating in rectification when the power signal is input, in order to compensate the current of the power amplifier HBT3, and compensate the reduction of Vbe (base-emitter voltage) of the power amplifier HBT3 when the power is high through the third resistor R3, if the second resistor R2 is increased to lower the static operating point, but the compensation current capability of the second bipolar junction transistor HBT2 remains unchanged, this will cause AM-AM to be boosted when the power signal is high, resulting in distortion. This invention introduces another first bipolar junction transistor (BJT) HBT1 for rectification, allowing the excess compensation current to be absorbed by this path. By connecting its collector between the first diode D1 and the second diode D2, feedback is formed, lowering the positive voltage of the second diode D2. This further reduces the base voltage of the second BJT2, effectively weakening its compensation effect. Through the adaptive linearization bias circuit 100 provided by this invention, the following can ultimately be achieved: Figure 5a The AM-AM line shown in the middle solid line and Figure 5b The dashed line indicates the efficiency improvement PAE (Power Added Efficiency). This means that while maintaining the original linearity essentially unchanged, the PAE is improved, which is beneficial for optimizing the linearity and efficiency of the power amplifier HBT3.

[0052] In summary, based on the structure of the traditional adaptive linearization bias circuit, this invention uses the first bipolar junction transistor HBT1 and the first resistor R1 in the rectifier circuit 110, and connects the collector of the first bipolar junction transistor HBT1 to the common junction point (i.e., voltage divider node N3) of the first diode D1 and the second diode D2 in the bias circuit 120 to provide feedback on the rectified current. This achieves the same technical effect as reducing the current by increasing the second resistor R2, without significantly worsening AM-AM distortion, thus balancing linearity compensation and efficiency optimization.

[0053] Another embodiment of this utility model provides a radio frequency module. For example, please continue to refer to... Figure 1 and Figure 3 ,from Figure 1As can be seen, the RF module includes a power amplifier circuit 200 and an adaptive linearization bias circuit 100 as described in any of the embodiments above. The power amplifier circuit 200 includes a power amplifier HBT3, and the RF input terminal of the power amplifier HBT3 is coupled to the output terminal of the adaptive linearization bias circuit 100. Since the RF module provided by this utility model and the adaptive linearization bias circuit 100 provided by this utility model belong to the same inventive concept, the RF module provided by this utility model has at least all the advantages of the adaptive linearization bias circuit 100 provided by this utility model. For details on the beneficial effects of the RF module provided by this utility model, please refer to the relevant description of the beneficial effects of the adaptive linearization bias circuit 100 provided by this utility model above, which will not be repeated here.

[0054] For example, please continue to see Figure 3 ,like Figure 3 The power amplifier circuit 200 further includes a third resistor R3, the first end of which is coupled to the first node N1, and the second end of which is coupled to the RF input terminal of the power amplifier HBT3. Therefore, by coupling the third resistor R3 between the first node N1 and the RF input terminal of the power amplifier HBT3, the stability and reliability of the RF module provided by this invention can be further improved.

[0055] Preferably, in some exemplary embodiments, the power amplifier HBT3 includes a third bipolar junction transistor (BJT). It is understood that the present invention does not limit the specific type of the third BJT. For example, in some exemplary embodiments, the third BJT can be, but is not limited to, a heterojunction bipolar transistor (HBT) and a bipolar junction transistor (BJT). As a preferred embodiment, the third BJT is a heterojunction bipolar transistor. Therefore, based on the advantages of heterojunction bipolar transistors such as high gain, high efficiency, good linearity, high power density, and low leakage current, the performance of the RF module provided by the present invention can be further improved.

[0056] In addition to the power amplifier, the RF module also includes other components such as the input matching network and the output matching network. These multiple components work together to complete the wireless transmission function. The specific structure will not be described in detail in this embodiment. For more detailed information about the RF module, please refer to the relevant technical adaptations known to those skilled in the art; due to space limitations, they will not be elaborated upon here.

[0057] Another embodiment of this utility model provides a chip. In some exemplary embodiments, the chip integrates the adaptive linearization bias circuit described in any of the above embodiments; in other exemplary embodiments, the chip integrates the radio frequency module provided in the above embodiments.

[0058] Another embodiment of this utility model provides an electronic device. In some embodiments, the electronic device includes the adaptive linearization bias circuit described in any of the above embodiments, or the radio frequency module described in any of the above embodiments, or the chip as described above.

[0059] Since the electronic device provided by this utility model belongs to the same inventive concept as the adaptive linearization bias circuit, RF module, or chip provided by this utility model, and the RF module and chip provided by this utility model belong to the same inventive concept as the adaptive linearization bias circuit provided by this utility model, the electronic device provided by this utility model has at least all the advantages of the adaptive linearization bias circuit provided by this utility model. For details on the beneficial effects of the electronic device provided by this utility model, please refer to the above description of the beneficial effects of the adaptive linearization bias circuit provided by this utility model, which will not be repeated here.

[0060] More specifically, the electronic device provided in this embodiment, in addition to at least a processor and a memory, may further include display components, communication components, sensor components, power supply components, multimedia components, and input / output interfaces, etc., as needed. The display components, memory, communication components, sensor components, power supply components, multimedia components, and input / output interfaces are all connected to the processor. The memory can be static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, etc. The processor can be a central processing unit (CPU), graphics processing unit (GPU), field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), digital signal processing (DSP) chip, etc. Other communication components, sensor components, power supply components, multimedia components, etc., can all be implemented using general-purpose components; due to space limitations, they will not be described in detail here. For more detailed information, please refer to the relevant technical adaptation understanding known to those skilled in the art.

[0061] It should be noted that the functional modules in the various embodiments of this article can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0062] Compared with existing technologies, the adaptive linearization bias circuit, RF module, chip, and electronic device provided by this invention have the following advantages: The adaptive linearization bias circuit provided by this invention includes a bias sub-circuit and a rectifier sub-circuit. The bias sub-circuit provides a stable static operating point for the power amplifier, ensuring that it operates in the linear region when amplifying signals and avoiding signal distortion or entering the nonlinear region. Furthermore, the rectifier sub-circuit provides a real-time feedback signal to the bias sub-circuit, thereby reducing the compensation current without affecting the linearity compensation function. Therefore, this invention can reduce the current of the power amplifier without worsening AM-AM distortion, thus optimizing efficiency without affecting the linearity compensation function.

[0063] The above description is merely a description of preferred embodiments of the adaptive linearization bias circuit, RF module, chip, and electronic device provided by this utility model, and is not intended to limit the scope of this utility model in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of this utility model. Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of this utility model and its equivalents, this utility model also intends to include these modifications and variations.

Claims

1. An adaptive linearization bias circuit for a power amplifier, characterized in that, The adaptive linearization bias circuit includes a bias sub-circuit and a rectifier sub-circuit; the output terminal of the bias sub-circuit, the control terminal of the rectifier sub-circuit, and the RF input terminal of the power amplifier are coupled to a first node, and the output terminal of the rectifier sub-circuit is coupled to a voltage divider node of the bias sub-circuit. The rectifier sub-circuit is configured to generate a feedback signal based on the compensation current of the power amplifier by the bias sub-circuit, so that the bias sub-circuit reduces the compensation current without affecting the linearity compensation function.

2. The adaptive linearization bias circuit according to claim 1, characterized in that, The rectifier circuit includes a first bipolar junction transistor and at least one first resistor. The base of the first bipolar junction transistor is coupled to the first node, its collector is coupled to the voltage divider node, and its emitter is coupled to ground. At least one first resistor is connected in series with the base, collector, or emitter of the first bipolar junction transistor.

3. The adaptive linearization bias circuit according to any one of claims 1 to 2, characterized in that, The bias sub-circuit includes a second resistor, a first diode, a second diode, and a second bipolar junction transistor (BJT). The first terminal of the second resistor receives a first voltage. The second terminal of the second resistor, the base of the second BJT, and the anode of the first diode are coupled to a second node. The common junction of the cathode of the first diode and the anode of the second diode forms the voltage divider node. The cathode of the second diode is coupled to ground. The collector of the second BJT receives a second voltage. The emitter of the second BJT is coupled to the first node.

4. The adaptive linearization bias circuit according to claim 3, characterized in that, The first diode and / or the second diode are transistors with their base and collector shorted together.

5. The adaptive linearization bias circuit according to claim 3, characterized in that, The bias subcircuit also includes a capacitor, with a first end of the capacitor coupled to the second node and a second end of the capacitor coupled to ground.

6. A radio frequency module, characterized in that, The radio frequency module includes a power amplifier circuit and an adaptive linearization bias circuit as described in any one of claims 1 to 5. The power amplifier circuit includes a power amplifier, and the radio frequency input terminal of the power amplifier is coupled to the output terminal of the adaptive linearization bias circuit.

7. The radio frequency module according to claim 6, characterized in that, The power amplifier circuit further includes a third resistor, the first end of which is coupled to the first node, and the second end of which is coupled to the radio frequency input terminal of the power amplifier.

8. The radio frequency module according to claim 6, characterized in that, The power amplifier includes a third bipolar junction transistor.

9. A chip, characterized in that, It integrates an adaptive linearization bias circuit as described in any one of claims 1 to 5, or an RF module as described in any one of claims 6 to 8.

10. An electronic device, characterized in that, Includes the adaptive linearization bias circuit as described in any one of claims 1 to 5, or the radio frequency module as described in any one of claims 6 to 8, or the chip as described in claim 9.

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