Voltage deviation detection circuit and voltage regulation system

Abstract

The application provides a voltage deviation detection circuit and a voltage regulation system. An offset power supply is coupled to a reference voltage module and a feedback voltage module to output a first voltage or a reference voltage at a first voltage output end and output a second voltage or a feedback voltage at a second voltage output end. The first voltage is obtained by superimposing an offset voltage on the reference voltage, and the second voltage is obtained by superimposing an offset voltage on the feedback voltage. By coupling the offset power supply to the reference voltage module and the feedback voltage module, the first voltage or the reference voltage is output at the first voltage output end, and the second voltage or the feedback voltage is output at the second voltage output end. The similar value of the feedback voltage generated by using a buffer structure is avoided, thereby avoiding the introduction of non-ideal factors, improving the quantization accuracy of the difference between the reference voltage and the feedback voltage, and further improving the accuracy of the output voltage.

Description

Technical Field

[0001] The embodiments disclosed in this application relate to the field of voltage regulation technology, and more specifically, to a voltage deviation detection circuit and a voltage regulation system. Background Technology

[0002] In traditional circuit structures, the accuracy of the output voltage can be improved by comparing the deviation between the feedback voltage and the reference voltage and adjusting the output voltage accordingly.

[0003] However, in traditional circuit structures, when comparing the feedback voltage with the reference voltage, a buffer structure such as a buffer is needed to obtain a similar value of the feedback voltage. This results in a mismatch or other non-ideal factors between the actual voltage value and the original feedback voltage, which in turn affects the accuracy of the output voltage.

[0004] Therefore, improving the accuracy of the output voltage has become an urgent problem to be solved. Utility Model Content

[0005] According to embodiments of this application, a voltage deviation detection circuit and a voltage regulation system are proposed to improve the accuracy of the output voltage.

[0006] According to one aspect of this application, a voltage deviation detection circuit is disclosed, including a reference voltage module, a feedback voltage module, an offset power supply, and a comparison module. The reference voltage module is configured to generate a reference voltage; the feedback voltage module is configured to generate a feedback voltage; the offset power supply is coupled to the reference voltage module and the feedback voltage module to output a first voltage or a reference voltage at a first voltage output terminal and a second voltage or a feedback voltage at a second voltage output terminal, wherein the first voltage is obtained by superimposing the offset voltage on the reference voltage, and the second voltage is obtained by superimposing the offset voltage on the feedback voltage; the comparison module is coupled to the first voltage output terminal and the second voltage output terminal to compare the first voltage with the feedback voltage to obtain a first comparison result, or to compare the reference voltage with the second voltage to obtain a second comparison result, wherein the first comparison result and the second comparison result are used to quantify the difference between the reference voltage and the feedback voltage.

[0007] According to a second aspect of this application, a voltage regulation system is disclosed, comprising the voltage deviation detection circuit, analog-to-digital converter (ADC), and digital-to-analog converter (DAC) described in the first aspect. The voltage deviation detection circuit generates a first comparison result and a second comparison result; the ADC is coupled to the voltage deviation detection circuit and quantizes the difference between a reference voltage and a feedback voltage based on the first and second comparison results; the DAC is coupled to the ADC and determines a voltage regulation value based on the difference.

[0008] In the above scheme, the offset power supply is coupled to the reference voltage module and the feedback voltage module to output a first voltage or reference voltage at the first voltage output terminal and a second voltage or feedback voltage at the second voltage output terminal. The first voltage is obtained by superimposing the offset voltage on the reference voltage, and the second voltage is obtained by superimposing the offset voltage on the feedback voltage. A comparison module is coupled to the first and second voltage output terminals to compare the first voltage with the feedback voltage to obtain a first comparison result, or to compare the reference voltage with the second voltage to obtain a second comparison result. The first and second comparison results are used to quantify the difference between the reference voltage and the feedback voltage. By coupling the offset power supply to the reference voltage module and the feedback voltage module, outputting the first voltage or reference voltage at the first voltage output terminal and the second voltage or feedback voltage at the second voltage output terminal, the use of buffer structures such as buffers to generate similar values ​​in the feedback voltage is avoided. This avoids introducing non-ideal factors, improves the quantization accuracy of the difference between the reference voltage and the feedback voltage, and consequently improves the accuracy of the output voltage. Attached Figure Description

[0009] The present application will be further described below with reference to the accompanying drawings and embodiments. In the drawings:

[0010] Figure 1 This is a schematic diagram of the circuit structure of some voltage deviation detection circuits in the prior art;

[0011] Figure 2 This is a schematic diagram of a circuit structure with a similar value to that used in the prior art to generate feedback voltage;

[0012] Figure 3 This is a schematic diagram of the voltage deviation detection circuit in one embodiment of this application;

[0013] Figure 4 This is a schematic diagram of the voltage regulation system in one embodiment of this application;

[0014] Figure 5 This is a schematic diagram of the voltage deviation detection circuit in another embodiment of this application;

[0015] Figure 6 This is a schematic diagram of the voltage deviation detection circuit in another embodiment of this application;

[0016] Figure 7 This is a schematic diagram of the voltage deviation detection circuit in another embodiment of this application;

[0017] Figure 8 This is a schematic diagram of the voltage deviation detection circuit in yet another embodiment of this application;

[0018] Figure 9This is a schematic diagram of the voltage deviation detection circuit in yet another embodiment of this application;

[0019] Figure 10 This is a schematic diagram of the voltage deviation detection circuit in yet another embodiment of this application;

[0020] Figure 11 This is a schematic diagram of the voltage deviation detection circuit in yet another embodiment of this application;

[0021] Figure 12 This is a schematic diagram of the voltage deviation detection circuit in yet another embodiment of this application;

[0022] Figure 13 This is a schematic diagram of the circuit structure of a voltage regulation system in one embodiment of this application. Detailed Implementation

[0023] To enable those skilled in the art to better understand the technical solutions of this application, the technical solutions of this application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0024] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the application. The singular forms “a,” “said,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms, unless otherwise clearly indicated above. “Multiple” generally includes at least two, but does not exclude the inclusion of at least one.

[0025] It should be understood that the term "and / or" used herein is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Furthermore, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship. The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0026] It should be understood that the terms "comprising," "including," or any other variations used herein are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The terms "coupled" or "connected" can refer to a direct connection or an indirect connection.

[0027] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in every place in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0028] In traditional circuit structures, the accuracy of the output voltage can be improved by comparing the deviation between the feedback voltage and the reference voltage and adjusting the output voltage accordingly.

[0029] However, the inventors of this application discovered through research that in traditional circuit structures, please refer to... Figure 1 When comparing the feedback voltage (VFB) with the reference voltage (VREF), a buffer structure is needed to obtain a similar value (VFB+V1 and VFB-V1) based on the feedback voltage. This results in a mismatch or other non-ideal factors between the actual obtained voltage value and the original feedback voltage, thus affecting the accuracy of the output voltage. Figure 1 In this circuit, the reference voltage VREF and the approximate values ​​of the feedback voltage VFB+V1 and VFB-V1 can be considered as being provided by a voltage source. The reference voltage is a constant voltage reference point in the circuit, independent of factors such as load and temperature drift, used to provide a reference voltage standard for measurement or conversion. The feedback voltage is the voltage generated by a feedback mechanism in an analog circuit; it refers to the voltage after the feedback signal is proportional to the output voltage (or the voltage at the sampling point), and is another form of output voltage representation. In practical applications, buffer structures such as buffers are used to indirectly obtain approximate values ​​of the feedback voltage (i.e., VFB+V1 and VFB-V1), which may be affected by non-ideal factors such as mismatch with the original feedback voltage. Here, V1 is a fixed voltage value; adding or subtracting V1 from the feedback voltage ensures that the average of VFB+V1 and VFB-V1 is equal to the feedback voltage.

[0030] existFigure 1 In the circuit, the reference voltage is divided by resistors R1 and R2, and then coupled to differential amplifier OPA1 at the voltage divider node between R1 and R2, amplifying the voltage at the voltage divider node. VFB+V1 and VFB-V1 are divided by resistors R3 and R4 respectively when switches S1 and S2 are closed, and then coupled to differential amplifier OPA1 at the voltage divider node between R3 and R4. Differential amplifier OPA1 is a differential input, differential output operational amplifier that amplifies both input voltages and outputs them at their respective outputs. Differential amplifier OPA1 is coupled to comparator CMP1, which compares the two outputs of differential amplifier OPA1 and generates a comparison result V_CMP (e.g., 0 or 1). Figure 1 In the circuit structure shown, after receiving the comparison result V_CMP, the external digital processing part (not shown) will generate a corresponding control signal to control switches S1 and S2. At the same time, only one of switches S1 and S2 is in the closed (conducting) state, and the other is in the open (disconnected) state, realizing the voltage transfer process of VFB-V1 and VFB+V1.

[0031] exist Figure 1 In the circuit structure shown, the deviation between the reference voltage and the feedback voltage can be determined by integrating the output comparison result V_COMP with the control signals of switches S1 and S2 processed by the external digital signal processing unit over a certain period. It is important to note that, generally, when the external digital signal processing unit performs quantization, a longer quantization period means a higher quantization bit depth, i.e., higher accuracy. Accuracy is inversely proportional to the value of V1 and directly proportional to the quantization period. V1 and the quantization period can be set appropriately according to the required accuracy of the circuit.

[0032] Please refer to Figure 2 Resistor R5 is coupled to the power supply (not labeled in the diagram), and resistors R6 and R7 are coupled sequentially, with their common terminal coupled to the inverting input of differential amplifier OPA-2. Differential amplifiers OPA-2 through OPA4 are operational amplifiers with differential input and single-ended output. Figure 2 The circuit shown is used as a buffer to achieve impedance matching and isolation in high-precision signal transmission. One of its significant non-ideal characteristics is the non-ideal mismatch error between the input terminals. Therefore, Figure 2 The circuit shown uses differential amplifiers OPA-2 to OPA4, which introduces non-ideal mismatch errors when generating VFB+V1 and VFB-V1.

[0033] exist Figure 1 and Figure 2In the traditional circuit structure shown, because VFB+V1 and VFB-V1 are indirectly obtained through a buffer structure during generation, the actual voltage values ​​are affected by non-ideal factors such as mismatch between the actual voltage values ​​and the original feedback voltage values. Furthermore, as shown... Figure 2 As shown, when generating VFB+V1 and VFB-V1, these two voltage values ​​are generated by differential amplifiers OPA-3 and OPA-4 respectively. This means that in addition to the influence of non-ideal factors such as mismatch in generating VFB+V1 and VFB-V1, there are also non-ideal factors affecting the actual increase and decrease of V1, resulting in discrepancies between their actual increases and decreases. In summary, due to the existence of non-ideal factors, the average value of the actual obtained VFB+V1 and VFB-V1 voltages is not the feedback voltage. The mean error will exist as a fixed error in the circuit structure, thus affecting the deviation quantization results of the subsequent digital processing unit.

[0034] Therefore, in order to improve the accuracy of the output voltage, please refer to... Figure 3 This application provides a voltage deviation detection circuit 100, including a reference voltage module 110, a feedback voltage module 120, an offset power supply 130, and a comparison module. The reference voltage module 110 is configured to generate a reference voltage; the feedback voltage module 120 is configured to generate a feedback voltage; the offset power supply 130 is coupled to the reference voltage module 110 and the feedback voltage module 120 to output a first voltage or a reference voltage at a second voltage output terminal O1, and a second voltage or a feedback voltage at a second voltage output terminal O2, wherein the first voltage is obtained by superimposing the offset voltage on the reference voltage, and the second voltage is obtained by superimposing the offset voltage on the feedback voltage; the comparison module is coupled to the second voltage output terminal O1 and the second voltage output terminal O2 to compare the first voltage with the feedback voltage to obtain a first comparison result, or to compare the reference voltage with the second voltage to obtain a second comparison result, wherein the first comparison result and the second comparison result are used to quantify the difference between the reference voltage and the feedback voltage.

[0035] The offset power supply 130 is coupled to the reference voltage module 110 and the feedback voltage module 120 to output a first voltage or the reference voltage at the second voltage output terminal O1, and a second voltage or the feedback voltage at the second voltage output terminal O2. The first voltage is obtained by superimposing the offset voltage on the reference voltage, and the second voltage is obtained by superimposing the offset voltage on the feedback voltage. It should be understood that when the offset power supply 130 outputs the first voltage at the second voltage output terminal O1, the second voltage output terminal O2 outputs the feedback voltage; when the offset power supply 130 outputs the reference voltage at the second voltage output terminal O1, the second voltage output terminal O2 outputs the second voltage. The second voltage output terminal O1 and the second voltage output terminal O2 can be coupled to the two output terminals of the offset power supply 130, respectively. The offset power supply 130 can control the output state of these two output terminals via a microcontroller. Alternatively, the output state of the second voltage output terminal O1 and the second voltage output terminal O2 can be controlled by a switch; an embodiment using switch control will be described later.

[0036] Please continue to refer to Figure 3 When the offset power supply 130 outputs a first voltage at the second voltage output terminal O1 (assuming the first voltage is VREF+V2, where VREF is the reference voltage and V2 is the offset voltage), the second voltage output terminal O2 outputs a feedback voltage (VFB). At this time, the first voltage is greater than the feedback voltage, and the comparison module generates a first comparison result (e.g., a high level). When the offset power supply 130 outputs a reference voltage at the second voltage output terminal O1, the second voltage output terminal O2 outputs a second voltage (at this time, the second voltage is equal to the feedback voltage plus the offset voltage, i.e., VFB+V2). At this time, the reference voltage is less than the second voltage, and the comparison module generates a second comparison result (e.g., a low level). From the above process, it can be seen that by applying an offset voltage to the second voltage output terminal O1 and the second voltage output terminal O2 respectively, the comparison module can also generate a first comparison result and a second comparison result, thus achieving the effect of adding or subtracting V1 from the feedback voltage module 120 in the traditional solution.

[0037] In the above scheme, the offset power supply 130 is coupled to the reference voltage module 110 and the feedback voltage module 120 to output a first voltage or reference voltage at the second voltage output terminal O1 and a second voltage or feedback voltage at the second voltage output terminal O2. The first voltage is obtained by superimposing the offset voltage on the reference voltage, and the second voltage is obtained by superimposing the offset voltage on the feedback voltage. The comparison module is coupled to the second voltage output terminals O1 and O2 to compare the first voltage with the feedback voltage to obtain a first comparison result, or to compare the reference voltage with the second voltage to obtain a second comparison result. The first and second comparison results are used to quantify the difference between the reference voltage and the feedback voltage. By coupling the offset power supply 130 to the reference voltage module 110 and the feedback voltage module 120, outputting the first voltage or reference voltage at the second voltage output terminal O1 and the second voltage or feedback voltage at the second voltage output terminal O2, the use of buffer structures such as buffers to generate similar values ​​of the feedback voltage is avoided. This avoids introducing non-ideal factors, improves the quantization accuracy of the difference between the reference voltage and the feedback voltage, and consequently improves the accuracy of the output voltage.

[0038] In addition, please continue to refer to Figure 3 In the voltage deviation detection circuit 100 provided in this application, the offset voltage applied to the reference voltage and the feedback voltage comes from the same offset power supply 130. Compared with the V1 (equivalent to offset voltage) generated by different differential amplifiers in the prior art, it is beneficial to avoid the non-ideal factors caused by offset voltages generated by different power supplies, and to improve the quantization accuracy of the difference between the reference voltage and the feedback voltage, thereby further improving the accuracy of the output voltage.

[0039] Please refer to Figure 4A voltage regulation system 400 provided in one embodiment of this application may include a voltage deviation detection circuit 100, an analog-to-digital converter circuit 420, and a digital-to-analog converter circuit 430. The voltage deviation detection circuit 100 may be the voltage deviation detection circuit 100 described above, or the voltage deviation detection circuit 100 described in any subsequent embodiment, and is used to generate a first comparison result and a second comparison result. The analog-to-digital converter circuit 420 is coupled to the voltage deviation detection circuit 100 and quantifies the difference between the reference voltage and the feedback voltage based on the first comparison result and the second comparison result. The digital-to-analog converter circuit 430 is coupled to the analog-to-digital converter circuit 420 and determines the voltage regulation value based on the difference. The first comparison result and the second comparison result generated by the voltage deviation detection circuit 100 are digital signals. For example, the first comparison result is a high voltage signal (e.g., 3.3V) and the second comparison result is a low voltage signal (e.g., 0V). The voltage deviation detection circuit 100 can output a voltage signal sequence composed of several first comparison results and second comparison results. The proportion of high voltage signal in the voltage signal sequence (i.e., duty cycle) is related to the difference between the reference voltage and the feedback voltage. That is, when the reference voltage and the feedback voltage are equal, the duty cycle of the voltage signal sequence is 50%. The greater the difference between the reference voltage and the feedback voltage, the higher the duty cycle of the voltage signal sequence. In other words, the higher the proportion of high voltage signal in the voltage signal sequence output by the voltage deviation detection circuit 100.

[0040] The analog-to-digital conversion circuit 420 may include an SD analog-to-digital converter (Sigma-Delta Analog to Digital Converter), which can read the duty cycle of the voltage signal sequence composed of the first comparison result and the second comparison result output by the voltage deviation detection circuit 100 to obtain the corresponding binary code.

[0041] The digital-to-analog converter circuit 430 may include a digital-to-analog converter, which can generate a quantized reference voltage and the feedback voltage based on the binary code output by the analog-to-digital converter circuit 420, and then adjust the feedback voltage based on the quantized difference so that the feedback voltage approaches the reference voltage.

[0042] In some embodiments, the offset power supply 130 in the voltage deviation detection circuit 100 provided in this application is configured to output a constant current. Please refer to... Figure 5The reference voltage module 110 is grounded through resistors R51 and R52 and connected to the comparator module through resistor R51. The feedback voltage module 120 is grounded through resistors R53 and R54 and connected to the comparator module through resistor R53. When the offset power supply 130 outputs a constant current, and the resistance values ​​of resistors R51 to R54 are constant, the offset voltage applied to resistors R51 to R54 by the offset power supply 130 is also constant. Therefore, by configuring the offset power supply 130 to output a constant current, it is beneficial to keep the offset voltage superimposed on the reference voltage and the offset voltage superimposed on the feedback voltage equal, thereby helping to avoid errors in the subsequent quantization of the difference between the reference voltage and the feedback voltage due to the inequality of the offset voltage superimposed on the reference voltage and the offset voltage superimposed on the feedback voltage.

[0043] In the above embodiments, the reference voltage module 110 is configured to generate a reference voltage; the feedback voltage module 120 is configured to generate a feedback voltage. It should be understood that the reference voltage module 110 can directly generate a reference voltage at its output terminal so that the second voltage output terminal O1 outputs a reference voltage (e.g., ...). Figure 5 As shown), a reference voltage can also be generated through external resistors (such as resistors R51 and R52). Figure 6 (As shown); Similarly, the feedback voltage module 120 can directly generate a feedback voltage at its output terminal to make the second voltage output terminal O2 output a feedback voltage (as shown). Figure 6 As shown), feedback voltage can also be generated through external resistors (such as resistors R53 and R54). Figure 5 (As shown). In other embodiments, the second voltage output terminal O1 can also be coupled to the right side of resistors R51 and R52, and the second voltage output terminal O2 can also be coupled to the right side of resistors R53 and R54. This application does not limit this.

[0044] In some embodiments, please refer to Figure 7 The voltage deviation detection circuit 100 further includes a first reference voltage divider unit 710, a reference voltage divider terminal T7, and a second reference voltage divider unit 720; wherein, the first terminal of the first reference voltage divider unit 710 is coupled to the reference voltage module 110, the second terminal of the first reference voltage divider unit 710 is coupled to the first terminal of the second reference voltage divider unit 720 through the reference voltage divider terminal T7, and the second terminal of the second reference voltage divider unit 720 is coupled to the second voltage output terminal O1; the reference voltage divider terminal T7 is also coupled to the offset power supply 130. Figure 7 In the illustrated embodiment, the first reference voltage divider unit 710 includes a resistor R71, and the second reference voltage divider unit includes a resistor R72.

[0045] Compared to Figure 6 as well asFigure 5 The embodiment shown, Figure 7 The illustrated embodiment splits resistor R51 into resistors R71 and R72, and the sum of the resistance values ​​of resistors R71 and R72 is equal to the resistance value of resistor R51. By adjusting the resistance values ​​of resistors R71 and R72, the magnitude of the offset voltage superimposed on the reference voltage through the offset power supply 130 can be adjusted. For example, in some embodiments, resistor R71 can be configured to have a smaller resistance while resistor R72 has a larger resistance, so that the constant current provided by the offset power supply 130 flows through resistor R71 when shunt at the reference voltage divider terminal T7, thereby keeping the quantization range within a reasonable range. The specific resistance values ​​of resistors R71 and R72 can be selected according to the actual quantization range requirements, and this application does not impose any limitations.

[0046] In some embodiments, please refer to Figure 8 The voltage deviation detection circuit 100 further includes a first reference voltage divider unit 810, a reference voltage divider terminal T8, and a second reference voltage divider unit 820; wherein, the first terminal of the first reference voltage divider unit 810 is coupled to the second voltage output terminal O1, the second terminal of the first reference voltage divider unit 810 is coupled to the first terminal of the second reference voltage divider unit 820 through the reference voltage divider terminal T8, and the second terminal of the second reference voltage divider unit 820 is coupled to ground; the reference voltage divider terminal T8 is also coupled to the offset power supply 130. Figure 8 In the embodiment shown, the first reference voltage divider unit 810 includes a resistor R81, and the second reference voltage divider unit includes a resistor R82.

[0047] Compared to Figure 6 as well as Figure 5 The embodiment shown, Figure 8 The illustrated embodiment splits resistor R52 into resistors R81 and R82, and the sum of the resistance values ​​of resistors R81 and R82 is equal to the resistance value of resistor R52. By adjusting the resistance values ​​of resistors R81 and R82, the magnitude of the offset voltage superimposed on the reference voltage through the offset power supply 130 can be adjusted. For example, in some embodiments, resistor R81 can be configured to have a smaller resistance while resistor R82 has a larger resistance, so that the constant current provided by the offset power supply 130 flows through resistor R81 more when shunt at the reference voltage divider terminal T8, thereby keeping the quantization range within a reasonable range. The specific resistance values ​​of resistors R81 and R82 can be selected according to the actual quantization range requirements, and this application does not impose any limitations.

[0048] In some embodiments, please refer to Figure 9The voltage deviation detection circuit 100 further includes a first feedback voltage divider unit 910, a feedback voltage divider terminal T9, and a second feedback voltage divider unit 920; wherein, the first terminal of the first feedback voltage divider unit 910 is coupled to the feedback voltage module 120, the second terminal of the first feedback voltage divider unit 910 is coupled to the first terminal of the second feedback voltage divider unit 920 through the feedback voltage divider terminal T9, and the second terminal of the second feedback voltage divider unit 920 is coupled to the second voltage output terminal O2; the feedback voltage divider terminal T9 is also coupled to the offset power supply 130. Figure 9 In the embodiment shown, the first feedback voltage divider unit 910 includes a resistor R91, and the second feedback voltage divider unit includes a resistor R92.

[0049] Compared to Figure 6 as well as Figure 5 The embodiment shown, Figure 9 The illustrated embodiment splits resistor R53 into resistors R91 and R92, and the sum of the resistance values ​​of resistors R91 and R92 is equal to the resistance value of resistor R53. By adjusting the resistance values ​​of resistors R91 and R92, the magnitude of the offset voltage superimposed on the feedback voltage through the offset power supply 130 can be adjusted. For example, in some embodiments, resistor R91 can be configured to have a smaller resistance while resistor R92 has a larger resistance, so that the constant current provided by the offset power supply 130 flows through resistor R91 more when shunted at the feedback voltage divider terminal T9, thereby keeping the quantization range within a reasonable range. The specific resistance values ​​of resistors R91 and R92 can be selected according to the actual quantization range requirements, and this application does not impose any limitations.

[0050] In some embodiments, please refer to Figure 10 The voltage deviation detection circuit 100 further includes a first feedback voltage divider unit 1010, a feedback voltage divider terminal T10, and a second feedback voltage divider unit 1020; wherein, the first terminal of the first feedback voltage divider unit 1010 is coupled to the second voltage output terminal O2, the second terminal of the first feedback voltage divider unit 1010 is coupled to the first terminal of the second feedback voltage divider unit 1020 through the feedback voltage divider terminal T10, and the second terminal of the second feedback voltage divider unit 1020 is coupled to ground; the feedback voltage divider terminal T10 is also coupled to the offset power supply 130. Figure 10 In the embodiment shown, the first feedback voltage divider unit 1010 includes a resistor R101, and the second feedback voltage divider unit includes a resistor R102.

[0051] Compared to Figure 6 as well as Figure 5 The embodiment shown, Figure 10The illustrated embodiment splits resistor R54 into resistors R101 and R102, and the sum of the resistance values ​​of resistors R101 and R102 is equal to the resistance value of resistor R54. By adjusting the resistance values ​​of resistors R101 and R102, the magnitude of the offset voltage superimposed on the feedback voltage through the offset power supply 130 can be adjusted. For example, in some embodiments, resistor R101 can be configured to have a smaller resistance while resistor R102 has a larger resistance, so that the constant current provided by the offset power supply 130 flows through resistor R101 more when it is shunt at the feedback voltage divider terminal T10, thereby keeping the quantization range within a reasonable range. The specific resistance values ​​of resistors R101 and R102 can be selected according to the actual quantization range requirements, and this application does not impose any limitations.

[0052] In some embodiments, please refer to Figure 11 The voltage deviation detection circuit 100 further includes a switch selection module 1110, coupled between the offset power supply 130 and the second voltage output terminal O1, and between the offset power supply 130 and the second voltage output terminal O2, so that the second voltage output terminal O1 selectively outputs the first voltage or the reference voltage, and the second voltage output terminal O2 selectively outputs the second voltage or the feedback voltage.

[0053] In this embodiment, the switch selection module 1110 selectively controls the switching state of the conductive path between the offset power supply 130 and the second voltage output terminal O1 and the switching state of the conductive path between the offset power supply 130 and the second voltage output terminal O2, thereby selectively superimposing the offset voltage onto the reference voltage or the feedback voltage.

[0054] In some embodiments, the switch selection module 1110 includes a first switch unit 1111 and a second switch unit 1112. The first switch unit 1111 is coupled between the offset power supply 130 and the second voltage output terminal O1, so that the second voltage output terminal O1 selectively outputs the first voltage or the reference voltage; the second switch unit 1112 is coupled between the offset power supply 130 and the second voltage output terminal O2, so that the second voltage output terminal O2 selectively outputs the second voltage or the feedback voltage.

[0055] The first switching unit 1111 and the second switching unit 1112 may include controllable semiconductor switching devices, such as MOSFETs, BJTs, etc., and this application does not limit them.

[0056] In some embodiments, please refer to Figure 12The voltage deviation detection circuit 100 further includes an amplification module 1210, which has a first input terminal 1210a, a second input terminal 1210b, a first output terminal 1210c, and a second output terminal 1210d; the first input terminal 1210a is coupled to the second voltage output terminal O1, the second input terminal 1210b is coupled to the second voltage output terminal O2, and the first output terminal 1210c and the second output terminal 1210d are coupled to the comparison module.

[0057] The amplification module 1210 can be a differential input and output operational amplifier module. Its first input terminal 1210a and second input terminal 1210b receive a pair of voltage signals with opposite phases (180° out of phase) (e.g., the voltages output by the second voltage output terminal O1 and the second voltage output terminal O2). Its first output terminal 1210c and second output terminal 1210d provide a pair of complementary signals. Signal processing is achieved by amplifying the voltage difference between the first input terminal 1210a and the second input terminal 1210b and suppressing common-mode interference.

[0058] The following is for reference. Figure 13 The working principle of a voltage regulation system 400 provided in one embodiment of this application will be described by way of example. It should be noted that, in Figure 13 In the accompanying drawings, for the purpose of simplifying the figures, the reference voltage module 110 and the feedback voltage module 120 are shown as voltage sources, while the first switching unit 1111 and the second switching unit 1112 are shown using ordinary switch symbols.

[0059] like Figure 13 As shown, the reference voltage module 110 is coupled to the second voltage output terminal O1 through resistors R71 and R72. The positive input terminal of the amplification module 1210 is coupled to the second voltage output terminal O1, and the second voltage output terminal O1 is grounded through resistor R52. The feedback voltage module 120 is coupled to the second voltage output terminal O2 through resistor R53. The inverting input terminal of the amplification module 1210 is coupled to the second voltage output terminal O1, and the second voltage output terminal O1 is grounded through resistors R101 and R102. The offset power supply 130 is coupled to the common terminal of resistors R71 and R72 and the common terminal of resistors R101 and R102 through the first switching unit 1111 and the second switching unit 1112, respectively. The shunting effect of resistors R71 and R72 keeps the offset voltage superimposed on the reference voltage within a reasonable range, and the shunting effect of resistors R101 and R102 keeps the offset voltage superimposed on the feedback voltage within a reasonable range. The output of amplifier module 1210 is coupled to the input of comparator module to generate a first comparison result and a second comparison result in comparator module. Capacitors C13a and C13b, together with resistors, constitute the passive component part of integrator.

[0060] When the first switching unit 1111 is turned on and the second switching unit 1112 is turned off, the current output by the offset power supply 130 flows through resistors R71, R72, and R52, thereby superimposing the offset voltage on the original reference voltage. Therefore, the voltage connected to the non-inverting input terminal of the amplification module 1210 is equivalent to the sum of the reference voltage and the offset voltage (i.e., VREF+V2), while the voltage connected to the inverting input terminal of the amplification module 1210 is still the feedback voltage (i.e., VFB). At this time, VREF+V2 is greater than VFB, and thus the first comparison result (e.g., high level) is obtained at the output terminal of the comparator.

[0061] When the first switching unit 1111 is turned off and the second switching unit 1112 is turned on, the offset power supply 130 causes the offset voltage to be superimposed on the original feedback voltage. Therefore, the voltage connected to the inverting input terminal of the amplifier module 1210 is equivalent to the sum of the feedback voltage and the offset voltage (i.e., VFB+V2), while the voltage connected to the non-inverting input terminal of the amplifier module 1210 is the reference voltage (i.e., VREF). At this time, VREF is less than VFB+V2, and thus a second comparison result (e.g., low level) is obtained at the output terminal of the comparator.

[0062] The above scheme, through the first comparison result and the second comparison result output by the comparison module, is processed by an external digital signal processing unit (e.g., Figure 4 After processing by the analog-to-digital converter circuit 420 and the digital-to-analog converter circuit 430, the first switching unit 1111 and the second switching unit 1112 are controlled, thereby controlling the loading position of the offset power supply 130. This allows the voltage difference between the feedback voltage and the reference voltage to be obtained through integration over a certain period. The accuracy of this difference is inversely proportional to the magnitude of the offset power supply 130 and directly proportional to the quantization period. This avoids the use of buffer structures to generate similar feedback voltage values, thus preventing the introduction of non-ideal factors. It also helps avoid non-ideal factors caused by offset voltages from different power supplies, improving the quantization accuracy of the difference between the reference voltage and the feedback voltage, and further improving the accuracy of the output voltage.

[0063] Those skilled in the art will readily recognize that numerous modifications and variations can be made to the apparatus and method while maintaining the teachings of this application. Therefore, the above disclosure should be considered limited only by the scope of the appended claims.

Claims

1. A voltage deviation detection circuit, characterized in that, include: The reference voltage module is configured to generate a reference voltage. The feedback voltage module is configured to generate a feedback voltage; An offset power supply is coupled to the reference voltage module and the feedback voltage module to output a first voltage or the reference voltage at a first voltage output terminal and a second voltage or the feedback voltage at a second voltage output terminal, wherein the first voltage is obtained by superimposing the offset voltage on the reference voltage and the second voltage is obtained by superimposing the offset voltage on the feedback voltage; A comparison module is coupled to the first voltage output terminal and the second voltage output terminal to compare the first voltage with the feedback voltage to obtain a first comparison result, or to compare the reference voltage with the second voltage to obtain a second comparison result. The first comparison result and the second comparison result are used to quantify the difference between the reference voltage and the feedback voltage.

2. The voltage deviation detection circuit according to claim 1, characterized in that, The offset power supply is configured to output a constant current.

3. The voltage deviation detection circuit according to claim 1, characterized in that, It also includes a first reference voltage divider unit, a reference voltage divider terminal, and a second reference voltage divider unit; The first end of the first reference voltage divider unit is coupled to the reference voltage module, the second end of the first reference voltage divider unit is coupled to the first end of the second reference voltage divider unit through the reference voltage divider terminal, and the second end of the second reference voltage divider unit is coupled to the first voltage output terminal; the reference voltage divider terminal is also coupled to the offset power supply.

4. The voltage deviation detection circuit according to claim 1, characterized in that, It also includes a first reference voltage divider unit, a reference voltage divider terminal, and a second reference voltage divider unit; Wherein, the first end of the first reference voltage divider unit is coupled to the first voltage output terminal, the second end of the first reference voltage divider unit is coupled to the first end of the second reference voltage divider unit through the reference voltage divider terminal, and the second end of the second reference voltage divider unit is coupled to ground; the reference voltage divider terminal is also coupled to the offset power supply.

5. The voltage deviation detection circuit according to claim 1, characterized in that, Also includes: The first feedback voltage divider unit, the feedback voltage divider terminal, and the second feedback voltage divider unit; The first terminal of the first feedback voltage divider unit is coupled to the second voltage output terminal, the second terminal of the first feedback voltage divider unit is coupled to the first terminal of the second feedback voltage divider unit through the feedback voltage divider terminal, and the second terminal of the second feedback voltage divider unit is coupled to ground; the feedback voltage divider terminal is also coupled to the offset power supply.

6. The voltage deviation detection circuit according to claim 1, characterized in that, Also includes: The first feedback voltage divider unit, the feedback voltage divider terminal, and the second feedback voltage divider unit; The first end of the first feedback voltage divider unit is coupled to the feedback voltage module, the second end of the first feedback voltage divider unit is coupled to the first end of the second feedback voltage divider unit through the feedback voltage divider terminal, and the second end of the second feedback voltage divider unit is coupled to the second voltage output terminal; the feedback voltage divider terminal is also coupled to the offset power supply.

7. The voltage deviation detection circuit according to claim 1, characterized in that, Also includes: A switch selection module is coupled between the offset power supply and the first voltage output terminal, and between the offset power supply and the second voltage output terminal, so that the first voltage output terminal selectively outputs the first voltage or the reference voltage, and the second voltage output terminal selectively outputs the second voltage or the feedback voltage.

8. The voltage deviation detection circuit according to claim 7, characterized in that, The switch selection module includes: A first switching unit is coupled between the offset power supply and the first voltage output terminal, so that the first voltage output terminal selectively outputs the first voltage or the reference voltage; The second switching unit is coupled between the offset power supply and the second voltage output terminal, so that the second voltage output terminal selectively outputs the second voltage or the feedback voltage.

9. The voltage deviation detection circuit according to claim 1, characterized in that, Also includes: The amplification module has a first input terminal, a second input terminal, a first output terminal, and a second output terminal; The first input terminal is coupled to the first voltage output terminal, the second input terminal is coupled to the second voltage output terminal, and the first output terminal and the second output terminal are coupled to the comparison module.

10. A voltage regulation system, characterized in that, include: The voltage deviation detection circuit according to any one of claims 1-9 is used to generate a first comparison result and a second comparison result; An analog-to-digital conversion circuit is coupled to the voltage deviation detection circuit to quantify the difference between the reference voltage and the feedback voltage based on the first comparison result and the second comparison result. A digital-to-analog converter circuit is coupled to the analog-to-digital converter circuit to determine the voltage regulation value based on the difference.

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