Integrated-aperture metasurface chip

Abstract

The application provides an integrated aperture super surface chip, comprising: a substrate, the substrate having a first surface; an aperture layer formed on the first surface; a planarization protection layer conformally covering the aperture layer; a super surface structure formed on the planarization protection layer; thus, the single surface photolithography etching technology mature in the semiconductor field can be used for patterning preparation, the extremely high alignment accuracy of submicron level between the aperture layer and the super surface structure can be realized, the errors caused by the traditional discrete component mounting and the double surface photolithography alignment are completely avoided, the difficulty of the rear-end optical system adjustment is simplified, the consistency and stability of the system are improved, and the cost is greatly reduced.

Description

Technical Field

[0001] This application relates to the field of micro-nano optical technology, and in particular to a metasurface chip with an integrated aperture. Background Technology

[0002] A metasurface lens is a two-dimensional planar optical device composed of an array of subwavelength nanostructures. Through this array of nanostructures, precise control of the wavefront (phase, amplitude, and polarization) of light is achieved, enabling functions such as focusing, imaging, and beam deflection typical of traditional optical components. Metasurface lenses offer advantages such as small size, thinness, and high design freedom, and in particular, they can be mass-produced using semiconductor manufacturing processes to reduce costs.

[0003] An aperture is a key component in an optical system, used to limit the size, shape, or direction of a light beam, thereby restricting stray light and improving image sharpness. The size of the aperture is generally matched to the size of the lens. Integrating discrete metasurface lenses and apertures onto the same chip can not only save a mounting step but also significantly improve alignment accuracy. Existing technologies mention fabricating apertures on the back side of the metasurface chip. This method requires double-sided photolithography to align the metasurface lens on the front side of the chip with the aperture on the back. Current semiconductor manufacturing plants generally lack double-sided alignment photolithography equipment, and even then, the accuracy is limited to the micrometer level. This restricts the integration of metasurface lenses and apertures, increasing the overall complexity and manufacturing cost of the optical system. Utility Model Content

[0004] The purpose of this application is to provide a metasurface chip with an integrated aperture.

[0005] To achieve the above-mentioned objectives, this application adopts the following technical solution: a metasurface chip with an integrated aperture, comprising: A substrate having a first surface; An aperture layer formed on the first surface; A planarization protective layer conformally covers the aperture layer; Metasurface structures formed on the planarization protective layer.

[0006] As a further improvement of this application, the relative positional deviation between the geometric center of the aperture layer and the geometric center of the metasurface structure is less than 1 μm.

[0007] As a further improvement of this application, the planarization protective layer conformally covers the surface of the aperture layer away from the substrate, the sidewall of the opening in the aperture layer, and the surface of the first surface not covered by the aperture layer.

[0008] As a further improvement of the present application, the opening in the aperture layer is an aperture hole that extends through the substrate; the inner wall surface of the aperture hole constitutes the side wall surface of the opening.

[0009] As a further improvement of the technical solution of this application, the substrate has a second surface opposite to the first surface; the metasurface chip also includes a protective layer for protecting the metasurface structure and an optical functional film layer formed on the protective layer and / or the second surface.

[0010] As a further improvement to the technical solution of this application, the substrate is a glass wafer and the planarization protective layer is a silicon dioxide layer.

[0011] To achieve the above objectives, this application also provides a metasurface chip with an integrated aperture, comprising: A substrate having a first surface; A metasurface structure formed on the first surface; A planarization protective layer conformally covers the metasurface structure; An aperture layer formed in the planarization protective layer.

[0012] As a further improvement of this application, the relative positional deviation between the geometric center of the aperture layer and the geometric center of the metasurface structure is less than 1 μm.

[0013] As a further improvement to this application, the refractive index of the metasurface structure is greater than the refractive index of the planarization protective layer.

[0014] As a further improvement of the technical solution of this application, the substrate has a second surface opposite to the first surface; the metasurface chip also includes a protective layer for protecting the aperture layer, and an optical functional film layer formed on the protective layer and / or the second surface.

[0015] The beneficial effects of this application are as follows: The metasurface chip in this application, by fabricating both the aperture layer and the metasurface structure on the same side of the substrate, can be patterned using mature single-sided photolithography overlay technology in the semiconductor field. This can achieve extremely high alignment accuracy at the sub-micron level between the aperture layer and the metasurface structure, completely avoiding the errors caused by traditional discrete component mounting and double-sided photolithography alignment, simplifying the assembly and adjustment of the back-end optical system, improving the consistency and stability of the system, and greatly reducing costs. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of the metasurface chip in the first embodiment of this application; Figure 2 This is a schematic diagram of the metasurface chip in the second embodiment of this application; Figure 3 This is a schematic diagram of the metasurface chip in the third embodiment of this application; Figure 4 This is a schematic diagram of the metasurface chip in the fourth embodiment of this application; Figure 5 This is a schematic diagram of the metasurface chip in the fifth embodiment of this application; Figure 6 This is a schematic diagram of the metasurface chip in the sixth embodiment of this application. Detailed Implementation

[0017] The present application will now be described in detail with reference to the embodiments shown in the accompanying drawings. Please refer to the following description. Figures 1 to 6 The embodiments shown are preferred embodiments of this application. However, it should be noted that these embodiments are not intended to limit this application, and any functional or structural equivalent changes or substitutions made by those skilled in the art based on these embodiments are within the protection scope of this application.

[0018] It should be understood that in the description of this application, the terms "upper," "lower," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, terms such as "comprising" as used in this application do not exclude the presence or addition of one or more other components or combinations thereof.

[0019] Combination Figure 1 As shown, this application provides a metasurface chip 10 with an integrated aperture. The metasurface chip 10 in this application is a metasurface lens applied to an optical lens. Of course, it is not limited to this, and the metasurface chip 10 can also be other optical devices such as beam shapers and beam splitters.

[0020] The metasurface chip 10 includes a substrate 1, an aperture layer 2 formed on the same side of the substrate 1, a metasurface structure 3, and a planarization protective layer 4 disposed between the aperture layer 2 and the metasurface structure 3. The metasurface chip 10 in this application, by fabricating both the aperture layer 2 and the metasurface structure 3 on the same side of the substrate 1, can utilize mature single-sided photolithography overlay technology in the semiconductor field for patterned fabrication. This achieves extremely high sub-micron level alignment accuracy between the aperture layer 2 and the metasurface structure 3, completely avoiding the errors caused by traditional discrete component mounting and double-sided photolithography alignment. It simplifies the assembly and adjustment of the back-end optical system, improves system consistency and stability, and significantly reduces costs.

[0021] Combination Figure 1The image shows a metasurface chip 10 with an integrated aperture according to a first embodiment of this application. In this embodiment, the metasurface chip 10 includes a substrate 1, an aperture layer 2 formed on a first surface of the substrate 1, a planarization protective layer 4 conformally covering the aperture layer 2, and a metasurface structure 3 formed on the planarization protective layer 4. In this embodiment, by first fabricating the aperture layer 2, then covering it with the planarization protective layer 4, and finally fabricating the metasurface structure 3, complex processes such as secondary photolithography and coating are avoided on the fragile, three-dimensional nanostructured metasurface structure 3. This protects the metasurface structure 3 and significantly improves the yield and reliability of the corresponding metasurface chip 10.

[0022] It is understood that the first surface can be either the upper surface or the lower surface of the substrate 1, and there is no particular limitation.

[0023] Specifically, the substrate 1 is a transparent substrate. In one specific embodiment, the substrate 1 is a glass wafer, thereby enabling the metasurface chip 10 to operate transmissively. Of course, this is not a limitation; in other embodiments, depending on specific needs, the substrate 1 can also be set as an opaque substrate 1, such as a silicon wafer, thereby enabling the metasurface chip 10 to operate reflectively.

[0024] The aperture material of the aperture layer 2 can be a single or multiple layer of materials such as metal, oxide, nitride, oxynitride, diamond-like carbon, etc., to meet the requirements of low reflectivity and low transmittance for different wavelengths.

[0025] In one specific embodiment, the aperture layer 2 is fabricated using general semiconductor equipment, i.e., using semiconductor processes. Specifically, the steps for fabricating the aperture layer 2 are as follows: Coating: An aperture material is coated on the first surface of the substrate 1 to form an aperture material layer; Coating: A photosensitive photoresist layer is uniformly coated on the surface of the aperture material layer; Exposure: Using light to selectively irradiate the photoresist layer through a mask with a designed aperture pattern, thereby changing the chemical properties of the irradiated area; Development: Dissolves the soluble portion of the photoresist, thereby accurately replicating the pattern on the photomask onto the photoresist layer to form a photoresist mask; Etching: Using wet etching or dry etching, the pattern on the photoresist layer is transferred to the underlying aperture material layer; Photoresist removal: Remove the photoresist mask, clean the first surface of substrate 1, and form aperture layer 2 with aperture pattern.

[0026] The planarization protective layer 4 conformally covers the surface of the aperture layer 2 away from the substrate 1, the sidewalls of the openings in the aperture layer 2, and the surface of the first surface not covered by the aperture layer 2. Specifically, the planarization protective layer 4 is formed by depositing a protective material of a certain thickness on the aperture layer 2 through a deposition process, so that the planarization protective layer 4 can conformally cover the aperture layer 2.

[0027] The planarization protective layer 4 provides physical protection for the aperture layer 2, preventing damage to it from subsequent processes. It also provides a flat surface for the subsequent fabrication of the metasurface structure 3, facilitating fine photolithography. Furthermore, the planarization protective layer 4 acts as an optical spacer between the aperture layer 2 and the metasurface structure 3. By adjusting the thickness of the planarization protective layer 4, the vertical distance between the aperture layer 2 and the metasurface structure 3 can be controlled. This allows for adjustment of the vertical distance between the aperture layer 2 and the metasurface structure 3 according to different optical system requirements. For example, nanometer-level precision control can be achieved through deposition processes, thus enabling precise regulation of the vertical distance between the aperture layer 2 and the metasurface structure 3.

[0028] Combination Figure 1 As shown, in one specific embodiment, the opening in the aperture layer 2 is an aperture hole that extends through the substrate 1. The inner wall surface of the aperture hole constitutes the side wall surface of the opening. Of course, this is not a limitation. In other embodiments, the aperture layer 2 can also be an island-shaped aperture, that is, the aperture layer 2 is located in the middle, and the opening is formed around the aperture layer 2. In this case, the outer peripheral surface of the aperture layer 2 forms the side wall surface of the opening.

[0029] In embodiments where the substrate 1 is a glass wafer, the planarization protective layer 4 is a silicon dioxide layer, ensuring that the material of the planarization protective layer 4 is consistent with that of the substrate 1. This results in good adhesion and compatibility between the substrate 1 and the planarization protective layer 4, without introducing unnecessary stress or contamination. Specifically, a planarization protective layer 4 that conformally covers the aperture layer 2 is formed by depositing silicon dioxide of a certain thickness on the aperture layer 2 using a deposition process.

[0030] The metasurface structure 3 is fabricated using general semiconductor equipment, i.e., using semiconductor processes. Since the aperture and metasurface structure 3 are formed on the same side of the substrate 1, single-sided exposure equipment from a semiconductor production line can be used, achieving sub-micron level alignment accuracy. Specifically, the relative positional deviation between the geometric center of the aperture layer 2 and the geometric center of the metasurface structure 3 is less than 1 μm, and for example, less than 100 nm.

[0031] Specifically, in the embodiment where the aperture layer 2 includes an aperture hole, the geometric center of the aperture layer 2 refers to the center of the aperture hole; in the embodiment where the aperture layer 2 is an island-shaped aperture, the geometric center of the aperture layer 2 refers to the center of the light-blocking area in the aperture layer 2; and the geometric center of the metasurface structure 3 refers to the center of the metasurface structure 3.

[0032] In one specific embodiment, the fabrication of the metasurface structure 3 on the planarization protective layer 4 specifically includes the following steps: High refractive index material thin film deposition: A high refractive index material thin film for processing metasurface structure 3 is prepared on the planarization protective layer 4 using processes such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD). Commonly used high refractive index materials include amorphous silicon (a-Si), silicon nitride (SiN), titanium dioxide (TiO2), etc. Spin-coated photoresist: A photoresist film is formed by spin-coating a photosensitive photoresist onto the surface of a high refractive index thin film material, and then curing it. Alignment and Exposure: Using a photomask in a deep ultraviolet lithography machine, the metasurface pattern is aligned with the aperture layer 2 that has been processed in the previous steps. In this step, the lower aperture layer 2 is used as an alignment mark to ensure that the center of the metasurface nanoarray is precisely aligned with the center of the aperture hole, achieving a positional deviation of <1μm. Then, exposure is performed, and the photoresist corresponding to the light-transmitting area of ​​the photomask is exposed to light. Development: The photoresist film on the photosensitive area of ​​the wafer is dissolved in the developer, and then cleaned and dried to transfer the designed metasurface nanostructure pattern onto the photoresist film. Nanostructure etching: Dry etching is used to transfer the pattern on the photoresist film to the underlying high refractive index material film to form the final nanopillar array; Photoresist removal and cleaning: First, oxygen plasma ashing and / or wet stripping solution are used to thoroughly remove the photoresist. Then, standard RCA cleaning is performed to ensure that there is no organic or metal contamination on the chip surface. Finally, the designed, high-precision, high-refractive-index nanopillar array, i.e., metasurface structure 3, is presented on the planarization protective layer 4.

[0033] Combination Figure 2As shown, this is a metasurface chip 10a according to the second embodiment of this application. The difference between this second embodiment and the first embodiment is that the metasurface chip 10a further includes a protective layer 5 for protecting the metasurface structure 3. In a specific embodiment, the protective layer 5 is a silicon dioxide layer. By depositing a certain thickness of silicon dioxide on the metasurface structure 3 to form the protective layer 5, physical friction, chemical corrosion, and water-oxygen erosion can be isolated, ensuring the long-term stability of the optical performance of the metasurface structure 3.

[0034] The second embodiment of this application is identical to the first embodiment except for the differences mentioned above, and will not be repeated here.

[0035] Combination Figure 3 As shown, this is the metasurface chip 10b in the third embodiment of this application, combined with... Figure 4 As shown, this is the metasurface chip 10c in the fourth embodiment of this application, combined with... Figure 5 The image shows a metasurface chip 10d according to the fifth embodiment of this application. The substrate 1 has a second surface opposite to the first surface. The difference between the third and first embodiments is that the metasurface chip 10b further includes an optical functional film layer 6 formed on the second surface. The difference between the fourth and second embodiments is that the metasurface chip 10c further includes an optical functional film layer 6 formed on the second surface. The difference between the fifth and second embodiments is that the metasurface chip 10d further includes an optical functional film layer 6 formed on the protective layer 5 and the second surface. The specific optical function of this optical functional film layer 6 can be set according to specific needs; for example, the optical functional film layer 6 can be an anti-reflection layer, a filter layer, an anti-reflection layer, etc.

[0036] Combination Figure 6 The image shows a metasurface chip 10e according to the sixth embodiment of this application. The difference between the metasurface chip 10 in this sixth embodiment and those in the first to fifth embodiments is that the metasurface chip 10 in this embodiment first forms a metasurface structure 3 on its first surface, with a planarization protective layer 4 conformally covering the metasurface structure 3. Finally, an aperture layer 2 is formed on the planarization protective layer 4. In this case, the refractive index of the metasurface structure 3 is greater than the refractive index of the planarization protective layer 4. For example, when the planarization protective layer 4 is a silicon dioxide layer, the material of the metasurface structure can be amorphous silicon, titanium dioxide, or silicon nitride, etc., to ensure the effective control of light waves by the metasurface structure 3.

[0037] It is understood that, when the protective layer 5 is present, the protective layer 5 in this embodiment is used to protect the aperture layer 2. Furthermore, the preparation / forming steps of the metasurface structure 3, the planarization protective layer 4, and the aperture layer 2 can all follow the preparation / forming steps described in the first embodiment above, and will not be repeated here.

[0038] Compared with the prior art, the metasurface chip 10 in this application, by fabricating both the aperture layer 2 and the metasurface structure 3 on the same side of the substrate 1, can be patterned using mature single-sided photolithography overlay technology in the semiconductor field. This can achieve extremely high alignment accuracy at the sub-micron level between the aperture layer 2 and the metasurface structure 3, completely avoiding the errors caused by traditional discrete component mounting and double-sided photolithography alignment, simplifying the assembly and adjustment of the back-end optical system, improving the consistency and stability of the system, and greatly reducing costs.

[0039] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0040] The detailed descriptions listed above are merely specific descriptions of feasible implementation methods of this application and are not intended to limit the scope of protection of this application. All equivalent implementation methods or modifications made without departing from the spirit of the art of this application should be included within the scope of protection of this application.

Claims

1. A metasurface chip with an integrated aperture, characterized in that, include: A substrate having a first surface; An aperture layer formed on the first surface; A planarization protective layer conformally covers the aperture layer; Metasurface structures formed on the planarization protective layer.

2. The metasurface chip with integrated aperture as described in claim 1, characterized in that: The relative positional deviation between the geometric center of the aperture layer and the geometric center of the metasurface structure is less than 1 μm.

3. The metasurface chip with integrated aperture as described in claim 1, characterized in that: The planarization protective layer conformally covers the surface of the aperture layer away from the substrate, the sidewalls of the openings in the aperture layer, and the surface of the first surface not covered by the aperture layer.

4. The metasurface chip with integrated aperture as described in claim 3, characterized in that: The opening in the aperture layer is an aperture hole that extends through to the substrate; the inner wall surface of the aperture hole constitutes the side wall surface of the opening.

5. The metasurface chip with integrated aperture as described in claim 1, characterized in that: The substrate has a second surface opposite to the first surface; the metasurface chip further includes a protective layer for protecting the metasurface structure and an optical functional film layer formed on the protective layer and / or the second surface.

6. The metasurface chip with integrated aperture as described in claim 1, characterized in that: The substrate is a glass wafer, and the planarization protective layer is a silicon dioxide layer.

7. A metasurface chip with an integrated aperture, characterized in that, include: A substrate having a first surface; A metasurface structure formed on the first surface; A planarization protective layer conformally covers the metasurface structure; An aperture layer formed in the planarization protective layer.

8. The metasurface chip with integrated aperture as described in claim 7, characterized in that: The relative positional deviation between the geometric center of the aperture layer and the geometric center of the metasurface structure is less than 1 μm.

9. The metasurface chip with integrated aperture as described in claim 7, characterized in that: The refractive index of the metasurface structure is greater than that of the planarization protective layer.

10. The metasurface chip with integrated aperture as described in claim 7, characterized in that: The substrate has a second surface opposite to the first surface; the metasurface chip further includes a protective layer for protecting the aperture layer, and an optical functional film layer formed on the protective layer and / or the second surface.

Images