Chip cleaning station for filtering particulate impurities

Abstract

The utility model discloses a kind of chip clean benches of filtering particulate impurities, including workbench, it is provided with wafer containing box thereon, several wafers are placed in the wafer containing box;Sealing cover is detachably connected on the wafer containing box, the wafer containing box bottom is sealingly connected in negative pressure balance seat;Negative pressure tank and the negative pressure balance seat are communicated.The utility model is by being provided with wafer containing box on workbench, several wafers are placed in wafer containing box, wafer containing box top is sealed by sealing cover, bottom is sealingly connected in negative pressure balance seat, negative pressure tank and negative pressure balance seat are communicated, after wafer cutting, wafer is placed in wafer containing box, negative pressure tank works, forms negative pressure in wafer containing box, so that the particle cut on wafer is inhaled into dust bucket in negative pressure tank, completes the microparticle cleaning on wafer, can use industrial vacuum cleaner to replace negative pressure tank, and the dust suction port of industrial vacuum cleaner and negative pressure balance seat are communicated.

Description

Technical Field

[0001] This utility model belongs to the field of chip processing technology, and in particular relates to a chip clean workbench for filtering particulate impurities. Background Technology

[0002] Wafer dicing is a key step in semiconductor manufacturing. Its core objective is to divide a whole wafer into individual chip units while ensuring chip performance and manufacturing yield.

[0003] In the post-dicing process of semiconductor manufacturing, a large number of diced wafers remain tightly attached to the bottom film. If the tiny particles generated during the dicing process are not cleaned in time, they will directly threaten chip yield and the cleanliness of the production environment. Currently, the industry generally relies on manual vacuum cleaners to handle each wafer individually. Manual operation is slow and cannot match the pace requirements of high-speed automated production lines, resulting in limited overall production efficiency. The airflow disturbance generated during the vacuum cleaner adsorption process can easily cause micron-sized particles to escape the adsorption range, scatter onto the workbench, or even spread into the cleanroom environment, contaminating the cleanroom. Utility Model Content

[0004] The purpose of this invention is to address the problem that wafer dicing relies heavily on manual vacuuming of individual wafers, which is slow and difficult to match the pace of high-speed automated production lines, resulting in limited overall production efficiency. Furthermore, the airflow disturbance generated during vacuuming can cause micron-sized particles to escape the adsorption range, scatter onto the workbench, or even spread into the cleanroom environment, contaminating the cleanroom. Therefore, this invention proposes a chip clean workbench for filtering particulate impurities.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: a chip cleaning workbench for filtering particulate impurities, comprising a workbench on which a wafer receiving box is provided, and several wafers are placed in the wafer receiving box; a sealing cover is detachably connected to the wafer receiving box, and the bottom of the wafer receiving box is sealed to a negative pressure balance seat; the negative pressure box and the negative pressure balance seat are connected.

[0006] As a further description of the above technical solution:

[0007] The inner wall of the wafer receiving box is provided with an arc-shaped abutment and several limiting blocks. The wafer is snapped between two of the limiting blocks, and the bottom of the wafer abuts against the arc-shaped abutment.

[0008] As a further description of the above technical solution:

[0009] The wafer housing is provided with a first sealing groove at the top and a first sealing strip at the bottom of the sealing cover, with the first sealing strip abutting against the first sealing groove.

[0010] As a further description of the above technical solution:

[0011] The bottom of the negative pressure balance seat is provided with several guide plates, and the several guide plates form an airflow channel, which is located at the bottom of the wafer.

[0012] As a further description of the above technical solution:

[0013] The negative pressure balance seat is provided with a second sealing strip on the top, and the wafer receiving box is provided with a second sealing groove inside, with the second sealing strip and the second sealing groove matching each other.

[0014] As a further description of the above technical solution:

[0015] The negative pressure box is equipped with a dust bin.

[0016] In summary, due to the adoption of the above technical solution, the beneficial effects of this utility model are:

[0017] 1. In this utility model, a wafer receiving box is set on the workbench, and several wafers are placed in the wafer receiving box. The top of the wafer receiving box is sealed by a sealing cover, and the bottom is sealed and connected to the negative pressure balance seat. The negative pressure box and the negative pressure balance seat are connected. When the wafer is cut, the wafer is placed in the wafer receiving box. The negative pressure box works to create a negative pressure inside the wafer receiving box, so that the particles cut on the wafer are sucked into the dust bin inside the negative pressure box, thus completing the cleaning of the particles on the wafer. An industrial vacuum cleaner can be used to replace the negative pressure box. The suction port of the industrial vacuum cleaner is connected to the negative pressure balance seat.

[0018] 2. In this utility model, by setting a negative pressure balance seat, the airflow in the negative pressure runs along the airflow channel, carrying away the cutting particles on the wafer surface, and preventing the negative pressure airflow from running around in the wafer housing box and damaging the wafer. This structure prevents micron-sized particles from leaving the adsorption range and falling onto the workbench or even spreading into the cleanroom environment, thus contaminating the cleanroom.

[0019] 3. In this invention, several wafers are placed vertically into the wafer housing, so that the particles on the wafers are not only subject to negative pressure adsorption, but also to their own gravity, ensuring that the particles on the wafers can be successfully removed. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 Cross-section of a chip cleanroom bench for filtering particulate impurities Figure 1 .

[0022] Figure 2 Cross-section of a chip cleanroom bench for filtering particulate impurities Figure 2 .

[0023] Figure 3 This is a three-dimensional view of a chip cleaning workbench that filters particulate impurities.

[0024] Legend:

[0025] 1-Wafer housing; 2-Wafer; 3-Sealing cover; 4-Negative pressure balance seat; 5-Negative pressure box; 6-Arc-shaped abutment body; 7-Limiting block; 8-First sealing groove; 9-First sealing strip; 10-Guide plate; 11-Second sealing strip; 12-Second sealing groove. Detailed Implementation

[0026] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0028] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0029] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0030] In the description of the embodiments of this utility model, it should be noted that the terms "upper" and "inner" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the utility model product is usually placed when in use. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0031] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0032] Please see Figures 1-3 This utility model provides a technical solution: a chip cleaning workbench for filtering particulate impurities, including a workbench on which a wafer receiving box 1 is provided, and several wafers 2 are placed in the wafer receiving box 1; a sealing cover 3 is detachably connected to the wafer receiving box 1, and the bottom of the wafer receiving box 1 is sealed to a negative pressure balance seat 4; a negative pressure box 5 and the negative pressure balance seat 4 are connected.

[0033] The inner wall of the wafer housing 1 is provided with an arc-shaped abutment 6 and several limiting blocks 7. The wafer 2 is snapped between two of the limiting blocks 7, and the bottom of the wafer 2 abuts against the arc-shaped abutment 6.

[0034] The wafer housing 1 has a first sealing groove 8 at its top, and the sealing cover 3 has a first sealing strip 9 at its bottom, with the first sealing strip 9 abutting against the first sealing groove 8. This improves the sealing performance inside the wafer housing and prevents it from affecting the negative pressure inside the wafer housing.

[0035] The bottom of the negative pressure balance seat 4 is provided with several guide plates 10, which form an airflow channel. The airflow channel is located at the bottom of the wafer 2.

[0036] The negative pressure balance seat 4 is provided with a second sealing strip 11 on its top, and the wafer receiving box 1 is provided with a second sealing groove 12 inside, with the second sealing strip 11 and the second sealing groove 12 matching each other.

[0037] The negative pressure box 5 is equipped with a dust bin.

[0038] Working principle: A wafer receiving box is set on the workbench, and several wafers are placed inside the wafer receiving box. The top of the wafer receiving box is sealed with a sealing cover, and the bottom is sealed and connected to the negative pressure balance seat. The negative pressure box and the negative pressure balance seat are connected. When the wafer is cut, it is placed in the wafer receiving box. The negative pressure box works to create a negative pressure inside the wafer receiving box, so that the particles cut on the wafer are sucked into the dust bin inside the negative pressure box, thus cleaning the particles on the wafer. An industrial vacuum cleaner can be used to replace the negative pressure box. The suction port of the industrial vacuum cleaner is connected to the negative pressure balance seat.

[0039] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. A chip cleanroom workbench for filtering particulate impurities, characterized in that, The device includes a workbench on which a wafer casing is mounted, and several wafers are placed inside the wafer casing. A sealing cover is detachably connected to the wafer casing, and the bottom of the wafer casing is sealed to a negative pressure balance seat. The negative pressure box and the negative pressure balance seat are connected. Several guide plates are provided at the bottom of the negative pressure balance seat, and the several guide plates form an airflow channel, which is located at the bottom of the wafers.

2. The chip cleanroom workbench for filtering particulate impurities according to claim 1, characterized in that, The inner wall of the wafer receiving box is provided with an arc-shaped abutment and several limiting blocks. The wafer is snapped between two of the limiting blocks, and the bottom of the wafer abuts against the arc-shaped abutment.

3. A chip cleanroom workbench for filtering particulate impurities according to claim 2, characterized in that, The wafer housing is provided with a first sealing groove at the top and a first sealing strip at the bottom of the sealing cover, with the first sealing strip abutting against the first sealing groove.

4. A chip cleanroom workbench for filtering particulate impurities according to claim 1, characterized in that, The negative pressure balance seat is provided with a second sealing strip on the top, and the wafer receiving box is provided with a second sealing groove inside, with the second sealing strip and the second sealing groove matching each other.

5. A chip cleanroom workbench for filtering particulate impurities according to claim 1, characterized in that... The negative pressure box is equipped with a dust bin.

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