A battery power graded protection circuit

Abstract

This utility model discloses a graded protection circuit for battery power supplies, relating to the field of electronic circuits. It includes a graded comparison circuit, a delay control circuit, a latching and reset circuit, and a control MOSFET Q1. The graded comparison circuit consists of four stages, connected sequentially via RC filtering, with the threshold value at the inverting input manually adjustable. The delay control circuit is connected to the output of the second-stage comparison circuit, and the latching and reset circuit is connected to the output of the fourth stage. Both are connected to the gate of Q1 along with the output of the third stage. The circuit provides graded protection based on the degree of voltage abnormality: the first stage provides early warning for small fluctuations to prevent false shutdown; the second stage uses delay control to shut down for extended periods exceeding the threshold, preventing frequent shutdowns; the third stage directly shuts down for higher thresholds; and the fourth stage shuts down and latches in extreme cases, requiring manual reset. This solves the problems of traditional protection circuits, such as single response, low reliability, and insufficient protection flexibility, ensuring the safety of subsequent circuits.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuits, and in particular to a battery power supply graded protection circuit. Background Technology

[0002] In existing battery power protection technologies, the single threshold protection strategy is no longer sufficient to meet the requirements. When the battery voltage is abnormal, directly cutting off the power will cause frequent power outages, affecting normal operation. If the protection threshold is not set reasonably, it cannot respond effectively to voltage anomalies of different degrees in a timely manner, which may lead to battery overcharging, over-discharging, or equipment damage. In addition, some protection circuits lack a delay control mechanism, making them prone to malfunctions due to instantaneous voltage fluctuations. Furthermore, there is no reliable latching and reset function to ensure circuit safety in extreme voltage anomalies, resulting in insufficient protection flexibility and low reliability. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide a battery power protection circuit that offers multiple thresholds, flexible protection, and greater reliability.

[0004] To solve the above-mentioned technical problems, the technical solution adopted by this utility model is as follows:

[0005] A battery power supply graded protection circuit, the key feature of which is that the circuit includes a graded comparison circuit, a delay control circuit, a latch reset circuit, and a control MOSFET Q1;

[0006] The hierarchical comparison circuit includes a first-level comparison circuit, a second-level comparison circuit, a third-level comparison circuit, and a fourth-level comparison circuit. The hierarchical comparison circuits are connected step by step through an RC filter circuit.

[0007] The input terminal of the delay control circuit is connected to the output terminal of the two-stage comparator circuit; the output terminal of the latch reset circuit is connected to the output terminal of the four-stage comparator circuit.

[0008] The output terminals of the delay control circuit, the three-stage comparator circuit, and the latch reset circuit are respectively connected to the gate of the MOS transistor Q1; the power supply voltage is connected to the source of Q1; and the drain of Q1 is the output terminal of the battery power graded protection circuit.

[0009] Preferably, the battery power supply is connected to a first-stage comparator circuit via a voltage divider circuit composed of R2 and R3, with one end of R2 and R3 serving as the voltage divider input terminal of the battery power supply. The first-stage comparator circuit includes a comparator U1 and a first-stage warning light LED1. The positive comparator terminal of U1 is connected to the voltage divider input terminal of the battery power supply. The positive terminal of U1 is connected to the voltage divider input terminal of the battery power supply and is connected to the output terminal of U1 through a pull-up resistor. The inverting input terminal of U1 is connected to a sliding rheostat RP4. The other end of RP4 is grounded, and the sliding terminal is connected to the power supply VCC. The output terminal of U1 is connected to LED1, and the other end of LED1 is grounded through a resistor R7.

[0010] Preferably, the secondary comparator circuit includes comparator U2; the positive comparison terminal and positive terminal of U2 are connected to the output terminal of the primary comparator circuit; the positive terminal of U2 is connected to the output terminal of U2 through a pull-up resistor, and the inverting comparison terminal of U2 is connected to a sliding rheostat RP3; the other end of RP3 is grounded, and the sliding terminal is connected to the power supply VCC; the output terminal of U2 is connected to the input terminal of a delay control circuit, which includes an integrated chip U3 and a register U4; the input terminal of the delay control circuit is respectively connected to the RST pin of U3 and VCC. The C11 capacitor is connected to the CC pin, capacitor C11, and the D and #CLR pins of U4; the other end of C11 is connected to the TRIG and THOLD pins of U3 respectively and grounded; the GND, CVOLT, and DISCHG pins of U3 are grounded; the OUT pin of U3 is connected to the CK pin of U4 after RC filtering; the VCC and #PR pins of U4 are connected to the power supply VCC; the Q pin of U3 is connected to the positive terminal of the secondary fault warning light LED2, and the negative terminal of LED2 is connected to the gate of Q1.

[0011] Preferably, U3 is an NE555 chip; and register U4 is a 74HC74 chip.

[0012] Preferably, the output of the three-stage comparator circuit is connected to the positive terminal of the three-stage fault diode LED3 and the four-stage comparator circuit respectively after passing through an RC filter circuit; the negative terminal of LED3 is connected to the gate of Q1.

[0013] Preferably, the latch reset circuit includes a thyristor Q3 and a reset button K1; the output of the four-stage comparator circuit is connected to the control terminal of Q3; the positive terminal of Q3 is connected to the power supply VCC through K1; and the negative terminal of Q3 is connected to the gate of Q1 through the four-stage fault warning light LED4.

[0014] The beneficial effects of adopting the above technical solution are as follows:

[0015] This invention employs a multi-level comparison circuit to perform graded detection of voltage anomalies, and combines a delay control circuit and a latching reset circuit; it achieves the following: only warning without action for small voltage fluctuations, shutdown for prolonged over-threshold warnings for level two faults, direct shutdown for level three faults, and maintaining the shutdown state after power shutdown for level four faults, awaiting manual reset, thereby improving the flexibility and reliability of the protection. Attached Figure Description

[0016] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0017] Figure 1 This is a circuit diagram of a battery power supply graded protection circuit proposed in this utility model. Detailed Implementation

[0018] The technical solutions of this utility model will be clearly and completely described below with reference to the embodiments of this utility model. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this utility model.

[0019] In this embodiment, the present invention proposes a battery power supply graded protection circuit, such as... Figure 1 It includes a hierarchical comparison circuit, a delay control circuit, a latch reset circuit, and a control MOSFET Q1;

[0020] The hierarchical comparison circuit includes a first-level comparison circuit, a second-level comparison circuit, a third-level comparison circuit, and a fourth-level comparison circuit. The hierarchical comparison circuits are connected through an RC filter circuit. From the first-level to the fourth-level comparison circuit, the input power supply of the inverting comparison terminal is manually adjusted and increased step by step. In the embodiment, it can be manually adjusted by a sliding rheostat connected to the inverting input terminal.

[0021] The input terminal of the delay control circuit is connected to the output terminal of the two-stage comparator circuit; the output terminal of the latch reset circuit is connected to the output terminal of the four-stage comparator circuit.

[0022] The output terminals of the delay control circuit, the three-stage comparator circuit, and the latch reset circuit are respectively connected to the gate of MOSFET Q1; the power supply voltage is connected to the source of Q1; and the drain of Q1 is the output terminal of the battery power graded protection circuit.

[0023] To address the issue of graded voltage protection, this embodiment employs graded responses and protection actions based on the amount by which the voltage exceeds the normal value. The comparison values ​​of the first to fourth level protection circuits increase progressively, each corresponding to a different protection action. When the voltage fluctuates slightly, a warning is issued, indicating a danger, but no circuit protection action is taken to prevent frequent power on / off cycles. When the voltage exceeds the danger threshold, power is promptly shut off for protection. In extreme cases where the voltage exceeds the threshold excessively, power is shut off immediately while simultaneously locking the status. Unless manually reset, the power remains off to ensure the safe operation of subsequent circuits.

[0024] The battery power supply is connected to the first-stage comparator circuit through a voltage divider circuit composed of R2 and R3. One end of R2 and R3 is used as the voltage divider input terminal of the battery power supply. The first-stage comparator circuit includes comparator U1 and first-stage fault warning light LED1. The positive comparator terminal of U1 is connected to the voltage divider input terminal of the battery power supply. The positive terminal of U1 is connected to the voltage divider input terminal of the battery power supply and is connected to the output terminal of U1 through a pull-up resistor. The inverting input terminal of U1 is connected to the sliding rheostat RP4. The other end of RP4 is grounded, and the sliding end is connected to the power supply VCC. The output terminal of U1 is connected to LED1, and the other end of LED1 is grounded through resistor R7.

[0025] The first-level comparator circuit is used to detect small voltage fluctuations and alerts the user via LED1 when fluctuations occur. The threshold voltage set here is relatively low, mainly used to detect fluctuations and serve as an early warning.

[0026] The second-stage comparator circuit includes comparator U2; the positive terminal and the positive terminal of U2 are connected to the output terminal of the first-stage comparator circuit; the positive terminal of U2 is connected to the output terminal of U2 through a pull-up resistor, and the inverting terminal of U2 is connected to the sliding rheostat RP3; the other end of RP3 is grounded, and the sliding terminal is connected to the power supply VCC; the output terminal of U2 is connected to the input terminal of the delay control circuit, which includes integrated chip U3 and register U4; U3 is an NE555 chip, and U4 is a 74HC74 chip. The input terminals of the delay control circuit are connected to the RST pin, VCC pin, capacitor C11, and D and #CLR pins of U4, respectively; the other end of C11 is connected to the TRIG pin and THOLD pin of U3, and grounded; the GND pin, CVOLT pin, and DISCHG pin of U3 are grounded; the OUT pin of U3 is connected to the CK pin of U4 after RC filtering; the VCC pin and #PR pin of U4 are connected to the power supply VCC; the Q pin of U3 is connected to the positive terminal of the secondary fault warning light LED2, and the negative terminal of LED2 is connected to the gate of Q1.

[0027] The secondary comparator circuit detects fault voltages exceeding the threshold voltage of the primary comparator circuit. Combined with a delay circuit, when the voltage exceeds the secondary comparator threshold, the preset pin D of U4 receives the voltage. Subsequently, when the delay signal from the delay chip U3 enters the CK pin, the Q pin outputs, illuminating the secondary fault warning light and turning off the control MOSFET Q1. The delay control circuit is used to shut down the circuit when the voltage exceeds the predetermined threshold for an extended period, ensuring both monitoring of the power supply voltage and preventing frequent power outages due to voltage fluctuations. The predetermined threshold voltage set here has minimal impact on subsequent circuits in the short term, but it cannot ensure safe operation for extended periods. The delay time of the delay control circuit is controlled by the capacitance of capacitor C11. Therefore, if C11 is too large or too small, it will affect the operation of subsequent circuits. Too small a capacitance will lead to frequent switching on and off, while too large a capacitance will fail to provide effective safety control.

[0028] The output of the three-stage comparator circuit is connected to the positive terminal of the three-stage fault diode LED3 and the four-stage comparator circuit after passing through an RC filter circuit; the negative terminal of LED3 is connected to the gate of Q1; when the power supply voltage exceeds the predetermined threshold, the three-stage comparator circuit directly cuts off the power supply voltage to the subsequent circuit through Q1 and provides an early warning through LED3.

[0029] The latching reset circuit includes a thyristor Q3 and a reset button K1; the output of the four-stage comparator circuit is connected to the control terminal of Q3; the positive terminal of Q3 is connected to the power supply VCC through K1; the negative terminal of Q3 is connected to the gate of Q1 through the four-stage fault warning light LED4. When the four-stage comparator circuit detects that the voltage exceeds a predetermined threshold, Q3 is turned on when the control terminal of Q3 is at a high potential, and maintains current output under the drive of VCC. The power supply is promptly turned off through Q1, and a warning is issued through LED4. The latching circuit maintains the off state until the positive power supply to Q3 is manually interrupted by the reset button, at which point Q1 is turned on again.

[0030] The above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A battery power supply graded protection circuit, characterized in that, The circuit includes a hierarchical comparison circuit, a delay control circuit, a latch reset circuit, and a control MOSFET Q1; The hierarchical comparison circuit includes a first-level comparison circuit, a second-level comparison circuit, a third-level comparison circuit, and a fourth-level comparison circuit. The hierarchical comparison circuits are connected step by step through an RC filter circuit. The input terminal of the delay control circuit is connected to the output terminal of the two-stage comparator circuit; the output terminal of the latch reset circuit is connected to the output terminal of the four-stage comparator circuit. The output terminals of the delay control circuit, the three-stage comparator circuit, and the latch reset circuit are respectively connected to the gate of the control MOS transistor Q1; the power supply voltage is connected to the source of the control MOS transistor Q1; and the drain of the control MOS transistor Q1 is the output terminal of the battery power graded protection circuit.

2. The battery power supply graded protection circuit according to claim 1, characterized in that, The battery power supply is connected to the first-stage comparator circuit through a voltage divider circuit composed of resistors R2 and R3. One end of resistors R2 and R3 serves as the voltage divider input terminal of the battery power supply. The first-stage comparator circuit includes a comparator U1 and a first-stage warning light LED1. The positive comparison terminal of the comparator U1 is connected to the voltage divider input terminal of the battery power supply. The positive terminal of the comparator U1 is connected to the voltage divider input terminal of the battery power supply and is connected to the output terminal of the comparator U1 through a pull-up resistor. The inverting input terminal of the comparator U1 is connected to a sliding rheostat RP4. The other end of the sliding rheostat RP4 is grounded, and the sliding end is connected to the power supply VCC. The output terminal of the comparator U1 is connected to the first-stage warning light LED1, and the other end of the first-stage warning light LED1 is grounded through a resistor R7.

3. The battery power supply graded protection circuit according to claim 1, characterized in that, The secondary comparator circuit includes comparator U2; the positive comparison terminal and positive terminal of comparator U2 are connected to the output terminal of the primary comparator circuit; the positive terminal of comparator U2 is connected to the output terminal of comparator U2 through a pull-up resistor, and the inverting comparison terminal of comparator U2 is connected to a sliding rheostat RP3; the other end of the sliding rheostat RP3 is grounded, and the sliding terminal is connected to the power supply VCC; the output terminal of comparator U2 is connected to the input terminal of a delay control circuit, which includes an integrated chip U3 and a register U4; the input terminal of the delay control circuit is respectively connected to the RST pin, VCC pin, and capacitor C of chip U3. 11 and the D and #CLR pins of register U4; the other end of capacitor C11 is connected to the TRIG and THOLD pins of chip U3 respectively, and grounded; the GND, CVOLT, and DISCHG pins of chip U3 are grounded; the OUT pin of chip U3 is connected to the CK pin of register U4 after RC filtering; the VCC and #PR pins of register U4 are connected to the power supply VCC; the Q pin of chip U3 is connected to the positive terminal of the secondary fault warning light LED2, and the negative terminal of the secondary fault warning light LED2 is connected to the gate of the control MOS transistor Q1.

4. A battery power supply graded protection circuit according to claim 3, characterized in that, U3 is an NE555 chip; register U4 is a 74HC74 chip.

5. A battery power supply graded protection circuit according to claim 1, characterized in that, The output of the three-stage comparator circuit is connected to the positive terminal of the three-stage fault diode LED3 and the four-stage comparator circuit after passing through an RC filter circuit; the negative terminal of the three-stage fault diode LED3 is connected to the gate of Q1.

6. A battery power supply graded protection circuit according to claim 1, characterized in that, The latch reset circuit includes a thyristor Q3 and a reset button K1; the output of the four-stage comparator circuit is connected to the control terminal of the thyristor Q3; the positive terminal of the thyristor Q3 is connected to the power supply VCC through the reset button K1; the negative terminal of the thyristor Q3 is connected to the gate of the control MOS transistor Q1 through the four-stage fault warning light LED4.

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