An operational amplifier circuit

Abstract

The utility model discloses an operational amplifier circuit. The operational amplifier circuit comprises: an operational amplifier, a first parallel reverse diode module, a second parallel reverse diode module, a first capacitor module, a second capacitor module, a first resistor module and a second resistor module; wherein, the positive input end of the operational amplifier inputs a first voltage, the positive input end of the operational amplifier is electrically connected with the first end of the first parallel reverse diode module, the second end of the first parallel reverse diode module is electrically connected with the first end of the first resistor module, the second end of the first resistor module is connected with a bias voltage, the third end of the first resistor module is electrically connected with the negative output end of the operational amplifier, and the positive input end of the operational amplifier is electrically connected with the first end of the first capacitor module; the common-mode input end of the operational amplifier inputs a common-mode voltage. The operational amplifier circuit provided by the utility model can separate the common-mode voltage of input and output and improve the common-mode rejection ratio.

Description

Technical Field

[0001] This utility model relates to communication technology, and more particularly to an operational amplifier circuit. Background Technology

[0002] With the development of the Internet of Things and machines, human-computer interaction is becoming increasingly frequent, and the requirements for signal transmission accuracy are also rising. To adapt to the processing of various signals, analog-to-digital converters (ADCs) require operational amplifiers in operational amplifier circuits to adjust their amplification factor through programming, thereby homogenizing the converted signal range and improving measurement accuracy. Currently, existing operational amplifier circuits suffer from the problem of not being able to separate the input and output common-mode voltages, affecting common-mode gain and reducing common-mode rejection ratio. Utility Model Content

[0003] This utility model provides an operational amplifier circuit to separate the input and output common-mode voltages and improve the common-mode rejection ratio.

[0004] This utility model embodiment provides an operational amplifier circuit, including: an operational amplifier, a first parallel reverse diode module, a second parallel reverse diode module, a first capacitor module, a second capacitor module, a first resistor module, and a second resistor module;

[0005] Wherein, the operational amplifier receives a first voltage at its positive input terminal, is electrically connected to the first terminal of the first parallel reverse diode module, is electrically connected to the first terminal of the first resistor module, is connected to the second terminal of the first resistor module, is connected to a bias voltage at its second terminal, is electrically connected to the negative output terminal of the operational amplifier, is electrically connected to the first terminal of the first capacitor module, and is electrically connected to the negative output terminal of the operational amplifier; the operational amplifier receives a first voltage at its positive input terminal, is electrically connected to the first terminal of the first capacitor module, and is electrically connected to the negative output terminal of the operational amplifier.

[0006] The operational amplifier receives a second voltage at its negative input terminal, which is grounded via a capacitor. The negative input terminal is electrically connected to the first terminal of the second parallel reverse diode module, and the second terminal of the second parallel reverse diode module is electrically connected to the first terminal of the second resistor module. The second terminal of the second resistor module is connected to the bias voltage, and the third terminal of the second resistor module is electrically connected to the positive output terminal of the operational amplifier. The negative input terminal of the operational amplifier is electrically connected to the first terminal of the second capacitor module, and the second terminal of the second capacitor module is electrically connected to the positive output terminal of the operational amplifier. A common-mode voltage is input to the common-mode input terminal of the operational amplifier.

[0007] Optionally, the first parallel reverse diode module includes a first switch and a second switch. The first terminal of the first switch and the first terminal of the second switch serve as the first terminal of the first parallel reverse diode module. The gate of the first switch is electrically connected to the first terminal of the first switch. The second terminal of the first switch and the second terminal of the second switch serve as the second terminal of the first parallel reverse diode module. The gate of the second switch is electrically connected to the second terminal of the second switch.

[0008] Optionally, the second parallel reverse diode module includes a third switch and a fourth switch. The first terminals of the third switch and the fourth switch serve as the first terminals of the second parallel reverse diode module. The gate of the third switch is electrically connected to the first terminal of the third switch. The second terminals of the third switch and the fourth switch serve as the second terminals of the second parallel reverse diode module. The gate of the fourth switch is electrically connected to the second terminal of the fourth switch.

[0009] Optionally, the first resistor module includes a first resistor and a second resistor, with a first end of the first resistor serving as the first end of the first resistor module, a second end of the first resistor serving as the second end of the first resistor module, the first end of the first resistor being electrically connected to the first end of the second resistor, and the second end of the second resistor serving as the third end of the first resistor module.

[0010] Optionally, the voltage at the first terminal of the first resistor R1 and the voltage at the first terminal of the second resistor R2 are both (Vbias-Vcm)×R2 / (R1+R2)+Vcm, where Vbias is the bias voltage and Vcm is the common-mode voltage.

[0011] Optionally, the second resistor module includes a third resistor and a fourth resistor, wherein the first end of the third resistor serves as the first end of the second resistor module, the second end of the third resistor serves as the second end of the second resistor module, the first end of the third resistor is electrically connected to the first end of the fourth resistor, and the second end of the fourth resistor serves as the third end of the second resistor module.

[0012] Optionally, both the first capacitor module and the second capacitor module include multiple parallel branches, each branch including a capacitor and a switch connected in series.

[0013] Optionally, the operational amplifier circuit further includes two input capacitors. The positive input terminal of the operational amplifier receives the first voltage through one of the input capacitors, and the negative input terminal of the operational amplifier receives the second voltage through the other input capacitor.

[0014] Optionally, the resistance value of the first resistor module is the same as the resistance value of the second resistor module.

[0015] Optionally, the common-mode voltage is half of the power supply voltage of the operational amplifier.

[0016] The operational amplifier circuit provided in this embodiment includes: an operational amplifier, a first parallel reverse diode module, a second parallel reverse diode module, a first capacitor module, a second capacitor module, a first resistor module, and a second resistor module; wherein, a first voltage is input to the positive input terminal of the operational amplifier, the positive input terminal of the operational amplifier is electrically connected to the first terminal of the first parallel reverse diode module, the second terminal of the first parallel reverse diode module is electrically connected to the first terminal of the first resistor module, a bias voltage is applied to the second terminal of the first resistor module, the third terminal of the first resistor module is electrically connected to the negative output terminal of the operational amplifier, and the positive input terminal of the operational amplifier is electrically connected to the first terminal of the first capacitor module. The second terminal of the capacitor module is electrically connected to the negative output terminal of the operational amplifier; a second voltage is input to the negative input terminal of the operational amplifier, which is grounded through a capacitor. The negative input terminal of the operational amplifier is electrically connected to the first terminal of the second parallel reverse diode module, the second terminal of the second parallel reverse diode module is electrically connected to the first terminal of the second resistor module, the second terminal of the second resistor module is connected to a bias voltage, the third terminal of the second resistor module is electrically connected to the positive output terminal of the operational amplifier, the negative input terminal of the operational amplifier is electrically connected to the first terminal of the second capacitor module, and the second terminal of the second capacitor module is electrically connected to the positive output terminal of the operational amplifier; a common-mode voltage is input to the common-mode input terminal of the operational amplifier. The operational amplifier circuit provided in this embodiment provides a DC path for the positive input terminal of the operational amplifier through the first resistor module and the first parallel reverse diode module, and a DC path for the negative input terminal of the operational amplifier through the second resistor module and the second parallel reverse diode module, ensuring the reliability of the DC path. Furthermore, the common-mode voltage is separated from the input and output common-mode voltage through the bias voltage, the first resistor module, and the second resistor module, thereby improving the common-mode rejection ratio. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of an operational amplifier circuit in the prior art;

[0018] Figure 2 This is a schematic diagram of another operational amplifier circuit in the prior art;

[0019] Figure 3 This is a schematic diagram of an operational amplifier circuit provided in an embodiment of the present invention. Detailed Implementation

[0020] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, not the entire structure.

[0021] Figure 1 This is a schematic diagram of the structure of an operational amplifier circuit in the prior art. Figure 2 This is a schematic diagram of another operational amplifier circuit in the prior art. (Reference) Figure 1 and Figure 2 The main feedback methods for operational amplifiers (AMPs) in existing operational amplifier circuits are resistor array feedback and capacitor array feedback. For example... Figure 1 As shown, the gain (Gain) of the operational amplifier is selected by the ratio of the feedback resistor (Rf) to the input resistor (Ri), i.e., Gain = -Rf / Ri. In resistor array feedback, both the input and feedback resistors generate thermal noise, which ultimately affects the output of the operational amplifier and enters the entire signal path, increasing noise, reducing the signal-to-noise ratio, and degrading the overall circuit performance. Figure 2 As shown, in capacitor array feedback, for capacitors operating in AC coupling mode, the capacitors themselves do not contribute noise. Therefore, capacitor Cf (connected to switch SW, resistor R, and capacitor Ci) can be used. Figure 1 and Figure 2The operational amplifier (AMP) in the diagram uses a feedback method to achieve a low-noise programmable gain operational amplifier (AMP). The input signals are input through ports VI1, VI2, and VI3, and the output signals are output through ports VO1 and VO2. However, because the capacitor feedback array lacks a DC path, the common-mode level cannot be determined, preventing proper operation. To ensure the AMP functions correctly with capacitor feedback, a DC path needs to be added to the feedback capacitor. Typically, a resistor is used to establish the DC path, but the presence of resistor thermal noise still increases noise interference. Therefore, to reduce the impact of resistor noise in the DC path, a large resistor (e.g., greater than 100G) is usually used to make the feedback resistor R nearly open-circuited. However, a large resistor occupies a large area, which is impractical in real-world applications. Existing technologies use two opposing diodes to establish the DC path, but due to the non-linearity of diode impedance, performance varies with different signal amplitudes, resulting in instability. Using resistors or diodes to establish the DC path will cause the output and input to have the same common-mode level. Since different architectures are used at the input terminals of operational amplifiers, different input voltage requirements exist. For example, if the power supply voltage is 1.5V, the common-mode voltage is usually 0.75V in order to obtain a larger output swing. However, in order to reduce the leakage voltage of the input transistors at the input of the operational amplifier, high-voltage devices are usually required as input transistors, which will impose a minimum input voltage requirement. 0.75V cannot meet the normal operation requirements. If a depletion-type input transistor is used, the low output resistance will affect the common-mode gain and reduce the common-mode rejection ratio.

[0022] Based on this, this embodiment provides an operational amplifier circuit. Figure 3 This is a schematic diagram of an operational amplifier circuit provided in an embodiment of the present invention. (Refer to...) Figure 3 The operational amplifier circuit includes: an operational amplifier AMP, a first parallel reverse diode module 11, a second parallel reverse diode module 12, a first capacitor module 21, a second capacitor module 22, a first resistor module 31, and a second resistor module 32.

[0023] In this configuration, the operational amplifier AMP receives a first voltage VIP at its positive input terminal. The positive input terminal of the operational amplifier AMP is electrically connected to the first terminal of the first parallel reverse diode module 11. The second terminal of the first parallel reverse diode module 11 is electrically connected to the first terminal of the first resistor module 31. The second terminal of the first resistor module 31 is connected to a bias voltage Vbias. The third terminal of the first resistor module 31 is electrically connected to the negative output terminal of the operational amplifier AMP. The positive input terminal of the operational amplifier AMP is electrically connected to the first terminal of the first capacitor module 21. The second terminal of the first capacitor module 21 is electrically connected to the negative output terminal of the operational amplifier AMP. A second voltage is input to the negative input terminal of the operational amplifier AMP. VIN, the negative input terminal of the operational amplifier AMP is grounded through a capacitor, the negative input terminal of the operational amplifier AMP is electrically connected to the first terminal of the second parallel reverse diode module 12, the second terminal of the second parallel reverse diode module 12 is electrically connected to the first terminal of the second resistor module, the second terminal of the second resistor module 32 is connected to the bias voltage Vbias, the third terminal of the second resistor module 32 is electrically connected to the positive output terminal of the operational amplifier AMP, the negative input terminal of the operational amplifier AMP is electrically connected to the first terminal of the second capacitor module 22, the second terminal of the second capacitor module 22 is electrically connected to the positive output terminal of the operational amplifier AMP; the common-mode input terminal of the operational amplifier AMP is connected to the common-mode voltage Vcm.

[0024] Specifically, the operational amplifier AMP receives a first voltage VIP at its positive input terminal and a second voltage VIN at its negative input terminal. Since the negative input terminal of the operational amplifier AMP is grounded, the second voltage VIN is 0V, serving as a pseudo-differential input. The common-mode voltage between the positive output terminal (output voltage VOP) and the negative output terminal (output voltage VON) of the operational amplifier AMP is controlled by the common-mode voltage Vcm input at the common-mode input terminal of the operational amplifier AMP. The gain of the operational amplifier AMP is related to the capacitance values ​​of the first capacitor module 21 and the second capacitor module 22. The capacitance values ​​of the first capacitor module 21 and the second capacitor module 22 are adjustable; by adjusting the capacitance values ​​of the first capacitor module 21 and the second capacitor module 22, the gain of the operational amplifier AMP is changed. A bias voltage Vbias is input to the second terminal of the first resistor module 31. The DC voltage Vp (which serves as the common-mode input voltage) at the first terminal of the first resistor module 31 is transmitted to the positive input terminal of the operational amplifier AMP through the first parallel reverse diode module 11. A bias voltage Vbias is also input to the second terminal of the second resistor module 32. The DC voltage Vp at the first terminal of the second resistor module 32 is transmitted to the negative input terminal of the operational amplifier AMP through the second parallel reverse diode module 12. By using the bias voltage and resistor module voltage division, the input and output common-mode voltages are separated, ensuring the output swing of the operational amplifier AMP while meeting the requirements of different common-mode input voltages. The first resistor module 31 and the first parallel reverse diode module 11 provide a DC path for the positive input terminal of the operational amplifier AMP, while the second resistor module 32 and the second parallel reverse diode module 12 provide a DC path for the negative input terminal of the operational amplifier AMP, ensuring the reliability of the DC path.

[0025] The operational amplifier circuit provided in this embodiment includes: an operational amplifier, a first parallel reverse diode module, a second parallel reverse diode module, a first capacitor module, a second capacitor module, a first resistor module, and a second resistor module; wherein, a first voltage is input to the positive input terminal of the operational amplifier, the positive input terminal of the operational amplifier is electrically connected to the first terminal of the first parallel reverse diode module, the second terminal of the first parallel reverse diode module is electrically connected to the first terminal of the first resistor module, a bias voltage is applied to the second terminal of the first resistor module, the third terminal of the first resistor module is electrically connected to the negative output terminal of the operational amplifier, and the positive input terminal of the operational amplifier is electrically connected to the first terminal of the first capacitor module. The second terminal of the capacitor module is electrically connected to the negative output terminal of the operational amplifier; a second voltage is input to the negative input terminal of the operational amplifier, the negative input terminal of the operational amplifier is grounded, the negative input terminal of the operational amplifier is electrically connected to the first terminal of the second parallel reverse diode module, the second terminal of the second parallel reverse diode module is electrically connected to the first terminal of the second resistor module, the second terminal of the second resistor module is connected to the bias voltage, the third terminal of the second resistor module is electrically connected to the positive output terminal of the operational amplifier, the negative input terminal of the operational amplifier is electrically connected to the first terminal of the second capacitor module, and the second terminal of the second capacitor module is electrically connected to the positive output terminal of the operational amplifier; a common-mode voltage is input to the common-mode input terminal of the operational amplifier. The operational amplifier circuit provided in this embodiment provides a DC path to the positive input terminal of the operational amplifier through the first resistor module and the first parallel reverse diode module, and a DC path to the negative input terminal of the operational amplifier through the second resistor module and the second parallel reverse diode module, to ensure the reliability of the DC path. Furthermore, the common-mode voltage of the input and output is separated by the bias voltage, the first resistor module, and the second resistor module, thereby improving the common-mode rejection ratio.

[0026] Optionally, the first parallel reverse diode module 11 includes a first switch Q1 and a second switch Q2. The first terminal of the first switch Q1 and the first terminal of the second switch Q2 serve as the first terminal of the first parallel reverse diode module 11. The gate of the first switch Q1 is electrically connected to the first terminal of the first switch Q1. The second terminals of the first switch Q1 and the second terminals of the second switch Q2 serve as the second terminal of the first parallel reverse diode module 11. The gate of the second switch Q2 is electrically connected to the second terminal of the second switch Q2.

[0027] Specifically, such as Figure 3As shown, the first terminal of the first switch Q1 and the first terminal of the second switch Q2 are both electrically connected to the positive input terminal of the operational amplifier. When the first switch Q1 and / or the second switch Q2 are turned on, the bias voltage transmitted through the first resistor module to the first parallel reverse diode module 11 is a DC voltage Vp, which is then transmitted to the positive input terminal of the operational amplifier. Therefore, by connecting the first switch Q1 and the second switch Q2 in the first parallel reverse diode module 11 to the positive input terminal of the operational amplifier, a DC path is provided for the positive input terminal of the operational amplifier. Furthermore, the diodes of the first switch Q1 and the second switch Q2 are in opposite directions. These two diodes with opposite directions can both form a DC path and block noise from the first resistor module. The first resistor module can reduce the voltage change across the two diodes, thereby keeping the diodes in a high-impedance state.

[0028] Optionally, the second parallel reverse diode module 12 includes a third switch Q3 and a fourth switch Q4. The first terminals of the third switch Q3 and the fourth switch Q4 serve as the first terminals of the second parallel reverse diode module 12. The gate of the third switch Q3 is electrically connected to the first terminal of the third switch Q3. The second terminals of the third switch Q3 and the fourth switch Q4 serve as the second terminals of the second parallel reverse diode module 12. The gate of the fourth switch Q4 is electrically connected to the second terminal of the fourth switch Q4.

[0029] Specifically, such as Figure 3 As shown, the first terminals of both the third switch Q3 and the fourth switch Q4 are electrically connected to the negative input terminal of the operational amplifier. When the third switch Q3 and / or the fourth switch Q4 are turned on, the bias voltage transmitted through the second resistor module to the second parallel reverse diode module 12 is a DC voltage Vp, which is then transmitted to the negative input terminal of the operational amplifier. Therefore, by connecting the third switch Q3 and the fourth switch Q4 in the second parallel reverse diode module 12 to the negative input terminal of the operational amplifier, a DC path is provided for the negative input terminal of the operational amplifier. Furthermore, the diodes of the third switch Q3 and the fourth switch Q4 are in opposite directions. These two diodes in opposite directions can both form a DC path and block noise from the second resistor module. The second resistor module can reduce the voltage change across the two diodes, thereby keeping the diodes in a high-impedance state.

[0030] Optionally, the first resistor module 31 includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 serves as the first end of the first resistor module 31, the second end of the first resistor R1 serves as the second end of the first resistor module 31, the first end of the first resistor R1 is electrically connected to the first end of the second resistor R2, and the second end of the second resistor R2 serves as the third end of the first resistor module 31.

[0031] Specifically, such as Figure 3 As shown, the first terminal of the first resistor R1 is electrically connected to the second terminal of the first switching transistor Q1, the second terminal of the second switching transistor, and the first terminal of the second resistor R2. The second terminal of the first resistor R1 receives the bias voltage, and the second terminal of the second resistor R2 is electrically connected to the negative output terminal of the operational amplifier. The first resistor R1 and the second resistor R2 divide the bias voltage, and the bias voltage is transmitted to the first parallel reverse diode module after being divided by the first resistor R1.

[0032] Optionally, the voltage at the first terminal of the first resistor R1 and the voltage at the first terminal of the second resistor R2 are both (Vbias-Vcm)×R2 / (R1+R2)+Vcm, where Vbias is the bias voltage and Vcm is the common-mode voltage.

[0033] The voltage at the first terminal of the first resistor R1 and the voltage at the first terminal of the second resistor R2 are both DC voltages Vp, i.e., Vp = (Vbias - Vcm) × R2 / (R1 + R2) + Vcm. The DC voltage Vp is transmitted to the positive input terminal of the operational amplifier through the first parallel reverse diode module.

[0034] Optionally, the second resistor module 32 includes a third resistor R3 and a fourth resistor R4. The first end of the third resistor R3 serves as the first end of the second resistor module 32, and the second end of the third resistor R3 serves as the second end of the second resistor module 32. The first end of the third resistor R3 is electrically connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 serves as the third end of the second resistor module 32.

[0035] Specifically, such as Figure 3 As shown, the first terminal of the third resistor R3 is electrically connected to the second terminal of the third switch Q3, the second terminal of the fourth switch, and the first terminal of the fourth resistor R4. The second terminal of the third resistor R3 receives the bias voltage, and the second terminal of the fourth resistor R4 is electrically connected to the negative output terminal of the operational amplifier. The third resistor R3 and the fourth resistor R4 divide the bias voltage, and the bias voltage is transmitted to the second parallel reverse diode module through the third resistor.

[0036] Optionally, both the first capacitor module 21 and the second capacitor module 22 include multiple parallel branches, each branch including a capacitor and a switch connected in series.

[0037] In this configuration, all branches of the first capacitor module 21 are connected between the positive input and negative output of the operational amplifier. By switching these branches on and off, the on / off state of the branch can be controlled, thereby controlling the capacitance value of the capacitor connected between the positive and negative output of the operational amplifier. Similarly, all branches of the second capacitor module 22 are connected between the negative input and positive output of the operational amplifier. By switching these branches on and off, the on / off state of the branch can be controlled, thereby controlling the capacitance value of the capacitor connected between the negative and positive output of the operational amplifier. For example, both the first capacitor module 21 and the second capacitor module 22 include n parallel branches. Capacitor C1 and switch SW1 are located in the same branch, capacitor C2 and switch SW2 are located in the same branch, and capacitor Cn and switch SWn are located in the same branch. The switches in the branches are gain selection switches, that is, the on and off of the switches affect the gain of the operational amplifier Gain=-Cf / Cin, where Cf is the total capacitance of the conducting branches between the positive input terminal and the negative output terminal of the operational amplifier (which is also the total capacitance of the conducting branches between the negative input terminal and the positive output terminal of the operational amplifier, and the two are the same), and Cin is Cin1 (Cin1=Cin2). The gain of the operational amplifier is adjusted by the on and off of the switches in each branch.

[0038] Optionally, the operational amplifier circuit also includes two input capacitors. The positive input terminal of the operational amplifier receives the first voltage VIP through one of the input capacitors, Cin1, and the negative input terminal of the operational amplifier receives the second voltage VIN through the other input capacitor, Cin2.

[0039] Specifically, the input capacitor Cin1 connected to the positive input terminal of the operational amplifier can filter the first voltage VIP, suppress interference noise, and ensure the stability of the voltage transmitted to the positive input terminal of the operational amplifier; the input capacitor Cin2 connected to the negative input terminal of the operational amplifier can filter the second voltage VIN, suppress interference noise, and ensure the stability of the voltage transmitted to the negative input terminal of the operational amplifier.

[0040] Optionally, the resistance value of the first resistor module 31 is the same as the resistance value of the second resistor module 32.

[0041] Specifically, such as Figure 3 As shown, the resistance value of the first resistor in the first resistor module 31 is the same as the resistance value of the third resistor in the second resistor module 32, and the resistance value of the second resistor in the first resistor module 31 is the same as the resistance value of the fourth resistor in the second resistor module 32, so as to ensure that the DC voltage transmitted to the two input terminals of the operational amplifier after the bias voltage passes through the first resistor and the third resistor respectively is equal.

[0042] Optionally, the common-mode voltage Vcm is one half of the power supply voltage VDD of the operational amplifier. Wherein, the common-mode voltage Vcm is VDD / 2, so that the operational amplifier has a large output swing.

[0043] In an embodiment, taking Figure 1 as an example: the power supply voltage is 1.5V, the resistance of the input resistor R and the feedback resistor Rf are equal, both being 100KΩ; the simulation analysis result is: the output noise is 11.8uV (20-20KHz integration), and resistors contribute 90% of the noise. For the operational amplifier circuit in this embodiment: the power supply voltage VDD is 1.5V, the capacitance Cin and Cf are equal, both being 6pF, the resistance of each resistor in each resistor module is 100kΩ, and Vbias=Vcm; the simulation analysis result is: the output noise is 2.95uV (20-20KHz integration), and the noise is mainly contributed by the operational amplifier. To further save area, the resistance of each resistor in each resistor module can be reduced to 10kΩ, with Vbias=Vcm; the simulation analysis result is: the output noise is 2.95uV (20-20KHz integration), which does not affect the overall noise performance. To increase the output common-mode voltage, the bias voltage Vbias can be increased to 1V, while the common-mode voltage Vcm is still VDD / 2, that is 0.75V, with other conditions remaining unchanged. The simulation analysis result is: the output noise is 3.01uV (20-20KHz integration), which does not have a significant impact on the overall noise performance. The DC voltage at the input terminal of the operational amplifier is 0.875V, and the DC output voltage is 0.75V. Changing the DC voltage at the input terminal of the operational amplifier can be applied to various operational amplifier structures. When the bias voltage Vbias is grounded, if R1=R2, then Vp is Vcm / 2. The voltage Vp is VON×R1 / (R1+R2)=VON / 2, which reduces the dynamic voltage difference between switching tubes and suppresses the influence of output AC signals on common-mode signals. The resistance can be adjusted so that R1<<R2, reducing the influence of noise and output swing. When the bias voltage Vbias is input to the common-mode input terminal of the operational amplifier, during the establishment of the DC path, no current passes through each resistor module, so no power consumption is generated. The AC signal during operation is also suppressed, which can improve the common-mode voltage rejection effect of pseudo-differential input. When the bias voltage Vbias is input to each resistor module, the voltage Vp is (Vbias-Vcm)×R2 / (R1+R2)+Vcm, which can be flexibly controlled and also has a common-mode voltage rejection effect.

[0044] Furthermore, the operational amplifier is a programmable gain operational amplifier (PLA). A PLA is an operational amplifier whose gain can be flexibly configured via an external digital signal. It integrates the signal amplification function of a traditional op-amp with the flexibility of digital control. It allows for rapid switching between different gains without manually changing resistors or adjusting hardware circuitry, and is widely used in scenarios requiring dynamic adjustment of signal amplification, such as sensor signal acquisition, industrial automation, and medical equipment. Essentially, a PLA changes the closed-loop gain of the op-amp by digitally controlling switches to change the resistors (or capacitors) in the feedback network. The core structure of a PLA is based on an operational amplifier and a programmable resistor network, and the gain calculation formula is consistent with the closed-loop gain logic of traditional op-amps. The PLA is a key device connecting analog signals and digital control; its core value lies in the flexible configuration of gain through digital means.

[0045] Furthermore, the parameters of a programmable gain operational amplifier (PLA), such as its programmable gain range, gain accuracy, bandwidth, and common-mode rejection ratio (CMRR), affect its performance. For example, the programmable gain range of a PLA is 1~128 or 0.5~64, with configurable minimum and maximum gain values, which must cover the dynamic range of the actual signal (e.g., high gain for small signals and low gain for large signals). The gain accuracy of a PLA is the deviation between the actual gain and the theoretical gain (usually expressed as ±% or ±ppm). High-precision acquisition scenarios (such as medical equipment and industrial sensors) require low deviation to avoid signal distortion. The bandwidth of a PLA is a derived parameter of the gain-bandwidth product, i.e., the effective bandwidth at a specific gain. Higher gain results in lower bandwidth, requiring a balance between gain and bandwidth. A higher CMRR results in better circuit performance. Industrial environments and medical equipment require a higher CMRR (e.g., above 80dB) to suppress power supply interference and environmental noise. Programmable gain operational amplifiers (PLA) are irreplaceable in scenarios requiring dynamic adjustment of signal amplitude due to their core advantage of programmable gain. They can be applied in sensor signal acquisition, industrial automation and process control, medical electronic devices, and audio processing. In sensor signal acquisition (e.g., industrial pressure / temperature sensors, medical heart rate sensors, environmental monitoring gas sensors): sensor output signals typically have a large dynamic range (e.g., temperature sensors output 0~10mV, pressure sensors output 0~5V). PDAs need to adjust the gain according to the signal amplitude to match the input range of the analog-to-digital converter (e.g., 0~3.3V), avoiding accuracy loss due to signal oversaturation or undersaturation. In industrial environments (e.g., analog input modules of programmable logic controllers, current / voltage detection in motor control), signals are susceptible to interference and exhibit large amplitude fluctuations. High common-mode rejection ratios (CMRR) are required to suppress interference, and gain switching is needed to adapt to sensors with different ranges (e.g., high gain for low-range pressure sensors, low gain for high-range sensors). Medical devices (e.g., electrocardiographs, blood pressure monitors, portable medical testing equipment) have extremely high requirements for signal accuracy and anti-interference. Programmable gain operational amplifiers (PLA) need to possess high common-mode rejection ratio (CMRR) and low noise characteristics, while also adapting to the signal strength of different patients through programmable gain. The amplitude of audio signals from audio devices (e.g., Bluetooth headsets, voice recorders, car stereos) varies with the scene (e.g., voice signals versus music signals). PLAs can achieve digital volume control (replacing traditional potentiometers) or adapt to microphones of different sensitivities during audio acquisition (high-sensitivity microphones require low gain, and low-sensitivity microphones require high gain). The operational amplifier circuit in this embodiment can be applied to sensors for audio communication, such as silicon microphone sensors.

[0046] The operational amplifier circuit provided in this embodiment includes: an operational amplifier, a first parallel reverse diode module, a second parallel reverse diode module, a first capacitor module, a second capacitor module, a first resistor module, and a second resistor module. A first voltage is input to the positive input terminal of the operational amplifier. The positive input terminal of the operational amplifier is electrically connected to the first terminal of the first parallel reverse diode module. The second terminal of the first parallel reverse diode module is electrically connected to the first terminal of the first resistor module. A bias voltage is applied to the second terminal of the first resistor module. The third terminal of the first resistor module is electrically connected to the negative output terminal of the operational amplifier. The positive input terminal of the operational amplifier is electrically connected to the first terminal of the first capacitor module. The second terminal of the first capacitor module is electrically connected to the negative output terminal of the operational amplifier. A second voltage is input to the negative input terminal of the operational amplifier. The negative input terminal of the operational amplifier is grounded through a capacitor. The negative input terminal of the device is electrically connected to the first terminal of the second parallel reverse diode module, the second terminal of the second parallel reverse diode module is electrically connected to the first terminal of the second resistor module, the second terminal of the second resistor module is connected to a bias voltage, the third terminal of the second resistor module is electrically connected to the positive output terminal of the operational amplifier, the negative input terminal of the operational amplifier is electrically connected to the first terminal of the second capacitor module, and the second terminal of the second capacitor module is electrically connected to the positive output terminal of the operational amplifier; the common-mode input terminal of the operational amplifier receives a common-mode voltage; the first parallel reverse diode module includes a first switch and a second switch, the second parallel reverse diode module includes a third switch and a fourth switch, the first resistor module includes a first resistor and a second resistor, the second resistor module includes a third resistor and a fourth resistor, and both the first capacitor module and the second capacitor module include multiple parallel branches, each branch including a capacitor and a switch connected in series. The operational amplifier circuit provided in this embodiment provides a DC path for the positive input terminal of the operational amplifier through a first resistor module and a first parallel reverse diode module, and a DC path for the negative input terminal of the operational amplifier through a second resistor module and a second parallel reverse diode module, to ensure the reliability of the DC path. It also improves the common-mode rejection ratio by separating the input and output common-mode voltages through a bias voltage, the first resistor module, and the second resistor module. Furthermore, by setting the bias voltage, the common-mode input voltage can be designed more flexibly without changing the common-mode output voltage, making the operational amplifier circuit applicable to various low-voltage application scenarios. A pair of reverse diodes (diodes in the first parallel reverse diode module) are connected between the first and second resistors, and a pair of reverse diodes (diodes in the second parallel reverse diode module) are connected between the third and fourth resistors. In DC mode, the diode voltage difference is zero, resulting in high impedance, which prevents resistor noise from being introduced into the operational amplifier output. During operation, the presence of resistors effectively reduces the variation of the output signal across the diodes, thereby reducing the nonlinear effect of diode impedance.

[0047] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, rearrangements, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments. Many other equivalent embodiments may be included without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An operational amplifier circuit, characterized in that, include: Operational amplifier, first parallel reverse diode module, second parallel reverse diode module, first capacitor module, second capacitor module, first resistor module and second resistor module; Wherein, the operational amplifier receives a first voltage at its positive input terminal, is electrically connected to the first terminal of the first parallel reverse diode module, is electrically connected to the first terminal of the first resistor module, is connected to the second terminal of the first resistor module, is connected to a bias voltage at its second terminal, is electrically connected to the negative output terminal of the operational amplifier, is electrically connected to the first terminal of the first capacitor module, and is electrically connected to the negative output terminal of the operational amplifier; the operational amplifier receives a first voltage at its positive input terminal, is electrically connected to the first terminal of the first capacitor module, and is electrically connected to the negative output terminal of the operational amplifier. The operational amplifier receives a second voltage at its negative input terminal, which is grounded via a capacitor. The negative input terminal is electrically connected to the first terminal of the second parallel reverse diode module, and the second terminal of the second parallel reverse diode module is electrically connected to the first terminal of the second resistor module. The second terminal of the second resistor module is connected to the bias voltage, and the third terminal of the second resistor module is electrically connected to the positive output terminal of the operational amplifier. The negative input terminal of the operational amplifier is electrically connected to the first terminal of the second capacitor module, and the second terminal of the second capacitor module is electrically connected to the positive output terminal of the operational amplifier. A common-mode voltage is input to the common-mode input terminal of the operational amplifier.

2. The operational amplifier circuit according to claim 1, characterized in that, The first parallel reverse diode module includes a first switch and a second switch. The first terminal of the first switch and the first terminal of the second switch serve as the first terminal of the first parallel reverse diode module. The gate of the first switch is electrically connected to the first terminal of the first switch. The second terminal of the first switch and the second terminal of the second switch serve as the second terminal of the first parallel reverse diode module. The gate of the second switch is electrically connected to the second terminal of the second switch.

3. The operational amplifier circuit according to claim 1, characterized in that, The second parallel reverse diode module includes a third switch and a fourth switch. The first terminals of the third switch and the fourth switch serve as the first terminals of the second parallel reverse diode module. The gate of the third switch is electrically connected to the first terminal of the third switch. The second terminals of the third switch and the fourth switch serve as the second terminals of the second parallel reverse diode module. The gate of the fourth switch is electrically connected to the second terminal of the fourth switch.

4. The operational amplifier circuit according to claim 1, characterized in that, The first resistor module includes a first resistor and a second resistor. The first end of the first resistor serves as the first end of the first resistor module, and the second end of the first resistor serves as the second end of the first resistor module. The first end of the first resistor is electrically connected to the first end of the second resistor, and the second end of the second resistor serves as the third end of the first resistor module.

5. The operational amplifier circuit according to claim 4, characterized in that, The voltage at the first terminal of the first resistor R1 and the voltage at the first terminal of the second resistor R2 are both (Vbias-Vcm)×R2 / (R1+R2)+Vcm, where Vbias is the bias voltage and Vcm is the common-mode voltage.

6. The operational amplifier circuit according to claim 1, characterized in that, The second resistor module includes a third resistor and a fourth resistor. The first end of the third resistor serves as the first end of the second resistor module, and the second end of the third resistor serves as the second end of the second resistor module. The first end of the third resistor is electrically connected to the first end of the fourth resistor, and the second end of the fourth resistor serves as the third end of the second resistor module.

7. The operational amplifier circuit according to claim 1, characterized in that, Both the first capacitor module and the second capacitor module include multiple parallel branches, and each branch includes a capacitor and a switch connected in series.

8. The operational amplifier circuit according to claim 1, characterized in that, It also includes two input capacitors. The positive input terminal of the operational amplifier receives the first voltage through one of the input capacitors, and the negative input terminal of the operational amplifier receives the second voltage through the other input capacitor.

9. The operational amplifier circuit according to claim 1, characterized in that, The resistance value of the first resistor module is the same as the resistance value of the second resistor module.

10. The operational amplifier circuit according to claim 1, characterized in that, The common-mode voltage is half the power supply voltage of the operational amplifier.

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