A direct current resistance voltage difference detection starting circuit

Abstract

The utility model discloses a kind of based on DC resistance voltage difference detection starting circuit, it is related to integrated circuit technical field, the starting circuit includes control circuit module, DC resistance voltage difference detection circuit and resistance circuit.Through the DC voltage difference of detecting branch resistance in band gap reference core circuit, whether circuit is in degenerate point state is judged, and output control signal drives key node to separate zero current mode, reliable starting is realized.The DC resistance voltage difference detection circuit adopts five-tube OTA structure, and its tail current source is made of PMOS pipe working in linear region, and low-power consumption design is realized by adjusting MOS pipe size.The utility model does not need complex control logic, with low power consumption, small area, stability and other advantages, suitable for high integrated circuit of power consumption and stability requirement.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit technology, specifically to a start-up circuit based on DC resistance differential voltage detection. Background Technology

[0002] Reference circuits are critical modules in analog circuits, mixed-signal integrated circuits, and system-on-a-chip (SoC). Their accuracy and stability directly determine the accuracy of the entire system. Reference current, as a crucial output parameter of the reference circuit, provides a stable current reference for subsequent circuits, which is essential for ensuring the performance of the entire circuit system. Traditional reference circuits have a "degenerate" bias point, meaning that all transistors transmit zero current upon power-up. The circuit may remain in this state, preventing normal startup. A startup circuit is needed to guide the bias circuit from the "zero current" mode at power-up to the normal operating mode. Some reference circuits may be affected by factors such as power supply voltage fluctuations, power-up speed, and noise during startup, leading to unstable startup or abnormalities.

[0003] With the development of electronic technology, modern electronic systems are placing increasingly stringent demands on the power consumption of reference circuits. For example, in applications such as portable electronic devices and IoT devices, it is necessary to minimize circuit power consumption to extend battery life or meet the demands of energy-constrained operating environments. Therefore, it is necessary to design bandgap reference startup circuits that can operate at low power consumption, and that can start up normally without being affected by factors such as power supply voltage fluctuations or power-on speed, thereby reducing power consumption. Utility Model Content

[0004] Therefore, this utility model provides a DC resistance differential voltage detection start-up circuit to solve the above problems.

[0005] To solve the above-mentioned technical problems, this utility model provides a DC resistance differential voltage detection start-up circuit, including a control circuit module and a DC resistance differential voltage detection circuit, such as... Figure 2 As shown; the DC resistance differential voltage detection circuit includes PMOS transistors P4, P5, P6, P7 and NMOS transistors M4, M5; the control circuit module includes NMOS transistors M2, M3 and PMOS transistor P3; the resistor circuit includes R1 and R2;

[0006] The DC resistance differential voltage detection circuit is used to detect the voltage difference of the resistors in the core circuit of the bandgap reference and output a control signal;

[0007] The control circuit module drives the bandgap reference circuit away from the degeneracy point according to the control signal;

[0008] The resistor circuit is connected in series in a branch of the bandgap reference core circuit.

[0009] Furthermore, resistors R1 and R2 are connected in series. One end of R1 is connected to the collector of transistor Q2, and the other end is connected to resistor R2. The other end of R2 is connected to the drain of P2.

[0010] Furthermore, in the five-transistor OTA, P4 and P5 serve as input transistors. The gate of P4 is connected to the drain of P2, and the gate of P5 is connected to the common node of R1 and Q2. P6 and P7 act as the tail current source of the five-transistor OTA, providing current. The gates of P6 and P7 are grounded through resistor R3. The source of P7 is connected to the power supply voltage, and its drain is connected to the source of P6. The drain of P6 is connected to the sources of P4 and P5. NMOS transistors M4 and M5 serve as active load current mirrors. M5 is in diode configuration, and the gates of M4 and M5 are connected. The sources of M4 and M5 are grounded. In addition, the dimensions of M4 and M5 are different, with M4 being half the size of M5. The drain of M4 is connected to the drain of P4, outputting the output signal of the DC resistance voltage difference detection circuit to control the start-up.

[0011] Furthermore, the control circuit module includes NMOS transistors M2 and M3, and PMOS transistor P3, wherein P3 is in diode configuration, its gate is connected to the gates of P1 and P2, and its source is connected to the power supply. The drain and gate of NMOS transistor M2 are shorted and connected to the output terminal of the five-transistor OTA, i.e., the drains of P4 and M4. The gate of M3 is connected to the gate of M2, and the drain of M3 is connected to the diode connection node of P3. The source of M3 is grounded.

[0012] The method described in the DC resistance voltage difference detection startup circuit for helping the reference voltage generation circuit overcome the degeneracy point and stabilize in normal operation upon power-up is as follows: When the circuit is in the degeneracy point state, i.e., no current flows through the circuit, the DC voltage difference between resistors R1 and R2 is zero. At this time, the input voltage of the input transistor in the five-transistor OTA is zero, and the input transistor is turned on. Since the two transistors used as active load current mirrors have different sizes, the output signal of the drain of M4, i.e., the DC resistance voltage difference detection circuit, is high, thereby driving transistor M3 to turn on and inject current into the bandgap reference, thus breaking the degeneracy point state. When the bandgap reference circuit stabilizes in normal operation, a voltage difference exists across the resistors, resulting in a voltage difference between the differential input transistors of the five-transistor OTA, causing the output to go low, thus turning off M3. This achieves extremely low power consumption by controlling the size of the transistors in the five-transistor OTA that act as the tail current source.

[0013] Compared with existing technologies, this invention has the following advantages and effects: This invention provides a startup circuit based on DC resistance voltage difference detection. It employs a control circuit module composed of a five-transistor OTA and three MOSFETs. By detecting the voltage difference across the resistor in the bandgap reference core circuit, it breaks the degeneracy point state, thus avoiding the instability or abnormalities caused by power supply voltage fluctuations, power-on speed, noise, etc., thereby improving stability. Simultaneously, the power consumption of the startup circuit can be achieved to be extremely low by controlling the size of the MOSFETs. Furthermore, after startup is complete, the startup transistors automatically turn off due to the voltage difference across the resistor. Attached Figure Description

[0014] Figure 1 This utility model provides a schematic diagram of the module connection of a DC resistance differential voltage detection start-up circuit.

[0015] Figure 2 This utility model provides a schematic diagram of the specific circuit connection of a DC resistance differential voltage detection start-up circuit.

[0016] Figure 3 This is a schematic diagram of the power supply voltage waveform during the power-on process of this utility model.

[0017] Figure 4 This is a waveform diagram of the gate voltage of the bandgap reference core circuit during the power-on process of this utility model. Detailed Implementation

[0018] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0019] Figure 1 The diagram shows the connection of the bandgap reference startup circuit module based on DC resistance differential voltage detection. OPA1 is a clamping operational amplifier, and OPA2 is a DC resistance differential voltage detection circuit. This DC resistance differential voltage detection circuit determines whether the bandgap reference is in a degeneracy point state by detecting the voltage difference of the resistors on the core circuit of the bandgap reference. Finally, the output signal causes the control circuit module composed of M2, M3, and P3 to determine the output control signal to break the degeneracy point state.

[0020] The specific working process of the starting circuit of this utility model is as follows: When the circuit is in the degeneracy point state, that is, the current in the internal circuit of the bandgap reference core circuit is zero, and the voltage difference across resistors R1 and R2 is also zero, so that P4 and P5 are turned on. The size of P4 and P5 is equal, so ID4 = ID5. At the same time, the size of the active load current mirror M4 is set to be half that of M5. At this time, the current flowing through M4 will be less than the current flowing through P4. In order to adapt to the current source formed by M4, P4 enters the linear region, so that the drain output voltage of P4 and M4 is high, which turns on M2 and M3, injecting current into the bandgap core circuit to break the degeneracy point state.

[0021] After the circuit starts up, current flows through resistors R1 and R2, resulting in a voltage drop. At this time, the gate voltage of P4 is higher than the gate voltage of P5, i.e., |Vgs4| < |Vgs5|. Therefore, the current flowing through P5 is greater than the current flowing through P4. Although the size of M4 is half that of M5, the current flowing through M4 is still greater than the current flowing through P4. Therefore, in order to accommodate the current flowing through P4, M4 enters the linear region, and the drain output voltages of M4 and P4 are low, thus turning off M2 and M3. At this time, the working state and function of the reference core circuit will not be affected by the startup circuit.

[0022] Figure 3 and Figure 4 The simulation results of the actual circuit are shown.

[0023] Figure 3 This demonstrates the actual circuit when a step signal from 0V to 1.8V is applied to the power supply terminal. The first 1µs is the delay time of the step signal, the next 1µs to 2µs is the power-on time, and after 2µs, the power supply voltage remains constant at 1.8V.

[0024] Figure 4 This paper presents the waveform changes of the gate potential of the current mirror in the core circuit of the bandgap reference during simulation. Within the first 1µs delay, the gate potentials of P1, P2, and P3 gradually increase with the power supply voltage, reaching their maximum at 2µs upon power-up completion. At this point, P1, P2, and P3 are in the off state, and there is no voltage difference across the resistor. Within 2µs to 3µs, the DC differential voltage detection circuit outputs a high level, driving M3 to conduct, thereby pulling down the gate voltages of P1, P2, and P3, breaking the degeneracy point state. After 3µs, current flows through the resistor, creating a voltage difference, causing the DC differential voltage detection circuit to output a low level, and M3 to turn off. Finally, the negative feedback loop of the bandgap reference stabilizes the gate voltages of P1, P2, and P3 at approximately 1.05V, and the bandgap reference operates normally.

[0025] The DC resistance differential voltage detection start-up circuit provided in this embodiment of the utility model has the following advantages:

[0026] 1. This utility model embodiment achieves startup through a resistance voltage difference detection mechanism, without the need for additional complex control logic, effectively reducing power consumption and area resources.

[0027] 2. This utility model improves stability by detecting the voltage difference of the resistors in the core circuit of the bandgap reference, thus breaking the degeneracy point state and avoiding the influence of power supply voltage fluctuations, power-on speed, noise, and other factors that could lead to unstable startup or abnormalities.

[0028] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A start-up circuit based on DC resistance differential voltage detection, characterized in that, Includes a control circuit module, a DC resistance differential voltage detection circuit, and a resistance circuit; The DC resistance differential voltage detection circuit is used to detect the voltage difference of the resistors in the core circuit of the bandgap reference and output a control signal; The control circuit module drives the bandgap reference circuit away from the degeneracy point according to the control signal; The resistor circuit is connected in series in a branch of the bandgap reference core circuit.

2. The DC resistance differential voltage detection start-up circuit according to claim 1, characterized in that, The DC resistance differential voltage detection circuit includes PMOS transistors P4, P5, P6, and P7, and NMOS transistors M4 and M5; In this circuit, PMOS transistors P4 and P5 serve as input transistors, NMOS transistors M4 and M5 serve as active load current mirrors, and PMOS transistors P6 and P7 serve as tail current sources. The output voltage of the detection circuit is determined by detecting the voltage difference across the resistor in the resistor circuit and by ensuring that the two active load current mirror transistors are of different sizes. Simultaneously, low power consumption is achieved by controlling the size of the tail current source transistor.

3. The DC resistance differential voltage detection start-up circuit according to claim 2, characterized in that, The control circuit module includes NMOS transistors M2 and M3 and PMOS transistor P3; In this circuit, the gate and drain of NMOS transistor M2 are shorted together and connected to the output terminal of the DC resistance voltage difference detection circuit, namely the drain of PMOS transistor P4 and NMOS transistor M4; the gate of NMOS transistor M3 is connected to the gate of NMOS transistor M2; and the gate and drain of PMOS transistor P3 are shorted together and connected to the drain of NMOS transistor M3.

4. The DC resistance differential voltage detection start-up circuit according to claim 1, characterized in that, The resistor circuit includes resistor R1 and resistor R2; Among them, resistors R1 and R2 are connected in series in one branch of the bandgap reference core circuit.

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