Semiconductor device, semiconductor package device, and image sensor
Patent Information
- Application Number
- CN202522099938.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-28
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2035-09-28
AI Technical Summary
In existing IBGA packaging technology, the method of applying LES adhesive by dotting is inefficient, costly, and results in poor product appearance and difficulty in protecting the glass cover surface.
The package is made by injection molding, which forms the package around the transparent cover, sealing ring and chip, instead of the traditional LES glue. This ensures a smooth upper surface of the package and improves production efficiency and yield.
It improves production efficiency and product consistency, reduces packaging costs, and protects the surface of the transparent cover, thus addressing the shortcomings of traditional packaging methods.
Smart Images
Figure CN224936090U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the technical field of photosensitive chips, and in particular to a semiconductor device, a semiconductor packaging device, and an image sensor. Background Technology
[0002] Currently, the IBGA (Image Ball Grid Array) solution is widely used in image sensor chip packaging. This solution uses liquid adhesive to achieve liquid encapsulation sealing (LES), greatly improving chip reliability. During the packaging process, a dispensing machine is used to spray liquid resin adhesive onto the sides of the glass-capped chip. The liquid flow of the adhesive covers and encapsulates the chip except for the image sensing area, thereby protecting the gold wires and the chip itself.
[0003] However, in the current packaging process, the LES process is performed through dispensing. Therefore, each time, the dispensing head needs to move around the perimeter of a single chip to spray adhesive. Furthermore, to control the amount of adhesive, high speed and precision are required for spraying, resulting in low efficiency and high overall packaging costs. Moreover, the fluidity of the liquid adhesive creates an irregular curved surface on the outer surface of the encapsulated material, leading to poor product appearance consistency and hindering subsequent protection of the glass cap surface. Utility Model Content
[0004] In view of this, the present invention provides a semiconductor device with a relatively flat surface, which is beneficial for subsequent testing and protection of the transparent cover plate surface.
[0005] A semiconductor device includes a substrate, at least one chip, at least one transparent cover, at least one sealing ring, and an integrally formed package by injection molding. The chip is electrically connected to the substrate, the transparent cover is disposed vertically opposite to the chip, the sealing ring is connected between the transparent cover and the chip, the package is circumferentially disposed around the transparent cover, the sealing ring and the chip, the lower surface of the package is connected to the substrate, and the upper surface of the package is planar.
[0006] Optionally, the upper surface of the package and the surface of the transparent cover are on the same plane.
[0007] Optionally, the semiconductor device further includes leads, one end of which is electrically connected to the substrate and the other end of which is electrically connected to the chip, the leads being embedded in the package.
[0008] Optionally, the sealing ring covers the connection between the lead and the chip, and the lead is at least partially embedded in the sealing ring.
[0009] Optionally, there is a gap between the sealing ring and the package body, and the connection part between the lead and the chip is located in the gap.
[0010] Optionally, the surface of the transparent cover plate is provided with an annular groove, which is correspondingly provided with the sealing ring.
[0011] Optionally, the sealing ring is made of a black light-absorbing material.
[0012] Optionally, the sealing ring is made of the same material as the package body, and the package body and the sealing ring are connected as one piece.
[0013] Optionally, the sealing ring is made of a transparent material; the encapsulation body is integrally injection molded from a black light-absorbing material.
[0014] Optionally, the semiconductor device further includes a plurality of connecting balls electrically connected to the lower surface of the substrate.
[0015] This application also relates to a semiconductor packaging apparatus for injection molding the package onto the aforementioned semiconductor device; the semiconductor packaging apparatus includes an upper mold, a lower mold, and an injection device, the upper mold covering the lower mold, at least one injection cavity being formed between the upper mold and the lower mold, the semiconductor device being disposed in the injection cavity, and the injection device being used to inject liquid packaging material into the injection cavity, the cooled packaging material forming the package covering the periphery of the semiconductor device.
[0016] Optionally, when the upper mold and the lower mold are closed, the substrate is disposed on the lower mold, and the surface of the transparent cover plate is in contact with the inner surface of the upper mold.
[0017] Optionally, the inner surface of the upper mold is provided with a buffer film; when the upper mold and the lower mold are closed, the surface of the transparent cover plate is in contact with the buffer film.
[0018] This application also relates to an image sensor, including the aforementioned semiconductor device.
[0019] This invention relates to a semiconductor device formed by injection molding around a transparent cover, a sealing ring, and a chip, replacing the traditional method of applying LES adhesive. This significantly improves production capacity and yield, resulting in better product shape consistency. It not only facilitates manufacturing but also reduces packaging costs. Since the package is integrally molded in a mold, it is crucial to ensure contact between the transparent cover and the mold's inner wall during injection molding to prevent contamination of the cover by the packaging material. Therefore, the upper surface of the injection-molded package is flat, resulting in a smoother surface for the packaged semiconductor device, which is beneficial for subsequent testing and protects the transparent cover surface. Attached Figure Description
[0020] Figure 1 This is a cross-sectional structural schematic diagram of the semiconductor device according to the first embodiment of this application.
[0021] Figures 2a to 2d This is a schematic diagram of the manufacturing process of the semiconductor device of this application.
[0022] Figure 3 This is a cross-sectional structural schematic diagram of a semiconductor device according to the second embodiment of this application.
[0023] Figure 4 This is a cross-sectional structural schematic diagram of a semiconductor device according to the third embodiment of this application.
[0024] Figures 5 to 8 The diagram shows a process flow diagram of a semiconductor packaging device forming a package on a semiconductor device by injection molding.
[0025] Figure 9 This is a schematic diagram of the structure after the semiconductor device has been removed from the semiconductor packaging device. Detailed Implementation
[0026] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.
[0027] In the following description, reference is made to the accompanying drawings, which illustrate several embodiments of the present application. It should be understood that other embodiments may also be used, and changes in mechanical composition, structure, electrical and operational aspects may be made without departing from the spirit and scope of the present application. The following detailed description should not be considered limiting, and the terminology used herein is for describing particular embodiments only and is not intended to limit the present application.
[0028] Although the terms first, second, etc., are used in some instances to describe various elements herein, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.
[0029] Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context indicates otherwise. It should be further understood that the terms “comprising” or “including” indicate the presence of features, steps, operations, elements, components, items, kinds, etc.
[0030] And / or groups, but not excluding the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are to be interpreted inclusively, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of the following: A; B; C; A and B; A and C; B and C; A, B, and C”. Exceptions to this definition occur only when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.
[0031] First Embodiment
[0032] Figure 1 This is a cross-sectional structural schematic diagram of the semiconductor device according to the first embodiment of this application, as shown below. Figure 1 As shown, the semiconductor device includes a substrate 11, at least one chip 12 (semiconductor chip), at least one transparent cover plate 13, at least one sealing ring 14, and a package 15. The chip 12 is electrically connected to the substrate 11. The transparent cover plate 13 is disposed vertically opposite to the chip 12. The sealing ring 14 is connected between the transparent cover plate 13 and the chip 12. The package 15 is circumferentially disposed around the transparent cover plate 13, the sealing ring 14, and the chip 12. The lower surface of the package 15 is connected to the substrate 11, and the upper surface of the package 15 is planar. In this embodiment, the package 15 is used to seal and protect the substrate 11, the transparent cover plate 13, the sealing ring 14, and the chip 12.
[0033] The semiconductor device of this application forms a package 15 by injection molding around a transparent cover plate 13, a sealing ring 14, and a chip 12, replacing the traditional method of applying LES adhesive. This significantly improves production capacity and yield, resulting in better product shape consistency. It not only facilitates manufacturing but also reduces packaging costs. The package 15 is formed by injection molding. Since the package 15 is integrally molded in a mold, it is necessary to ensure that the transparent cover plate 13 is in contact with the inner wall of the mold during injection molding to prevent contamination of the transparent cover plate 13 by the packaging material. Therefore, the upper surface of the injection-molded package 15 is flat, resulting in a smoother surface for the packaged semiconductor device, which is beneficial for subsequent testing and protecting the surface of the transparent cover plate 13.
[0034] Optionally, such as Figure 1As shown, the upper surface of the package 15 is flush with the surface of the transparent cover 13. Since the upper surface of the package 15 is flush with the surface of the transparent cover 13, the surface flatness of the semiconductor device is improved, which is beneficial to protecting the surface of the transparent cover 13.
[0035] Optionally, the substrate 11 serves as an intermediate carrier between the chip 12 and the external circuitry; the substrate 11 is made of materials such as ceramic, organic materials, flexible printed circuits (FPC), glass, or silicon. An adhesive layer 111 is disposed on the upper surface of the substrate 11, and the chip 12 is fixed to the substrate 11 by the adhesive layer 111; the material of the adhesive layer 111 is selected from one of epoxy-based, acrylic-based, or silicone-based paste materials or die attach film (DAF).
[0036] Optionally, the transparent cover 13 is a glass plate; the transparent cover 13 is positioned opposite the chip 12, the transparent cover 13 covers the photosensitive area of the chip 12, and the sealing ring 14 is positioned around the photosensitive area.
[0037] In other embodiments, the transparent cover 13 may be made of one of the following materials: borosilicate glass, crystal plate, or resin transparent plate.
[0038] Optionally, the semiconductor device further includes a lead 16, one end of which is electrically connected to the substrate 11, and the other end of which is electrically connected to the chip 12. The lead 16 is embedded in the package 15. In this embodiment, the lead 16 is, for example, a gold wire or a copper wire, but is not limited thereto.
[0039] In another embodiment, the substrate 11 and the chip 12 can be electrically connected by side wiring or by flip-chip mounting of the chip 12.
[0040] Optionally, the sealing ring 14 covers the connection portion between the lead 16 and the chip 12, and the lead 16 is at least partially embedded in the sealing ring 14. Since the sealing ring 14 in this embodiment covers the connection portion between the lead 16 and the chip 12, the stability of the connection between the lead 16 and the chip 12 can be improved.
[0041] Optionally, the semiconductor device further includes a plurality of connecting balls 17 electrically connected to the lower surface of the substrate 11.
[0042] Optionally, the sealing ring 14 is made of a black light-absorbing material. The semiconductor device of this application includes a light-absorbing sealing ring 14, which can absorb scattered light from the edge of the chip 12, thus solving the problem of flare (glare) at the edge of the chip 12. In this embodiment, the material of the sealing ring 14 is, for example, one of black epoxy resin, acrylic resin, or silicone resin, but is not limited thereto.
[0043] Optionally, the sealing ring 14 and the package 15 are made of the same material, and the package 15 and the sealing ring 14 are connected as one piece. In this embodiment, the package 15 and the sealing ring 14 are made of the same material, that is, both are made of black light-absorbing material; when the package 15 is injection molded, the package 15 can be firmly connected to the sealing ring 14, which helps to avoid the risk of cracks or delamination due to the difference in materials.
[0044] Optionally, the sealing ring 14 is made of a transparent material, such as a transparent resin material; the package 15 is integrally injection molded from a black light-absorbing material, such as black epoxy resin, acrylic resin, or silicone resin. In this embodiment, the scattered light from the edge of the chip 12 can be absorbed by the package 15 through the sealing ring 14, which can solve the problem of flare at the edge of the chip 12.
[0045] Optionally, Figures 2a to 2d This is a schematic diagram of the fabrication process of the semiconductor device of this application. Please refer to it. Figures 1 to 2d The fabrication steps of semiconductor devices include:
[0046] The pre-cut individual chips 12 are attached to the substrate 11 using an adhesive layer 111, such as... Figure 2a As shown;
[0047] The chip 12 is electrically connected to the substrate 11 using lead 16, such as... Figure 2b As shown;
[0048] A sealing ring 14 is formed on the surface of chip 12. The photosensitive area of chip 12 is located within the area surrounded by the sealing ring 14. A transparent cover plate 13 is connected to the sealing ring 14, forming a closed space between the transparent cover plate 13, the sealing ring 14, and chip 12. Figure 2c As shown;
[0049] A ring of encapsulation 15 is injection molded around the transparent cover 13, the sealing ring 14, and the chip 12, as shown below. Figure 2d As shown;
[0050] A plurality of connecting balls 17 are disposed on the lower surface of the substrate 11, and each connecting ball 17 is electrically connected to the substrate 11, such as... Figure 1 As shown.
[0051] Second Embodiment
[0052] Figure 3 This is a cross-sectional view of the semiconductor device according to the second embodiment of this application, as shown below. Figure 3 As shown, the semiconductor device in this embodiment has a structure that is largely the same as that in the first embodiment, except that the relative arrangement of the sealing ring 14 and the lead 16 is different.
[0053] Optionally, such as Figure 3 As shown, there is a gap 101 between the sealing ring 14 and the package 15, and the connection part between the lead 16 and the chip 12 is located in the gap 101.
[0054] Third Embodiment
[0055] Figure 4 This is a cross-sectional structural schematic diagram of the semiconductor device according to the third embodiment of this application, as shown below. Figure 4 As shown, the semiconductor device in this embodiment has a structure that is largely the same as that in the first embodiment, except that the local structure of the transparent cover plate 13 is different.
[0056] Optionally, the surface of the transparent cover plate 13 is provided with an annular groove 102. Optionally, the annular groove 102 is correspondingly provided with the sealing ring 14. For example, the center of the cross-sectional view of the annular groove 102 corresponds to the center of the sealing ring 14 corresponding to the cross-sectional view. In this embodiment, the annular groove 102 is used to prevent the encapsulation material from flowing to the middle of the transparent cover plate 13, thereby avoiding contamination of the photosensitive area.
[0057] Fourth embodiment
[0058] Figures 5 to 8 The diagram shown illustrates the process of forming a package on a semiconductor device using a semiconductor packaging apparatus. Figure 9 This is a schematic diagram showing the structure after the semiconductor device has been removed from the semiconductor packaging device. Please refer to [the diagram]. Figures 5 to 9 The semiconductor packaging apparatus is used to injection mold a package 15 onto the aforementioned semiconductor device. The semiconductor packaging apparatus includes an upper mold 21, a lower mold 22, and an injection device (not shown). The upper mold 21 covers the lower mold 22, and at least one injection cavity 103 is formed between the upper mold 21 and the lower mold 22. The semiconductor device is disposed in the injection cavity 103. The injection device is used to inject liquid packaging material into the injection cavity 103. The cooled packaging material forms a package 15 covering the periphery of the semiconductor device.
[0059] Optionally, such as Figure 7 As shown, when the upper mold 21 and the lower mold 22 are closed, the substrate 11 is placed on the lower mold 22, and the surface of the transparent cover plate 13 is in contact with the inner surface of the upper mold 21. When liquid encapsulation material is injected into the injection cavity 103, the encapsulation material fills the gap in the injection cavity 103, and the upper surface of the encapsulated body 15 formed by cooling is flat, and the upper surface of the encapsulated body 15 is on the same plane as the surface of the transparent cover plate 13.
[0060] Optionally, a buffer membrane is provided on the inner surface of the upper mold 21; when the upper mold 21 and the lower mold 22 are closed, the surface of the transparent cover plate 13 comes into contact with the buffer membrane. In this embodiment, the buffer membrane is, for example, a rubber membrane, used to prevent the transparent cover plate 13 from being scratched.
[0061] Optionally, such as Figure 9 As shown, a plurality of chips 12, a plurality of sealing rings 14 and a plurality of transparent covers 13 are electrically connected to the substrate 11. A package 15 is formed on the periphery of each chip 12, each sealing ring 14 and each transparent cover 13 to protect each device.
[0062] Fifth embodiment
[0063] This application also relates to an image sensor, including the aforementioned semiconductor device.
[0064] The image sensor in this embodiment is, for example, a CMOS image sensor (CIS).
[0065] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.
Claims
1. A semiconductor device, characterized in that, The device includes a substrate, at least one chip, at least one transparent cover, at least one sealing ring, and a package. The chip is electrically connected to the substrate. The transparent cover is disposed vertically opposite to the chip. The sealing ring is connected between the transparent cover and the chip. The package is disposed circumferentially around the transparent cover, the sealing ring, and the chip. The lower surface of the package is connected to the substrate, and the upper surface of the package is planar.
2. The semiconductor device as claimed in claim 1, characterized in that, The upper surface of the package is on the same plane as the surface of the transparent cover.
3. The semiconductor device as described in claim 1, characterized in that, The semiconductor device further includes leads, one end of which is electrically connected to the substrate and the other end of which is electrically connected to the chip, and the leads are embedded in the package.
4. The semiconductor device as described in claim 3, characterized in that, The sealing ring covers the connection between the lead and the chip, and the lead is at least partially embedded in the sealing ring.
5. The semiconductor device as described in claim 3, characterized in that, There is a gap between the sealing ring and the package body, and the connection part between the lead and the chip is located in the gap.
6. The semiconductor device according to any one of claims 1 to 5, characterized in that, The surface of the transparent cover plate is provided with an annular groove, or the annular groove is provided corresponding to the sealing ring; and / or, the package is an injection-molded package.
7. The semiconductor device according to any one of claims 1 to 5, characterized in that, The sealing ring is made of black light-absorbing material.
8. The semiconductor device as claimed in claim 7, characterized in that, The sealing ring is made of the same material as the package body, and the package body and the sealing ring are connected as one piece.
9. The semiconductor device according to any one of claims 1 to 5, characterized in that, The sealing ring is made of transparent material; the encapsulation body is integrally injection molded from black light-absorbing material.
10. The semiconductor device according to any one of claims 1 to 5, characterized in that, The semiconductor device further includes a plurality of connecting balls electrically connected to the lower surface of the substrate.
11. A semiconductor packaging device, characterized in that, The semiconductor packaging apparatus is used to injection mold the package onto a semiconductor device according to any one of claims 1 to 10; the semiconductor packaging apparatus includes an upper mold, a lower mold, and an injection device, the upper mold covering the lower mold, at least one injection cavity being formed between the upper mold and the lower mold, the semiconductor device being disposed in the injection cavity, and the injection device being used to inject liquid packaging material into the injection cavity, the cooled packaging material forming the package covering the periphery of the semiconductor device.
12. The semiconductor packaging apparatus as claimed in claim 11, characterized in that, When the upper mold and the lower mold are closed, the substrate is disposed on the lower mold, and the surface of the transparent cover plate is in contact with the inner surface of the upper mold; and / or, The inner surface of the upper mold is provided with a buffer film; when the upper mold and the lower mold are closed, the surface of the transparent cover plate is in contact with the buffer film.
13. An image sensor, characterized in that, Includes the semiconductor device according to any one of claims 1 to 10.