Power converter circuit that includes at least one battery

Abstract

Circuit that has: a first power converter circuit (1) having an output (13, 14); a second power converter circuit (3) having an input (31, 32) and an output (33, 34), wherein the input (31, 32) of the second power converter circuit (3) is coupled to the output (13, 14) of the first power converter circuit (1) and is configured to receive an input signal (I31, V2); a rechargeable battery (2) coupled to the output (13, 14) of the first power converter circuit (1); a charging control circuit (4) configured to control the charging of the rechargeable battery (2) by controlling the second power converter circuit (3); wherein the charging control circuit is designed to detect a charging state of the rechargeable battery (2) and to control the second power converter circuit (3) depending on the charging state of the rechargeable battery (2) and wherein the charging control circuit (4) is designed to to detect the state of charge, to measure a battery voltage (V2) on the rechargeable battery (2) and to control an input current (I2) of the rechargeable battery (2) when the battery voltage (V2) is below a voltage threshold, and to control the battery voltage (V2) when the battery voltage (V2) is above the voltage threshold.

Description

[0001] Embodiments of the present invention relate to a power converter circuit, in particular a power converter circuit comprising at least one battery.

[0002] With increasing interest in sustainable energy production, there is a focus on the use of photovoltaic (PV) modules to generate electrical power. PV modules produce maximum power during periods of sunshine. However, power consumption, for example, by industrial or domestic use, does not coincide with these periods of sunshine. In the case of domestic use, power consumption may even be higher when the sun is not shining, such as in the evening or at night.

[0003] US 2012 / 0 223 679 A1 describes a system with a first and a second power converter, wherein an output of the first power converter is connected to an input of the second power converter. The first power converter 5 receives input power from a solar module, and the second power converter is configured to supply output power to a charging station and a power grid. A battery is connected to the output of the first power converter and the input of the second power converter, respectively. The battery is charged by controlling the input power of the second power converter 6.

[0004] CN 2 01 937 502 U describes a system with a first and a second power converter, wherein an output of the first power converter is connected to an input of the second power converter. The first power converter receives input power from a solar module, and the second power converter is configured to deliver output power to a load. A battery is connected to the output of the first power converter and the input of the second power converter, respectively. A battery manager monitors battery parameters, such as voltage and temperature, and deactivates the power converters when one of these parameters reaches a predetermined value.

[0005] It is therefore desirable to store electrical power when there is a surplus of electrical power, such as when the sun is shining, and to supply the stored power to the grid when there is high power consumption, such as in the evening or at night.

[0006] One embodiment relates to a circuit according to claim 1. Further embodiments relate to a method according to claim 6 and a circuit according to claim 7.

[0007] Examples will now be explained using drawings. The drawings serve to illustrate the basic principle, so only aspects necessary for understanding the basic principle are shown. The drawings are not to scale. In the drawings, the same reference numerals refer to the same features. Fig. 1 illustrates a first embodiment of an electronic circuit comprising a first power converter circuit, a second power converter circuit, a battery, and a charge control circuit; Fig. 2, the Fig. 2A and Fig. 2B shows embodiments of a representation of a battery that can be charged according to methods described herein; Fig. 3 shows an example of a battery charging curve; Fig. 4 shows an embodiment of a second power converter circuit; Fig. 5 shows an embodiment of a power converter stage of the second power converter circuit according to Fig. 4; Fig. 6 shows an embodiment of a PWM controller of the second power converter circuit according to Fig. 4; Fig. 7 shows a further embodiment of a power converter stage of the second power converter circuit according to Fig. 4; Fig. 8 shows a further embodiment of a power converter stage and a PWM controller of the second power converter circuit according to Fig. 4; Fig. 9 schematically illustrates the signal curve of a PWM controller according to Fig. 8 received synchronization signal; Fig. 10 shows an embodiment of the PWM controller according to Fig. 8 further in detail; Fig. 11 shows a further embodiment of a power converter stage and a PWM controller of the second power converter circuit according to Fig. 4; Fig. 12 schematically illustrates a signal waveform of a PWM controller according to Fig. 11 received synchronization signal and an output current of a converter stage; Fig. 13 shows an embodiment of the first power converter circuit comprising a power converter unit; Fig. 14, the Fig. 14A to 14C, shows embodiments of a PV module; Fig. 15 shows an embodiment of the power converter unit in further detail; Fig. 16 shows an embodiment of a power converter stage of the power converter unit according to Fig. 15; Fig. 17 shows an embodiment of a PWM controller of the power converter unit according to Fig. 15; Fig. 18 shows a further embodiment of a power converter stage of the power converter unit according to Fig. 15; Fig. 19 illustrates the operating principle of the power converter stage according to Fig. 18; Fig. 20 shows another embodiment of a first power converter circuit; Fig. 21 shows another embodiment of a first power converter circuit; Fig. 22 shows a power converter arrangement with several cascaded electronic circuits; and Fig. 23 shows another embodiment of a power converter arrangement with several cascaded electronic circuits.

[0008] In the following detailed description, reference is made to the accompanying drawings. The drawings form a part of the description and show, by way of illustration, specific embodiments in which the invention may be practiced. It should be understood that features of the various embodiments described herein may be combined with one another unless otherwise specified.

[0009] Fig. 1 illustrates an embodiment of an electronic circuit comprising a first power converter circuit 1, a second power converter circuit 3, a rechargeable battery 2, and a charging control circuit 4. The first power converter circuit 1 comprises an output with a first output node 13 and a second output node 14 and is configured to provide a power output signal. The second power converter circuit 3 comprises an input with first and second output nodes 31, 32 coupled to the output of the first power converter circuit 1 and is configured to receive a power input signal. The second power converter circuit 3 is further configured to supply a power output signal to a load Z (in Fig. 1 (shown in dashed lines). The rechargeable battery is coupled to the output 13, 14 of the first power converter circuit 1 and the input 31, 32 of the second power converter circuit 3. The charging control circuit 4 is configured to detect a charge state of the rechargeable battery 2 and to control the second power converter circuit 3 depending on the charge state of the rechargeable battery.

[0010] Referring to Fig. 1, the second power converter circuit 3 receives two input signals, namely an input current I31 and an input voltage V2, wherein the input voltage V2 corresponds to an output voltage of the first power converter circuit 1 and a voltage between the terminals 21, 22 of the rechargeable battery 2. The input current I31 of the second power converter circuit 3 corresponds to an output current of the first power converter circuit 1 minus an input current I2 of the rechargeable battery 2: I31=I12−I2

[0011] According to the electronic circuit in Fig. 1, the charging and discharging of the rechargeable battery 2 is controlled in some embodiments only by controlling the second power converter circuit 3, in particular by controlling the input current I31 and the input voltage V2 of the second power converter circuit 3. This will be described in more detail below.

[0012] The rechargeable battery 2 may be a conventional rechargeable battery, such as a lead-acid battery, a nickel-cadmium (NiCd) battery, a nickel-metal hydride (NiMH) battery, or a lithium-ion battery. Referring to Fig. 2A, the rechargeable battery 2 can form a cell string with a plurality of battery cells 21-2 p which are connected in series between the battery terminals 21, 22. According to another Fig. 2B, the rechargeable battery 2 may comprise a plurality of cell strings connected in parallel to one another to the battery terminals 21, 22, each cell string comprising a plurality of battery cells 2 11 -2 p1 , 2 12 -2 p2 , 2 1q -2 pqwhich are connected in series with one another. The maximum voltage that can be provided by the rechargeable battery 2 between the battery terminals 21, 22 depends on the number of battery cells connected in series in a string. The capacity of the rechargeable battery 2 depends on the capacity of the individual battery cells and / or the number of cell strings connected in parallel.

[0013] According to one embodiment, the electronic circuit supports Fig. 1 at least one of a first charging mode, in which the rechargeable battery 2 is charged with a constant charging current I2, and a second charging mode, in which the rechargeable battery 2 is charged by applying a substantially constant voltage between the battery terminals 21, 22. The first charging mode is also referred to below as constant current mode, and the second charging mode is also referred to below as constant voltage mode.

[0014] In the constant current mode, the input current I2 of the rechargeable battery 2 is controlled to be substantially constant by controlling the input current I31 of the second power converter circuit 3. For example, if the battery input current I2 is greater than a predetermined constant charging current I2 REF, the second power converter circuit 3, which is controlled by the charging control circuit 4, increases the input current I31 and when the battery charging current I2 is less than the predetermined constant charging current I2 REF the power converter circuit 3 controlled by the charging control circuit 4 reduces the input current I31. In the constant voltage mode, the power converter circuit 3 controls the battery voltage V2, which is the voltage between its input nodes 31, 32, so that it corresponds to a predetermined charging voltage V2 REF corresponds.

[0015] Referring to Fig. 1, the charging control circuit 4 of the power converter circuit 3 provides an input reference signal S3 REF The input reference signal S3 REFrepresents the desired signal level of either the input current I31 in the constant current mode or the battery voltage V2 in the constant voltage mode. In the constant current mode, the charging control circuit 4 measures the output current I12 of the first power converter 1 and calculates the input reference signal S3. REF as follows: S3REF=I31REF=I12−I2REF where I31 REF the input reference signal, which represents the desired signal level of the input current I31, I12 the measured output current of the first power converter circuit 1 and I2 REF the desired signal level of the battery current I2 in the constant current mode. The output current I12 of the first power converter circuit 1 can be measured in a conventional manner, which is Fig. 1 is not shown. In Fig. 1 represents a signal S I12, which is received by the charging control circuit 4, the measured output current I12 of the first power converter circuit 1.

[0016] In the constant voltage mode, the input reference signal S3 represents REF , which is provided by the charging control circuit 4, the input voltage reference signal V2 REF which defines a desired signal level of the input voltage V2.

[0017] According to one embodiment, the charging control circuit 4 is configured to support only one of the two different charging modes. In this case, the charging control circuit 4 is configured to either provide the input current reference signal I31 REF to the second power converter circuit 3 or the input voltage reference signal V2 REF the second power converter circuit 3 as input reference signal S3 REF to make available.

[0018] According to a further embodiment, the charging control circuit 4 is configured to detect a state of charge (SOC) of the rechargeable battery 2 and to control the second power converter circuit 3 depending on the detected state of charge. This will be explained below with reference to Fig. 3 described.

[0019] Fig. Figure 3 schematically shows the battery current I2 and the battery voltage V2 controlled by the charging control circuit 4. In this embodiment, the state of charge of the rechargeable battery 2 is represented by the battery voltage V2. That is, the charging control circuit 4 measures the battery voltage V2 and switches the second power converter circuit 3 depending on the measured battery voltage V2 such that the battery 2 is charged in the constant current mode or in the constant voltage mode. Referring to the Fig. 3, the charging control circuit 4 operates the second power converter circuit 3 in the constant current mode when the battery voltage V2 is less than a maximum battery voltage V2 MAX . Fig. 3 shows the battery voltage V2 and the battery current I2 over time, where the Fig. The charging process shown in Figure 3 starts when the battery voltage V2 drops to a minimum voltage V2 MIN has increased. While the battery is in constant current mode with the constant charging current I2 REF is charged, the battery voltage V2 normally increases. Fig. However, the linear increase shown in Figure 3 is only an example. Referring to Fig. 3, the charging control circuit 4 switches to constant voltage mode when the battery voltage V2 exceeds the maximum voltage V2 MAX which corresponds to the reference voltage V2 REFof the constant voltage mode. As a result, the battery current I2 decreases. If the charging current reaches a minimum charging current I2 MIN reached, the battery is fully charged.

[0020] According to one embodiment, the electronic circuit remains in constant voltage mode after the battery is fully charged. This means that the power converter circuit 3 controlled by the charging control circuit maintains the input voltage V2 at a substantially constant level, which is determined by V2 REF is represented.

[0021] According to a further embodiment, an optional switch 23 is connected between the battery 2 and the output of the first power converter circuit 1 and, correspondingly, the input 31, 32 of the second power converter circuit 3. This switch 23 is controlled by the charging control circuit 4, wherein the charging control circuit 4 is configured to turn off the switch 23 to disconnect the battery 2 from the first and second power converter circuits 1, 3 when the battery 2 is fully charged, i.e., when the current level of the charging current has reached the minimum level (the current threshold) I2 MIN drops. After the battery has been disconnected from the first and second power converter circuits 1, 3, the charging control circuit 4 can control the second power converter circuit 3 such that the input voltage V2 is substantially constant. The input voltage reference signal V2 REF can be connected to the input voltage reference signal V2 REFwhich is used in the constant voltage mode. However, after switch 23 has been opened, it is also possible to adjust the input voltage V2 to a voltage level other than the voltage level in the constant voltage mode.

[0022] After the battery 2 has been fully charged, it can remain in the fully charged state until a power consumption of the second power converter circuit 3 is greater than the output power of the first power converter circuit 1. In this case, the electronic circuit enters a discharge mode in which the battery 2 is discharged for the benefit of the second power converter circuit 3. In the discharge mode, the input voltage of the second power converter circuit 3 is defined by the battery voltage V2, which decreases as the battery 2 is discharged.

[0023] According to one embodiment, the charging control circuit 4 does not control the second power converter circuit 3 in the discharge mode. According to another embodiment, the charging control circuit 4 measures the battery current I2 in the discharge mode (in the discharge mode, the battery current I2 flows in one of the Fig. 2) and controls the input current I31 of the second power converter circuit 3 such that the value of the battery current I2 is limited to a predetermined maximum current.

[0024] According to one embodiment, the battery 2 is not discharged below the minimum voltage level V2 MIN discharged, with the minimum voltage level V2 MIN between 60% and 80% of the maximum voltage level V2 MAXAfter the battery has been discharged, the electronic circuit can recharge the battery 2 as described above, or the battery 2 can remain in the discharged state for a while. In the second case, the charging control circuit 4 controls the second power converter circuit 3 such that the second power converter circuit 3 maintains the input voltage (the battery voltage) V2 at the minimum voltage level V2 MIN holds.

[0025] According to one embodiment, the second power converter circuit 3 is designed to provide the output current I32 to an electrical network. In this case, the load Z is Fig. 1 an electrical network having a supply voltage V PG The electrical grid can be a DC power grid or an AC power grid. In the first case, the supply voltage is V PGa DC voltage and in the second case the supply voltage is V PG an alternating voltage (AC voltage). The voltage V PG of the electrical network defines the output voltage V3 of the second power converter circuit, i.e. V3 = V PG In this embodiment, the output current I32 of the second power converter circuit 3 is variable and depends on the input power received at the input of the second power converter circuit. According to one embodiment, the second power converter circuit 3 is designed as a switched-mode converter.

[0026] Fig. 4 schematically shows an embodiment of a second power converter circuit 3, which is designed to provide the output current I32 to an electrical network. Referring to Fig. 4, the second power converter circuit 3 comprises a switching converter stage 35, which is designed to receive the input current I31 and the input voltage V2 and to provide the output current I32. The converter stage 35 comprises at least one switch that is switched on and off in a PWM-like manner (PWM = pulse width modulated), at least one inductor, and at least one capacitive storage element (capacitor). The second power converter stage 3 further comprises a PWM controller 36, which is designed to control the input reference signal S3. REF and at least one of the input current signal S I31 and the input voltage S V2 to receive. The input current signal S I31 represents the input current I31 of the second power converter circuit 3 and can be obtained in a conventional manner by measuring the input current I31. The input voltage signal S V2represents the input voltage V2 of the second power converter circuit 3 and can be obtained in a conventional manner by measuring the input voltage V2. Measuring circuits for measuring the input current I31 or the input voltage V2 and for providing the corresponding measurement signals S I31 , S V2 are in Fig. 4 is not shown. The PWM controller is configured to output at least one pulse width modulated (PWM) signal for controlling the PWM operation of at least one switch in the converter stage 35.

[0027] Fig. Figure 5 shows an embodiment of a converter stage 35 designed to provide the output current I32 to a DC voltage network. The converter stage 35 in Fig. 5 is implemented in a boost converter topology and includes a series circuit with an inductive storage element 302, such as a choke, and a switch 202 between the input terminals 31, 32. Furthermore, a rectifier element 303, such as a diode, is connected between a circuit node common to the inductive storage element 302 and the switch 301 and the first output node 33. The second output node 34 is connected to the second input node. A first capacitive storage element 304, such as a capacitor, is connected between the input nodes 31, 32. Optionally, a second capacitive storage element 305, such as a capacitor, is connected between the output nodes 33, 34.

[0028] The switch 301 can be implemented as a conventional electronic switch, such as a MOSFET (metal-oxide-semiconductor field-effect transistor) or an IGBT (insulated-gate bipolar transistor). The rectifier element 303 can be implemented as a synchronous rectifier, wherein a synchronous rectifier is a rectifier implemented using an electronic switch, such as a MOSFET or an IGBT. According to another embodiment, the switch is implemented as a GaN-HEMT (gallium nitride high-electron-mobility transistor).

[0029] Referring to Fig. 5, the switch 301 receives a PWM signal S35 from the PWM controller 36 as a drive signal, wherein the PWM controller 36 is designed to set a duty cycle of the PWM drive signal S35 such that the input signal to be controlled (the input current I31 or the input voltage V2) corresponds to the reference signal S3 REF corresponds.

[0030] Fig. 6 schematically shows an embodiment of the PWM controller 36. In Fig. 6 shows functional blocks of the PWM controller 36. These functional blocks can be implemented as analog circuits, as digital circuits, or using hardware and software.

[0031] Referring to Fig. 6, the PWM controller 36 calculates an error signal S ERR from an input signal S3 and the reference signal S3 REFwhich is received by the charging control circuit 4. The input signal S3 represents the input signal to be controlled, i.e. the input signal S3 represents either the input voltage V2 or the input current I31. In the embodiment in Fig. 6, the PWM controller is designed to control the input current I31 or the input voltage V2 in dependence on an operating mode signal S MODE , which is received from the state of charge controller. The operating mode signal indicates whether either the input current I31 or the input voltage V2 is to be controlled, and the input reference signal S3 REF indicates the desired signal level of the controlled input signal S3. In the embodiment in Fig. 6 a multiplexer receives the input current signal S I31 and the input voltage signal S V2 and, controlled by the operating mode signal S MODE, one of these signals as the input signal S3 to a subtraction element 362, which generates the error signal S ERR calculated.

[0032] In an embodiment of the electronic circuit in which the second power converter circuit 3 is operated only in the constant current mode or the constant voltage mode, the PWM controller 36 receives only the input current signal S I31 or the input voltage signal S V2 In this case, the multiplexer 361 and the operating mode signal S MODE be omitted.

[0033] Referring to Fig. 6 the error signal S ERR received by a filter 363, which generates a duty cycle signal S DC from the error signal S ERR generated. The duty cycle signal S DCrepresents the duty cycle of the drive signal S35 provided by the PWM controller 36. The filter 363 may be a conventional filter for generating a duty cycle signal S DC from an error signal S ERR in a PWM controller of a power converter stage, such as a P-filter, a PI filter, or a PID filter. A PWM driver 364 receives the duty cycle signal S DC and a clock signal CLK and generates the driver signal S35. The driver signal S35 has a switching frequency defined by the clock signal CLK and a duty cycle signal S DC defined duty cycle. This driver 364 may be a conventional PWM driver as known in the art and configured to generate a PWM driver signal based on a clock signal and duty cycle information.

[0034] The basic operating principle of the PWM controller 36 in Fig. 6 will be explained below with reference to the Fig. 5 and Fig. 6 briefly explained. Basically, the controller 36 controls the duty cycle of the PWM signal S35 such that the error signal S ERR is zero, so that the input signal corresponds to the reference signal S3 REF It is now assumed that the input signal S3 is set to a value determined by the reference signal S3 REF represented signal level has been set, and that the input signal S3 or the reference signal S3 REF changed, so that the input signal S3 must be adjusted again. For the purpose of explanation, it is assumed that the input signal S3 is the input voltage signal S V2 and that the input voltage V2, defined by the reference signal S3 REF, must be increased. In this case, the controller 36 reduces the duty cycle of the drive signal S35. Reducing the duty cycle of the drive signal S35 results in a decreasing (average) input current I31, wherein reducing the input current I31 for a given power received at the inputs 31, 32 of the second power converter circuit results in an increasing input voltage V2. Accordingly, the duty cycle is increased when the input voltage V2 needs to be reduced or when the input current I31 needs to be increased.

[0035] Fig. Figure 7 shows a further embodiment of a converter stage 35 which is designed to provide the output current I32 to a DC voltage network. The converter 35 in Fig. 5 is implemented in a buck converter topology and includes a series circuit with an inductive storage element (an inductance) 312, such as a choke, and a switch 311 between the first input node 31 and the first output node 33. A freewheeling element 314, such as a diode, is connected between the second output node 34 and a common circuit node of the inductive storage element 312 and the switch 311. A first capacitive storage element 312, such as a capacitor, is connected between the input nodes 31, 32. A second capacitive storage element 305, which is connected between the output nodes 33, 34, is optional.

[0036] As in the converter stage 35 in Fig. 5, the switch in the converter stage 35 can be Fig. 7 can be implemented as a conventional electronic switch, such as a MOSFET or IGBT, or it can be implemented as a GaN HEMT. Furthermore, the freewheeling element 314 can be implemented as a synchronous rectifier.

[0037] As in the converter stage 35 according to Fig. 5, the switch 311 in the converter stage is Fig. 7 is controlled by a PWM drive signal S35 provided by the PWM controller 36. The PWM controller 36 can be configured as described with respect to Fig. 6 and increases the duty cycle of the driver signal S35 when the input voltage V2 is to be reduced or the input current I31 is to be increased, and decreases the duty cycle when the input voltage V3 is to be increased or the input current I31 is to be reduced.

[0038] The converter stage 35 is used, for example, in a boost converter topology (see Fig. 5) can be implemented if the input voltage V2 is always below the mains voltage V PG and can be used in a buck converter topology (see Fig. 7) can be implemented if the input voltage V2 is always greater than the mains voltage V PG However, implementing the converter stage in either a boost converter topology or a buck converter topology is merely an example. The converter stage 35 can also be implemented with other non-isolating topologies, such as a buck-boost converter topology or a buck-boost converter topology, or with an isolating topology, such as a flyback converter topology, etc.

[0039] The second power converter circuits of the Fig. 5 and Fig. 7 are unidirectional power converter circuits. This means that these power converter circuits are designed to transmit power in only one direction, that is, in the present embodiment, from the input 31, 32 to the output 33, 34. However, these power converter circuits 3 can easily be modified to bidirectional power converters by replacing the rectifier elements 303, 313 of the Fig. 5 and Fig. 7 can be replaced by switches. In this case, the second power converter circuit can be described as transferring power from the input 31, 32 to the output 33, 34 or power from the output 33, 34 to the input 31, 32.

[0040] According to one embodiment, the second power converter 3 is a bidirectional converter circuit. In this embodiment, the charging control circuit 4 can be configured to operate the second power converter circuit 3 such that the battery 2 is charged by a voltage V3 provided at the output 33, 34 of the second power converter circuit. In this case, the charging control circuit operates the second power converter circuit like a conventional battery charger configured to charge a battery with either a direct current or an alternating voltage. As in the battery charging modes explained above, the charging control circuit 4 can be configured to operate the battery in a constant current mode or a constant voltage mode when the battery is charged from the electrical grid.

[0041] Fig. Figure 8 shows an embodiment of a second power converter circuit 3, which is designed to provide the output current I32 to an AC voltage network or to receive an alternating current from an AC voltage network in order to charge the battery 2. In this embodiment, the converter stage 35 controlled by the PWM controller 36 is designed to convert the output current I32 as an alternating current, with a voltage determined by an alternating synchronization signal S SYNC to generate a defined signal shape. This synchronization signal S SYNC may be in phase with the mains voltage and can be determined by measuring the mains voltage V PG However, it is also possible to use the synchronization signal S SYNC such that a phase shift between the synchronization signal S SYNC and the mains voltage V PGAn amplitude of the alternating output current I32 is variable and depends on an input power received by the second power converter circuit 3. Like the second power converter circuit 3 already described above, the second power converter circuit 3 controls Fig. 8 the input current I31 or the input voltage V2 depending on the input reference signal S3 REF , which is controlled by the charging control circuit 4 (in Fig. 8 not shown).

[0042] The second power converter circuit, which provides an output AC current I32 and receives an input DC voltage V2 and an input DC current I31, can be implemented as a conventional DC / AC converter (inverter) configured to provide an alternating current to an electrical grid. Nevertheless, a specific embodiment will be described with reference to Fig. 8 shown below.

[0043] Referring to Fig. 8, the converter stage 35 has a full-bridge (H4) converter topology and comprises two half-bridge circuits, each connected between the input nodes 31, 32. Each of these half-bridge circuits comprises two switches, each having a load path and a control terminal. The load paths of the two switches of a half-bridge circuit are connected in series between the input nodes 31, 32, with a first switch 3211 and a second switch 3212 forming the first half-bridge and a third switch 3213 and a fourth switch 3214 forming the second half-bridge. Each of the half-bridges comprises an output, with an output of the first half-bridge being formed by a common circuit node of the load paths of the first and second switches 3211, 3212. An output of the second half-bridge is formed by a common circuit node of the load paths of the third and fourth switches 3212, 3214.The output of the first half-bridge is connected to the first output node 33 of the second power converter circuit 3 via a first inductive element 3221, such as a choke. The output of the second half-bridge is connected to the second output node 33 of the second power converter circuit 3 via a second inductive element 3222, such as a choke. According to a further embodiment (not shown), only one of the first and second inductive elements 3221, 3222 is required. The converter stage 35 further comprises an input capacitor 322, which is connected between the input nodes 31, 32, and an optional output capacitor 324, which is connected between the output nodes 33, 34.

[0044] Each of the switches 3211, 3212, 3213, 3214 receives a control signal S351, S352, S353, S354 at its control node. These drive signals S351-S354 are provided by the PWM controller 36 and are pulse-width modulated (PWM) drive signals configured to turn the corresponding switch 3211-3214 on and off. It should be noted that a switching frequency of the PWM signals S351-S354 is significantly higher than a frequency of the synchronization signal S SYNC and a desired frequency of the output current I32. The synchronization signal can be a sinusoidal signal with a frequency of 50 Hz or 60 Hz, depending on the country in which the electrical network is implemented, while the switching frequency of the individual switches 3211-3214 can be in the range from several kHz to several tens of kHz or even up to several hundred thousand kHz.

[0045] The PWM controller is configured to adjust the duty cycle of each of the drive signals S351-S354 between 0 and 1 so that the waveform of the output current I32 follows the waveform of the synchronization signal to control the input current I31 or the input voltage V2. When the duty cycle of one of the drive signals S351-S354 is 0, the corresponding switch 351-354 is permanently off, and when the duty cycle of a drive signal S351-S354 is 1, the corresponding switch 351-354 is permanently on. The duty cycle of a drive signal S351-S354 is the ratio between the time the drive signal switches the corresponding switch and the duration of one switching cycle. The duration of one switching cycle is the inverse of the switching frequency.

[0046] According to one embodiment, the synchronization signal S SYNGa periodic signal with positive and negative half-waves that occur alternately. Consequently, the output current I32 is an alternating current with positive half-waves in which the output current I32 is positive and with negative half-waves in which the output current I32 is negative. An embodiment of the synchronization signal S SYNC and the corresponding output current I32 is in Fig. 9 shown.

[0047] Two possible modes of operation of the converter stage 35 are briefly explained below. First, it is assumed that a positive half-wave of the output current I32 is to be generated. According to a first mode of operation, known as bipolar switching or 2-level switching, the first and fourth switches 3211, 3214 are switched on and off synchronously, while the second and third switches 3212, 3213 are permanently switched off. During a switch-on phase of the first and fourth switches 3211, 3214, an output current I32 is forced through the choke(s) 3221, 3222, which depends on the voltage difference between the input voltage V2 across the input capacitor 323 and the output voltage V3, where the output voltage V3 is determined by the mains voltage V PG The switches 3211-3214 each comprise a freewheeling element, such as a diode, which is Fig. 8 is also shown. The freewheeling elements of the second and third switches 3212, 3213 take over the current flowing through the choke(s) 3221, 3222 when the first and fourth switches 3212, 3214 are turned off. In this method, the instantaneous signal level of the output current I32 can be adjusted via the duty cycle of the synchronous switching operation of the first and fourth switches 3211, 3214.

[0048] The switching frequency of the first and fourth switches 3211, 3214 is significantly higher than the frequency of the output current I32, so that the amplitude, frequency, and phase of the output current I32 can be adjusted depending on the duty cycle of the synchronous switching operation of the first and fourth switches 3211, 3214. During the negative half-cycle, the second and third switches 3212, 3213 are switched on and off synchronously, while the first and fourth switches 3211, 3214 are permanently off, so that the body diodes of the first and fourth switches 3211, 3214 are conductive. Alternatively, the switches 3211, 3214 are switched (with short dead times) when their body diodes are forward-biased to operate as synchronous rectifiers.

[0049] According to a second mode of operation, known as "phase chopping" or 3-step switching, the first switch 3211 is permanently switched on during the positive half-wave of the output current I32, the second and third switches 3212, 3213 are permanently switched off, and the fourth switch 3214 is switched on and off in a clocked manner. During a switch-on phase of the first and fourth switches 3211, 3214, an output current I32 is forced through the choke(s) 3221, 3222, which depends on the voltage difference between the input voltage V2 across the input capacitor 323 and the output voltage V3, wherein the output voltage V3 is determined by the mains voltage V PGDuring a turn-off phase of the fourth switch 3214, a freewheeling path is provided by the freewheeling element of the third switch 3213 and the turned-on first switch 3211, enabling a zero-volt state across the output chokes 3221-3222. In this method, the amplitude of the output current I32 can be adjusted via the duty cycle of the switching operation of the fourth switch 3214. During the negative half-cycle, the first and fourth switches 3211, 3214 are permanently off, the second switch 3212 is permanently on, and the third switch 3213 is clocked on and off.

[0050] To control a current signal level of the output I32, the PWM controller 36 varies the ratio of the at least one switch, which is clocked on and off. The duty cycle of the at least one clocked switch and the duty cycle of its driver signal are increased accordingly to increase the signal level of the output current I32 and are decreased to decrease the amplitude of the output current I32. This duty cycle depends on the current signal level of the synchronization signal S SYNC . The switches 3211-3214 can be implemented as conventional electronic switches, such as MOSFETs, IGBTs, GaN HEMTs, or similar.

[0051] Fig. 10 schematically shows an embodiment of the PWM controller 36 that generates the PWM drive signals S351-S354. Fig. Figure 10 shows a block diagram of the PWM controller 36 to illustrate its working principle. It should be noted that the Fig. The block diagram shown in Figure 10 merely serves to illustrate the function of the PWM controller 36, not its implementation. The individual functional blocks, which are described in greater detail below, can be implemented using conventional technology suitable for implementing a controller. In particular, the functional blocks of the PWM controller 36 can be implemented as analog circuits, digital circuits, or using hardware and software, such as a microcontroller running dedicated software, to implement the functionality of the PWM controller 36.

[0052] Referring to Fig. 10, the PWM controller 36 comprises a first control loop with a first controller 371 which generates the synchronization signal S SYNC and an output current signal S I32 , which represents the output current I32. The first controller 371 is configured to determine a frequency of the synchronization signal S SYNC and a phase difference between the synchronization signal S SYNC and the output current signal S I32 and is designed to evaluate the first duty cycle signal S DCI to generate. The first duty cycle signal S DCI controls the signal shape of the output current I32 in such a way that it corresponds to the signal shape of the synchronization signal S SYNC Referring to the above explanation, the synchronization signal S SYNC in phase with the mains voltage or there may be a phase difference between the synchronization signal S SYNC and the mains voltage V PG present.

[0053] The PWM controller further comprises a second control loop with a second controller 372 which controls the input reference signal and the input current signal S I31 or the input voltage signal S V2 receives. If the second power converter circuit 3 supports the constant current charging operation and the constant voltage charging operation, the second controller 372 can optionally receive the operation mode signal S MODE The second controller 372 is configured to receive a second duty cycle signal S DCII which controls a signal level of the input signal (the input voltage V2 or the input current I31) such that the signal level corresponds to a signal level determined by the input reference signal S3 REF The second duty cycle signal corresponds to the duty cycle signal S DC out of Fig. 6. The second controller 372 can therefore select the circuit blocks of the controller 36 from Fig. 6, which includes the duty cycle signal S DC generate. The circuit blocks are the optional multiplexer (361 in Fig. 6), the error signal calculator (362 in Fig. 6) and the filter (363 in Fig. 6).

[0054] The first control loop can be a relatively fast control loop and the first duty cycle signal S DCI may be a duty cycle signal which changes rapidly to change the output current I32 such that the output current I32 has an alternating waveform as determined by the synchronization signal S SYNC The second control loop, which controls the signal level of the input signal, can be relatively slow compared to the first control loop.

[0055] Referring to Fig. 10, a multiplexer 373 receives the first and second duty cycle signals S DCI , S DCII and outputs a third duty cycle signal SDCIII A PWM driver 374 receives the third duty cycle signal S DCIII and a clock signal CLK and generates the driver signals S351-S354 using the duty cycle signal S DCIII . The duty cycle signal S DCIII does not include the information whether a positive or negative half-wave of the output current I32 should be generated. The PWM driver 374 also receives the synchronization signal S SYNC which contains this information. Depending on the drive scheme supported by the PWM driver 374, the PWM driver 374 generates at least one of the drive signals S351-S354 with a duty cycle signal S DCIII defined duty cycle. For example, when the PWM driver 374 operates the converter stage 35 in the 2-stage mode, the drive signals S351, S354 of the first and fourth switches 3211, 3214 are switched to a duty cycle signal S DCIIIduring a positive half-wave of the output current I32, the driver signals S352, S353 of the second and third switches 3212, 3213 are generated with a duty cycle signal S DCIII defined duty cycle.

[0056] During the positive half-wave, the first and fourth switches 3211, 3214 are switched on and off synchronously, while the second and third switches 3212, 3213 are permanently switched off. During a switch-on phase of the first and fourth switches 3211, 3214, an output current I32 is forced through the choke(s) 3221, 3222, which depends on the voltage difference between the input voltage V2 across the input capacitor 323 and the output voltage V3, where the output voltage V3 is determined by the mains voltage V PGThe switches 3211-3214 each comprise a freewheeling element, such as a diode, which is Fig. 8 is also shown. The freewheeling elements of the second and third switches 3212, 3213 take over the current flowing through the choke(s) 3221, 3222 when the first and fourth switches 3211, 3214 are turned off. In this method, the instantaneous signal level of the output current I32 can be adjusted via the duty cycle of the synchronous switching operation of the first and fourth switches 3211, 3214. However, it is also possible to operate the second and third switches 3212, 3213 as freewheeling elements. Accordingly, during the negative half-wave, the second and third switches 3212, 3213 are switched on and off synchronously with each other, while the first and fourth switches 3211, 3214 are turned off.

[0057] In the second power converter circuit from Fig. 8, the converter stage 35 controlled by the PWM controller 36 generates an output alternating current I32 which is determined by the synchronization signal S SYNC has a defined frequency and phase. Fig. Figure 11 shows another embodiment of the second power converter circuit 3, which is configured to output the output current with an alternating waveform defined by the synchronization signal. The second power converter circuit 3 in Fig. 11 includes a converter stage 35 controlled by a PWM controller and an unfolding circuit 38 connected between the converter stage 35 and the output 33, 34 of the second power converter circuit 3. In this embodiment, the converter stage outputs a current I32' corresponding to the rectified output current I32. That is, the output current I32' of the converter stage 35 has a waveform corresponding to the absolute value of the output AC current I32. Fig. Figure 12 shows schematic timing diagrams of the output current I32' of the converter stage 35 and the output alternating current I32.

[0058] The converter stage 35 in Fig. 11 can be obtained from the converter stage 35 by omitting the third switch 3213 and replacing the fourth switch 3214 with a permanent electrical connection. The second inductor 3222 can be omitted. The PWM controller 36 in Fig. 11 can be assigned to the PWM controller in Fig. 10, with the difference that only the first and second driver signals S351, S352 are generated.

[0059] The unfolding bridge 38 may be a conventional unfolding bridge that generates an alternating output current I32 from the rectified output current I32'. According to one embodiment, the unfolding bridge 38 receives the synchronization signal S SYNC and is designed to generate a positive half-wave or a negative half-wave of the output current I32, depending on the synchronization signal S SYNC .

[0060] Although the second power converter circuit 3 in Fig. 8 has a non-isolating topology, it is also possible to implement the second power converter circuit 3 with an isolating topology, that is, with a topology comprising a transformer or another unit suitable for galvanically isolating circuits from one another. Embodiments of bidirectional DC / AC converters are generally known and can be used as the second power converter circuit 3. Such bidirectional DC / AC converters are disclosed, for example, in Everts, J.; Krismer, F.; Van den Keybus, J.; Driesen, J.; Kolar, JW, “Comparative evaluation of softswitching, bidirectional, isolated AC / DC converter topologies,” Applied Power Electronics Conference and Exposition (APEC), 2012 Twenty-Seventh Annual IEEE, pp. 1067-1074, February 5-9, 2012, which is hereby incorporated by reference in its entirety.The bidirectional nature of these converters allows not only a transfer of power from the input 31, 33 to the output 33, 34 of the second power converter circuit, but also a transfer of power from the output 33, 34 to the input 31, 32 to charge the battery from the electrical grid.

[0061] According to one embodiment, the first power converter circuit 1 is configured to provide the output power present at its output 13, 14 from a power source. According to one embodiment, the power source comprises a photovoltaic (PV) module arrangement. Fig. 13 schematically shows an embodiment of a first power converter circuit 1 which is designed to provide the output current I12 of a PV module arrangement 5.

[0062] The PV module arrangement 5 is in Fig. 5 schematically shown. This PV module arrangement 5 comprises at least one solar cell (photovoltaic cell). Fig. 14A - 14C show some exemplary embodiments of a PV module arrangement 5 comprising at least one solar cell. Referring to a first Fig. 14A, the PV module arrangement 5 comprises only one solar cell 51. Referring to a second embodiment shown in Fig. 14B, the PV module arrangement 5 comprises a string of solar cells 51-5 connected in series with one another r , where r>1. According to another Fig. In the embodiment shown in Figure 5C, s strings of solar cells are connected in parallel, where s>1. Each of these strings comprises r solar cells 5 11 -5 r1 , 5 1s -5 rs . The Fig. The embodiments illustrated in Figures 14A to 14C are merely exemplary. Many other solar cell arrays may also be used as the PV module array 5 connected to the first power converter circuit 1.

[0063] Instead of connecting individual solar cells in series (as in Fig. 14B) or instead of series circuits with individual solar cells connected in parallel (as in Fig. 14C), cell arrays each comprising a plurality of solar cells may be connected in series with each other, or series circuits of such arrays may be connected in parallel with each other. That is, in the embodiments in the Fig. 14A to 14C, each solar cell may be replaced by an array of a plurality of PV modules (each having about 72 solar cells) to form the PV module array 5.

[0064] The first power converter circuit 1 is not limited to having a power source configured as a PV module connected to the input 11, 12. Other types of power sources, in particular other types of DC power sources, may also be used.

[0065] Referring to the above explanation, the output voltage of the first power converter circuit 1 corresponds to the battery voltage V2 and, accordingly, to the input voltage of the first power converter circuit 3. The battery voltage V2 is defined either by the state of charge of the battery 2 in the constant charge mode or in the discharge mode, or is defined by the second power converter circuit 3 when the battery 2 is operated in the constant voltage mode. The output current I12 of the first power converter circuit 1 varies depending on an input power provided from the PV module array 5 to the power converter circuit 1.

[0066] Referring to Fig. 13, the first power converter circuit 1 comprises an input with a first input node 11 and a second input node 12, which are connected to the PV module arrangement 5. In the embodiment in Fig. 13, the first power converter circuit 1 receives two input signals, namely an input current I11 and an input voltage V1. The input power received by the first power converter circuit 1 corresponds to the product of the input current I11 and the input voltage V1, i.e.: P1IN=V1*I11

[0067] The first power converter circuit 1 is implemented as a switching converter and comprises at least one switching power converter unit 10 connected between the input 11, 12 and the output 13, 14 of the first power converter circuit 1. According to one embodiment, the power converter unit 10 is configured to control the input current I11 or the input voltage V1 to obtain a maximum input power from the PV module array 5.

[0068] It is generally known that a solar cell, and therefore the PV module assembly 5 comprising various solar cells, behaves like a power generator, providing a direct current (DC) output voltage and a direct current (DC) output current when exposed to sunlight. For a given light power received by the PV module assembly 5, there is a range of output currents and a range of corresponding output voltages at which the PV module can operate. An output current and output voltage at which the output power is maximum can be described as a maximum power point (MPP). The MPP varies depending on the light power received by the PV module and on the temperature.Therefore, the PV module assembly 5 can be operated in the MPP by appropriately controlling the input current I11 or the input voltage V1 of the first power converter circuit 1 to provide a maximum input power to the first power converter circuit 1.

[0069] An embodiment of the power converter unit 10 from Fig. 13 will be in Fig. 15 schematically shown. The converter unit 10 from Fig. 15 is the power converter circuit 3 from Fig. 4 and comprises a switching converter stage 15 configured to receive the input current I11 and the input voltage V1 from the first power converter stage and to provide the output current I12. The converter stage 15 comprises at least one switch that is switched on and off in a PWM-like manner, at least one inductance, and at least one capacitive storage element (capacitor). The power converter unit 10 further comprises a PWM controller 16 configured to generate an input current signal S I11 or an input voltage signal S V1 from the first power converter circuit 1. The input current signal S I11 represents the input current I11 of the first power converter circuit 1 and can be obtained in a conventional manner by measuring the input current I11. The input voltage signal S V1represents the input voltage V1 of the first power converter circuit 1 and can be obtained in a conventional manner by measuring the input voltage V1. A measuring circuit for measuring the input current I11 or the input voltage V1 and for providing the corresponding measurement signal S I11 and S V1 is in Fig. 15 not shown.

[0070] Referring to Fig. 15, the PWM controller 16 also receives a reference signal S1 REF , which defines a desired signal level of the input signal to be controlled. For the purposes of explanation, it is assumed that the input voltage V1 is to be controlled by the converter unit 10. In this case, the PWM controller 16 receives an input voltage signal S V1 and the reference signal S1 REFdefines a desired signal level of the input voltage V1. The PWM controller 16 is designed to provide a PWM drive signal S15, which is received by the converter stage 15, so that the input voltage has a value determined by the reference signal S1 REF has a defined signal level.

[0071] The converter unit 10 in Fig. 15 further comprises an operating point controller 17 (MPPT, Maximum Power Point Tracker), which is designed to control the reference signal S1 REF to generate current so that the converter unit 10 operates the PV module array 5 in the MPP. The MPPT 17 receives the input current signal S I11 , which represents the input current I11, and the input voltage signal S V1 , which represents the input voltage V1. From the input current signal S I11 and the input voltage signal S V1The MPPT 17 calculates the instantaneous input power provided by the PV module arrangement 5 to the first power converter circuit 1. The MPPT 17 is designed to determine a signal level of the reference signal S1 in one detection cycle. REF within a given signal range and the voltage generated by the PV module arrangement 5 for each reference signal S1 REF defined different signal levels. The MPPT 17 is further designed to detect the input voltage V1 for which the maximum input power was reached and to generate the reference signal S1 REFultimately set to the value for which the maximum input power was detected until a new acquisition cycle begins. Detecting the MPP in a acquisition cycle may involve a conventional maximum power point detection algorithm, such as a hill-climbing algorithm or a perturb-and-observe algorithm.

[0072] Since the solar power received by the DC source implemented as a PV module array 5 may vary, the MPPT 17 is further configured to monitor whether the DC source 5 continues to operate at its maximum power point. Therefore, the MPPT 17 begins the acquisition cycle either regularly or when there is an indication that the maximum power point may have changed. An example of an indication that the maximum power point may have changed is when the value determined by the input current signal S I11 represented input current I11 changes without the reference signal S1 REF has changed.

[0073] Like the converter stage 35, which with reference to the Fig. 5, Fig. 7 and Fig. 8, the converter stage 15 can be Fig. 15 can be implemented with a conventional topology, such as a boost converter topology, a buck converter topology, a buck-boost converter topology, a flyback converter topology, or the like.

[0074] For the purpose of explanation, an example of a converter stage 15 with a boost converter topology in Fig. 16. The MPPT 17 is in Fig. 16 not shown. Referring to Fig. 16, the converter stage 15 comprises a series circuit with an inductive storage element 102, such as a choke, and a switch 101 between the input nodes 11, 12. Furthermore, a rectifier element 103, such as a diode, is connected between a circuit node common to the inductive storage element 102 and the switch 101 and the first output node 13. The second output node 14 is connected to the second input node 12. A first capacitive storage element 104, such as a capacitor, is connected between the input nodes 11, 12. Optionally, a second capacitive storage element 105, such as a capacitor, is connected between the output nodes 13, 14.

[0075] The switch 101 may be implemented as a conventional electronic switch, such as a MOSFET or IGBT. The rectifier element 103 may be implemented as a synchronous rectifier, where a synchronous rectifier is a rectifier implemented using an electronic switch, such as a MOSFET or an IGBT. According to another embodiment, the switch 101 is implemented as a GaN HEMT.

[0076] Referring to Fig. 16, the switch 101 receives the PWM signal S15 from the PWM controller 16 as a drive signal, wherein the PWM controller 16 is configured to set a duty cycle of the PWM drive signal S15 such that the input signal (the input voltage V1) has a signal level as determined by the reference signal S1 REF which is received by the MPPT.

[0077] The PWM controller 16 can, like the PWM controller 26, consist of Fig. 6. A possible form of the PWM controller 16 is shown in Fig. 17. In Fig. Figure 17 shows functional blocks of the PWM controller 16. These functional blocks can be implemented as analog circuits, as digital circuits, or using hardware and software.

[0078] Referring to Fig. 17, the PWM controller 16 calculates an error signal S ERR2 from the input signal, namely in the present embodiment the input voltage signal S V1 and the signal S received by the MPPT 17 REF . The error signal S ERR2 is received by a filter 163, which generates a duty cycle signal S DC2 from the error signal S ERR2 generated. The duty cycle signal S DC2represents the duty cycle of the drive signal S15 provided by the PWM controller 16. The filter 363 may be a conventional filter for generating a duty cycle signal S DC2 from an error signal S ERR2 in a PWM controller of a power converter stage, such as a P-filter, a PI filter, or a PID filter. A PWM driver 164 receives the duty cycle signal S DC2 and a clock signal CLK2 and generates the driver signal S15. The driver signal S15 has a switching frequency determined by the clock signal CLK2 and a duty cycle signal S DC2 defined duty cycle. This driver 164 may be a conventional PWM driver as known in the art and configured to generate a PWM driver signal in response to a clock signal and duty cycle information.

[0079] Fig. 18 shows an embodiment of a power converter stage 15, which provides galvanic isolation between the input 11, 12 and the output 13, 14. The power converter stage 15 in Fig. 18 comprises a bridge circuit 111, which is connected to the input 11, 12, and which is designed to generate an alternating voltage V111 from the input voltage V1 received at the input 11, 12. The bridge circuit 111 comprises two half-bridges, each comprising a high-side switch 1111, 1113 and a low-side switch 1112, 1114, wherein the high-side switch and the low-side switch of each half-bridge are connected in series, and wherein each of the half-bridges is connected between the input nodes 11, 12 of the input. Each half-bridge comprises an output 1115, 1116, which is a common circuit node of the load paths of the high-side switch and the low-side switch of each half-bridge. The alternating voltage V111 is available between the outputs 1115, 1116 of the bridge circuit 111.

[0080] The power converter stage 15 further comprises an inductor 112 and a transformer 113 with a primary winding 1131 and a secondary winding 1132. The primary winding 1131 is connected in series with the inductor 112, and the series circuit with the inductor 112 and the primary winding 1131 is connected between the outputs 1115, 1116 of the bridge circuit 111. The primary winding 1131 and the secondary winding 1132 have the same winding sense.

[0081] Furthermore, a rectifier 114 is connected between the secondary winding 1132 and the output 13, 14 of the power converter stage 10. This rectifier circuit 114 is implemented as a bridge rectifier and comprises a first rectifier element 1141, which is connected between a first node of the secondary winding 1132 and a first output node 13, a second rectifier element 1142, which is connected between the second output node 14 and a second node of the rectifier element 1132, a third rectifier element, which is connected between the second node of the rectifier element 1132 and the first output node 13, and a fourth rectifier element 1144, which is connected between the second output node and the second node of the rectifier element 1132. The rectifier elements 1141-1144 are in the embodiment in Fig. 18 are implemented as diodes. However, this is merely an example. Other types of rectifier elements, such as synchronous rectifiers comprising a MOSFET, can also be used.

[0082] In the power converter stage 15 in Fig. 18, the bridge circuit 111 is configured to generate the alternating voltage V111 from the input voltage V1, the transformer 113 transfers an alternating voltage applied to the primary winding 1131 via the inductance 112 to the secondary winding 1132, and the rectifier 104 rectifies the alternating voltage available at the secondary winding 1132.

[0083] A timing diagram of the alternating voltage V111 generated by the bridge circuit 111 is shown in Fig. 19 schematically shown. Referring to Fig. 19, the AC voltage V111 assumes three different signal levels, namely a positive signal level +V1, a negative signal level -V1, and 0. The positive signal level +V1 is generated by switching the first switch 1111 and the fourth switch 1114. The negative signal level is generated by switching the second switch 1112 and the third switch 1113, and 0 is obtained by turning on either the first switch 1111 and the third switch 1113 or the second switch 1112 and the fourth switch 1114.

[0084] A switching cycle of the bridge circuit 111 comprises a first time period T1, during which the alternating voltage V111 assumes the positive signal level +V, a second time period which follows the first time period and during which the signal level is 0, a third time period during which the signal level is negative, and a fourth time period T4 during which the signal level is 0. The switching operation has two duty cycles, namely a first duty cycle D1 = T1 / (T1 + T2), which is defined by the first and second time periods T1, T2, and a second duty cycle D2 = T3 / (T3 + T4), which is defined by the third and fourth time periods T3, T4. According to one embodiment, the duty cycles are equal, so that D1 = D2.

[0085] As shown in the embodiments described above, the input voltage V2 of the power converter stage 15 can be controlled by controlling the duty cycles D1, D2. These duty cycles can be controlled in the same way as already described with respect to Fig. 17. In the converter stage 15 in Fig. 18, a driver circuit 115 receives the PWM driver signal and controls the switches 1111 - 1114 in a PWM manner, in the manner already described above.

[0086] Fig. 20 shows a further embodiment of the first power converter circuit 1. In this embodiment, the first power converter circuit 1 comprises a plurality of inputs 111, 121 - 11 m , 12 m , where one of a variety of power sources 51 - 5 m connected to each of these inputs. Furthermore, the first power converter circuit 1 comprises a plurality of power converter units 101 - 10 m, where each converter unit 101 - 10 m with one of the power sources 51 - 5 m is connected via one of the entrances. In Fig. 20 are designated by the reference symbols V11 -V1 m Input voltages of the individual converter units 101 - 10 m and the reference numerals 1111 - 111 m denote input currents of the individual converter units 101 - 10 m . Each of the converter units 101 - 10 m can be as in relation to the Fig. 13 and Fig. 15 has already been described and is designed to provide an output current I101 - I10 m Outputs of the individual converter units 101 - 10 m are connected to the output 13, 14 of the first power converter circuit 1, so that the output current I12 of the first power converter circuit 1 is the sum of the output currents I101 - I10 m of the individual power converter units 101 - 10 m corresponds.

[0087] Fig. 21 shows a further embodiment of the first power converter circuit 1. The first power converter circuit 1 in Fig. 21 is based on the power converter circuit from Fig. 20 and includes a variety of power converter units 101 -10 m , each with a power source 51 - 5 m Outputs of the power converter units 101 - 10 m are connected in series between the output nodes 13, 14 of the first power converter circuit 1. Each of the power converter units 101 - 10 m provides the output current I12 and each of the power converter units 101 - 10 m represents a voltage V101 - V10 m each of which is supplied by a power converter unit 101 - 10 m provided voltages is a portion of the output voltage V2 of the first power converter circuit 1, that is: V2=∑i=1mV10i

[0088] The individual power converter units 101 -10 m can be implemented using a conventional converter topology. According to one embodiment, one of the power converter units 101 - 10 m as a master unit, which defines the current level of the output current I12 depending on the received input power, while the other second converter units act as slave units, which control the level of their output current so that it corresponds to the current level defined by the master power converter unit.

[0089] Referring to the above explanation, a voltage level of the battery voltage V2 can be set between a minimum level V2 MIN and a maximum level V2 MAXThe absolute voltage level of the battery voltage depends on the specific application. According to one embodiment, the second power converter circuit 3 provides the output current to an electrical grid with a voltage of approximately 240 V. RMS In this embodiment, the input voltage V2 of the second power converter circuit 3 is, for example, between 350 V and 400 V. This input voltage V2 is, for example, supplied by a first power converter circuit 1 from Fig. 21 is provided, which comprises a plurality of converter units 101 - 102 connected in series.

[0090] If it is desired to make the output current I32 available to an electrical network, and if it is further desired to use a battery 2 with a voltage which is lower than the (peak) voltage of the electrical network, a plurality of electronic circuits as described above can be connected in series.

[0091] Fig. 22 shows an embodiment of a power converter arrangement comprising a plurality of electronic circuits 1001 - 100 m includes. In Fig. 22 corresponds to the electronic circuit 1001 of Fig. 1 above. According to one embodiment, the other electronic circuits 1002, 100 m , which in Fig. 22 are only shown schematically, of the first electronic circuit 1001. That is, each of these electronic circuits 1002 - 100 m includes a battery (in Fig. 22 not shown). However, it is also possible to use one or more of the electronic circuits 1002, 100 m without implementing a battery.

[0092] If the electrical network is an AC network, the second power converter circuit 3 of the individual electronic circuits 1001 - 100 n according to one of the Fig. 8 to 12. The operation of a power converter arrangement comprising electronic circuits 1001 to 100 n which are each designed to provide an output current to an AC mains, and which each comprise a second power converter circuit according to Fig. 8 is described below.

[0093] In Fig. 22, reference numeral 31 denotes the second power converter circuit of the first electronic circuit 1001, reference numerals 331, 341 denote output terminals of this second power converter circuit 31, I321 denotes the output current of this second power converter circuit 31, and I32OUT denotes the total output current provided to the electrical network. Of the other electronic circuits 1002, 100 m are only the second power converter circuits 32, 3 n which each have an output current 1322, 132 n Referring to the above explanations, the individual second power converter circuits 31 - 3 n their corresponding output currents 1321 - 132 n such that they are in phase with a synchronization signal S SYNCH The individual second power converter circuits 31 - 3 ncan each receive the same synchronization signal, or they can receive different phase-shifted versions of a synchronization signal, with the different phase-shifted versions of the synchronization signal being in phase with each other. The output current 1321 - 132 n every second power converter circuit is the current flowing at a common circuit node of the output capacitor 3241 - 324 n and one of the output nodes 331 - 33 n , 341 - 34 n the corresponding power converter circuit 31 - 3 n is received.

[0094] The functioning of the series-connected electronic circuits 1001 - 100 n is described below. For the purpose of explanation, it is assumed that the voltage V PGof the electrical network is a sinusoidal voltage, and that the synchronization signal is a corresponding sinusoidal signal, wherein the synchronization signal S SYNCH in phase with the mains voltage V PG or where the synchronization signal S SYNCH and the mains voltage have a phase difference.

[0095] Referring to the above explanation, each of the second converter units 31 - 3 n designed to provide a corresponding output current 1321 - 132 n which is in phase with the synchronization signal S SYNCH In the steady state of the power converter arrangement, the output current corresponds to 1321 - 132 n every second power converter circuit 31 - 3 n the total output current I32OUT and the output voltage V31 -V3 n every second power converter circuit 31 - 3 n is a subset of the mains voltage V PG, where: VPG=∑i=1nV3i

[0096] The output voltages V31 - V3 n of the individual second power converter circuits 31 - 3 n can be different from each other, whereby the output voltage V31 - V3 n each second power converter circuit from that of the respective second power converter circuit 31 - 3 n received input power.

[0097] For the purpose of explanation, it is assumed that the input power of the second power converter circuit 31 of the first electronic circuit 1001 decreases. Such a decrease can be caused by a decrease in the input power of the first power converter circuit 1, or by a charging process of the battery 2. The output voltage V31 of the corresponding second power converter circuit 31 would then decrease, while the output voltages of the other second power converter circuits 32, 3 nwould increase to reach the state defined by equation (5). Furthermore, the total output current I32OUT would decrease. The transient response is as follows. When the input power received by the second power converter circuit 31 decreases, the total output current I32OUT initially remains unchanged, while the output current I321 of the second power converter circuit 31 decreases. The reduction in the output current I321 and the unchanged total output current I32OUT cause the output capacitor 3241 of the second power converter circuit 31 to discharge, so that the output voltage V31 decreases. However, a reduction in the output voltage of the first converter unit causes an increase in the output voltages V32, V3 n the other second power converter circuits 32, 3 n , which now have their output currents I322, 132 nreduce to keep their output power and their input power equal. The transition process is completed when a "new" total output current I32our has been established, to which the individual output currents 1321 - 132 n This is a self-organizing and self-stabilizing process that does not require any additional control loops besides the control loops of the individual electronic circuits as shown above.

[0098] Fig. 23 shows a further embodiment of the power converter arrangement with a plurality of electronic circuits 1001 - 100 n . These electronic circuits 1001 - 100 n are in Fig. 23 is only shown schematically. In this embodiment, every second power converter circuit 31 - 3 n each one converter stage, which corresponds to the Fig.11 shown converter stage 35 and which has a rectified output current 1321 - 132 n A central unfolding circuit 38 provides the series-connected electronic circuits 1001 - 100 n a rectified version V PG ' ready, receives a total output current I32 OUT ' of the series-connected electronic circuits 1001 - 100 n(which is also a rectified current) and provides an alternating current I32OUT to the electrical network. The unfolding bridge 38 has a first and a second input node 381, 382 and a first and a second output node 383, 384. The unfolding bridge can assume two different operating states, namely a first state in which the first input node 381 is connected to the first output node 381 and the second input node 382 is connected to the second output node 384, and a second state in which the first input node 381 is connected to the second output node 383 and the second input node 382 is connected to the first output node 381. The unfolding bridge 38, which is controlled by the synchronization signal S SYNC or the mains voltage V PG controlled, alternately takes the first and second state.

[0099] It is understood that the features of the various embodiments described herein may be combined with one another unless otherwise stated.

Claims

[1] Circuit that has: a first power converter circuit (1) having an output (13, 14); a second power converter circuit (3) having an input (31, 32) and an output (33, 34), wherein the input (31, 32) of the second power converter circuit (3) is coupled to the output (13, 14) of the first power converter circuit (1) and is configured to receive an input signal (I31, V2); a rechargeable battery (2) coupled to the output (13, 14) of the first power converter circuit (1); a charging control circuit (4) configured to control the charging of the rechargeable battery (2) by controlling the second power converter circuit (3); wherein the charging control circuit is designed to detect a charging state of the rechargeable battery (2) and to control the second power converter circuit (3) depending on the charging state of the rechargeable battery (2) and wherein the charging control circuit (4) is designed to to detect the state of charge, to measure a battery voltage (V2) on the rechargeable battery (2) and to control an input current (I2) of the rechargeable battery (2) when the battery voltage (V2) is below a voltage threshold, and to control the battery voltage (V2) when the battery voltage (V2) is above the voltage threshold. [2] The circuit of claim 1, further comprising an electronic switch (23) coupled between the rechargeable battery (2) and the output (13, 14) of the first power converter circuit (1). [3] Circuit according to one of the preceding claims, wherein the first power converter circuit (1) comprises a power converter unit (10) configured to receive an input signal and to control the input signal. [4] Circuit according to claim 3, wherein the power converter unit (10) comprises a maximum power point tracker (16) which is designed to generate a reference signal (S1 REF ) representing a desired signal level of the input signal received by the at least one power converter unit. [5] Circuit according to claim 3, wherein the first power converter circuit (1) comprises a plurality of power converter units (10 1 , 10 2 , 10 m ), each having an output connected to the output (13, 14) of the first power converter circuit (1). [6] Method comprising: Providing an output power at an output (13, 14) of a first power converter circuit (1); and Controlling charging of a rechargeable battery (2) coupled to the output (13, 14) of the first power converter circuit (1) by controlling a second power converter circuit (3) coupled to the output (13, 14) of the first power converter circuit (1), wherein controlling the charging of the rechargeable battery (2) comprises detecting a state of charge of the rechargeable battery (2) and controlling the second power converter circuit (3) depending on the state of charge of the rechargeable battery (2), wherein detecting the state of charge comprises measuring a voltage (V2) on the rechargeable battery, and wherein controlling the second power converter circuit (3) comprises controlling the second power converter circuit (3) to control the input current (131) of the rechargeable battery (2) when the battery voltage (V2) is below a voltage threshold and to control the battery voltage (V2) when the battery voltage (V2) is above the voltage threshold. [7] Circuit that has: a first power converter circuit (1) having an output (13, 14); a second power converter circuit (3) having an input (31, 32) and an output (33, 34), wherein the input (31, 32) of the second power converter circuit (3) is coupled to the output (13, 14) of the first power converter circuit (1) and is configured to receive an input signal (I31, V2); a rechargeable battery node coupled to the output (13, 14) of the first power converter circuit (1), wherein the rechargeable battery node is configured to be coupled to a rechargeable battery (2); and a charging control circuit (4) configured to control the charging of the rechargeable battery (2) by controlling the second power converter circuit (3), wherein the charging control circuit (4) is designed to detect a charging state of the rechargeable battery (2) and to control the second power converter circuit (3) depending on the charging state of the rechargeable battery (2), wherein the charging control circuit (4) is designed to to detect the state of charge, to measure a battery voltage (V2) on the rechargeable battery (2) and to control an input current (I2) of the rechargeable battery (2) when the battery voltage (V2) is below a voltage threshold, and to control the battery voltage (V2) when the battery voltage (V2) is above the voltage threshold.

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