Silicon carbide semiconductor device

Abstract

Silicon carbide semiconductor device (100) comprising the following: a silicon carbide semiconductor layer (1b) of a first conductivity type; a field insulation film (3) formed on a surface of the silicon carbide semiconductor layer (1b); a Schottky electrode (4) formed on the surface of the silicon carbide semiconductor layer (1b) on an inner circumferential side relative to the field insulation film (3), wherein a circumferential edge of the Schottky electrode (4) is formed such that it overlaps with the field insulation film (3); an electrode (5) of the front surface that covers the Schottky electrode (4) and extends on the field insulation film (3) beyond the circumferential edge of the Schottky electrode (4); a first termination potential well region (2) of a second conductivity type, which is configured to be in contact with a part of the Schottky electrode (4) in an upper part of the silicon carbide semiconductor layer (1b) and extends in the silicon carbide semiconductor layer (1b) on an outer circumferential side relative to a circumferential edge of the electrode (5) of the front surface; and a second termination potential well area (2a) of the second conductivity type, which is formed in the first termination potential well area (2), wherein the second termination potential well region (2a) does not reach the PN junction section between the first termination potential well region (2) and the silicon carbide semiconductor layer (1b), the second termination potential well area (2a) exhibits a fault concentration of the second conductivity type, which is in an area of ​​8.0 × 10 17 / cm 3 up to 2.0 × 10 20 / cm 3 lies and is higher than a fault concentration of the second conductivity type of the first termination potential well area (2), which is in a range of 1.0 × 10 17 / cm 3 up to 1.0 × 10 19 / cm 3 lies, the circumferential edge of the electrode (5) of the front surface is arranged at a distance of 15 µm or more inwards from a circumferential edge of the first termination potential well region (2) and the circumferential edge of the electrode (5) of the front surface above the second termination potential well region (2a) is arranged at a distance of 2 µm or more inwards from a circumferential edge of the second termination potential well region (2a).

Description

[0001] The present invention relates to a silicon carbide semiconductor device.

[0002] Schottky junction diodes (SBDs) are unipolar devices and are therefore able to reduce switching losses compared to ordinary bipolar diodes. However, conventional SBDs made of silicon semiconductors (Si semiconductors) only achieve a breakdown voltage of about 50 V or less for practical use, making them unsuitable for applications such as high-voltage inverters. Therefore, attention has been paid in recent years to the development of silicon carbide SBDs (SiC SBDs), as the use of silicon carbide (SiC) instead of silicon as the component material of the SBDs enables a breakdown voltage of several kV.

[0003] A technique known to improve the breakdown voltage in SiC-SBDs involves providing the P-type protection ring region (termination potential well region) in the so-called termination region of the N-type silicon carbide semiconductor layer, so that the electric field generated when a blocking voltage is applied is attenuated by the depletion layer formed by the PN junction between the silicon carbide semiconductor layer and the protection ring region (for example, JP 2005 - 286 197 A).

[0004] Meanwhile, in some cases, an etch residue forms on the circumferential edge of the Schottky electrode, which is located on the surface of the silicon carbide semiconductor layer. The formation of this etch residue can cause the silicon carbide semiconductor device to malfunction. Therefore, the front surface electrode, which is located on top of the Schottky electrode, covers the circumferential edge of the Schottky electrode, thus preventing the etch residue formed at the circumferential edge of the Schottky electrode from being exposed. This technique was known for suppressing malfunctions in silicon carbide semiconductor devices (see, for example, JP 2013-211503A).

[0005] The technique for creating the termination potential well area with a high concentration of P-type defects in the termination potential well area was known to further improve the breakdown voltage (see, for example, JP 2008 - 251 772 A).

[0006] However, even in such a silicon carbide semiconductor device, it has been newly observed that during the switchover from the conduction state, in which a current flows, to the blocking state, in which a blocking voltage is applied, the electric field can become concentrated at the circumferential edge of the front surface electrode, potentially causing a breakdown voltage failure. The concentration of the electric field at the circumferential edge of the front surface electrode during the switchover is thought to occur through the mechanism described below.

[0007] When the conduction state changes to the reverse state, in which a reverse voltage is applied, the voltage applied to the silicon carbide semiconductor device increases and varies, generating a displacement current that charges the depletion layer capacitance formed in the PN junction between the termination well region and the silicon carbide semiconductor layer. The displacement current flows from the interior of the termination well region toward the Schottky electrode side. This current flow causes a voltage drop across the termination well region due to its specific resistance.This causes a difference in electric potential between the interior of the termination potential well region and the Schottky electrode, generating an electric field and resulting in the concentration of the electric field at the circumferential edge of the Schottky electrode.

[0008] The electric field generated during switching is determined by the magnitude of the displacement current and the resistance in the termination well region. The SiC-SBD is a unipolar device and is therefore capable of switching at a higher speed compared to a silicon diode with the same breakdown voltage. Consequently, the voltage change during switching is greater, leading to an increase in the displacement current. Furthermore, the silicon carbide semiconductor exhibits a large energy level difference between the acceptor and valence bands, resulting in a higher resistance in the termination well region of the silicon carbide semiconductor than that of a conventional silicon semiconductor. Therefore, both the displacement current and the resistance in the termination well region are large in the SiC-SBD, which significantly increases the electric field generated during switching.Consequently, the concentration of the electric field during switching likely caused element failure in the conventional SiC-SBD.

[0009] US 2012 / 0146055A1 describes a silicon carbide (SiC) semiconductor device comprising a SiC semiconductor layer doped with a first-conductor dopant, a field insulation film formed on a front surface of the SiC semiconductor layer and provided with an opening to expose the front surface of the SiC semiconductor layer, an electrode connected to the SiC semiconductor layer through the opening in the field insulation film, and a guard ring having a second-conductor dopant formed in a surface layer portion of the SiC semiconductor layer to make contact with a terminal portion of the electrode connected to the SiC semiconductor layer. The second-conductor doping concentration in a surface layer portion of the guard ring that contacts the electrode is lower than the first-conductor doping concentration in the SiC semiconductor layer.In one embodiment, an outer edge of the electrode extends 10 µm or more beyond the edge of the opening onto the field insulation film.

[0010] A similar structure is described in JP 2007 - 235 064 A. In this design, the electrode is formed from two layers, with the upper electrode layer projecting laterally beyond the lower layer, which serves as a barrier metal layer.

[0011] Comparable designs are described in US 2004 / 0 173 820 A1 and in DE 11 2013 001 821 T5.

[0012] The present invention aims to create a silicon carbide semiconductor device capable of reducing the concentration of the electric field that occurs during switching.

[0013] According to the invention, this problem is solved by a silicon carbide semiconductor device according to claim 1.

[0014] A silicon carbide semiconductor device according to the present invention comprises the following: a silicon carbide semiconductor layer of a first conductivity type; a field insulation film formed on a surface of the silicon carbide semiconductor layer; a Schottky electrode formed on the surface of the silicon carbide semiconductor layer on an inner circumferential side relative to the field insulation film, wherein a circumferential edge of the Schottky electrode is formed such that it overlaps with the field insulation film; a front surface electrode covering the Schottky electrode and extending on the field insulation film beyond the circumferential edge of the Schottky electrode;a termination potential well region of the second conductivity type, configured to contact a portion of the Schottky electrode in an upper part of the silicon carbide semiconductor layer and extending in the silicon carbide semiconductor layer on an outer circumferential side relative to the circumferential edge of the front surface electrode; and a termination potential well region with a high concentration of the second conductivity type, formed within the termination potential well region and exhibiting a second conductivity type impurity concentration higher than that of the termination potential well region. The circumferential edge of the front surface electrode is positioned 15 µm or more inward from a circumferential edge of the termination potential well region.

[0015] In the silicon carbide semiconductor device described above, the circumferential edge of the front surface electrode is positioned 15 µm or more inward from the circumferential edge of the termination potential well region. This ensures a sufficient distance between the circumferential edge of the termination potential well region with the highest electrical potential and the circumferential edge of the front surface electrode. This reduces the density of equipotential surfaces located between the circumferential edge of the termination potential well region and the circumferential edge of the front surface electrode, thereby weakening the electric field generated at the circumferential edge of the front surface electrode by the displacement current that occurs during switching.

[0016] Advantageous further developments of the invention result from the dependent claims.

[0017] Further features and advantages of the invention will become apparent from the description of embodiments of the invention with reference to the figures. The figures show: Fig. 1A and Fig. 1B a cross-sectional view and a top view schematically showing a configuration of a silicon carbide semiconductor device according to a first preferred embodiment; Fig. 2A, Fig. 2B and Fig. 2C Cross-sectional views showing a method for manufacturing the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 3A, Fig. 3B and Fig. 3C Cross-sectional views showing the process for manufacturing the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 4A a cross-sectional view schematically showing the configuration of the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 5A and Fig. 5B Cross-sectional views schematically showing a configuration of a comparative example of the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 6 and Fig. 7 Graphene showing simulation results on the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 8 a cross-sectional view showing a simulation model of the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 9 a graph showing simulation results on the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 10 a cross-sectional view showing a simulation model of the silicon carbide semiconductor device according to the first preferred embodiment; Fig. 11 a graph showing simulation results on the silicon carbide semiconductor device according to the first preferred embodiment; and Fig. 12, Fig. 13 and Fig. 14 cross-sectional views schematically showing configurations of modifications of the silicon carbide semiconductor device according to the first preferred embodiment.

[0018] The "quantity of defects per unit area [cm²]" -2 ]“ of each area refers here to the value obtained by integrating the defect concentration of each area in the depth direction. In a case where the defect concentration of each area exhibits a concentration profile, the “defect concentration [cm³]” refers to -3]“ of each region here refers to the peak value of the defect concentration of each region. In a case where the defect concentration of each region exhibits a concentration profile, the “thickness” of each region here refers to the thickness of the region in which the defect concentration value is not less than one-tenth of the peak value of the defect concentration of the region. It should be noted that the “defect concentration” to which the “defect quantity per unit area [cm²] refers” is the same as the value of the defect concentration of each region. -2 ]“ of each area, not the peak value of the defect concentration, but the actual defect concentration.

[0019] The expression "on ~" does not preclude the possibility that an insertion is placed between the constituent elements. "B, which is placed on A," for example, refers to B with or without another constituent element C, which is placed between A and B. <Erste bevorzugte Ausführungsform>

[0020] First, a configuration of a silicon carbide semiconductor device 100 according to a first preferred embodiment of the present invention is described. Although an example of an N-type silicon carbide Schottky junction diode (SiC-SBD) in which the first conductivity type is the N type and the second conductivity type is the P type is described below, a P-type SiC-SBD in which the first conductivity type is the P type and the second conductivity type is the N type can be used.

[0021] Fig. 1A and Fig. Figure 1B shows a cross-sectional view and a top view illustrating the configuration of the silicon carbide semiconductor device 100 according to the first preferred embodiment. Fig. Electrodes, insulating films and the like, formed on a silicon carbide semiconductor layer 1b of the silicon carbide semiconductor device 100, are omitted. Fig. 1A is a view showing a cross-section along line AA in Fig. 1B corresponds. The electrodes, insulating films, and the like, which are formed on the silicon carbide semiconductor layer 1b, are in Fig. Shown in 1A.

[0022] With reference to Fig. 1A is the silicon carbide semiconductor device 100 a Schottky junction diode (SBD) with a silicon carbide substrate 1, a field insulation film 3, a Schottky electrode 4, a front surface electrode 5, a surface protection film 6 and a rear surface electrode 7. The silicon carbide substrate 1 comprises a substrate layer 1a of N + -Type formed from silicon carbide, and the silicon carbide semiconductor layer 1b (drift layer) from N --type, which is formed on substrate layer 1a. A termination potential well region 2 of the P-type is formed in the so-called termination region, which is located in the upper part of the silicon carbide semiconductor layer 1b. A termination potential well region 2a with a high concentration of P + The -type is formed in the termination potential well region 2. In particular, the termination potential well region 2a is arranged with a high concentration within the termination potential well region 2 and is desirablely prevented from reaching the PN junction between the termination potential well region 2 and the silicon carbide semiconductor layer 1b.

[0023] Nitrogen (N) and phosphorus (P) can be used as N-type impurities, and aluminum (Al) and boron (B) can be used as P-type impurities. In this preferred embodiment, nitrogen is used as an N-type impurity and aluminum is used as a P-type impurity. The silicon carbide semiconductor layer 1b has an N-type impurity concentration that is lower than that of the substrate layer 1a. The N-type impurity concentration and the thickness of the silicon carbide semiconductor layer 1b are determined according to the design breakdown voltage of the silicon carbide semiconductor device 100. The P-type impurity quantity in the termination potential well region 2 per unit area is preferably set to 1.0 × 10⁻⁶. 13 / cm 2 up to 1.0 × 10 14 / cm 2 fixed and preferably set at 2.0 × 10 13 / cm 2 up to 5.0 × 10 13 / cm 2In this preferred embodiment, the quantity of P-type defects in the termination potential well area 2 per unit area is 2.0 × 10 13 / cm 2 The quantity of P-type defects in the termination potential well area 2a with high concentration per unit area is desirablely greater than the quantity of P-type defects in the termination potential well area 2 per unit area and is desirablely increased to 2.0 × 10 14 / cm 2 or more. In this preferred embodiment, the quantity of P-type defects in the termination potential well area 2a is determined with a high concentration per unit area of ​​4.0 × 10 14 / cm 2 .

[0024] As in Fig. As shown in Figure 1B, the termination potential well area 2 and the termination potential well area 2a, both with high concentration, exhibit a ring shape in the plane direction. As shown in Fig. As shown in Figure 1B, the termination potential well region 2 is formed in a part of the silicon carbide semiconductor layer 1b and the termination potential well region 2a with high concentration is formed in a part of the termination potential well region 2.

[0025] With reference to Fig. In 1A, the field insulation film 3 and the Schottky electrode 4 are formed on the surface of the silicon carbide semiconductor layer 1b. The Schottky electrode 4 is located on the central part of the surface of the silicon carbide semiconductor layer 1b and forms a Schottky junction with the silicon carbide semiconductor layer 1b. The field insulation film 3 is located on the so-called termination region, which is arranged on the surface of the silicon carbide semiconductor layer 1b on the outer circumferential side relative to the Schottky electrode 4, and surrounds the part where the Schottky electrode 4 forms a Schottky junction with the silicon carbide semiconductor layer 1b. The Schottky electrode 4 is partially located on the termination potential well region 2 and the termination potential well region 2a with a high concentration and is in contact with the respective regions.The Schottky electrode 4 is designed to overlap with the field insulation film 3, and the circumferential edge of the Schottky electrode 4 is arranged on the field insulation film 3.

[0026] The field insulation film 3 can be made of silicon dioxide (SiO2) or silicon nitride (SiN) and can have a thickness of, for example, 0.5 µm to 1.5 µm. In this preferred embodiment, an SiO2 film with a thickness of 1.0 µm is used as the field insulation film 3. The Schottky electrode 4 can be made of a metal that comes into Schottky contact with the silicon carbide semiconductor. The Schottky electrode 4 can be made of a metal such as titanium, molybdenum, nickel, and gold and can have a thickness of, for example, 100 nm to 300 nm. In this preferred embodiment, a titanium film with a thickness of 200 nm is used as the Schottky electrode 4.

[0027] The electrode 5 of the front surface is formed on the Schottky electrode 4. The electrode 5 of the front surface covers the circumferential edge of the Schottky electrode 4. That is, the circumferential edge of the electrode 5 of the front surface is located on the field insulation film 3 beyond the circumferential edge of the Schottky electrode 4. The electrode 5 of the front surface can, for example, be formed from a metal containing any of aluminum, copper, molybdenum, and nickel, or from an aluminum alloy such as Al-Si, and can have a thickness of, for example, 3.0 nm to 6.0 µm. In this preferred embodiment, an aluminum layer with a thickness of 4.8 µm is used as the electrode 5 of the front surface.

[0028] The circumferential edge of electrode 5 of the front surface is positioned above the termination potential well region 2. The circumferential edge of electrode 5 of the front surface is preferably positioned at a distance of 15 µm or more inwards from the circumferential edge of the termination potential well region 2. The circumferential edge of electrode 5 of the front surface is positioned above the termination potential well region 2a with high concentration. The circumferential edge of electrode 5 of the front surface is preferably positioned at a distance of 2 µm or more inwards from the circumferential edge of the termination potential well region 2a with high concentration.

[0029] The surface protection film 6 is formed on the field insulation film 3 and the electrode 5 of the front surface. The surface protection film 6 is configured to cover the circumferential edge of the electrode 5 of the front surface and has an opening over the central section of the electrode 5 of the front surface to form the connection with the external terminals. To dissipate the voltage from the external environment, the surface protection film 6 is preferably an organic resin film. In this preferred embodiment, polyimide is used as the surface protection film 6.

[0030] The electrode 7 of the rear surface is formed on the side of the rear surface of the silicon carbide substrate 1 (the substrate layer 1a). The electrode 7 of the rear surface forms an ohmic junction with the substrate layer 1a. Consequently, the electrode 7 of the rear surface can consist of a metal such as nickel, aluminum, and molybdenum, which is capable of forming an ohmic junction with the silicon carbide serving as the substrate layer 1a. In this preferred embodiment, nickel is used as the electrode 7 of the rear surface.

[0031] Next, a method for manufacturing the silicon carbide semiconductor device 100 is described. Fig. 2A, Fig. 2B, Fig. 2C, Fig. 3A, Fig. 3B and Fig. Figures 3C are cross-sectional views showing the respective processes in the procedure for manufacturing the silicon carbide semiconductor device 100.

[0032] With reference to Fig. 2A is the silicon carbide substrate 1, which is taken from substrate layer 1a from N + -type and the silicon carbide semiconductor layer 1b from N - A P-type residue, which is epitaxially grown on the upper surface of substrate layer 1a, is prepared. Then, a resist film (not shown) is structured into a predetermined shape using a known method such as photolithography. Subsequently, P-type defects are selectively ion-implanted from above the resist film to form the P-type termination zone 2 (protective ring region) in the upper part of the silicon carbide semiconductor layer 1b. Additionally, the termination zone 2a is formed with a high concentration of P-type defects in a similar manner.

[0033] The P-type defect region is implanted with defect ions such as aluminum or boron ions. Following ion implantation, the defect ions are electrically activated by curing at a high temperature of 1500 °C or above, thereby forming the region of the predetermined conductivity type. As described above, the quantity of P-type defects in the termination potential well region 2 per unit area is desirablely reduced to 1.0 × 10⁻⁶. 13 / cm 2 up to 1.0 × 10 14 / cm 2 In this preferred embodiment, the quantity of P-type defects in the termination potential well area 2 per unit area is 2.0 × 10 13 / cm 2 The quantity of P-type defects in the termination potential well area 2a with high concentration per unit area is desirablely reduced to 2.0 × 10 14 / cm 2 up to 1.0 × 10 15 / cm 2In this preferred embodiment, the quantity of P-type defects in the termination potential well area 2a is determined with a high concentration of 4.0 × 10 per unit area. 14 / cm 2 In a case where the defects generated in the silicon carbide semiconductor layer 1b are likely to increase due to ion implantation, for example during the formation of the termination potential well region 2a with high concentration, which contains a large number of P-type defects, the ion implantation is preferably carried out under a temperature condition of 150 °C or above.

[0034] The P-type defects are ion-implanted with an implantation energy of, for example, 100 keV to 700 keV. If the aforementioned defect quantity is present in each area per unit area [cm²] -2 ] into the concentration of defects [cm³] -3] is implemented, in this case the fault concentration of the termination potential well area is 2 1.0 × 10 17 / cm 3 up to 1.0 × 10 19 / cm 3 and the disturbance concentration of the termination potential well area 2a with high concentration is 8.0 × 10 17 / cm 3 up to 2.0 × 10 20 / cm 3 .

[0035] With reference to Fig. 2B, a silicon oxide film with a thickness of 1.0 µm is subsequently deposited on the surface of the silicon carbide semiconductor layer 1b, for example, by chemical vapor deposition (CVD). The central part of the silicon oxide film is then removed by photolithography and etching, forming the field insulation film 3 with an opening. The opening edge of the field insulation film 3 is designed to be located on the termination potential well region 2, preferably on the high-concentration termination potential well region 2a. Therefore, the Schottky electrode 4, which is formed in the processes described below, is in contact with the termination potential well region 2 and the high-concentration termination potential well region 2a, thereby reducing the contact resistance of the Schottky electrode 4.

[0036] With reference to Fig. 2C then forms the electrode 7 of the rear surface on the side of the rear surface of substrate layer 1a of the silicon carbide substrate 1. Alternatively, the electrode 7 of the rear surface can be formed after all processes on the side of the front surface of the silicon carbide substrate 1, which are described below, have been completed.

[0037] With reference to Fig. 3A Next, a metal film 8, serving as a Schottky electrode 4, is formed by sputtering over the entire surface of the silicon carbide semiconductor layer 1b on which the field insulation film 3 is formed. In this preferred embodiment, the metal film 8 to be formed is a titanium film with a thickness of 200 nm. Then, a resist film 9 with a given structural shape is formed by photolithography. Afterward, with reference to Fig. 3B the metal film 8 is etched using the resist film 9 as a mask, thereby forming the Schottky electrode 4 with a desired shape ( Fig. 3B). Although the metal film 8 can be dry-etched or wet-etched, wet etching is preferable to reduce damage to the chip. Hydrofluoric acid (HF), for example, is used as the etchant. The end of the Schottky electrode 4 with a reduced thickness is likely to be pointed, for example, as a result of the relationship between the metal material and the etchant. Fig. 3B is the pointed section that is formed at the end of the Schottky electrode 4, referred to as etch residue 4a.

[0038] Then, with reference to Fig. 3C forms the electrode 5 of the front surface on the field insulation film 3 and the Schottky electrode 4 to cover the Schottky electrode 4, in other words, to cover the etch residue 4a. As in forming the Schottky electrode 4, a given metal film is formed over the entire surface, and then etching is carried out to form the electrode 5 of the front surface. The metal film is wet-etched using an etchant, for example, one based on phosphoric acid. Then the surface protection film 6 is formed to cover the electrode 5 of the front surface, thus completing the silicon carbide semiconductor device 100 according to this preferred embodiment.

[0039] Next, an operation of the silicon carbide semiconductor device 100 according to this preferred embodiment is described. When a voltage is applied to the silicon carbide semiconductor device according to this preferred embodiment such that the electrical potential of electrode 7 of the rear surface is set to negative relative to electrode 5 of the front surface, a current flows from electrode 5 of the front surface towards electrode 7 of the rear surface, thereby transforming the silicon carbide semiconductor device 100 into the conductive state (switch-on state).When a voltage is applied such that the electrical potential of electrode 7 of the rear surface is set positive relative to electrode 5 of the front surface, a current is blocked through the Schottky junction between the Schottky electrode 4 and the silicon carbide semiconductor layer 1b and the PN junction between the termination potential well region 2 and the silicon carbide semiconductor layer 1b, thereby transforming the silicon carbide semiconductor device 100 into the blocking state (switch-off state).

[0040] The functions and effects of the silicon carbide semiconductor device 100 according to this preferred embodiment are described below.

[0041] In contrast to this preferred embodiment, in a case where the field insulation film 3 is not provided and the entire surface of the Schottky electrode 4 is formed on the silicon carbide semiconductor layer 1b, the curvature of the equipotential surfaces around the end of the interface between the Schottky electrode 4 and the silicon carbide semiconductor layer 1b increases, thereby concentrating the electric field near the circumferential edge of the Schottky electrode 4. Consequently, the Schottky electrode 4 is designed to overlap with the field insulation film 3, as in this preferred embodiment, in order to reduce the concentration of the electric field at the circumferential edge of the Schottky electrode 4.In a case where the field insulation film 3 is provided, the tolerance for the alignment between the circumferential edge of the Schottky electrode 4 and the opening edge of the field insulation film 3 can be increased by forming the Schottky electrode 4 so that it overlaps with the field insulation film 3, thereby simplifying the manufacturing process.

[0042] The etch residue 4a forms at the circumferential edge of the Schottky electrode 4, potentially causing a problem of electric field concentration near the residue. Although the residue can be generated in any case where the Schottky electrode 4 or the front surface electrode 5 is etched, and in any case when dry or wet etching is performed, the residue is particularly likely to be generated during the formation of the Schottky electrode 4 due to the thickness of the metal film and the relationship between the metal material and the etchant. There was concern that, depending on, for example, the shape of the etch residue 4a, the reliability of the silicon carbide semiconductor device could be degraded due to the electric field concentration occurring in the circumferential edge section of the Schottky electrode 4.

[0043] In this preferred embodiment, the electrode 5 of the front surface is configured to cover the circumferential edge of the Schottky electrode 4, so that the etch residue 4a formed at the circumferential edge of the Schottky electrode 4 is not exposed. Therefore, there is no possibility of a problem caused by the electric field at the end of the Schottky electrode 4, even if the etch residue 4a is generated within the Schottky electrode 4. When the end (etch residue 4a) of the Schottky electrode 4 is covered by the electrode 5 of the front surface, the circumferential edge of the electrode 5 of the front surface, rather than the etch residue 4a of the Schottky electrode 4, becomes the concentration point of the electric field. However, compared to the Schottky electrode 4, the electrode 5 of the front surface is less likely to form an etch residue.Even if an etch residue is formed, the etch residue of electrode 5 on the front surface is not as sharp as that of the Schottky electrode 4. Therefore, the concentration of the electric field at the end of the electrode can be weakened.

[0044] In a case where the electrode 5 of the front surface covers the Schottky electrode 4, as in this preferred embodiment, the circumferential edge of the electrode 5 of the front surface is further extended towards the outer circumferential side relative to the conventional position. Consequently, the position of the circumferential edge of the electrode 5 of the front surface must be adjusted in view of the considerations described below.

[0045] The termination potential well region 2 formed in the termination region of the silicon carbide semiconductor layer 1b forms a PN junction with the silicon carbide semiconductor layer 1b. An electrical double layer, referred to as the depletion layer, is formed around the PN junction. The depletion layer exhibits a capacitance, referred to as the depletion layer capacitance. The depletion layer capacitance is charged and discharged when the voltage applied to the PN junction between the silicon carbide semiconductor layer 1b and the termination potential well region 2 changes. Consequently, when the silicon carbide semiconductor device 100 switches, the voltage applied to the PN junction between the silicon carbide semiconductor layer 1b and the termination potential well region 2 changes, thereby generating a displacement current that charges and discharges the depletion layer capacitance.

[0046] The displacement current flows from electrode 5 of the front surface to the PN junction on the side of the termination potential well region 2, or flows from electrode 7 of the rear surface to the PN junction on the side of the silicon carbide semiconductor layer 1b. When the displacement current is generated, the specific resistance in the current path through which the displacement current flows causes a voltage drop. In the region extending between electrode 5 of the front surface and the PN junction on the side of the termination potential well region 2, as shown in Fig. As shown in Figure 4, for example, the displacement current flows through the termination potential well region 2 from the circumferential edge of the termination potential well region 2 towards the Schottky electrode 4 and the electrode 5 of the front surface, causing a voltage drop in the termination potential well region 2. Consequently, the electric potential in the termination potential well region 2 increases (decreases) relative to the electric potential in the electrode 5 of the front surface, so that a high electric current is generated between the electrode 5 of the front surface and the termination potential well region 2.

[0047] The voltage drop caused by the displacement current is investigated below. This voltage drop is determined by the displacement current value and the resistance value in the displacement current path. The displacement current value is obtained in expression (1) below. In expression (1), I represents a displacement current value, Cd represents a depletion layer capacitance, and dV / dt represents the time variation of the voltage applied to the PN junction. I=Cd*dV / dt

[0048] As shown in expression (1), the displacement current I is determined by the depletion layer capacitance Cd of the PN junction and the time variation dV / dt of the voltage applied to the PN junction. The depletion layer capacitance of the PN junction is determined by the impurity concentration of either P-type or N-type materials. Silicon carbide has a higher dielectric breakdown strength than silicon. This allows the silicon carbide semiconductor layer to be implanted with impurities at a higher concentration compared to the silicon semiconductor layer. Consequently, the impurity concentration is generally higher in the silicon carbide semiconductor device than in the silicon semiconductor device. Therefore, the depletion layer capacitance of the PN junction is also higher in the silicon carbide semiconductor device than in the silicon semiconductor device.

[0049] It is expected that a bipolar device made of silicon will be transformed into a unipolar device made of silicon carbide, provided that these semiconductor devices have comparable breakdown voltages. For example, it is expected that a SiC SBD such as the one described in this preferred embodiment will be used instead of the Si-PN diode. If this is the case, the voltage change dV / dt will be increased because the SiC SBD, being a unipolar device, has a switching speed that is faster than that of the Si-PN diode, which is a bipolar device. Therefore, the silicon carbide semiconductor device may exhibit a displacement current value several dozen times greater than that of the silicon semiconductor devices, provided that these devices have the same breakdown voltage.

[0050] Meanwhile, it is shown that the resistance value (area resistance) in the termination potential well region 2 of the P-type semiconductor, which is higher than other resistance values ​​in the displacement current path, is greater in a silicon carbide semiconductor than in a silicon semiconductor. The reason for this is as follows. As shown in Table 1, the energy level of the acceptor in so-called wide-bandgap semiconductors, including silicon carbide semiconductors, is lower, so the difference between the energy level of the acceptor and the energy level of the valence band is increased, resulting in a low ionization rate of the acceptor. Therefore, the area resistance value in the silicon carbide semiconductor layer has increased in some cases by several dozen times compared to that of the silicon semiconductor layer, provided that the two layers have the same impurity concentrations. [Table 1] Halbleiter Si SiC GaN Diamant Akzeptor B Al Mg B Energieniveau 45 meV 210 meV 160 meV 360 meV

[0051] As described above, in the SiC-SBD, the electric field generated by the displacement current has increased in some cases by several hundred times compared to that of the conventional silicon semiconductor device, since both the displacement current magnitude and the resistance value in the displacement current path have increased. The electric field generated by the displacement current causes the electric field to concentrate at the circumferential edge of electrode 5 on the front surface during switching. Therefore, there was a possibility of element failure, such as dielectric breakdown of the insulating film (field insulating film 3 or surface protective film 6) around the circumferential edge of electrode 5 on the front surface.Consequently, in the SiC-SBD, it was found that not only the attenuation of the electric field generated in the blocking state (switch-off state) but also the attenuation of the electric field generated by the displacement current that occurs during switching was necessary.

[0052] As in Fig. As shown in Figure 4, during switching (turning off), the displacement current flows from the circumferential edge of the termination potential well region 2 towards the inner circumferential side and flows into the Schottky electrode 4 and the electrode 5 of the front surface, such that the circumferential edge of the termination potential well region 2 has the highest electrical potential. An electric field is generated between the circumferential edge of the electrode 5 of the front surface and the circumferential edge of the termination potential well region 2, along with a voltage drop caused by the displacement current.As the circumferential edge of the electrode 5 of the front surface approaches the circumferential edge of the termination potential well region 2, the equipotential lines between the circumferential edge of the electrode 5 of the front surface and the circumferential edge of the termination potential well region 2 become closely spaced, thereby increasing the electric field around the annular circumferential edge of the electrode 5 of the front surface.

[0053] Consequently, a sufficient distance must be ensured between the circumferential edge of electrode 5 on the front surface and the circumferential edge of the termination potential well area 2. However, if, as in Fig. As shown in Figure 5A, the circumferential edge of electrode 5 of the front surface is arranged on the outer circumferential side relative to the circumferential edge of the termination potential well region 2. It is likely that the concentration of the electric field occurs at the circumferential edge of electrode 5 of the front surface when a high voltage is applied to electrode 7 of the rear surface in the static off-state. The reason for this is as follows. The depletion layer between the termination potential well region 2 and the silicon carbide semiconductor layer 1b retains the high voltage in the off-state. When the circumferential edge of electrode 5 of the front surface is extended beyond the termination potential well region 2 to the outer circumferential side, the equipotential lines extend such that they wind around the circumferential edge of electrode 5 of the front surface, as indicated by the dashed lines in Figure 5A. Fig. 5A is shown. This causes the electric field to be concentrated in the angular circumferential edge of electrode 5 of the front surface.

[0054] If, meanwhile, as in Fig. As shown in Figure 5B, where the circumferential edge of electrode 5 of the front surface is positioned above the termination potential well region 2, the high voltage applied in the static off-state is held by the depletion layer extending from the termination potential well region 2 and the depletion layer extending from the termination potential well region 2a with high concentration. This can prevent the equipotential lines from forming, as indicated by the dashed lines in Figure 5B. Fig. As shown in Figure 5B, the lines extend so that they wind around the circumferential edge of electrode 5 of the front surface. Therefore, the concentration of the electric field at the circumferential edge of electrode 5 of the front surface in the static off-state can be prevented by positioning the circumferential edge of electrode 5 of the front surface above the termination potential well region 2. Note that the dashed lines in Fig. 5A and Fig. 5B schematically shows the equipotential lines, which are densely distributed, in particular from the equipotential lines when a high voltage is applied to the electrode 7 of the rear surface in the static off state.

[0055] The above points must be taken into account when ensuring the distance between the circumferential edge of the electrode 5 of the front surface and the circumferential edge of the termination potential well area 2 at the termination potential well area 2, so that both the concentration of the electric field in the circumferential edge of the electrode 5 of the front surface during dynamic switching and the concentration of the electric field in the circumferential edge of the electrode 5 of the front surface in the static switch-off state are attenuated.

[0056] Fig. 6 and Fig. Figure 7 shows simulation results of the electric field strength at the circumferential edge of electrode 5 of the front surface during switching when the distance between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2 or the distance between electrode 5 of the front surface and the circumferential edge of the termination potential well region 2a is changed with high concentration. Fig. Figure 6 shows the ordinate axis as the electric field strength at the circumferential edge of electrode 5 of the front surface, and the abscissa axis shows the distance E between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2. Fig. Figure 7 shows the ordinate axis as the electric field strength at the circumferential edge of electrode 5 on the front surface, and the abscissa axis shows a distance D between the circumferential edge of electrode 5 on the front surface and the circumferential edge of the termination potential well region 2a with high concentration. Fig. 6 and Fig. 7. The diamond-shaped markers indicate the simulation results in the case where the value of dV / dt is 20 kV / µs, the square markers indicate the simulation results in the case where the value of dV / dt is 30 kV / µs, the triangular markers indicate the simulation results in the case where the value of dV / dt is 40 kV / µs, and the circular markers indicate the simulation results in the case where the value of dV / dt is 50 kV / µs.

[0057] Fig. 8 is a cross-sectional view that uses a simulation model to derive the in Fig. 6 and Fig. The simulation results shown in section 7 are presented. In the simulation shown in Fig. In the simulation model shown in Figure 8, the position and structure of each component and the thickness and concentration of each component, apart from the position of the circumferential edge of electrode 5 on the front surface, are the same as those of this preferred embodiment described above. Fig. In the simulation shown in Figure 6, the distance E between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2 is changed under the assumption that the distance between the circumferential edge of the termination potential well region 2 and the termination potential well region 2a with high concentration is set to 15 µm. In the Fig. In the simulation shown in Figure 7, the distance D between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2a with high concentration is changed under the assumption that the distance E between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2 is set to 13 µm.

[0058] In Fig. 6 to 8 are both distance D and distance E, the distances extending in the horizontal direction, assuming that the direction from the reference point is towards the inner circumferential side (the left side in Fig. 8) the positive direction. Assuming that the reference point of distance D is the circumferential edge of the high-concentration termination potential well area 2a and the reference point of distance E is the circumferential edge of the termination potential well area 2, distance D and distance E each specify the distances from the reference point to the circumferential edge of electrode 5 on the front surface. In a case where the respective edge surfaces at the circumferential edge of electrode 5 on the front surface, at the circumferential edge of termination potential well area 2, and at the circumferential edge of termination potential well area 2a with high concentration are inclined, distance D and distance E are calculated assuming that the lower circumferential edge of electrode 5 on the front surface, the upper circumferential edge of termination potential well area 2, and the upper circumferential edge of termination potential well area 2a with high concentration are the reference points.

[0059] The electric field strength at the circumferential edge of electrode 5 of the front surface in these simulations refers to the electric field strength at the lower circumferential edge of electrode 5 of the front surface. However, the lower circumferential edge of electrode 5 of the front surface is actually a singular point. Consequently, the electric field strength at a point B, which is in Fig. Figure 8 shows, in particular the electric field at the point located 10 nm away on the outer circumferential side in the X direction from the lower circumferential edge of electrode 5 of the front surface (the same applies to the other simulation results described below). Obviously, this corresponds to the Fig. 8 Simulation model of the right half of the shown in Fig. 1A silicon carbide semiconductor device 100 shown.

[0060] As in Fig. As shown in Figure 6, the electric field strength can be attenuated during switching by increasing the distance E between the circumferential edge of the electrode 5 on the front surface and the termination potential well region 2. In particular, if the distance E is 15 µm or more, the attenuation effect of the electric field can be sufficiently achieved. If the distance E is 15 µm or more, the attenuation effect of the electric field gradually becomes saturated.If the distance between the circumferential edge of electrode 5 of the front surface, which provides the reference potential, and the circumferential edge of the termination potential well region 2, where the voltage drop caused by the displacement current occurring during switching is maximized, is sufficiently ensured, the density of the equipotential lines between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2 will consequently be attenuated, thereby weakening the electric field at the circumferential edge of electrode 5 of the front surface. The in . Fig. The simulation results shown in 6 can be attributed to these factors. Furthermore, the electric field strength increases with an increase in the voltage change rate dV / dt during switching. Consequently, it has been shown that the electric field strength, particularly during switching, is a problem in the silicon carbide semiconductor device, which is expected to operate faster than the conventional silicon semiconductor device.

[0061] In view of these results, the circumferential edge of the electrode 5 of the front surface is arranged at a distance of 15 µm or more inwards from the circumferential edge of the termination potential well region 2 in this preferred embodiment in order to attenuate the electric field generated by the displacement current that occurs during switching.

[0062] As in Fig. As shown in Figure 7, the electric field strength also decreases during switching with an increase in the distance D between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2a with high concentration. In particular, when the distance D is 2 µm or more, the attenuation effect of the electric field can be sufficiently provided. With a distance d of 2 µm or more, the attenuation effect of the electric field gradually becomes saturated. Furthermore, the electric field strength decreases with increasing voltage change dV / dt during switching, similar to the results in Figure 7. Fig. 6 to. The in Fig. The 7 simulation results shown can be attributed to the following factors.

[0063] The high-concentration termination potential well region 2a has a surface resistance that is lower than that of termination potential well region 2, so that the voltage drop caused by the displacement current is smaller in the high-concentration termination potential well region 2a. The circumferential edge of the electrode 5 on the front surface is positioned above the high-concentration termination potential well region 2a in order to attenuate the electric field at the circumferential edge of the electrode 5 on the front surface.In a case where the circumferential edge of the electrode 5 of the front surface is positioned over the area around the boundary between the high-concentration termination potential well region 2a and the termination potential well region 2, the attenuation effect of the electric field cannot be sufficiently provided due to the effects of the electric field extending from the side of the termination potential well region 2, where the electric potential is high. Consequently, the circumferential edge of the electrode 5 of the front surface is positioned on the high-concentration termination potential well region 2a, where the electric potential is low, at a certain distance or more on the inner circumferential side, in particular 2 µm or more inwards, thereby enabling more effective attenuation of the electric field at the circumferential edge of the electrode 5 of the front surface.

[0064] In light of these results, the circumferential edge of the electrode 5 on the front surface is positioned 2 µm or more inward from the circumferential edge of the high-concentration termination potential well region 2a in this preferred embodiment. This weakens the electric field generated by the displacement current that occurs during switching. Furthermore, if the Schottky electrode 4 and the high-concentration termination potential well region 2a are in direct contact, as in this preferred embodiment, the contact resistance in the displacement current path can be reduced, which can further weaken the electric field generated during switching.

[0065] In the static off state (dV / dt = 0), although in Fig. 6 and Fig. 7 not shown, no displacement current flows and the voltage applied to the anode electrode and the cathode electrode is held by the depletion layer between the termination potential well region 2 and the silicon carbide semiconductor layer 1b. As long as the circumferential edge of the electrode 5 of the front surface is located above the termination potential well region 2, the electric field applied to the circumferential edge of the electrode 5 of the front electrode is therefore on the order of several 10, regardless of the position of the circumferential edge of the electrode 5 of the front surface. 14 [V / cm], which causes no problems. However, during switching, the electric field applied to the circumferential edge of electrode 5 of the front surface can be on the order of 10 15 [V / cm] exceed, as described above. Consequently, the position of the circumferential edge of electrode 5 on the front surface must be adjusted.

[0066] Meanwhile, one possible way to weaken the electric field generated by the displacement current occurring during switching is to increase the p-type impurity concentration in the termination potential well region 2 as a whole, thereby reducing the sheet resistance in the termination potential well region 2. However, increasing the p-type impurity concentration in the termination potential well region 2 also increases the electric field in the silicon carbide semiconductor layer 1b in the static turn-off state, potentially causing a decrease in the avalanche breakdown voltage. It is assumed that, in a case where the voltage applied to the silicon carbide semiconductor device is gradually increased, the avalanche breakdown voltage refers to the voltage at which the avalanche breakdown occurs in the silicon carbide semiconductor device.

[0067] Fig. Figure 9 shows simulation results, the relationships between the amount of P-type defects in the termination potential well area 2 per unit area [cm²]. -2 ] and the avalanche breakthrough stress. Fig. Figure 10 is a cross-sectional view showing a simulation model used to display the simulation results in Fig. 9 to derive. Although that in Fig. While the simulation model shown in Figure 10 differs from the silicon carbide semiconductor device 100 according to this preferred embodiment in that the high-concentration termination potential well region 2a is not provided and several field limiting ring regions (FLR regions) 10 are provided, the configuration is similar except for the above. The thickness and impurity concentration of the silicon carbide semiconductor layer 1b are designed assuming a target voltage of 3.3 kV.

[0068] As in Fig. As shown in Figure 9, the avalanche breakdown voltage decreases with an increase in the amount of p-type impurities in the termination potential well region 2 per unit area. This is due to the fact that the electric field at the end of the termination potential well region 2 in the silicon carbide semiconductor layer 1b increases with an increase in the amount of p-type impurities in the static turn-off state. Consequently, if the amount of p-type impurities in the termination potential well region 2 is excessively increased to attenuate the electric field generated by the displacement current that occurs during switching, the avalanche breakdown voltage of the silicon carbide semiconductor layer 1b decreases, potentially leading to a reduction in the element breakdown voltage.This means there is a compromise between the breakdown voltage (static breakdown voltage), which is determined by the electric field in the static off-state, and the breakdown voltage (dynamic breakdown voltage), which is determined by the electric field during switching.

[0069] In this preferred embodiment, the total amount of P-type defects in the termination potential well area 2 is therefore reduced to 1.0 × 10 13 / cm 2 up to 1.0 × 10 14 / cm 2 (preferred 2.0 × 10 13 / cm 2 up to 5.0 × 10 13 / cm 2The termination potential well region 2a with high concentration is provided only in a portion of the termination potential well region 2, thus attenuating the electric field generated by the displacement current occurring during switching, while preventing a decrease in the avalanche breakdown voltage. Furthermore, as described above, the circumferential edge of the electrode 5 on the front surface is positioned 2 µm or more inward from the circumferential edge of the termination potential well region 2a and 15 µm or more inward from the circumferential edge of the termination potential well region 2, further attenuating the electric field generated by the displacement current during switching without reducing the avalanche breakdown voltage.

[0070] Fig. Figure 11 shows simulation results that indicate relationships between the amount of P-type defects in the termination potential well region 2a with high concentration per unit area and the electric field strength at the circumferential edge of electrode 5 of the front surface during switching. The simulation results in Fig. 11 are used in Fig. The following is derived from the simulation model shown in Figure 8. Consequently, the distance between the circumferential edge of electrode 5 of the front surface and the circumferential edge of the termination potential well region 2 is set to 13 µm, and the distance between the circumferential edge of the termination potential well region 2a with high concentration and the circumferential edge of the termination potential well region 2 is set to 15 µm. Fig. 11. The diamond-shaped markers indicate the simulation results in the case where the value of dV / dt is 20 kV / µs, the square markers indicate the simulation results in the case where the value of dV / dt is 30 kV / µs, the triangular markers indicate the simulation results in the case where the value of dV / dt is 40 kV / µs, and the circular markers indicate the simulation results in the case where the value of dV / dt is 50 kV / µs. Fig. Figure 11 indicates the vertical line, shown by lines with alternating long and short dashes, the points where the quantity of impurities of P type 2.0 × 10 14 / cm 2 is.

[0071] As in Fig. As shown in Figure 11, the electric field strength is attenuated during switching, along with the increasing amount of P-type defects in the high-concentration termination potential well region 2a. When the amount of P-type defects is 2.0 × 10 14 / cm2 If the threshold is exceeded, the attenuation effect of the electric field gradually becomes saturated. Therefore, the amount of P-type impurities in the termination potential well region 2a with high concentration should ideally be reduced to 2.0 × 10⁻⁶. 14 / cm 2 or more. However, if the amount of P-type defects in the high-concentration termination potential trough area 2a is excessively increased, the avalanche breakdown stress may decrease, as described above, even if the high-concentration termination potential trough area 2a is partially provided. For this reason, the amount of P-type defects in the high-concentration termination potential trough area 2a is preferably limited to 1.0 × 10 15 / cm 2or below. That is, the electric field generated by the displacement current that occurs during switching can be determined by setting the amount of P-type defects in the termination potential well region 2a with a high concentration of 2.0 × 10 14 / cm 2 up to 1.0 × 10 15 / cm 2 as in this preferred embodiment.

[0072] Although the amount of impurities in the termination potential well region 2, apart from the high-concentration termination potential well region 2a, is fixed at a constant level in this preferred embodiment, as described above, the so-called transition termination extension region (JTE region) can be formed, in which the impurity concentration decreases with increasing distance towards the outer circumferential side of the silicon carbide semiconductor layer 1b. In the silicon carbide semiconductor device 100 according to this preferred embodiment, for example, a low-concentration termination potential well region, in which the amount of P-type impurities is smaller than that of termination potential well region 2, can be provided in contact with termination potential well region 2 on the outer circumferential side relative to termination potential well region 2.

[0073] Although the example of the SBD, which consists of the silicon carbide semiconductor, was described in this preferred embodiment as in Fig. As shown in Figure 12, the so-called junction Schottky diode (JBS) and the so-called mixed PiN Schottky diode (MPS) can be formed. This means that several active potential well regions 11 of the P type, which are in ohmic contact with the Schottky electrode 4 in the active region of the silicon carbide semiconductor layer 1b, and several high-concentration active potential well regions 11a of the P type, which are provided within the active potential well regions 11, can be included. This results in the region where the Schottky electrode 4 is in Schottky contact with the silicon carbide semiconductor layer 1b and the region where the Schottky electrode 4 is in ohmic contact with the silicon carbide semiconductor layer 1b are oriented longitudinally to each other. The multiple high-concentration active potential well regions 11a can be omitted in the JBS and MPS structures.

[0074] Although the termination potential well area 2 and the termination potential well area 2a are contained in high concentration in this preferred embodiment, as shown in Fig. As shown in Figure 13, the multiple FLR regions 10, which are spaced apart from one another, can be provided in the silicon carbide semiconductor layer 1b on the outer circumferential side relative to the termination potential well region 2. In the multiple FLR regions 10, which are the P-type defect regions, the quantity of P-type defects is, for example, similar to that of the termination potential well region 2. Similar to the termination potential well region 2, the multiple FLR regions 10 each have a ring shape in a top view (not shown).

[0075] The configuration as in this preferred embodiment can weaken the electric field at the circumferential edge, in particular at the lower circumferential edge of the electrode 5 of the front surface. In this case, the circumferential edge of the electrode 5 of the front surface 5 can have a tapered shape, so that the electric field is weakened at the upper circumferential edge of the electrode 5 of the front surface. Fig. Figure 14 shows an example of the silicon carbide semiconductor device 100 according to this preferred embodiment, in which the circumferential edge is transformed into a tapered shape.

[0076] With reference to Fig. 14 The electrode 5 of the front surface has a tapered portion 5a at its circumferential edge. In a case where the termination potential well region 2a is provided with a high concentration in the termination potential well region 2, as in this preferred embodiment, the electric field at the lower circumferential edge of the electrode 5 of the front surface can be effectively attenuated. By attenuating the electric field around the upper circumferential edge of the electrode 5 of the front surface, the electric field applied to the field insulation film 3 and the surface protection film 6 can consequently be further attenuated, which is expected to improve the reliability of the silicon carbide semiconductor device. Therefore, the electrode 5 of the front surface has the tapered portion at its circumferential edge, as shown in Fig. 14 shown, so that the curvature of the equipotential surfaces around the upper circumferential edge of the electrode 5 of the front surface can be weakened, which allows the weakening of the electric field at the upper circumferential edge.

[0077] The tapered shape defined by the tapered portion 5a refers to a shape in which the position of the upper edge of the circumferential edge of the electrode 5 of the front surface recedes on the inner circumferential side relative to the position of the lower edge. The extent of the receding upper circumferential edge is desirablely 40% to 100% of the thickness of the electrode 5 of the front surface. Although the edge surface of the tapered portion 5a is considered flat in Fig. As shown in Figure 14, with the aim of weakening the electric field at the upper circumferential edge, which is one of the concentration points of the electric field, the edge surface of the tapered part 5a does not have to be flat in a strict sense and can have any shape, as long as the upper circumferential edge on the inner circumferential side recedes relative to the lower circumferential edge of the electrode 5 of the front surface.

[0078] Obviously, the silicon carbide semiconductor device 100 according to this preferred embodiment and the modifications of the silicon carbide semiconductor device according to this preferred embodiment, which are described in Fig. Figures 12 to 14 can be combined arbitrarily within the scope of protection of the invention. The FLR areas 10, which are shown in Fig. The 13 shown can, for example, be used with the in Fig.The JBS structure shown in Figure 12 can be combined. Furthermore, other combinations are obviously included within the scope of the invention.

Claims

[1] A silicon carbide semiconductor device (100) comprising: a silicon carbide semiconductor layer (1b) of a first conductivity type; a field insulation film (3) formed on a surface of the silicon carbide semiconductor layer (1b); a Schottky electrode (4) formed on the surface of the silicon carbide semiconductor layer (1b) on an inner peripheral side relative to the field insulation film (3), a peripheral edge of the Schottky electrode (4) being formed to overlap with the field insulation film (3); a front surface electrode (5) covering the Schottky electrode (4) and extending on the field insulation film (3) beyond the peripheral edge of the Schottky electrode (4); a first termination potential well region (2) of a second conductivity type formed to contact a part of the Schottky electrode (4) in an upper part of the silicon carbide semiconductor layer (1b) and extending in the silicon carbide semiconductor layer (1b) on an outer peripheral side relative to a peripheral edge of the front surface electrode (5); and a second termination potential well region (2a) of the second conductivity type formed in the first termination potential well region (2), wherein the second terminating potential well region (2a) does not reach the PN junction section between the first terminating potential well region (2) and the silicon carbide semiconductor layer (1b), the second termination potential well region (2a) has an impurity concentration of the second conductivity type which is in a range of 8.0 × 10 17 / cm 3 up to 2.0 × 10 20 / cm3 and is higher than an impurity concentration of the second conductivity type of the first termination potential well region (2) which is in a range of 1.0 × 10 17 / cm 3 up to 1.0 × 10 19 / cm 3 lies, the peripheral edge of the front surface electrode (5) is arranged at a distance of 15 µm or more inward from a peripheral edge of the first termination potential well region (2) and the peripheral edge of the front surface electrode (5) above the second termination potential well region (2a) is arranged at a distance of 2 µm or more inward from a peripheral edge of the second termination potential well region (2a). [2] The silicon carbide semiconductor device (100) according to claim 1, wherein the field insulation film (3) has a thickness of 0.5 µm or more. [3] The silicon carbide semiconductor device (100) according to claim 1 or 2, wherein the second termination potential well region (2a) and a part of the Schottky electrode (4) are in contact with each other. [4] The silicon carbide semiconductor device (100) according to any one of claims 1 to 3, wherein an impurity quantity of the second conductivity type contained in the first termination potential well region (2) per unit area is 1.0 × 10 13 / cm 2 up to 1.0 × 10 14 / cm 2 is. [5] The silicon carbide semiconductor device (100) according to any one of claims 1 to 4, wherein a peripheral edge portion of the front surface electrode (5) has a tapered part (5a). [6] The silicon carbide semiconductor device (100) according to any one of claims 1 to 5, wherein the Schottky electrode (4) contains at least one metal selected from the group consisting of titanium, molybdenum, nickel, and gold. [7] The silicon carbide semiconductor device (100) according to any one of claims 1 to 6, wherein the front surface electrode (5) contains at least one metal selected from the group consisting of aluminum, copper, molybdenum, and nickel. [8] The silicon carbide semiconductor device (100) according to any one of claims 1 to 7, wherein the first termination potential well region (2) and the second termination potential well region (2a) each have a ring shape in plan view.

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