Semiconductor package, chip card and method for producing a semiconductor package

Abstract

Semiconductor package (200), comprising: • a chip (110); • a layer (228) which is in direct contact with the chip (110) and which is formed from a material which has a trigger temperature of greater than or equal to 200 °C, above which an exothermic reaction takes place; and • encapsulation material (230) that at least partially covers the chip (110) and the layer (228); • wherein the layer (228) is configured and arranged relative to the chip (110) in such a way that, when an exothermic reaction of the material of the layer (228) is triggered, at least one component of the chip (110) is damaged due to the temperature increase caused by the exothermic reaction, • wherein the layer (228) is a thermodynamically metastable inorganic layer, and • wherein the material of the thermodynamically metastable inorganic layer (228) is a Li-based compound.

Description

[0001] The invention relates to semiconductor packages as used on printed circuit boards in a wide variety of applications, but also to chip card modules as used in the manufacture of chip cards, and to a method for producing the semiconductor packages.

[0002] Chip cards, whether contactless and / or contact-based, are used, among other things, in cashless payment transactions or as access authorization. Chip cards usually include a chip card module (in Fig. 1A shows an example of a contactless chip card module 100, at least among other things, with a chip 110 for storing and / or processing the confidential or monetary data, which is used to form the chip card 101 in a chip card body 220 (see Fig. 1B: The chip card body 220 is also equipped, by way of example for at least, among other things, contactless use, with a booster antenna 222, which has a chip coupling region 224 within which the chip card module 100 can be arranged. The chip can be mounted on a chip carrier 116, e.g., a substrate or leadframe, and can typically be encapsulated (not visible in the schematic plan view) to protect the contact and the chip 110 from mechanical stress.

[0003] The encapsulation is typically formed by applying a covering compound or encapsulation material to the already mounted and contacted chip 110. The encapsulation can, for example, be formed as a so-called globe top, which is applied by dispensing, or a so-called mold cap, which is formed by applying a molding compound under high pressure.

[0004] However, with some chip card modules or chip cards, external access to the chip may be possible. External access means that the chip can be exposed chemically, mechanically, by laser, and / or plasma, and can be contacted externally while functioning. Such methods are used to manipulate chips or, for example, to read the data stored in chip 110. One goal of such attacks can also be to determine the chip design for counterfeit devices. Another conceivable goal of the attack is to misuse chip 110 for other purposes.

[0005] An attack involves removing the chip encapsulation in such a way that the chip 110 is exposed, as undamaged as possible and still electrically functional. The unprotected chip 110 can then be examined during operation with regard to its functionality and the stored data through physical attacks. The physical attacks can, for example, include so-called "probing," in which the chip's signals are tapped and evaluated. In so-called "forcing," the chip's conductor tracks are rewired at a microscopic level in order to manipulate the chip's functional sequence.

[0006] The electronics industry, particularly in the areas of pay-TV and cashless payment transactions, has a strong interest in preventing attacks on the corresponding chips. Tampering with the semiconductor chips used to decrypt encrypted pay-TV programs can cause companies significant financial losses.

[0007] Another area particularly affected by chip card manipulation is the credit and debit card sector. Misuse of credit or debit cards causes financial damage to the affected companies and / or cardholders.

[0008] Another area of ​​application in which chip cards must be protected against manipulation is the storage of security-relevant or sensitive data, for example in chip cards used for access authorization, electronic passports or patient cards with medical history data.

[0009] Without additional protection of the chip surface, the chip 110 can be attacked as soon as the encapsulation (e.g., the molding compound) is removed.

[0010] Such attacks can generally affect any type of housed, e.g. encapsulated, semiconductor components (e.g. chips), also referred to as semiconductor packages: in addition to the described chip card modules, for example, also semiconductor packages that can be used on printed circuit boards in a wide variety of applications.

[0011] US 2003 / 0 024 994 A1 discloses a chip card with a thin-film battery and a volatile memory encapsulated with epoxy.

[0012] Lithium-ion battery. May 30, 2016, pp. 1-20. Wikipedia [online] reveals the basic properties and functions of a lithium-ion battery.

[0013] US 2009 / 0 307 896 A1 discloses methods for producing high-performance thin-film batteries on metallic substrates, polymer substrates or doped or undoped silicon substrates by producing a suitable barrier layer.

[0014] US 2016 / 0 088 756 A1 discloses an encapsulation barrier stack encapsulating a moisture and / or oxygen sensitive article and comprising a multilayer film comprising one or more barrier layers with low moisture and / or oxygen permeability and one or more sealing layers arranged to contact a surface of the at least one barrier layer and thereby cover defects present in the barrier layer.

[0015] DE 10 2011 114 749 A1 discloses a composite part comprising a functional element and a protective material for the functional element, wherein a nanofilm material and an activating agent for the nanofilm material are provided between the functional element and the protective material. The nanofilm material consists of a plurality of alternating nanoscale layers that are capable of reacting exothermically upon thermal or optical activation such that the functional element is irreversibly altered by the released reaction heat. The activating agent is a material that activates the nanofilm material upon exposure of the functional element.

[0016] DE 10 2008 014 750 A1 discloses a device for protecting at least one electronic and / or microsystem component from mechanical and / or chemical interference.

[0017] A semiconductor package according to claim 1 and a method for manufacturing a semiconductor package according to claim 8 are provided. Further embodiments are described in the dependent claims.

[0018] In various embodiments, the chip can be protected from external access.

[0019] In various embodiments, the chip is additionally at least partially covered, e.g., covered, with a thermodynamically metastable layer in which an exothermic chemical reaction is triggered upon attack by the supply of energy. The resulting reaction heat can be so high that it damages the chip (i.e., renders it inoperable). Thus, the chip can no longer be addressed externally.

[0020] In various embodiments, a material in the layer on the chip is thermodynamically metastable, meaning the material can decompose if its activation energy is exceeded. The decomposition can be highly exothermic, meaning it generates significant heat.

[0021] In various embodiments, heat may be locally so high that the active layer of the chip (or at least a part thereof) is irreversibly destroyed.

[0022] In various embodiments, the layer can be designed such that it does not begin to react, i.e., the exothermic reaction is not triggered, during production (e.g., during an encapsulation process, e.g., during molding) or, for example, during reliability tests. The activation energy of the thermodynamically metastable material can exhibit an exposure to a temperature of more than approximately 200°C. In this case, the activation energy can be substantially independent of the duration of the temperature exposure. In other words, it may be necessary for a temperature below the activation temperature to act on the semiconductor package for a longer period of time, e.g., several minutes or several hours, without the exothermic reaction being triggered.

[0023] In various embodiments, the layer can be arranged, e.g. deposited, on the chip, for example by means of paste printing, sol-gel deposition, vapor deposition, e.g. physical (PVD) or chemical (CVD), or by means of other known methods.

[0024] In various embodiments, the layer can be encapsulated by a highly cross-linked molding compound, for example, with a molding compound as described in US Pat. No. 7,598,622 B2 or DE 10 2005 043 657 B4. In a case where an attempt is made to remove the highly cross-linked molding compound by grinding, a laser, and / or plasma etching to attack the chip, energy is released that may be sufficient to trigger the exothermic reaction in the layer. In other words, exposing the chip from the highly cross-linked molding compound may require the expenditure of energy sufficient to exceed the activation energy of the layer.

[0025] In various embodiments, a semiconductor package is provided. The semiconductor package may include a chip, a layer thermally coupled to the chip, which layer is formed from a material having a trigger temperature of greater than or equal to 200 °C, above which an exothermic reaction takes place, and encapsulation material which at least partially covers the chip and the layer, wherein the layer can be configured and arranged relative to the chip in such a way that when an exothermic reaction of the material of the layer is triggered, at least one component of the chip is damaged due to the temperature increase caused by the exothermic reaction.

[0026] In various embodiments, the layer is a thermodynamically metastable inorganic layer.

[0027] In various embodiments, the material of the thermodynamically metastable inorganic layer is a Li-based compound.

[0028] In various embodiments, the Li-based compound may be a Li metal oxide.

[0029] In various embodiments, the Li-based compound may be a Li-based compound with one or more transition metals.

[0030] In various embodiments, the layer may have a layer thickness of at least 10 µm.

[0031] In various embodiments, the encapsulation material may comprise or be formed from a highly cross-linked encapsulation material.

[0032] In various embodiments, a temperature increase of at least 400°C can occur in at least one component of the chip.

[0033] In various embodiments, when an exothermic reaction of the material of the layer is triggered, the triggered exothermic reaction can take place in an oxygen-containing environment.

[0034] In various embodiments, a method for producing a semiconductor package is provided. The method comprises: thermally coupling a layer formed from a material having a trigger temperature of greater than or equal to 200°C, above which an exothermic reaction takes place, to a chip, and at least partially covering the chip and the layer with an encapsulation material, wherein the layer is configured and arranged relative to the chip such that, upon a triggered exothermic reaction of the material of the layer, at least one component of the chip is damaged due to the temperature increase caused by the exothermic reaction.

[0035] In various embodiments, a chip card is provided. The chip card comprises a chip card body and a semiconductor housing according to various embodiments.

[0036] Embodiments of the invention are illustrated in the figures and are explained in more detail below.

[0037] It shows Fig. 1A and Fig. 1B is a schematic diagram of a chip card module and a chip card; Fig. 2A is a schematic cross-sectional view of a semiconductor package according to various embodiments; Fig. 2B is a schematic plan view of a chip card according to various embodiments; Fig. 3 a graphical representation of onset temperatures of the exothermic decomposition of various metastable Li compounds; and Fig. 4 a flowchart of a method for manufacturing a semiconductor package according to various embodiments.

[0038] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology such as "top," "bottom," "front," "back," "fore," "rear," etc., will be used with reference to the orientation of the described figure(s). Since components of embodiments can be positioned in a number of different orientations, the directional terminology is for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention.It is understood that the features of the various exemplary embodiments described herein may be combined with one another unless specifically stated otherwise. The following detailed description is therefore not to be construed in a limiting sense, and the scope of the present invention is defined by the appended claims.

[0039] Throughout this description, the terms "connected," "attached," and "coupled" are used to describe both a direct and an indirect connection, a direct or indirect connection, and a direct or indirect coupling. In the figures, identical or similar elements are provided with identical reference numerals where appropriate.

[0040] Fig. 2A shows a schematic cross-sectional view of a semiconductor package 200 according to various embodiments.

[0041] The semiconductor package 200 can, apart from differences described below, essentially be the same as the chip card module 100 of Fig. 1A, for example with regard to components, materials, functions, arrangements, dimensions, etc., wherein the semiconductor package 200, when used for purposes other than for a chip card module, does not need to have the elements specific to chip card modules, such as a module antenna 106.

[0042] The chip 110 may comprise any semiconductor chip, regardless of chip technology and surface (PI, SiN, etc.) or may be any such semiconductor chip.

[0043] The chip 110 can be arranged on a chip carrier 116. The chip carrier 116 can comprise or consist of a substrate, for example, an inorganic or organic substrate, such as a polymer, e.g., PET or PI, or any other suitable substrate. For example, the substrate can comprise a flexible substrate, a leadframe, a printed circuit board, or the like.

[0044] In various embodiments, the semiconductor package 200 comprises a layer 228 which is thermally coupled to the chip 110. The layer 228 is arranged such that it at least partially covers the chip 110. In various embodiments, the layer 228 can, for example, cover a side of the chip 110 facing away from a carrier 116, for example completely. In various embodiments, the layer 228 can cover part of the side of the chip 110 facing away from the carrier 116, for example at one or more locations at which structures are arranged in the chip 110 that can most easily be damaged by heat, for example by thermal energy that can be released during an exothermic reaction of material of the layer 228. In various embodiments, the layer 228 can, for example additionally, at least partially cover other sides of the chip 110.

[0045] In various embodiments, the layer 228 is arranged in direct contact with the chip 110.

[0046] In comparative examples, which are not exemplary embodiments, at least one additional layer (not shown) can be arranged between the chip 110 and the layer 228. The at least one additional layer can, for example, comprise an adhesion promoter, or comprise or consist of another functional component. The additional layer can be designed such that it does not impair, or at most only insignificantly impairs, the thermal coupling of the layer 228 to the chip 110 and the heating of the chip 110 by means of an exothermic reaction taking place in the layer 228.

[0047] In various embodiments, the layer 228 is formed from a material having a trigger temperature of approximately greater than or equal to 200°C, at which an exothermic reaction takes place.

[0048] In various embodiments, the material of layer 228 on chip 110 is thermodynamically metastable, i.e., it can decompose if its activation energy is exceeded. The decomposition can be highly exothermic, i.e., with the development of strong heat. The heat can be so high locally that an active layer (or at least a portion thereof) of chip 110 is irreversibly destroyed. Layer 228 can be designed such that it does not begin to react during production (e.g., during molding) or reliability tests. For this, an activation energy of >190°C may be necessary, for example. The process temperature can be maintained for a longer time (several minutes or hours) without an exothermic reaction occurring. In other words, triggering of the exothermic reaction by a temperature below the trigger temperature can be excluded, regardless of the duration of the exposure.

[0049] In various embodiments, the exothermic reaction may be a chemical reaction with oxygen, for example, with oxygen that may be present in an atmosphere surrounding layer 228.

[0050] In various embodiments, the layer 228 is formed from a thermodynamically metastable material, namely from a thermodynamically metastable lithium (Li) compound, for example from a substoichiometric Li 1-x (Co, Ni, Mn)O2.

[0051] In various embodiments, the layer 228 may, for example, be Li 0.2 Ni 0.8 Co 0.15 Al 0.05 O2 and / or Li 0.5 CoO2 and / or Li 0.15 Mn2O4, whose respective activation temperature curve (differential scanning calorimetry in mW / mg) as a function of the temperature in °C) in Fig. 3, and / or LiNiO2 and / or Li 0.45 CoO2. In Fig. 3 shows that the activation temperature for each of the materials shown has a range instead of a sharp value. For example, Li 0.2 Ni 0.8 Co 0.15 Al 0.05 O2, which is a metastable lithium compound, has an onset temperature for exothermic decomposition of about 230°C (with a range of about 210°C to about 240°C). Li 0.5 CoO2, another metastable lithium compound, can have an onset temperature for exothermic decomposition of about 218°C (with a range of about 196°C to about 240°C). Li 0.15 Mn2O4, another metastable lithium compound, can have an onset temperature for exothermic decomposition of about 295°C (with a range of about 260°C to about 320°C).

[0052] That is, an exothermic reaction of Li 0.2 Ni 0.8 Co 0.15 Al 0.05O2 can be triggered, for example, by applying temperatures in the range from about 210°C to 240°C, for example from about 230°C. An exothermic reaction of Li 0.5 CoO2 can be triggered, for example, by applying temperatures in the range from about 196°C to 240°C, for example from about 218°C. An exothermic reaction of Li 0.15 Mn2O4 can, for example, be released by applying temperatures in the range from about 260°C to 320°C, for example from about 295°C.

[0053] In various embodiments, the stability of the compound (and thus the trigger temperature of more than about 200 °C) can be adjusted via transition metal species in the compound and a Li stoichiometry factor x. This means that, apart from the factors mentioned above and exemplified in Fig. 3, other thermodynamically metastable compounds can also be used for layer 228, for example other Li compounds.

[0054] In various embodiments, the layer 228 can be designed in such a way, for example the material or the material composition of the layer 228 can be selected in such a way that during production of the semiconductor package 200 and possibly during production of a chip card (see Fig. 2B) using the semiconductor package 200, the exothermic reaction of the layer 228 is not triggered. This means that the layer 228 can be designed such that the semiconductor package 200 can be heated to temperatures customary in process technology during processes carried out during or after arranging the layer 228, for example to temperatures up to approximately 150°C, for example up to approximately 160°C, for example up to approximately 170°C, for example up to approximately 180°C, for example up to approximately 190°C, without the exothermic reaction being triggered. For example, encapsulation of the semiconductor package 200, e.g., molding, can lead to a temperature increase in the chip 110, for example to a temperature increase of up to approximately 190°C.

[0055] In various embodiments, the layer 228 may be designed such that the temperature customary in the process technology can be maintained for a longer period of time, eg up to about 10 minutes, eg up to about 15 minutes, eg up to about 30 minutes, eg up to about 1 hour, eg up to about 2 hours, without the exothermic reaction being triggered.

[0056] In various embodiments, the material or the material composition of the layer 228 can be adapted to the process temperatures expected during the production of the semiconductor package 200 or the chip card 201. For example, if production processes are expected which lead to a temperature increase of the chip 110 to more than approximately 190°C, the material or the material composition of the layer 228 can be designed such that the activation temperature, for example the lowest temperature in the range of the activation temperature (see, for example, Fig. 3 and associated description), has a minimum distance sufficient to avoid triggering the exothermic reaction at the expected process temperatures. For example, the minimum distance may be approximately 10°C, for example approximately 15°C, for example approximately 20°C, for example approximately 40°C, for example approximately 70°C.

[0057] In various embodiments, the layer 228 is configured and arranged relative to the chip 110 such that, when an exothermic reaction of the material of the layer 228 is triggered, at least one component of the chip 110 is destroyed due to the temperature increase caused by the exothermic reaction.

[0058] The temperature increase caused by the exothermic reaction may be, for example, at least 400°C, for example at least 450°C, for example at least 500°C, for example at least 700°C, for example at least 800°C, for example at least 1000°C. At a temperature increase of at least approximately 1000°C, at which the chip 110 may be heated to over 1000°C, at least partially, ie, in at least one region, a metallization and an implantation profile of the chip 110 may be destroyed.

[0059] In various embodiments, the at least one region of the chip 110 in which a temperature increase can occur upon triggering the exothermic reaction in the layer 228 can be a vertical portion of the chip 110, for example, a vertical portion of the chip 110 a few µm (e.g., approximately 4 to 6 µm) thick, which extends from an active side of the chip 110 into the chip 110. Layer 228 can be thermally coupled to the active side of the chip 110.

[0060] In various embodiments, the at least one region of the chip 110 in which a temperature increase may occur upon triggering the exothermic reaction in the layer 228 may be a lateral portion of the chip 110.

[0061] To increase the temperature in chip 110 upon triggering the exothermic reaction in layer 228, layer 228 may be thermally coupled to chip 110 in various embodiments. Layer 228 may, for example, be arranged directly on chip 110. In various embodiments, layer 228 may be indirectly connected to chip 110, for example, by means of a thermally conductive material, for example, by means of a thermally conductive bonding layer (not shown).

[0062] In various embodiments, the layer 228 may have a thickness in a range from about 20 µm to about 200 µm, for example from about 20 µm to about 100 µm, for example from about 25 µm to about 75 µm.

[0063] In various embodiments, the layer 228 may have a thickness that is approximately one to four times the thickness of the chip 110, for example, approximately twice the thickness of the chip 110.

[0064] In various embodiments, the layer 228 may be arranged on the chip 110, for example, by means of paste printing, sol-gel deposition, PVD, CVD, or by means of any other suitable method.

[0065] In various embodiments, the semiconductor package 200 may further include an encapsulation material 230 that at least partially covers the chip 110 and the layer 228.

[0066] In various embodiments, the encapsulation material 230 may comprise a conventional encapsulation material (also referred to as encapsulation material). In this case, it may be possible to remove the encapsulation material, e.g., by wet-chemical means, without damaging the chip 110. However, a process may nevertheless be performed, e.g., without knowledge of the presence of the layer 228, in which energy is supplied that exceeds the activation energy of the layer 228, so that in this case, too, the layer 228 may provide additional protection against (unauthorized) access to the chip.

[0067] In various embodiments, the encapsulation material 230 may be designed, for example with regard to material and arrangement, such that it may be impossible, substantially impossible, or difficult (e.g., only possible with great effort) to free the chip 110 from the encapsulation material 230 without exceeding the activation energy of the layer 228.

[0068] In various embodiments, the encapsulation material 230 may be arranged over and / or on the chip 110 provided with the layer 228 and on the substrate 116 on which the chip 110 is arranged, such that the chip 110 and the layer 228 are hermetically encapsulated by the chip carrier 116 and the encapsulation material 230.

[0069] In various embodiments, the encapsulation material 230 may comprise a highly cross-linked polymer, for example, a highly cross-linked polymer as described in US Pat. No. 7,598,622 B2 or DE 10 2005 043 657 B4. The highly cross-linked polymer may be substantially resistant to wet-chemical removal of the encapsulation material 230.

[0070] In various embodiments, an attack on the chip 110 may then require the removal of the resistant encapsulation material 230, e.g., the highly cross-linked polymer, by grinding, laser irradiation, and / or plasma etching. In doing so, energy may be released or transferred to the chip 110 (and thus also to the layer 228 thermally coupled to the chip 110), which may be sufficient to cause the layer 228 to react. In other words, the chemically resistant encapsulation material 230 may protect the chip 110 in such a way that removing the encapsulation material 230 from the chip 110 requires processes that transfer energy to the chip 110, so that the activation energy (or activation temperature) of the layer 228 can be exceeded, thus triggering the exothermic reaction in the layer 228. The resulting temperature increase in at least a partial area of ​​the chip 110 can render the chip 110 unusable, e.g.partially destroy.

[0071] Fig. 2B shows a schematic top view of a chip card 101 according to various embodiments.

[0072] In various embodiments, the chip card 201 has a chip card body 220 and a semiconductor housing 200 formed as a chip card module according to various embodiments.

[0073] In various embodiments, the chip card body 220 may be manufactured in a manner known to those skilled in the art and may include known features and materials.

[0074] The chip card module 200 can be arranged in the chip card body 220 according to various embodiments.

[0075] The chip card 201 can be implemented in various embodiments, as shown in Fig. 2B, be suitable for contactless communication.

[0076] In various embodiments, however, the chip card may also be suitable exclusively for contact-based communication or for both contact-based and contactless communication.

[0077] Fig. 4 shows a flowchart 400 of a method for manufacturing a semiconductor package according to various embodiments.

[0078] In various embodiments, the method comprises thermally coupling a layer formed from a material having a trigger temperature of greater than or equal to 200°C, above which an exothermic reaction takes place, to a chip (in 410), and at least partially covering the chip and the layer with an encapsulation material, wherein the layer is configured and arranged relative to the chip such that, upon a triggered exothermic reaction of the material of the layer, at least one component of the chip is damaged due to the temperature increase caused by the exothermic reaction (in 420).

[0079] In various embodiments, thermally coupling the layer to the chip comprises applying the layer directly to a surface of the chip, e.g., to an active side of the chip, by means of paste printing, sol-gel deposition, PVD, or CVD.

[0080] In various embodiments, at least partially covering the chip and the layer with the encapsulation material may comprise arranging the encapsulation material on the chip on which the layer is applied and a substrate on which the chip is arranged, such that the chip and the layer may be hermetically encapsulated by the chip carrier and the encapsulation material.

[0081] Further features and embodiments of the method emerge from the description of the device, and vice versa.

Claims

[1] Semiconductor package (200), comprising: • a chip (110); • a layer (228) which is in direct contact with the chip (110) and which is formed from a material which has a trigger temperature of greater than or equal to 200 °C, above which an exothermic reaction takes place; and • encapsulation material (230) that at least partially covers the chip (110) and the layer (228); • wherein the layer (228) is configured and arranged relative to the chip (110) in such a way that, when an exothermic reaction of the material of the layer (228) is triggered, at least one component of the chip (110) is damaged due to the temperature increase caused by the exothermic reaction, • wherein the layer (228) is a thermodynamically metastable inorganic layer, and • wherein the material of the thermodynamically metastable inorganic layer (228) is a Li-based compound. [2] The semiconductor package (200) of claim 1, wherein the Li-based compound is a Li metal oxide. [3] The semiconductor package (200) according to any one of claims 1 or 2, wherein the Li-based compound is a Li-based compound with one or more transition metals. [4] Semiconductor package (200) according to one of claims 1 to 3, wherein the layer (228) has a layer thickness of at least 10 µm. [5] Semiconductor package (200) according to one of claims 1 to 4, wherein the encapsulation material (230) comprises or is formed from a highly cross-linked encapsulation material. [6] Semiconductor package (200) according to one of claims 1 to 5, wherein at least one component of the chip (110) has a temperature increase of at least 400°C. [7] Semiconductor package (200) according to one of claims 1 to 6, wherein upon triggering an exothermic reaction of the material of the layer (228), the triggered exothermic reaction takes place in an oxygen-containing environment. [8] A method for manufacturing a semiconductor package (200), comprising: • directly contacting (410) a layer (228) formed from a material having a trigger temperature of greater than or equal to 200 °C, above which an exothermic reaction takes place, with a chip (110); and • at least partially covering (420) the chip (110) and the layer (228) with an encapsulation material; • wherein the layer (228) is configured and arranged relative to the chip (110) such that, when an exothermic reaction of the material of the layer (228) is triggered, at least one component of the chip (110) is damaged due to the temperature increase caused by the exothermic reaction • wherein the layer (228) is a thermodynamically metastable inorganic layer, and • where the material of the thermodynamically metastable inorganic layer is a Li-based compound. [9] Chip card (201), comprising: a chip card body (220); and a semiconductor package (200) according to one of claims 1 to 7.

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