Sensorless temperature compensation for power switching devices

Abstract

Inverter (15) for an electric vehicle drive, comprising: a bridge that includes a plurality of power switching devices with corresponding isolated gate terminals (61) and emitter terminals (63); a PWM circuit that determines switching commands to control the bridge; a plurality of gate drivers (37) that receive switching commands and provide gate drive signals for the corresponding gate terminals; and a plurality of gate capacitors (65), each thermally coupled to a corresponding switching device and electrically connected between the corresponding gate terminals (61) and emitter terminals (63), wherein each gate capacitor (65) has a negative temperature coefficient suitable for counteracting changes in the switching speed of the switching devices over a predetermined temperature range, characterized in that the switching devices consist of a plurality of power semiconductor chips (70) and wherein each gate capacitor (65) consists of a surface-mountable capacitor (75) with a negative temperature coefficient, which is attached to a corresponding power semiconductor chip (70) with the corresponding switching device.

Description

GENERAL STATE OF THE ART

[0001] The present invention relates generally to the control of switching transitions for power switching transistors and in particular to the provision of automatic temperature compensation to maintain desirable switching speeds for transistors with insulated gate electrodes for power converters of a type used in electrified vehicles.

[0002] Electrified vehicles, such as hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs), and battery electric vehicles (BEVs), use inverter-driven electric machines to provide traction torque. A typical electric drive system includes a DC power source (such as a battery pack or fuel cell) coupled via power contactors to a variable voltage converter (VVC) to regulate a main bus voltage through a main DC intermediate capacitor. An inverter is placed between the main buses and a traction motor to convert the DC current into alternating current, which is coupled to the motor windings to propel the vehicle.

[0003] The inverter incorporates transistor switching devices (such as insulated-gate bipolar transistors or IGBTs) connected in a bridge configuration to multiple phase branches. A typical configuration includes a three-phase motor driven by a three-phase inverter. An electronic controller switches the switches on and off to convert a DC voltage from the bus to an AC voltage applied to the motor. The inverter is controlled in response to various measured conditions, including the rotational position of the electric motor and the current flow in each phase.

[0004] The inverter for the electric motor can preferably modulate the pulse width of the DC supply voltage to provide an approximate sinusoidal current output for driving the electric motor at a desired speed and torque. Pulse width modulation (PWM) control signals are used to drive the gates of the IGBTs, switching them on and off as needed. In an idealized form, the gate drive control signals are square wave signals that switch each power switching device (e.g., IGBT) between a fully off and a fully on (saturated) state. During the switch-off and on-time cycles, the device requires time to respond to the change in the gate drive signal.For example, after the gate driver signal transitions from an off state to an on state, the line through the device output goes from zero current flow to maximum current flow within a few microseconds. The switching speed or time depends on the slew rate of the current change (di / dt) and the voltage change (dv / dt), as determined by the characteristics of the switching device and its associated circuitry, including the gate driver.

[0005] The optimal switching speed of a power semiconductor transistor device is a trade-off between high loads, which could reduce reliability at very high switching speeds, and reduced efficiency and increased power losses at lower switching speeds. However, with variations in the transistor's operating temperature, the switching speed changes in response to certain temperature-sensitive parameters of the transistor, including the gate internal resistance, threshold voltage, and transconductance. Generally, the switching speed decreases with increasing temperature, thus increasing switching losses; and the voltage load increases with decreasing temperature, while the failure voltage decreases, which could affect reliability.

[0006] To ensure reliable operation over a wide range of operating temperatures, a conventional approach was to select an optimal gate drive signal waveform or transconductance (e.g., as determined by the gate resistor or similar control parameters) and then configure a gate driver and the transistor device's auxiliary circuitry to achieve the optimal transconductance at the lowest operating temperature. For example, the voltage of the gate drive signals and / or the resistance of a gate resistor coupling a gate driver to the gate terminal of the transistor device could be designed to determine a target switching line, thereby setting the lowest acceptable switching time to occur at the worst-case temperature. Although power loss increases as the temperature rises above the lowest temperature, excessive stress is avoided at all temperatures.

[0007] German patent DE 10 2015 201 227 A1 describes an inverter for an electric vehicle drive system, comprising a bridge that includes a plurality of power switching devices with corresponding isolated gate and emitter terminals. The inverter also includes a plurality of gate drivers that receive switching commands and provide gate drive signals for the corresponding gate terminals, and a plurality of gate capacitors. Further prior art is described in US 2002 / 0080551 A1.

[0008] To avoid both excessive stress and reduced efficiency, it is possible to actively compensate for temperature-related parameter changes. Therefore, compensatory measures have been implemented to shorten the switching time when temperature increases slow down the transistor's switching speed. For example, the switching speed has been increased by increasing the magnitude and / or steepness of the current supplied to the gate by the gate drive signal in proportion to the temperature increase. It is known to vary the gate current directly by using a controllable current source for the gate driver, or indirectly by manipulating the gate current by increasing the gate voltage or gradually decreasing the gate resistance. The parameters have been, for example,The switching speed can be adjusted 1) using a closed-loop control system based on a measured temperature, and 2) automatically by integrating a negative temperature coefficient (NTC) resistor connected to the gate. However, a closed-loop control system requires additional components, increasing cost and complexity. An NTC resistor (e.g., a thermistor) is also relatively expensive and bulky. It would be desirable to achieve automatic switching speed compensation at a lower cost and with a smaller footprint. BRIEF SUMMARY OF THE INVENTION

[0009] The present invention provides automatic compensation by adding a self-contained capacitive element to the transistor gate circuit (which operates at the same temperature as the transistor device) and exhibiting a negative temperature coefficient. The circuit parameters are optimized at the most probable operating temperature, thus automatically compensating for the switching speed, which decreases at higher temperatures and increases at lower temperatures (i.e., without requiring feedback from a temperature sensor). The NTC characteristics of an NTC capacitor can be achieved at a low cost by using small, space-saving devices. Furthermore, the use of an NTC capacitor allows for a smaller gate resistor, leading to further potential cost savings in the gate driver.

[0010] In one aspect of the invention, an inverter for an electric vehicle drive comprises a bridge enclosing a plurality of power switching devices with corresponding isolated gate and emitter terminals. A PWM circuit determines the switching commands for controlling the bridge. A plurality of gate drivers receives the switching commands and provides gate drive signals for the corresponding gate terminals. A plurality of gate capacitors are each thermally coupled to a corresponding switching device and electrically connected between the corresponding gate and emitter terminals. Each gate capacitor has a negative temperature coefficient suitable for counteracting changes in the switching speed of the switching devices over a predetermined temperature range. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a schematic block diagram showing a powertrain of an electrified vehicle according to an embodiment of the present invention. Fig. Figure 2 shows switching times / waveforms for turning on a transistor device. Fig. Figure 3 shows switching times / waveforms for switching off a transistor device. Fig. Figure 4 is a temperature profile showing a negative temperature coefficient for a gate capacitor of an embodiment of the invention. Fig. Figure 5 is a circuit diagram showing a transistor and gate circuit. Fig. Figure 6 is a diagram that cancels out the variation of the transistor switching time over temperature by varying the capacitance of an NTC capacitor to obtain an essentially constant switching time. Fig. Figure 7 is a top view showing an NTC capacitor attached to the surface of an inactive area of ​​a semiconductor chip for an IGBT. Fig. Figure 8 is a top view showing a standalone NTC capacitor connected to a semiconductor chip for an IGBT via hook-up wires. Fig. Figure 9 is a diagram comparing a gate resistor of the present invention with a gate resistor provided by a prior art thermistor. Fig. Figure 10 is a schematic representation of an inverter phase branch in which an NTC capacitor of the present invention is integrated. DETAILED DESCRIPTION OF PREFERRED EXECUTION FORMS

[0011] Fig. Figure 1 shows a hybrid electric vehicle 10, in which the vehicle wheels 11 can be driven by an internal combustion engine 12 and / or a traction motor 13 via a transmission 14. To provide electric drive, the traction motor 13 can be driven via an inverter switching bridge 15, which receives a DC supply voltage at a DC supply capacitor 16. The DC supply voltage can result from the conversion of direct current from a battery pack 17 by a converter 18 known in the art.

[0012] The inverter 15 includes phase branches 20, 21, and 22, which are connected to the motor phase windings 23, 24, and 25. Phase branch 20 has an upper switching device 26 and a lower switching device 27, which are connected via the DC link 16 and provide a connection point 28 between devices 26 and 27, which is connected to the winding 23 of the motor 13. Similarly, phase branch 21 has an upper switching device 30 and a lower switching device 31, while phase branch 22 has an upper switching device 32 and a lower switching device 33. The connection points 34 and 35 are connected to the motor windings 24 and 25, respectively.

[0013] The switching devices can consist of IGBTs, antiparallel diodes, wide-bandgap FETs, or other devices known in the field. Each of the upper and lower switching devices has a corresponding gate terminal that is coupled to the driver 37 in a controller 38. The current sensors 40, coupled to each of the junctions of the phase branches, measure the current flow through each phase winding. The measured current values ​​are provided by sensors 40 to logic circuits 41 in the controller 38 for use in determining the PWM switching signals to be applied to the switching devices by the driver 37. As is known in the field, the measured current can be compared with a desired motor current, as determined according to a torque requirement 42 that can be derived from an operator input, such as an accelerator pedal, so that the operator can control the vehicle speed.Therefore, the current feedback determines a PWM duty cycle in the logic circuits 41, which is then used to generate the timing of the PWM switching signals for the phase branch switching devices.

[0014] The timing of the PWM switching signals can be represented as a square wave voltage that alternates between a turn-off voltage and a turn-on voltage for each corresponding switching device. The logic circuits 41 and / or the drivers 37 further influence the switching signals to add dead-time intervals, to calibrate the signals for the devices used, and for other purposes.

[0015] Fig. Figure 2 represents the output current and output voltage for a power switching device (e.g., an IGBT) as it transitions from an off state to an on state. While it is in an off state, the voltage in the device (V) CE ) high and is the device current (I C) essentially zero. When the switched-on state is reached, there is a positive load current and the voltage V is CE very small. The switching time (i.e., the turn-on time) could, for example, be defined as the time between the transition in the gate drive signal and the stabilization of the output current. Tracks 45 and 46 are the output voltage and output current, respectively, obtained at a first (lower) temperature, and tracks 47 and 48 are the output voltage and output current, respectively, obtained at a second (higher) temperature. As a result of the temperature increase, the switching time is increased, the di / dt is reduced, and the switching loss is increased. Similarly, Fig. Figure 3 shows the output current and output voltage of a power switching device when it transitions from an on-state to an off-state. Tracks 50 and 51 show the output voltage and output current obtained at the first (lower) temperature, and tracks 52 and 53 show the output voltage and output current obtained at the second (higher) temperature. As a result of the temperature increase, the switching time is again increased, the di / dt is reduced, and the switching loss is increased.

[0016] Fig. Figure 4 shows the change in capacitance (expressed as a percentage) from a nominal (i.e., rated) capacitance value at room temperature. The curve covers a predefined range of operating temperatures over which the inverter switching devices must operate, with the NTC capacitance exhibiting a volume approximately 20% above the nominal capacitance at -40 °C and a value approximately 80% below the nominal capacitance at 150 °C. A typical nominal capacitance value can be in the double-digit nF range. A typical capacitance at 150 °C can be less than 1 nF.

[0017] An NTC capacitor can be constructed using any known technique. A preferred type of NTC capacitor is a ceramic capacitor with several alternating layers of ceramic and metal. The ceramic capacitors are readily designed to exhibit the desired NTC property. The NTC property can be non-linear (as in Fig. 4) using a Class 2 ceramic capacitor or can be linear using a Class 1 ceramic capacitor to precisely counteract the temperature-dependent switching time changes inherent in a particular power transistor device.

[0018] Fig. Figure 5 shows a preferred embodiment of a switching device and auxiliary circuit for automatically compensating temperature-dependent switching times. An IGBT 60 has a gate terminal 61, a collector terminal 62, and an emitter terminal 63. An antiparallel diode 64 is provided at the output of the IGBT 60. An NTC capacitor 65 is electrically connected between the gate terminal 61 and the emitter terminal 63. The effect of supplementing the gate-emitter capacitance is to slow down the IGBT switching time to an extent proportional to the added capacitance. A gate resistor 66 is connected in series with the gate terminal 61 to provide a gate driver signal. In addition to the electrical connection, the NTC capacitor 65 is thermally coupled to the IGBT 60 to ensure it is at substantially the same temperature.

[0019] In Fig. Figure 6 shows a track 67 representing the inherent switching time of a switching transistor, which increases with temperature. Track 68 shows an incremental switching time resulting from the added NTC capacitor, which is inversely proportional to temperature. The NTC capacitor is specifically designed to counteract the changes inherent in the switching device, so that the combined switching time remains essentially constant, as shown by track 69. Accordingly, a desired compromise, optimizing both device load and power loss, can be maintained over a predetermined range of operating temperatures, while employing a temperature-sensitive device at a low cost and with a small footprint.

[0020] Fig. Figure 7 shows a top view of a semiconductor chip 70 of a typical power switching device, such as an IGBT. An emitter 71 is provided on one side of the chip 70, and a collector (not shown) is located on the side of the chip 70 that is not visible. A gate pad 72 and an emitter pad 74 are placed on the emitter side of the chip 70. Another interconnect pad 73 may be provided for a different function (e.g., current mirroring or temperature measurement). A surface-mount NTC capacitor 75 is electrically connected between pads 72 and 74 (e.g., by surface-mount soldering or polysilicon traces). The surface mounting of the NTC capacitor 75 ensures very good thermal coupling. Fig. 8 is a standalone NTC capacitor 76 connected to the emitter pad 74 and the gate pad 72, respectively, via the connecting wires / bond wires 77 and 78. Therefore, the NTC capacitor 76 shares the same directly bonded copper (DBC) substrate with the chip 70 or is physically very close to the chip 70 for good thermal coupling. When used, the bond wires 77 and 78 are of short length to maintain good thermal coupling.

[0021] Even when using an NTC capacitor to achieve the desired temperature-dependent increases in switching time, designed to specifically counteract the changes inherent in the switching device, it is desirable to include a gate resistor in series between the gate driver and the gate terminal. The gate resistor serves to: 1) limit the gate peak current to limit the output stage of the driver IC; 2) prevent gate ringing; 3) dissipate power in the gate capacitor; and 4) help prevent parasitic switching of the transistor. As shown in Fig. Figure 9 shows that a gate resistor R is preferably used. G-min They are used to perform these other functions and to help ensure that a lower limit of the switching time is maintained. Trace 79 shows an example of a thermistor resistor R. TAccording to a prior art embodiment, a thermistor is used to compensate for temperature-dependent changes in the transistor's inherent switching time. Over almost the entire temperature range, the thermistor design creates a total gate resistance greater than the minimum required to limit the peak current and perform the other functions mentioned above. The gate driver must be designed to generate gate drive signals of sufficient magnitude to operate with these higher gate resistance values. In the present invention, these higher gate resistances are avoided, and the requirements for the gate driver are relaxed, which can lead to lower power requirements and the use of less expensive components for the gate driver.

[0022] Fig.Figure 10 shows the present invention as used with power switching devices of an inverter phase branch. A phase branch 80, connected between a positive bus 81 and a negative bus 82, consists of IGBTs 83 and 84 connected in series with an intermediate connection 85, which is connected to a load (not shown). The IGBTs 83 and 84 are manufactured as part of a power module or power card 86. The NTC gate capacitors 87 and 88, which are connected to the IGBTs 83 and 84, are mounted on the power card 86 so that they are thermally coupled (i.e., the NTC capacitors are at the same temperature as the IGBTs). The gate drivers 90 are coupled to the corresponding gate terminals of the IGBTs 83 and 84 by the gate resistors 91 and 92.The drivers 90 receive switching commands from a PWM circuit and provide gate drive signals for the corresponding gate terminals to control the bridge output. Due to the negative temperature coefficient of the gate capacitors 87 and 88, changes in the switching speed of the IGBTs 83 and 84 that occur over a predefined temperature range are counteracted by the change in capacitance of the gate capacitors 87 and 88 over the same temperature range. The gate resistors 91 and 92 provide a corresponding fixed resistance in series with each corresponding gate terminal. The fixed resistance is smaller than the resistance required according to the prior art, since the resistors are no longer the primary element used to slow down the switching speed.At the lowest temperatures in the range, the NTC capacitors 87 and 88 have their maximum capacitance and primarily control the additional delay in the switching time. At the highest temperatures in the range, the capacitance of the NTC capacitors 87 and 88 preferably drops close to zero. For the highest temperatures, the resistances of the gate resistors 91 and 92 are preferably selected to provide the desired switching time. Furthermore, the resistance of the gate resistors 91 and 92 is designed to be sufficient to perform other important functions, including limiting the gate peak current to protect the output stage of the driver IC, preventing gate ringing, dissipating power in the gate circuit, and helping to avoid parasitic connection of the transistor.

Claims

[1] Inverter (15) for an electric vehicle drive, comprising: a bridge that includes a plurality of power switching devices with corresponding isolated gate terminals (61) and emitter terminals (63); a PWM circuit that determines switching commands to control the bridge; a plurality of gate drivers (37) that receive switching commands and provide gate drive signals for the corresponding gate terminals; and a plurality of gate capacitors (65), each thermally coupled to a corresponding switching device and electrically connected between the corresponding gate terminals (61) and emitter terminals (63), wherein each gate capacitor (65) has a negative temperature coefficient suitable for counteracting changes in the switching speed of the switching devices over a predetermined temperature range, characterized by, that the switching devices consist of a plurality of power semiconductor chips (70) and wherein each gate capacitor (65) consists of a surface-mountable capacitor (75) with a negative temperature coefficient attached to a corresponding power semiconductor chip (70) with the corresponding switching device. [2] Inverter (15) according to claim 1, wherein the line switching devices consist of a plurality of power semiconductor chips (70) and wherein each gate capacitor consists of an independent component which is connected to a corresponding switching device via switching wires (77, 78) which are soldered to a corresponding power semiconductor chip (70). [3] Inverter (15) according to claim 1, wherein the gate capacitors consist of ceramic capacitors. [4] Inverter (15) according to claim 3, wherein the ceramic capacitors are multilayer ceramic capacitors. [5] Inverter (15) according to claim 1, further comprising a plurality of gate resistors (66) each providing a corresponding fixed resistance in series with a corresponding gate terminal (61), wherein the fixed resistance is designed to provide a predetermined switching time when the gate capacitors have a maximum temperature within the predetermined temperature range. [6] Power circuit for an inverter bridge (15), comprising: an isolated gate transistor (60) with gate (61), collector (62) and emitter terminals (63) and with a switching time that varies over a predetermined temperature range; and a gate capacitor (65) which is thermally coupled to the transistor (60) and electrically connected between the gate (61) and emitter terminals (63), wherein the gate capacitor (65) has a negative temperature coefficient which is suitable to counteract changes in the switching speed of the transistor (60) over the specified temperature range, characterized by , that the transistor (60) consists of a power semiconductor chip (70) and wherein the gate capacitor (65) consists of a surface-mountable capacitor (75) attached to the power semiconductor chip (70). [7] Circuit according to claim 6, wherein the transistor (60) consists of a power semiconductor chip (70) and wherein the gate capacitor (65) consists of a separate component which is connected to the transistor (60) via connecting wires (77, 78) which are soldered to the power semiconductor chip (70). [8] Circuit according to claim 6, wherein the gate capacitor (65) consists of a ceramic capacitor. [9] Circuit according to claim 8, wherein the ceramic capacitor is a multilayer ceramic capacitor. [10] Circuit according to claim 6, further comprising a gate resistor (66, 91, 92) providing a fixed resistance in series with the gate terminal, wherein the fixed resistance is designed to provide a predetermined switching time when the gate capacitor (65) has a highest temperature within the predetermined temperature range.

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