Semiconductor device and power conversion device

Abstract

Semiconductor device (101, 102, 103, 104, 105), which has a high-side module area (10) and a low-side module area (20) arranged so that they overlap in a top view, where: - the high-side module area (10) comprises a high-side semiconductor chip (11), an integrated high-side circuit (12) and a high-side conductor frame (13) which has the high-side semiconductor chip (11) arranged thereon, - the low-side module area (20) comprises a low-side semiconductor chip (21), an integrated low-side circuit (22) and a low-side conductor frame (23) which has the low-side semiconductor chip (21) arranged thereon, - the semiconductor device (101, 102, 103, 104, 105) further comprises a control side frame (31) which is formed in one piece, extends over the high-side module area (10) and the low-side module area (20) and has the integrated high-side circuit (12) and the integrated low-side circuit (22) arranged thereon, - the integrated high-side circuitry (12) and the integrated low-side circuitry (22) are arranged on a main surface of the control side frame (31), and - at a boundary (B1, B2) between the high-side module area (10) and the low-side module area (20) the control side frame (31) is bent such that the high-side semiconductor chip (11) and the low-side semiconductor chip (21) are opposite each other.

Description

Background of the inventionField of the invention

[0001] The present invention relates to a semiconductor device and a power conversion device, and more particularly to a semiconductor device as an inverter module having a structure in which a high-side semiconductor element and a low-side semiconductor element oppose each other, and a power conversion device having the semiconductor device. Description of the state of the art

[0002] With a reduction in the size of an inverter module, a reduction in the mounting area on a substrate on the user's operating surface of the inverter module has been urgently required. To respond to such a demand, a conventional inverter module has pursued a reduction in the size and an increase in the performance of a semiconductor chip to reduce the mounting area on a substrate on the user's operating surface. However, in the conventional inverter module, a switching element and a flywheel diode are mounted on the same plane. Therefore, according to a study of the module size, it is necessary to reduce the size of the semiconductor chip having the switching element and the like arranged thereon.

[0003] To achieve characteristics equivalent to those of a non-shrinkable inverter module, an inverter module using a shrunk-down semiconductor chip requires an increase in the performance of the semiconductor chip. However, it is difficult to make the performance of the shrunk-down semiconductor chip better than the performance of the semiconductor chip before shrinkage. Therefore, there are limitations to reducing the substrate mounting area in the conventional inverter module using the above-described method.

[0004] Thus, for example, Japanese Patent Application Laid-Open No. 2013-038105 A discloses the technique of reducing a substrate mounting area of ​​an inverter module by stacking a low-side semiconductor chip (also referred to as a low-side semiconductor chip) having a low-side electrode on a high-side semiconductor chip (also referred to as a high-side semiconductor chip) having a high-side electrode. The low-side electrode and the high-side electrode in the inverter module driven by high power refer to electrodes that respectively receive a low-potential side and a high-potential side of a DC voltage.

[0005] US 6 603 197 B1 relates to a semiconductor power module that is intended to be miniaturized and resistant to interference. In a semiconductor unit, a first circuit with a first semiconductor chip mounted on a first lead frame and a second circuit with a second semiconductor chip mounted on a second lead frame are sealed in a resin package. The first lead frame and the second lead frame are materially separated and arranged such that they overlap. This arrangement allows the physical dimensions to be reduced compared to a conventional semiconductor module in which there is virtually no overlap. Since the module is packaged with resin, the noise resistance of the semiconductor unit can also be reduced, the noise immunity of the semiconductor unit can be improved, and malfunctions can be reduced.

[0006] US 2014 / 0 184 303 A1 discloses a power semiconductor device in which a transistor is either an IGBT or a MOSFET and is arranged near a gate control circuit. It applies a gate control signal from the gate control circuit to the gate of a transistor arranged far from the gate control circuit. The gate control signal is applied to the transistor arranged near the gate control circuit via a resistance element. Summary of the invention

[0007] According to the above-described JP 2013-038105 A, the low-side semiconductor chip having the low-side electrode and the high-side semiconductor chip having the high-side electrode are connected with a center electrode sandwiched therebetween. Therefore, a problem of increasing the thickness of the inverter module as a whole due to the thickness of the center electrode may occur.

[0008] The present invention has been developed in view of the above-described problem, and an object of the present invention is to provide a semiconductor device having a reduced overall size without increasing the overall thickness, and a power conversion device having the semiconductor device.

[0009] The object underlying the invention is achieved in a semiconductor device according to the invention with the features of claim 1 and in a power conversion device according to the invention with the features of claim 10. Advantageous further developments are the subject of the respective dependent claims.

[0010] A semiconductor device of the present invention has a configuration in which a high-side module region and a low-side module region overlap with each other. The semiconductor device further includes a control-side frame formed integrally, extending over the high-side module region and the low-side module region, and having a high-side integrated circuit and a low-side integrated circuit arranged thereon. The high-side integrated circuit of the high-side module region and the low-side integrated circuit of the low-side module region are arranged on a main surface of the control-side frame. At a boundary between the high-side module region and the low-side module region, the control-side frame is bent so that the high-side semiconductor chip and the low-side semiconductor chip face each other.

[0011] The above and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. Short description of the drawings Fig. 1 is a schematic side view showing an arrangement of an inverter module according to a first example of a first embodiment. Fig. 2 is a schematic plan view showing a state of the inverter module according to the first example of the first embodiment before a frame is bent. Fig. 3 is a schematic plan view showing a base line formed in the control side frame in Fig. 2 is included. Fig. 4 is a schematic transparent plan view of the inverter module according to the first example of the first embodiment in Fig. 1 when viewed from above. Fig. 5 is a circuit diagram of the inverter module in Fig. 4. Fig. 6 is a schematic cross-sectional view of a region taken along a line VI-VI in Fig. 4. Fig. Fig. 7 is a schematic cross-sectional view of a region taken along a line VII-VII in Fig. 4. Fig. 8 is a schematic cross-sectional view similar to Fig. 6, for illustrating an arrangement of an inverter module according to a second example of the first embodiment. Fig. 9 is a schematic plan view similar to Fig. 2 for illustrating an arrangement of an inverter module according to a third example of the first embodiment. Fig. 10 is a schematic side view similar to Fig. 1 for illustrating an arrangement of an inverter module according to a fourth example of the first embodiment. Fig. 11 is a schematic side view similar to Fig. 1 for illustrating an arrangement of an inverter module according to a fifth example of the first embodiment. Fig. 12 is a block diagram showing an arrangement of a power conversion system in which a power conversion device according to a second embodiment is applied. Description of the preferred embodiments

[0012] Embodiments of the present invention will be described below with reference to the drawings. First embodiment

[0013] First, an arrangement of an inverter module as an arrangement of a semiconductor device according to a first example of the present embodiment will be described with reference to FIG. Fig. 1 to 7. For the sake of simplicity, an X-direction, a Y-direction, and a Z-direction are introduced in part of the figures in the description.

[0014] Fig. Fig. 1 is a side view (front view) showing an external appearance when the inverter module according to the first example of the present embodiment is viewed from a direction I shown in Fig. 4 is indicated by an arrow. With reference to Fig. 1, an inverter module 101 according to the first example of the present embodiment includes a high-side module region 10 and a low-side module region 20. The inverter module 101 is, for example, a module that performs voltage conversion or power conversion of a DC voltage. The high-side module region 10 is a region of the inverter module 101 that serves as a high-side circuit configured to receive the high-potential side of the DC voltage. The low-side module region 20 is a region of the inverter module 101 that serves as a low-side circuit configured to receive the low-potential side of the DC voltage.

[0015] The high-side module region 10 comprises a high-side semiconductor chip 11, a high-side integrated circuit 12, and a high-side lead frame 13. The low-side module region 20 comprises a low-side semiconductor chip 21, a low-side integrated circuit 22, and a low-side lead frame 23.

[0016] The high-side semiconductor chip 11 of the high-side module section 10 is a semiconductor chip to which the high-potential side of a direct current is connected, and includes a switching element 11A and a freewheeling diode 11B. The switching element 11A is a semiconductor chip having a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor) mounted thereon, and the freewheeling diode 11B is a semiconductor chip having the diode mounted thereon. The switching element 11A and the freewheeling diode 11B are arranged on a main surface of the high-side lead frame 13. The high-side lead frame 13 is a lead frame to which the high-potential side of a direct current is connected and functions as an electrode of the high-side circuit.

[0017] The low-side semiconductor chip 21 of the low-side module portion 20 is a semiconductor chip to which the low-potential side of the DC voltage is connected, and includes a switching element 21A and a freewheeling diode 21B. The switching element 21A is a semiconductor chip having a MOSFET or an IGBT mounted thereon, and the freewheeling diode 21B is a semiconductor chip having the diode or a MOSFET mounted thereon. The switching element 21A and the freewheeling diode 21B are arranged on a main surface of the low-side lead frame 23. A wire bonding frame 23C and an n-side lead terminal 23D as the low-side lead frame are lead frames to which the low-potential side of the DC voltage is connected, and function as an electrode of the low-side circuit.

[0018] The high-side integrated circuit 12 is a semiconductor chip on which an integrated circuit for controlling the high-side module region 10 is mounted. The low-side integrated circuit 22 is a semiconductor chip on which an integrated circuit for controlling the low-side module region 20 is mounted. The high-side integrated circuit 12 and the low-side integrated circuit 22 are arranged on the control-side frame 31.

[0019] Fig. 1 shows an arrangement in which the high-side module region 10 lies above the low-side module region 20. Such an arrangement is formed as described below. Referring to Fig. 2 and Fig. 3, in the inverter module 101 according to the first example of the present embodiment, the high-side lead frame 13 disposed in the high-side module region 10 and the low-side lead frame 23 disposed in the low-side module region 20 are separated from each other. However, these high-side lead frames 13 and low-side lead frames 23 may be originally formed as a single piece, which may be separated during the manufacturing process. The high-side lead frames 13 and low-side lead frames 23 are originally formed using a single piece frame member called a "connection bar" that connects the high-side lead frames 13 and low-side lead frames 23 on the outside thereof.

[0020] In Fig. 2, the high-side module region 10 is arranged on the positive side in the X direction with respect to the low-side module region 20. Conversely, the low-side module region 20 can be arranged on the positive side in the X direction.

[0021] Each of the high-side lead frame 13 and the low-side lead frame 23 is arranged so that its main surface lies along an XZ plane. The high-side lead frame 13 includes a power p-side frame 13A and a p-side lead terminal 13B extending therefrom. Since a switching element such as a MOSFET, which is controlled by a high-current supply, is used in the high-side module region 10 as a circuit having a high-side electrode, a terminal region included in the high-side lead frame 13 is defined herein as a power p-side frame 13A and a p-side lead terminal 13B. The power p-side terminal 13A is, for example, a region extending in the rectangular shape, and three switching elements 11A and three freewheeling diodes 11B are, for example, arranged at a distance from each other and bonded by die bonding to the one main surface, ieonto a main surface on the positive side in the Z direction of the power p-side frame 13A in . Fig. 2. Three rows of high-side semiconductor chips 11 aligned in the X-direction have, for example, an UP phase, a VP phase, and a WP phase in this order from the left side to the right side in Fig. 2, and a three-phase inverter can be formed. The high-side lead frame 13 and the high-side semiconductor chip 11 are electrically connected to each other through a die bond using a first bonding material 42A. The p-side lead terminal 13B is a terminal for electrically connecting the high-side semiconductor chip 11, which is connected to the power p-side frame 13A, to the outside of the inverter module 101.

[0022] Similarly, the low-side lead frame 23 includes a power n-side frame 23A and an n-side lead terminal 23B extending therefrom. Since the switching element such as a MOSFET controlled by a high-current supply is used in the low-side module region 20 as a circuit using a low-side electrode, a terminal region included in the low-side lead frame 23 is defined herein as a power n-side frame 23A and an n-side lead terminal 23B.

[0023] Three low-side lead frames 23, each including the power n-side frame 23A and the n-side lead terminal 23B, are arranged at a distance from each other, for example. Three rows of n-side lead terminals 23B and low-side semiconductor chips 21 include, for example, a UN phase, a VN phase, and a WN phase in this order from the right side to the left side in Fig. 2, and a three-phase inverter can be formed thereby. The power n-side frame 23A included in each of the low-side lead frames 23 is, for example, a region extending in the rectangular shape, and a switching element 21A and a freewheeling diode 21B are, for example, arranged at a distance from each other and die-bonded to a main surface, that is, to a main surface on the positive side in the Z direction, of the power n-side frame 23A in Fig. 2. The low-side lead frame 23 and the low-side semiconductor chip 21 are electrically connected to each other through the die bonding connection with the first bonding material. The n-side lead terminal 23B is a terminal for electrically connecting the low-side semiconductor chip 21, which is connected to the power n-side frame 23A, to the outside of the inverter module 101.

[0024] Further, the low-side lead frame 23 is provided, which includes the wire bonding frame 23C and the n-side lead terminal 23D extending therefrom. The low-side semiconductor chip 21 is connected to the low-side lead frame 23, which includes the wire bonding frame 23C and the n-side lead terminal 23D, by an aluminum wire 44.

[0025] In fact, Fig. 2, both three low-side lead frames 23, each including the power n-side frame 23A and the n-side lead terminal 23B, and one low-side lead frame 23 including the wire bonding frame 23C and the n-side lead terminal 23D, are arranged, for example, at a distance from each other and aligned as a low-side lead frame 23. These low-side lead frames 23 can be formed together with the high-side lead frame 13 by dicing an originally one-piece component formed using the connecting bar or the like.

[0026] According to Fig. 2, the control side frame 31 may be arranged, for example, on the positive side in the Y direction with respect to the area where the high-side lead frame 13 and the low-side lead frame 23 are in Fig. 2. Conversely, the control-side frame 31 may be arranged, for example, on the negative side in the Y direction with respect to the high-side lead frame 13.

[0027] The control-side frame 31 is arranged so that a main surface thereof extends along the XY plane, and is arranged so that it extends over the high-side module region 10 and the low-side module region 20. Namely, a single control-side frame 31 is provided so that it is arranged in both the high-side module region 10 and the low-side module region 20. The control-side frame 31 has a control chip placement region 31A and a control lead terminal 31B extending therefrom. The control chip placement region 31A is, for example, a region extending in the rectangular shape, and a total of two control chip placement regions 31A, i.e., one for the high-side module region 10 and one for the low-side module region 20, are formed, for example. The integrated high-side circuit 12 is bonded by die bonding to a main surface, ieThe control chip placement area 31A is connected to a main surface on the positive side in the Z direction of the control chip placement area 31A on the high-side module area 10 side. The low-side integrated circuit 22 is connected by die bonding to a main surface, that is, to a main surface on the positive side in the Z direction, of the control chip placement area 31A on the low-side module area 20 side. The control conductor terminal 31B is a terminal for electrically connecting the high-side integrated circuit 12 and the low-side integrated circuit 22, which are connected to the control chip placement areas 31A, to the outside of the inverter module 101.

[0028] Since the control side frame 31 is arranged to extend over the high-side module area 10 and the low-side module area 20, the control conductor terminal 31B extends in the X direction so that it is continuous at a boundary between the high-side module area 10 and the low-side module area 20. Referring to Fig. 3, a baseline 32 can be defined as being formed by a region in which the control-side frame 31 straddles the boundary between the high-side module region 10 and the low-side module region 20, and control chip placement regions 31A connected to this region. This baseline 32 is a ground potential region common to the high-side module region 10 and the low-side module region 20. Such a baseline 32 is provided, and thus, a mounting area of ​​the inverter module 101 can be further reduced.

[0029] Referring again to Fig. 1 and Fig. 2, the high-side integrated circuit 12 and the switching element 11A are electrically connected by a gold wire 43, i.e., a thin wire made of gold, thereby forming a gate interconnection. The low-side integrated circuit 22 and the switching element 21A are electrically connected by a gold wire 43, i.e., a thin wire made of gold, thereby forming a gate interconnection. Further, the switching element 21A and the freewheeling diode 21B provided on each of three power n-side frames 23A in the low-side module region 20 are electrically connected by an aluminum wire 44, i.e., a thin wire made of aluminum. Each of the three freewheeling diodes 21B and wire interconnection frames 23C are electrically connected by an aluminum wire 44.

[0030] As described above, in the inverter module 101, the switching element 21A and the freewheeling diode 21B as the low-side semiconductor chip 21 are electrically connected by the bonding wire.

[0031] As in Fig. 2, for example, a boundary line B1 and a boundary line B2 extending along the Y direction are provided at the boundary between the high-side module region 10 and the low-side module region 20. Along these boundary lines B1 and B2, the control-side frame 31, which extends specifically over the high-side module region 10 and the low-side module region 20 of the inverter module 101, is bent substantially at a right angle. Namely, a region originally extending in the X direction of a region extending between the boundary line B1 and the boundary line B2 in Fig. 2, towards the positive side in the Z-direction as a result of the bending described above, and the high-side module region 10 is arranged to be substantially parallel to the low-side module region 20, the high-side module region 10 being compared to Fig. 2 is turned over.

[0032] As a consequence, with reference to Fig. 4 to 7, the control-side frame 31 is bent so that the high-side semiconductor chip 11 of the high-side module region 10 and the low-side semiconductor chip 21 of the low-side module region 20 are opposite each other in the Z direction. Specifically, in the inverter module 101, the high-side module region 10 and the low-side module region 20 are arranged to overlap each other in a plan view. The reason why the high-side semiconductor chip 11 and the low-side semiconductor chip 21 face each other as a result of bending the control-side frame 31 as described above is that the high-side semiconductor chip 11 and the low-side semiconductor chip 21 are connected on the main surfaces on the positive side in the Z direction of the high-side lead frame 13 and the low-side lead frame 23, respectively.The high-side module region 10 and the low-side module region 20 are both configured to extend horizontally along the XY direction and to oppose each other. As a result, the inverter module 101 has a horizontally oriented structure.

[0033] Similarly, as a result of the above-described bending of the control side frame 31, the high-side integrated circuit 12 and the low-side integrated circuit 22 are also arranged to face each other in the Z direction. The reason why the high-side integrated circuit 12 and the low-side integrated circuit 22 face each other as a result of the above-described bending of the control side frame 31 is that the high-side integrated circuit 12 and the low-side integrated circuit 22 face one main surface, that is, the main surface on the positive side in the Z direction of the control chip placement areas 31A, respectively, which are arranged in Fig. 2 are connected.

[0034] Although the high-side ladder frame 13, the low-side ladder frame 23 and the control side frame 31 are designed as separate components in Fig. 2 and the like are separated, they are integral by using the connecting bar at the time of bending the control-side frame 31, as described above. Therefore, as a result of bending the control-side frame 31, the high-side lead frame 13 and the low-side lead frame 23 are also oriented to face each other. Specifically, the high-side semiconductor chip 11, the low-side semiconductor chip 21, the high-side integrated circuit 12, and the low-side integrated circuit 22 are first connected by die bonding to the respective portions of the frame, which is integral by using the connecting bar, and then wire bonding is performed by the gold wire 43 and the aluminum wire 44. Thereafter, the frame, which is integral by using the connecting bar, is cut along the boundary line B1 and the boundary line B2 in Fig. 2 so that the high-side semiconductor chip 11 and the low-side semiconductor chip 21, etc., face each other. Next, the connecting bar is cut into the high-side lead frame 13, the low-side lead frame 23, and the control-side frame 31.

[0035] As in Fig. 4 and Fig. 6, it is preferred that the switching element 11A of the high-side module region 10 and the switching element 21A of the low-side module region 20 at least partially have an overlapping region in a plan view. It is also preferred that the freewheeling diode 11B of the high-side module region 10 and the freewheeling diode 21B of the low-side module region 20 at least partially have an overlapping region in a plan view. Furthermore, as shown in Fig. 4 and Fig. 7, it is preferred that the integrated high-side circuit 12 and the integrated low-side circuit 22 at least partially overlap with each other. Such an arrangement makes it possible to reduce the area of ​​the inverter module 101 in a plan view and to reduce the mounting area on the user's operating surface. Conversely, however, the switching element 11A of the high-side module region 10 and the switching element 21A of the low-side module region 20 may not have an overlapping area in a plan view. The same applies to the freewheeling diode 11B and the freewheeling diode 21B, as well as to the integrated high-side circuit 12 and the integrated low-side circuit 22.

[0036] A protruding portion 41 is formed, in particular, in a region adjacent to a region where the switching element 21A is connected on the main surface of the power n-side frame 23A of the low-side lead frame 23. The protruding portion 41 extends from the low-side lead frame 23 and extends in the Z direction in Fig. 2, that is, in the thickness direction of the low-side lead frame 23. A tip of this protruding portion 41 overlaps in a plan view and is electrically connected to a part of the switching element 11A as the high-side semiconductor chip 11 placed on the power p-side frame 13A of the high-side lead frame 13. In the inverter module 101, the protruding portion 41 is integral with the low-side lead frame 23. Therefore, the protruding portion 41 is electrically connected to the low-side lead frame 23.

[0037] Similarly, a protruding portion 41 is formed particularly in a region adjacent to a region where the freewheeling diode 21B is connected on the main surface of the power n-side frame 23A. This protruding portion 41 is substantially similar to the above-described protruding portion 41, and a tip thereof overlaps in a plan view and is electrically connected to a part of the freewheeling diode 11B of the high-side module portion 10. As described above, as shown in a circuit diagram in Fig. 5, the high-side semiconductor chip 11 and the low-side semiconductor chip 21 are both connected to the n-side conductor terminal 23B.

[0038] From the perspective described above, Fig. 4 and Fig. 7, the switching element 11A and the switching element 21A only partially overlap with each other, and the protruding portion 41 can be connected to the switching element 11A in the other part, that is, in the region where the switching element 11A and the switching element 21A do not overlap with each other. Similarly, the freewheeling diode 11B and the freewheeling diode 21B only partially overlap with each other, and the protruding portion 41 can be connected to the freewheeling diode 11B in the other part, that is, in the region where the freewheeling diode 11B and the freewheeling diode 21B do not overlap with each other.

[0039] However, the entire switching element 11A and the entire switching element 21A may overlap with each other in a plan view. The same applies to the freewheeling diode 11B and the freewheeling diode 21B. In this case, a part of the protruding portion 41 extends in the thickness direction of the low-side lead frame 23, while a part of the protruding portion 41 is bent to extend along the XY plane to a position where the protruding portion 41 overlaps with the switching element 11A or the freewheeling diode 11B, and thus the protruding portion 41 reaches the switching element 11A or the freewheeling diode 11B. The entire high-side integrated circuit 12 and the entire low-side integrated circuit 22 may also completely overlap with each other.

[0040] In addition, Fig. 4 to 7, the protruding region 41 from the low-side lead frame 23 and is connected to the high-side semiconductor chip 11 of the high-side module region 10.

[0041] As described above, in the inverter module 101, a total of six protruding regions 41 are provided in the regions adjacent to the three switching elements 21A and in the regions adjacent to the three freewheeling diodes 21B on the power n-side frame 23A of the low-side module region 20.

[0042] Referring again to Fig. 1 and Fig. 6, the freewheeling diode 11B and the protruding region 41 are connected by a second connecting material 42B. The same applies to the switching element 11A and the protruding region 41. As a result, the high-side module region 10 and the low-side module region 20 are electrically connected to each other. As described above, the high-side semiconductor chip 11 (switching element 11A and freewheeling diode 11B) and the high-side lead frame 13 are connected by the first connecting material 42A. A melting point of the second connecting material 42B is preferably lower than a melting point of the first connecting material 42A.

[0043] The respective components of the inverter module 101 having the above-described arrangement are sealed with a mold resin 45. The mold resin 45 seals the high-side semiconductor chip 11, the low-side semiconductor chip 21, the high-side integrated circuit 12, and the low-side integrated circuit 22. However, the tip-side regions of the p-side conductive terminal 13B, the n-side conductive terminals 23B and 23D, and the control conductive terminal 31B are exposed by the mold resin 45, and electrical connection to the outside of the inverter module 101 is possible in these regions.

[0044] Next, the prior art for the first example of the present embodiment will be described, and then the function and effect of the first example of the present embodiment will be described.

[0045] The prior art as a comparative example of the present invention is such that a high-side circuit and a low-side circuit overlap each other in an inverter module, thereby reducing the module size. However, when the high-side circuit and the low-side circuit are connected with a center electrode sandwiched therebetween as in the comparative example, the thickness of the inverter module as a whole increases by the thickness of the center electrode. This counteracts the reduction in module size and may, for example, lead to a reduction in heat dissipation from the high-side circuit to the low-side circuit due to the presence of the center electrode.

[0046] In addition to the above, the comparative example has the following problem. For example, in the case of forming the above-described arrangement in which the high-side circuit and the low-side circuit overlap with each other, it is necessary to connect a high-side semiconductor chip of the high-side circuit and a low-side semiconductor chip of the low-side circuit by die bonding in different steps. Namely, after connecting the high-side semiconductor chip by die bonding, the center electrode embedded between the low-side semiconductor chip and the high-side semiconductor chip needs to be connected to the high-side semiconductor chip by die bonding at the time of connecting the low-side semiconductor chip and the high-side semiconductor chip, and then the low-side semiconductor chip needs to be further connected to the center electrode by die bonding.In this case, a bonding agent of a high-side electrode and the high-side semiconductor chip previously connected by die bonding are heated again during connecting the low-side semiconductor chip by die bonding, which may cause a problem of increasing a bubble ratio of the bonding agent and decreasing a reliability thereof.

[0047] Further, the inverter module has conventionally had difficulty in arranging the p-side conductive terminal 13B and the n-side conductive terminal 23D close to each other due to its structure, which may cause a problem that routing of wiring and suppressing inductance at the time of mounting on a substrate on the user's operating surface become difficult.

[0048] Thus, as in the inverter module 101 according to the first example of the present embodiment, at the boundary between the high-side module region 10 and the low-side module region 20, the control-side frame 31 is bent so that the high-side semiconductor chip 11 and the low-side semiconductor chip 21 face each other. As a result, the high-side semiconductor chip 11 and the low-side semiconductor chip 21 have a positional relationship such that the high-side semiconductor chip 11 and the low-side semiconductor chip 21 overlap with each other to face each other.

[0049] Such an arrangement makes it possible to electrically connect the high-side semiconductor chip 11 and the low-side semiconductor chip 21 without embedding a center electrode therebetween. Therefore, it is possible to keep the overall thickness small while maintaining the arrangement in which the high-side semiconductor chip 11 and the low-side semiconductor chip 21 overlap with each other. Thus, the overall size of the inverter module 101 can be reduced without increasing the overall thickness of the inverter module 101. As a result, a reduction in heat dissipation between the components of the inverter module 101 can be suppressed.

[0050] Furthermore, in the present embodiment, the high-side integrated circuit 12 and the low-side integrated circuit 22 are arranged on one main surface, that is, on the positive side, that is, the same side in the Z direction, of the control-side frame 31. Similarly, the high-side semiconductor chip 11 and the low-side semiconductor chip 21 are also arranged on one main surface, that is, on the positive side, that is, the same side in the Z direction, of the high-side lead frame 13 and the low-side lead frame 23, respectively. This means that before bending the frame along the boundary lines B1 and B2, all of the high-side semiconductor chip 11, the low-side semiconductor chip 21, the high-side integrated circuit 12 and the low-side integrated circuit 22 are connected to the same side in the Z direction, as in Fig. 2. Therefore, all of them can be bonded to the frame simultaneously in one die bonding step. Thus, the problem of reheating the bonding agent of the previously die bonded region during the subsequent die bonding step can be eliminated, and an increase in the bubble content of the bonding agent and a decrease in its reliability can be eliminated.

[0051] Furthermore, according to the inverter module 101, as a result of bending the control-side frame 31, the p-side conductive terminal 13B as a high-side terminal included in the high-side module region 10 and the n-side conductive terminals 23B and 23D as low-side terminals included in the low-side module region 20 are arranged to be adjacent to each other, for example. In this way, the high-side module region 10 and the low-side module region 20 are mutually superimposed. Therefore, at the time of mounting the inverter module 101 on a substrate on the user's operating surface, routing of the wiring connecting the p-side conductive terminal 13B and the n-side conductive terminals 23B and 23D can be further simplified, and inductance of the routed wiring can be reduced.

[0052] Next, in the inverter module 101, the protruding portion 41, which can be electrically connected to the high-side semiconductor chip 11, extends from the low-side lead frame 23. Due to the arrangement in which the high-side semiconductor chip 11 and the low-side semiconductor chip 21 face each other, it is difficult to electrically connect the high-side semiconductor chip 11 and the low-side semiconductor chip 21 with a bonding wire. Thus, the protruding portion 41 extending from the low-side lead frame 23 is used to connect the protruding portion 41 to the high-side semiconductor chip 11, which makes it possible to electrically connect the low-side lead frame 23 and the high-side semiconductor chip 11.Since the low-side semiconductor chip 21 is electrically connected to the main surface of the low-side lead frame 23 by the die bonding step and the like, the high-side semiconductor chip 11 and the low-side semiconductor chip 21 can be electrically connected.

[0053] Since the low-side lead frame 23 and the protruding portion 41 are formed in one piece, the protruding portion 41 can be easily formed, for example, by bending a part of the low-side lead frame 23.

[0054] In addition to the above, in the inverter module 101, the melting point of the second bonding material 42B connecting the high-side semiconductor chip 11 and the protruding portion 41 is lower than the melting point of the first bonding material 42A connecting the high-side semiconductor chip 11 and the high-side lead frame 13. As a result, when the high-side semiconductor chip 11 and the high-side lead frame 13 are bonded by the first bonding material 42A and then the high-side semiconductor chip 11 and the protruding portion 41 are bonded by the second bonding material 42B, remelting of the first bonding material 42A caused by heating during bonding with the second bonding material 42B can be suppressed, and a decrease in reliability of the bonded portion can be suppressed.

[0055] Next, an arrangement of an inverter module as an arrangement of a semiconductor device according to a second example of the present embodiment will be described with reference to FIG. Fig. 8 described.

[0056] Referring to Fig. 8, in an inverter module 102 according to the second example of the present embodiment, a protruding portion 46 and the low-side lead frame 23 are separate components. However, it is preferable that the protruding portion 46 be made of the same material as that of the low-side lead frame 23 and be connected so as to be electrically connected to the low-side lead frame 23. Since other features of the inverter module 102 are substantially similar to those of the inverter module 101, the same components are denoted by the same reference numerals, and a description thereof will not be repeated.

[0057] Like the inverter module 102, the inverter module may be configured such that the protruding portion 46, which is a separate component from the low-side leadframe 23, is connected to the low-side leadframe 23. Such an arrangement makes it possible to increase a degree of freedom in selecting a material of the protruding portion 46.

[0058] Next, an arrangement of an inverter module as an arrangement of a semiconductor device according to a third example of the present embodiment will be described with reference to FIG. Fig. 9 described.

[0059] Referring to Fig. 9, similar to the inverter module 101, in an inverter module 103 according to the third example of the present embodiment, both the high-side semiconductor chip 11 and the low-side semiconductor chip 21 include a switching element and a freewheeling diode. Specifically, the inverter module 103 includes the switching element 11A and the freewheeling diode 11B as the high-side semiconductor chip 11, and the switching element 21A and the freewheeling diode 21B as the low-side semiconductor chip 21. Similar to the inverter module 101, the switching element 21A and the freewheeling diode 21B as the low-side semiconductor chip 21 are connected by the aluminum wire 44, and the freewheeling diode 21B and the wire bonding frame 23C are connected by an aluminum wire 44 as a bonding wire.

[0060] In addition to the above, however, in the inverter module 103, the switching element 11A and the freewheeling diode 11B as the high-side semiconductor chip 11 are connected by an aluminum wire 44 as a bonding wire. In this respect, the inverter module 103 differs from the inverter module 101, in which the switching element 11A and the freewheeling diode 11B are not connected by an aluminum wire 44.

[0061] Since other features of the inverter module 103 are substantially similar to those of the inverter module 101, the same components are denoted by the same reference numerals, and a description thereof will not be repeated.

[0062] As in the inverter module 103, not only the switching element 21A and the freewheeling diode 21B of the low-side module region 20 but also the switching element 11A and the freewheeling diode 11B of the high-side module region 10 are connected by an aluminum wire 44, and thus the number of protruding portions 41 can be reduced. Specifically, a total of six protruding portions 41 are provided in the regions adjacent to the switching elements 21A and the freewheeling diodes 21B in the inverter module 101, whereas in the inverter module 103, a total of three protruding portions 41 are provided only in the regions adjacent to the switching elements 21A.

[0063] In the inverter module 103, the switching element 11A and the freewheeling diode 11B are electrically connected by the aluminum wire 44. Therefore, simply by bonding and electrically connecting the protruding portion 41 to the switching element 11A, the protruding portion 41, i.e., the low-side lead frame 23, can be electrically connected to the freewheeling diode 11B or the switching element 11A. This is because the switching element 11A and the freewheeling diode 11B are electrically connected by the aluminum wire 44. In this regard, the inverter module 103 differs from the inverter module 101, in which connecting the freewheeling diode 11B and the protruding portion 41 is necessary because the switching element 11A and the freewheeling diode 11B are not connected by a wire.

[0064] Therefore, the number of protruding portions 41 in the inverter module 103 can be made smaller than the number of protruding portions 41 in the inverter module 101, and thus simplification of a product structure can be improved.

[0065] In Fig. 9, a total of three protruding regions 41 are provided only in the regions adjacent to the switching elements 21A. Conversely, a total of three protruding regions 41 may be provided only in the regions adjacent to the freewheeling diodes 21B.

[0066] Next, an arrangement of an inverter module as an arrangement of a semiconductor device according to a fourth example of the present embodiment will be described with reference to FIG. Fig. 10 described.

[0067] Referring to Fig. 10, an inverter module 104 according to the fourth example of the present embodiment has an arrangement substantially similar to that of the inverter module 101 in Fig. 1. However, in the inverter module 104, a heat sink 51 is arranged on a second main surface, ie, an upper main surface in Fig. 10, of the high-side lead frame 13, which corresponds to a first main surface, ie a lower main surface in Fig. 10, which has the high-side semiconductor chip 11 connected thereto. In addition, in the inverter module 104, a heat sink 51 is also arranged on a fourth main surface, ie, a lower main surface in Fig. 10 of the low-side lead frame 23, which corresponds to a third main surface, ie an upper main surface in Fig. 10, which has the low-side semiconductor chip 21 connected thereto. Namely, the heat sinks 51 are respectively arranged on the outside of the high-side lead frame 13 and the low-side lead frame 23 in the vertical direction of the inverter module 104 as a whole with respect to the vertical direction in Fig. 10 arranged.

[0068] Since other features of the inverter module 104 are substantially similar to those of the inverter module 101, the same components are denoted by the same reference numerals, and a description thereof will not be repeated.

[0069] In each inverter module according to the present invention, semiconductor chips such as switching elements 11A and 21A and freewheeling diodes 11B and 21B are arranged to oppose each other and concentrate in the inner region in the vertical direction of the inverter module as a whole. Therefore, the heat generated by the semiconductor chips is likely to be confined within the inverter module and is less likely to be released to the outside of the inverter module. Thus, there is a concern that the thermal resistance of the inverter module may be reduced.

[0070] Therefore, in the inverter module 104, heat sinks 51 are mounted on the main surfaces of the high-side lead frame 13 and the low-side lead frame 23, each of which faces the outside of the inverter module 104 as a whole. With such an arrangement, the heat radiated from both the high-side semiconductor chip 11 and the low-side semiconductor chip 21, which have a horizontally oriented structure, can be easily dissipated from the heat sinks 51 to the outside of the inverter module 104 with high efficiency.

[0071] A heat radiation fin is attached to each of the above-described second and fourth main surfaces as the heat sink 51, and thus a decrease in thermal resistance of the inverter module 104 can be suppressed.

[0072] Next, an arrangement of an inverter module as an arrangement of a semiconductor device according to a fifth example of the present embodiment will be described with reference to FIG. Fig. 11 described.

[0073] Referring to Fig. 11, an inverter module 105 according to the fifth example of the present embodiment has an arrangement substantially similar to that of the inverter module 104 in Fig. 10. However, in the inverter module 105, a heat sink 52 is provided on the above-described second main surface (upper main surface in Fig. 11) of the high-side lead frame 13 and a heat sink 52 on the fourth main surface described above (lower main surface in Fig. 11) of the low-side leadframe 23. In this regard, the inverter module 105 differs from the inverter module 104 in an arrangement in which the heat sink 51 on the above-described second main surface and the heat sink 51 on the above-described fourth main surface are arranged separately.

[0074] This means that the inverter module 105 further has a region extending in the vertical direction in Fig. 11, and is configured to connect the heat sink 52 on the second main surface and the heat sink 52 on the fourth main surface. Within the inverter module 105, this region, which extends in the vertical direction, is connected in such a way that it is integrated with the region on the second main surface and the region on the fourth surface.

[0075] The arrangement in which a plurality of regions of the heat sink 52 are connected to each other in such a way that they are integral with each other within the inverter module 105, as described above, generates the following function and effect. In particular, the heat generated by the semiconductor chips in both the high-side module region 10 and the low-side module region 20 spreads through the region of the heat sink 52 extending in the vertical direction in Fig. 11 extends within the inverter module 105 and reaches the uppermost and lowermost regions of the heat sink 52 in Fig. 11 with high efficiency. Therefore, simply by attaching a heat dissipation fin to either the second main surface portion of the heat sink 52 or the fourth main surface portion of the heat sink 52, heat can be dissipated with high efficiency.

[0076] From the standpoint of more efficiently dissipating the heat of the switching element 21A and the freewheeling diode 21B of the low-side module region 20, which generate a larger amount of heat, it is more preferable to provide the heat dissipation fin only on the region of the heat sink 52 on the fourth main surface of the low-side lead frame 23 in the inverter module 105. Furthermore, it is more preferable to expose only the region of the heat sink 52 on the fourth main surface of the low-side lead frame 23 from the molding resin 45. Second embodiment

[0077] The present embodiment is an embodiment in which the inverter module as the semiconductor device according to any one of the first to fifth examples of the above-described first embodiment is applied to a power conversion device. The case of applying the present invention to a three-phase inverter will be described below as a second embodiment.

[0078] Referring to Fig. 12, a power conversion system 201 is configured as the power conversion device by a power source 99, a power conversion device 90, and an inductive load 97. The power source 99 is a DC power source and supplies DC power to a power conversion semiconductor module 98. The power source 99 can be configured by various sources, such as a DC power system, a solar battery, and a storage battery. Alternatively, the power source 99 can be configured by a rectification circuit or an AC / DC converter connected to a DC power system. Alternatively, the power source 99 can be configured by a DC / DC converter configured to convert DC power output from a DC power system to a predetermined power.

[0079] The power conversion device 90 is a three-phase inverter connected between the power source 99 and the inductive load 97. The power conversion device 90 converts the DC power supplied by the power source 99 to AC power and supplies the AC power to the inductive load 97. As shown in Fig.As shown in Figure 12, the power conversion device 90 includes the power conversion semiconductor module 98, a control circuit 96, and a heat radiation fin 95. More specifically, the power conversion device 90 includes the power conversion semiconductor module 98 as a main conversion circuit configured to convert the DC power into the AC power and output the AC power to the inductive load 97, and the control circuit 96 is configured to output a control signal for controlling the power conversion semiconductor module 98 to the power conversion semiconductor module 98.

[0080] The inductive load 97 is a three-phase motor driven by the AC power provided by the power conversion semiconductor module 98. The inductive load 97 can be a motor mounted on various types of electrical equipment. The inductive load 97 is used as a motor designed for, for example, any type of hybrid vehicle, electric vehicle, rail vehicle, elevator, and air conditioning system.

[0081] The power conversion device 90 will be described in detail below. The power conversion semiconductor module 98 includes a switching element, a freewheeling diode, and an integrated control circuit configured to control the switching element and the freewheeling diode. The switching element is switched, and the DC power supplied by the power source 99 is thereby converted into the AC power supplied to the inductive load 97. Although various specific circuit arrangements of the power conversion semiconductor module 98 are conceivable, the power conversion semiconductor module 98 of the present embodiment is a two-stage three-phase full-bridge circuit and can be formed by six switching elements and six freewheeling diodes, each connected in antiparallel to the switching elements. Any two of the six switching elements are connected in series to form upper and lower arms, i.e.the high-side module section 10 and the low-side module section 20 described above. The upper and lower arms form each phase, i.e., a U-phase, a V-phase, and a W-phase of the full-bridge circuit. Output terminals of the upper and lower arms, i.e., three output terminals of the power conversion semiconductor module 98, are connected to the inductive load 97.

[0082] The power conversion semiconductor module 98 having the six switching elements and the six freewheeling diodes is formed by a semiconductor module 94 corresponding to one of the inverter modules 101 to 105 according to the respective examples of the first embodiment described above.

[0083] The integrated control circuit (corresponding to the above-described high-side integrated circuit 12 and the low-side integrated circuit 22) incorporated in the power conversion semiconductor module 98 generates a control signal for controlling each switching element also incorporated in the power conversion semiconductor module 98. Specifically, the integrated control circuit outputs a control signal for turning on each switching element and a control signal for turning off each switching element to a control electrode of each switching element in accordance with a control signal provided by the control circuit 96, described below. When the switching element is maintained in the ON state, the control signal is a voltage signal (ON signal) having a voltage equal to or higher than a threshold voltage of the switching element.When the switching element is kept in the OFF state, the control signal is a voltage signal (OFF signal) having a voltage equal to or less than the threshold voltage of the switching element.

[0084] The control circuit 96 controls the semiconductor chips of the power conversion semiconductor module 98 so that the desired power is supplied to the inductive load 97. Specifically, the control circuit 96 calculates the time (ON time) during which each semiconductor chip of the power conversion semiconductor module 98 should be turned on based on the power to be supplied to the inductive load 97. For example, the control circuit 96 may control the power conversion semiconductor module 98 through PWM control to modulate the ON time of each semiconductor chip according to the voltage to be output. Then, the control circuit 96 outputs the control instruction, i.e., the control signal, to control the integrated circuit built into the power conversion semiconductor module 98. This is done to enable the output of the ON signal to the semiconductor chip to be turned on and the output of the OFF signal to the semiconductor chip to be turned off at any time.According to this control signal, the control integrated circuit outputs the ON signal or the OFF signal to the control electrode of each semiconductor chip as the control signal.

[0085] The heat dissipation fin 95 dissipates the heat generated by driving the power conversion semiconductor module 98 to the outside. Specifically, a bonding lubricant is applied between the heat dissipation fin 95 and the power conversion semiconductor module 98, and the thermal conductivity of the heat dissipation fin 95 and the bonding lubricant is utilized to dissipate the heat generated by the power conversion semiconductor module 98 to the outside. The heat dissipation fin 95 may be attached to only one of a plurality of side surfaces constituting the power conversion semiconductor module 98, or the heat dissipation fins 95 may be attached to two opposite side surfaces constituting the power conversion semiconductor module 98.

[0086] In the power conversion system 201 as the power conversion device according to the present embodiment, the power conversion semiconductor module 98 is constituted by the semiconductor module 94 corresponding to one of the inverter modules 101 to 105 according to the respective examples of the first embodiments described above. Therefore, a reduction in size and an increase in reliability of the power conversion system 201 can be achieved.

[0087] In the present embodiment, the example of applying the present invention to the two-stage three-phase inverter is described and applicable to various power conversion devices. Although the two-stage power conversion device has been used in the present embodiment, a three-stage or multi-stage power conversion device may be used. Alternatively, the present invention may be applied to a single-phase inverter in the case of supplying electric power to a single-phase load. Alternatively, the present invention may also be applied to a DC / DC converter or an AC / DC converter in the case of supplying electric power to a DC load, and the like.

[0088] Furthermore, the power conversion device in which the present invention is applied can be used as a power source designed for, for example, any of an electric discharge machining machine, a laser machining machine, an induction heating cooker, and a non-contact power supply system. Furthermore, the power conversion device in which the present invention is applied can be used as a power converter for a solar power generation system, an energy storage system, and the like.

[0089] In summary, a semiconductor device 101 has an arrangement in which a high-side module region 10 and a low-side module region 20 overlap with each other. The semiconductor device 101 further includes a control-side frame 31 extending over the high-side module region 10 and the low-side module region 20 and having a high-side integrated circuit 12 and a low-side integrated circuit 22 arranged thereon. The high-side integrated circuit 12 of the high-side module region 10 and the low-side integrated circuit 22 of the low-side module region 20 are arranged on a main surface of the control-side frame 31. At a boundary B1, B2 between the high-side module region 10 and the low-side module region 20, the control side frame 31 is bent such that the high-side semiconductor chip 11 and the low-side semiconductor chip 21 are opposite each other. List of reference symbols 10 High-side module area 11 High-side semiconductor chip 11A switching element 11B freewheeling diode 12 High-side circuit 13 high-side ladder frames 13A power p-side frame 13B p-side conductor connection 20 Low-side module area 21 Low-side semiconductor chip 21A switching element 21B freewheeling diode 22 Low-side circuit 23 Low-side ladder frame 23A power n-side frame 23B n-side conductor connection 23C Wire connection frame 23D n-side conductor connection 31 control side frames 31A Placement Area 31B Control conductor connection 32 Baseline 41 above area 42A connecting material 42B Connecting material 43 gold wire 44 aluminum wire 45 molding resin 51 heat sinks 52 heat sinks 90 Power conversion device 94 semiconductor module 95 Heat dissipation fin 96 Control circuit 97 Last 98 power conversion semiconductor module 99 Power source 101- 105 Inverter module 201 Power conversion system

Claims

[1] Semiconductor device (101, 102, 103, 104, 105), which has a high-side module region (10) and a low-side module region (20) arranged so that they overlap with each other in a plan view, where: - the high-side module region (10) comprises a high-side semiconductor chip (11), a high-side integrated circuit (12) and a high-side leadframe (13) having the high-side semiconductor chip (11) arranged thereon, - the low-side module region (20) comprises a low-side semiconductor chip (21), a low-side integrated circuit (22) and a low-side leadframe (23) having the low-side semiconductor chip (21) arranged thereon, - the semiconductor device (101, 102, 103, 104, 105) further comprises a control side frame (31) which is formed in one piece, extends over the high-side module region (10) and the low-side module region (20) and has the integrated high-side circuit (12) and the integrated low-side circuit (22) arranged thereon, - the integrated high-side circuit (12) and the integrated low-side circuit (22) are arranged on a main surface of the control side frame (31), and - at a boundary (B1, B2) between the high-side module region (10) and the low-side module region (20), the control side frame (31) is bent such that the high-side semiconductor chip (11) and the low-side semiconductor chip (21) are opposite one another. [2] The semiconductor device (101, 102, 103, 104, 105) according to claim 1, wherein a protruding portion (41, 46) extending in a thickness direction of the low-side lead frame (23) and electrically connectable to the high-side semiconductor chip (11) disposed on the high-side lead frame (13) extends from the low-side lead frame (23). [3] The semiconductor device (101, 102, 103, 104, 105) according to claim 2, wherein the low-side lead frame (23) and the protruding portion (41) are integrally formed. [4] The semiconductor device (101, 102, 103, 104, 105) according to claim 2, wherein the low-side lead frame (23) and the protruding portion (46) are separate components. [5] A semiconductor device (101, 102, 103, 104, 105) according to any one of claims 2 to 4, wherein: - the high-side semiconductor chip (11) and the high-side leadframe (13) are connected by a first connecting material (42A), - the high-side semiconductor chip (11) and the protruding region (41, 46) are connected by a second connecting material (42B), and - a melting point of the second connecting material (42B) is lower than a melting point of the first connecting material (42A). [6] A semiconductor device (101, 102, 103, 104, 105) according to any one of the preceding claims, wherein heat sinks (51, 52) are arranged on a second main surface opposite to a first main surface having the high-side semiconductor chip (11) of the high-side lead frame (13) connected thereto, and on a fourth main surface opposite to a third main surface having the low-side semiconductor chip (21) of the low-side lead frame (23) connected thereto. [7] The semiconductor device (101, 102, 103, 104, 105) according to claim 6, wherein the heat sink (51, 52) on the second main surface and the heat sink (51, 52) on the fourth main surface are integrally connected. [8] A semiconductor device (101, 102, 103, 104, 105) according to any one of the preceding claims, wherein: - both the high-side semiconductor chip (11) and the low-side semiconductor chip (21) have a switching element (11A, 21A) and a freewheeling diode (11B, 21B), - the switching element (11A) and the freewheeling diode (11B) as the high-side semiconductor chip (11) are connected by a bonding wire (44), and - the switching element (21A) and the freewheeling diode (21B) as the low-side semiconductor chip (21) are connected by the bonding wire (44). [9] A semiconductor device (101, 102, 103, 104, 105) according to any one of the preceding claims, wherein: - the high-side module area (10) has a high-side connection (13B), - the low-side module region (20) has a low-side terminal (23B, 23D), and - the high-side terminal (13B) and the low-side terminal (23B, 23D) are arranged so that they are adjacent to one another. [10] Power conversion device, comprising: - a main conversion circuit (98) comprising the semiconductor device (101, 102, 103, 104, 105) as described in any one of the preceding claims and arranged to convert an input electric power and output the electric power; and - a control circuit (96) configured to output a control signal for controlling the main conversion circuit (98) to the main conversion circuit (98).

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