Displacement detector

Abstract

A displacement detector, wherein the displacement detector is a capacitive displacement detector configured to receive a transmission signal output from a transmission signal output unit by means of a receiving electrode arranged in a detection head to detect a displacement between the detection head and a scale based on the received signal, wherein the transmission signal is transmitted from a transmission electrode arranged in the detection head to the receiving electrode through a coupling electrode arranged in the scale, the displacement detector comprising: Phase adjustment units configured to generate a phase-adjusted signal from the transmission signal outputted by the transmission signal output unit; an amplitude adjustment unit configured to adjust an amplitude of the signal whose phase has been adjusted by the phase adjustment unit to generate a crosstalk correction signal; and a demodulation unit configured to sample a signal generated by synthesizing the crosstalk correction signal and the received signal and to demodulate the sampled signal.

Description

BackgroundThe present invention relates to a displacement detector.Recently, as displacement measuring devices, displacement detectors (or encoders) have been generally used. Displacement detectors of various types of detection, such as capacitive type and optical type, are used. A linear encoder, which is an example of a displacement detector, includes, for example, a scale and a detection head that moves along the scale, and detects a displacement between the scale and the head.In conventional capacitive displacement detectors, it is known that an undesired transmission signal interferes with a received signal and, as a result, crosstalk occurs when detecting the displacement. However, this deteriorates the accuracy of the displacement detection. As a countermeasure, a method for correcting the crosstalk has been proposed (see Japanese Unexamined Patent Publication No. JP H02-269 908 A). In this method, crosstalk at a receiving electrode is eliminated by adjusting the amplitude of a signal having a phase opposite to the phase of a signal input due to the capacitance of an unnecessary path, and inputting the adjusted signal as a correction signal to the receiving electrode.SummaryIn Japanese Unexamined Patent Publication No. JP H02-269 908 A, the correction signal having a phase opposite to the phase of a signal input to a transmitting electrode is generated by an inverter. In order to correct the crosstalk with high accuracy, the phase of the correction signal must be adjusted exactly. If the capacitance values of the elimination capacitors are to be matched more precisely, the number of elimination capacitors arranged in parallel increases as a result. In other words, in order to improve the phase adjustment function of the correction signal, an increase in circuit complexity is inevitable.The present invention has been made in view of the above-described circumstances. An object of the present invention is to restrict or eliminate crosstalk in a capacitive displacement detector having a simple configuration.A first exemplary aspect of the present invention is a displacement detector, the displacement detector being a capacitive displacement detector configured to receive a transmission signal output from a transmission signal output unit by a receiving electrode disposed in a detection head to detect a displacement between the detection head and a scale based on the received signal, the transmission signal being transmitted from a transmitting electrode disposed in the detection head to the receiving electrode through a coupling electrode disposed in the scale, the displacement detector including: phase adjustment units configured to generate a signal whose phase is adjusted from the transmission signal output from the transmission signal output unit; an amplitude adjustment unit configured to adjust an amplitude of the signal whose phase is adjusted by the phase adjustment unit to generate a crosstalk correction signal; and a demodulation unit configured to sample a signal generated by synthesizing the crosstalk correction signal and the received signal and demodulate the sampled signal.A second exemplary aspect of the present invention is the above-described displacement detector, wherein the phase matching units adjust a voltage of the transmission signal by capacitive voltage division based on a predetermined condition and synthesize the adjusted voltages to generate a signal having a phase opposite to a phase of the crosstalk included in the received signal, and the amplitude matching unit causes an amplitude of the signal generated by the phase matching units to match an amplitude of the crosstalk based on a predetermined condition to generate the crosstalk correction signal.A third exemplary aspect of the present invention is the above-described displacement detector, wherein the phase adjustment unit includes a plurality of first capacitors, one end of the first capacitor is connected to an input of the amplitude adjustment unit, and among the plurality of first capacitors, the number of the first capacitors whose other ends receive the transmission signal is controlled in response to a first control signal.A fourth exemplary aspect of the present invention is the above-described displacement detector, wherein capacitance values of the plurality of first capacitors are different from each other.A fifth exemplary aspect of the present invention is the above-described displacement detector, wherein the amplitude adjustment unit includes a plurality of second capacitors, and the amplitude adjustment unit is configured to be able to change the number of second capacitors connecting between the demodulation unit and the amplitude adjustment unit among the plurality of second capacitors.A sixth exemplary aspect of the present invention is the above-described displacement detector including a plurality of first switches inserted between the phase matching units and the plurality of second capacitors or between the demodulating unit and the plurality of second capacitors, the plurality of first switches being configured to be opened and closed in response to a second control signal, wherein among the plurality of first switches, the number of first switches to be closed is controlled in response to the second control signal.A seventh exemplary aspect of the present invention is the above-described displacement detector, wherein the demodulation unit samples a voltage of a signal detection capacitor charged by the signal generated by synthesizing the received signal and the crosstalk correction signal in response to a sampling signal, and discharges the charge charged in the signal detection capacitor in response to a discharge signal.An eighth exemplary aspect of the present invention is the above-described displacement detector including a plurality of second switches connected to a demodulation unit side end of each of the plurality of second capacitors and ground, wherein the plurality of second switches can be simultaneously opened in response to the discharge signal, or among the plurality of second switches, the number of second switches to be closed can be controlled in response to the second control signal.A ninth exemplary aspect of the present invention is the above-described displacement detector including: a plurality of AND circuits, wherein the second control signal is input to one end of the AND circuit and the sampling signal is input to the other end of the AND circuit, and wherein the opening and closing of the plurality of first switches is controlled in response to output signals of the plurality of AND circuits, respectively; and a plurality of OR circuits, wherein the discharge signal is input to one end of the OR circuit and an inverted signal of the second control signal is input to the other end of the OR circuit, and wherein opening and closing of the plurality of second switches is controlled in response to output signals of the plurality of OR circuits, respectively.A tenth exemplary aspect of the present invention is the above-described displacement detector, wherein the amplitude adjustment unit includes: a plurality of third switches that are opened and closed in response to a third control signal, one end of each of the plurality of third switches is connected to an output of the phase adjustment unit; and a plurality of third capacitors, one end of each of the plurality of third capacitors is connected to the other ends of the plurality of third switches with reference, and the other ends of the plurality of third capacitors are connected to ground, and among the plurality of third switches, the number of third switches to be closed is controlled in response to the third control signal.According to the present invention, it is possible to restrict or eliminate crosstalk of a capacitive displacement sensor having a simple configuration.The foregoing and other objects, features and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawing figures which are given by way of example only and are not to be construed as limiting the present invention.Brief Description of the DrawingsFIG. 1 schematically shows a configuration of a displacement detector according to a first exemplary embodiment. FIG. 2 shows an arrangement of electrodes of a scale and a detection head. FIG. 3 shows an arrangement of electrodes of the detection head. FIG. 4 shows a relationship between crosstalk and a received signal by vector representation. Fig. 5 shows waveforms of the crosstalk and the received signal. FIG. 6 schematically shows a configuration of a signal processing unit of the displacement detector according to the first exemplary embodiment. FIG. 7 shows a configuration example of a variable-capacitance phase matching unit. FIG. 8 schematically shows embodiments of a variable-capacitance amplitude adjustment unit and a sampling circuit. FIG. 9 is a timing chart showing an operation example of the signal processing unit. FIG. 10 shows a relationship between the crosstalk, a crosstalk correction signal, and the received signal in the signal processing unit according to the first exemplary embodiment by vector representation. FIG. 11 shows waveforms of the crosstalk, the crosstalk correction signal, and the received signal in the signal processing unit according to the first exemplary embodiment. FIG. 12 schematically shows a configuration of a variable-capacitance amplitude adjustment unit according to a second exemplary embodiment.DESCRIPTION OF EMBODIMENTSExemplary embodiments according to the present invention will be described below with reference to the drawings. The same components are assigned the same reference numerals in all the drawing figures, for which reason duplicate explanations are omitted if appropriate.First Exemplary EmbodimentA displacement detector 100 according to a first exemplary embodiment will now be described. FIG. 1 schematically shows a configuration of the displacement detector 100 according to the first exemplary embodiment. The displacement detector 100 includes a scale 1, a detection head 2, a signal processing unit 3, and a transmission signal output unit 4. Hereinafter, the measurement direction is referred to as an X direction. The main surface of the scale 1 and the detection head 2 corresponds to the X-Y plane parallel to the X direction and the direction perpendicular to the X direction. The scale 1 and the detection head 2 are separately arranged in the Z direction that is perpendicular to the X direction and the Y direction.FIG. 2 shows an arrangement of electrodes of the scale 1 and the detection head 2. the scale 1 includes a plate-like member 1A whose main surface is the X-Y plane and whose longitudinal direction is the X direction. On the plate-like member 1A, coupling electrodes and ground electrodes are provided so as to be arranged in the X direction. In the present example, the coupling electrode EC and the ground electrode EE are alternately arranged along the X direction at a pitch P. The coupling electrode EC and the ground electrode EE are electrically insulated, while the ground electrode EE is connected to ground.The detection head 2 includes a plate-like member 2A whose principal surface is the X-Y plane. On the plate-like member 2A, transmitting electrodes ET and receiving electrodes ER are arranged. The transmitting electrode ET and the receiving electrode ER are arranged to be oriented toward the coupling electrode EC and the ground electrode EE of the scale 1. In other words, in FIG. 2, the coupling electrode EC and the ground electrode EE of the scale 1 are disposed on a surface oriented in a Z(+) direction of the plate-like member 1A, while the sending electrode ET and the receiving electrode ER of the detection head 2 are disposed on a surface oriented in the Z(-) direction of the plate-like member 2A. In FIG. 2, the transmitting electrode ET and the receiving electrode ER disposed on the surface of the plate-like member 2A oriented in the Z(-) direction are shown by a broken line.FIG. 3 shows the arrangement of the electrodes of the detection head. A plurality of transmitting electrodes ET are arranged in the X direction. In the present example, four transmitting electrodes ET1 to ET4 form one set, these sets being repeatedly arranged at a pitch P to transmit four-phase signals. In the present case, the transmitting electrodes ET1 to ET4 are arranged in this order at a pitch of P / 4.Signals having phases different from each other are respectively input to the transmission electrodes ET 1 to ET 4 as transmission signals from the transmission signal output unit 4. Here, the transmission signals TA(0°), TB(90°), TC(180°), and TD(270°), which are four-phase signals whose phases differ by 90°, are respectively input to the transmission electrodes ET 1 to ET 4.The receiving electrode ER is an electrode whose longitudinal direction is the X direction. The receiving electrode ER is disposed at a position separated from the transmitting electrodes ET1 to ET4 in the Y direction on the plate-like member 2A. In the present example, the length of the receiving electrode ER in the X direction or in the measurement direction is 2P.When the transmission signals TA to TD are respectively input to the transmission electrodes ET1 to ET4, a voltage corresponding to the transmission signals TA to TD is induced in the reception electrode ER through the coupling electrodes EC. In this state, when the scale 1 is displaced relative to the detection head 2 in the X direction, the capacitance between the transmitting electrodes ET 1 to ET 4 and the receiving electrode ER repeatedly changes, and a signal having a phase corresponding to the displacement is received at the receiving electrode ER. The induced voltage is output to the signal processing unit 3 as a received signal RS. Subsequently, the displacement between the scale 1 and the detection head 2 can be detected by processing the received signal RS to derive a phase component.The signal processing unit 3 samples the received signal RS at a predetermined frequency and generates a logic signal indicating the amplitude of the received signal. Subsequently, the displacement between the scale 1 and the detection head 2 can be detected by detecting the phase of the logic signal.As described above, each transmission path of the transmission signals TA to TD is a path from each transmission electrode ET 1 to ET 4 through the coupling electrode EC to the reception electrode ER. However, in the present embodiment, as shown in FIG. 3, crosstalk CTK occurs through unwanted transmission paths due to a coupling capacitance CC between the transmission electrodes ET 1 to ET 4 and the reception electrode ER. Therefore, since the crosstalk mixes with the received signal RS, the sampling of the received signal RS at the signal processing unit 3 is affected by the crosstalk.FIG. 4 shows a relationship between crosstalk and received signal by vector representation. Fig. 5 shows the waveforms of the crosstalk and the received signal. In FIG. 4, the positive direction of the horizontal axis denotes the amplitude of the transmission signal TA(0°), the positive direction of the vertical axis denotes the amplitude of the transmission signal TB(90°), the negative direction of the horizontal axis denotes the amplitude of the transmission signal TC(180°), and the negative direction of the vertical axis denotes the amplitude of the transmission signal TD(270°).For example, when a phase indicating a position of the scale 1 with respect to the detection head 2 is θ, the signal OS 2 mixed with distortion due to the crosstalk CTK is output as the received signal RS. On the other hand, the received signal having no distortion due to the crosstalk CTK, which should actually be received, is equal to the signal OS1, which is a signal in which the crosstalk CTK is eliminated from the signal OS2.Therefore, the signal processing unit 3 of the displacement sensor 100 according to the present exemplary embodiment is configured to sample a signal after restricting the cross valley of the received signal RS and preferably after eliminating the cross valley of the received signal RS.The signal processing unit 3 will be described in detail below. FIG. 6 schematically shows a configuration of the signal processing unit 3 of the displacement detector 100 according to the first exemplary embodiment. The signal processing unit 3 includes variable-capacitance phase matching units 31 to 34 that are phase matching units, a variable-capacitance amplitude matching unit 35 that is an amplitude matching unit, and a demodulation circuit 36.The transmission signals TA to TD are respectively input to the variable-capacitance phase matching units 31 to 34 from the transmission signal output unit 4. The capacitances of the variable-capacitance phase matching units 31 to 34 can be controlled or regulated correctly in response to provided control signals CON 1 to CON 4. Hereinafter, each of the control signals CON 1 to CON 4 is also referred to as a first control signal. Therefore, the variable-capacitance phase matching units 31 to 34 respectively match the voltages of the transmission signals TA to TD by capacitive voltage division. The adjusted signals are synthesized to generate a signal SIG 1 having a phase opposite to the phase of a crosstalk component included in the received signal RS, and the generated signal is output to the variable-capacitance amplitude adjustment unit 35.The variable-capacitance phase matching units 31 to 34 will now be described in detail. The variable-capacitance phase matching units 31 to 34 may have the same configuration. Here, a configuration example of the variable-capacitance phase adjustment unit 31 will be described as a representative. FIG. 7 shows the configuration example of the variable-capacitance phase matching unit 31. the variable-capacitance phase matching unit 31 includes first capacitors (capacitors C 1 to C 4) and first AND circuits (AND circuits 41 to 44). The capacitors C 1 to C 4 are capacitors having capacitance values different from each other.The transmission signal, i.e., the transmission signal TA in the present example, is input to an input of each of the AND circuits 41 to 44. A control signal is input to the other input of each of the AND circuits 41 to 44. Here, the control signals CON11 to CON14 are inputted to the AND circuits 41 to 44 as reference. In other words, the activation and deactivation of the AND circuits 41 to 44 are respectively controlled by the control signals CON 11 to CON 14. For simplicity, the control signals CON11 to CON14 are shown in FIG. 6 as control signal CON1. The outputs of the AND circuits 41 to 44 are connected to the capacitors C1 to C4, respectively. As described above, since the capacitance values of the capacitors C 1 to C 4 are different from each other, the output value of the variable-capacitance phase adjustment unit 31 or the voltage of the transmission signal TA can be changed in sixteen steps (4 bits) by capacitive voltage division.Since the variable-capacitance phase matching units 32 to 34 are the same as the variable-capacitance phase matching unit 31, a description of the former is omitted.The transmission signals TA to TD whose voltages are adjusted by capacitive voltage division at the variable-capacitance phase adjustment units 31 to 34 are synthesized, and the phase adjusted signal SIG 1 is output.The variable-capacitance amplitude adjustment unit 35 outputs a signal generated by adjusting the amplitude of the signal SIG 1 output from the variable-capacitance phase adjustment units 31 to 34 as the crosstalk correction signal COR. FIG. 8 schematically shows configurations of the variable-capacitance amplitude adjustment unit 35 and a sampling circuit 37.The variable-capacitance amplitude adjustment unit 35 includes an attenuation capacitor C ATT, capacitors CT1 to CT4, AND circuits 51 to 54, OR circuits 61 to 64, inverters 71 to 74, and switches S 1 to S 8. The capacitors CT 1 to CT 4 are capacitors having different capacitance values. Hereinafter, each of the capacitors CT 1 to CT 4 is also referred to as a second capacitor. Each of the AND circuits 51 to 54 is also referred to as a second AND circuit. Each of the switches S 1 to S 4 is also referred to as a first switch, while each of the switches S 5 to S 8 is also referred to as a second switch.A scan signal SMP is input to an input of each of the AND circuits 51 to 54. The control signals CTL1 to CTL4 are respectively input to the other inputs of the AND circuits 51 to 54. Hereinafter, each of the control signals CTL 1 to CTL 4 is also referred to as a second control signal. A discharge signal DIS is input to an input of each of the OR circuits 61 to 64. The control signals CTL1 to CTL4 are respectively input to the inputs of the inverters 71 to 74. The outputs of the inverters 71 to 74 are respectively input to the other inputs of the OR circuits 61 to 64.The signal SIG1 is input to one end of the snubber capacitor C ATT. In other words, the end of the snubber capacitor C ATT, to which the signal SIG 1 is input, connects between a node located between the variable-capacitance phase matching units 31 to 34 and the capacitors CT 1 to CT 4 and ground. Therefore, the signal SIG 1 attenuated by the attenuation capacitor C ATT is input to the capacitors CT 1 to CT 4. The switches S1 to S4 are respectively inserted between the other ends of the capacitors CT1 to CT4 and the demodulating circuit 36. The switches S 1 to S 4 are respectively opened and closed in response to signals output from the AND circuits 51 to 54. The switches S5 to S8 are inserted between the other ends of the capacitors CT1 to CT4 and ground. In other words, the switches S5 to S8 are inserted between the ends of the capacitors CT1 to CT4 to which the switches S1 to S4 are respectively connected and ground. The switches S5 to S8 are opened and closed respectively in response to signals output from the OR circuits 61 to 64.The demodulating circuit 36 is configured as a circuit that demodulates the received signal RS and outputs a demodulated signal DM. The demodulation circuit 36 is configured as a circuit including the sampling circuit 37. The sampling circuit 37 is configured as a circuit that samples a signal generated by synthesizing the received signal RS and the crosstalk correction signal COR in response to the sampling signal SMP. Next, a configuration example of the sampling circuit 37 will be described.In the present example, it is assumed that the received signal RS is output by a circuit 38 to which a splitting VIN is applied. The circuit 38 is an equivalent circuit that constitutes the receiving electrode ER that receives the transmission signal, the voltage VIN being a voltage input to the transmitting electrode ET. Circuit 38 is shown as the circuit described below. In the circuit 38, a capacitor C 5 is inserted between a terminal to which the voltage VINis applied and an output terminal. Further, in the circuit 38, a capacitor C 6 is inserted between a node located between the capacitor C 5 and the output terminal and ground.The sampling circuit 37 includes a signal detection capacitor CS 1, switches S 9 and S 10, and an amplifier AMP. The received signal RS is input to one end of the switch S9, while the other end of the switch S9 is connected to a non-inverting input of the amplifier AMP. The switch S9 is opened and closed in response to the scan signal SMP. The switch S10 connects the end of the switch S9 to which the received signal RS is input and ground. The switch S 10 is opened and closed in response to the discharge signal DIS.The crosstalk correction signal COR output from the variable-capacitance amplitude adjustment unit 35 is input to a node N 1 between the noninverting input of the amplifier AMP and the switch S 9. The signal detection capacitor CS 1 is inserted between the node N 1 and ground. An inverting input of the amplifier AMP is connected to an output of the amplifier AMP. In other words, the amplifier AMP constitutes a voltage follower. A signal OUT indicating a sensing result is output from the output terminal of the amplifier AMP. Although not shown, the signal OUT is demodulated and the demodulated signal is outputted as the demodulated signal DM.For example, when the sensing signal is HIGH, a capacitance value of the variable-capacitance amplitude adjustment unit 35 is determined according to the number of closed switches in response to the control signals CTL1 to CTL4. In the sampling circuit 37, in response to the sampling signal SMP, the signal detection capacitor CS1 is charged by the signal generated by synthesizing the received signal RS and the crosstalk correction signal COR, and the charging voltage is sampled. When the discharge signal DIS is HIGH, the capacitors CT1 to CT4 of the variable-capacitance amplitude adjustment unit 35 are simultaneously short-circuited, and the electric charge charged in the signal detection capacitor CS1 is discharged.FIG. 9 is a timing chart showing an operation example of the signal processing unit 3. in FIG. 9, when the voltage VIN becomes HIGH, the value of the voltage VIN is V 1. For example, at a time point before the voltage VIN is changed to HIGH, when the discharge signal DIS is changed from LOW to HIGH, the switch S 10 is opened (time point T 1 in FIG. 9 ). Subsequently, when the scan signal SMP is changed from LOW to HIGH, the switch S 9 is opened (time T 2 in FIG. 9 ). The electric charge with which the signal detection capacitor CS 1 is charged is discharged. Subsequently, when the discharge signal DIS is changed from HIGH to LOW, the switch S 10 is closed (time T 3 in FIG. 9 ). The signal detection capacitor CS 1 is in a chargeable state. Subsequently, when the voltage VIN is changed from LOW to V 1, the voltage of the node N 1 is changed from LOW to V 2 (time T 4 in FIG. 9 ). The voltage V 2 given at this moment is represented by the following expression: Subsequently, when the sensing signal SMP is changed from HIGH to LOW, the switch S 10 is closed (time T 5 in FIG. 9 ). Therefore, the voltage V 2 of the node N 1 is sampled, and the sampled signal is output as the signal OUT indicating the sampling result.The correction of the crosstalk by the signal processing unit 3 will be described below. FIG. 10 shows the relationship among the crosstalk, the crosstalk correction signal, and the received signal in the signal processing unit 3 according to the first exemplary embodiment by vector representation. FIG. 11 shows waveforms of the crosstalk, the crosstalk correction signal, and the received signal in the signal processing unit 3 according to the first exemplary embodiment. In FIG. 10, the positive direction of the horizontal axis as in FIG. 4 denotes the amplitude of the transmission signal TA(0°), the positive direction of the vertical axis denotes the amplitude of the transmission signal TB(90°), the negative direction of the horizontal axis denotes the amplitude of the transmission signal TC(180°), and the negative direction of the vertical axis denotes the amplitude of the transmission signal TD(270°).In the present example, as in FIG. 4, the phase and amplitude of the signal OS1 are influenced by the crosstalk CTK, whereby distortion occurs in the signal OS1. As a result, as in FIG. 4, the distortion resultant signal OS2 is outputted as the received signal RS. However, in the present embodiment, the crosstalk correction signal COR having a phase opposite to the phase of the crosstalk CTK and having the same amplitude as the crosstalk CTK is formed by the variable-capacitance phase matching units 31 to 34 and the variable-capacitance amplitude matching unit 35. The sampling unit 37 samples the signal generated by synthesizing the received signal RS and the crosstalk correction signal COR. Therefore, as illustrated in FIG. 10, the crosstalk CTK is eliminated by the crosstalk correction signal COR having a phase opposite to the phase of the crosstalk CTK and the same amplitude as the crosstalk CTK. As a result, as shown in FIGS. 10 and 11, the signal OS 1 that is not affected by crosstalk is sampled.As described above, according to the present embodiment, it is possible to realize a displacement detector that can restrict or eliminate crosstalk of a capacitive displacement detector.In the displacement detector 100 according to the present exemplary embodiment, the phase adjustment amounts of the variable-capacitance phase adjustment units 31 to 34 and the amplitude adjustment amount of the variable-capacitance amplitude adjustment unit 35 are predetermined. For example, the amplitude of the signal sampled by the sampling unit 37 may be monitored solely by the detection head and without the scale, and the capacitance values of the variable-capacitance phase matching units 31 to 34 and the variable-capacitance amplitude matching unit 35 may be adjusted or calibrated so as to minimize the monitored amplitude. Therefore, when the displacement after adjustment is measured, the crosstalk can be stably corrected.In the present embodiment, the phase adjustment of the transmission signal is performed by the variable-capacity phase adjustment units 31 to 34, while the amplitude adjustment of the transmission signal is performed by the variable-capacity amplitude adjustment unit 35. In other words, the phase adjustment of the transmission signal and the amplitude adjustment of the transmission signal are performed separately. This is advantageous when a reduction in circuit complexity is to be realized as compared with a method disclosed in Japanese Unexamined Patent Publication No. 2-269908. The reason for this is as follows.In Japanese Unexamined Patent Publication No. 2-269908, the amplitude of each AC voltage input to a transmitting electrode is changed in sixteen steps (4 bits) using four capacitors having different capacitance values. In this case, the capacitance ratio of the elimination capacitors or the value obtained by dividing the maximum capacitance value by the minimum capacitance value is 16. In order to obtain the crosstalk correction signal changed in 256 steps (8 bits) as in the displacement detector 100 according to the first exemplary embodiment of the present embodiment, it is necessary to realize the 16-fold capacitance ratio as compared with the case of 4 bits. As a result, the area occupied by the capacitors increases greatly, and the circuit complexity also increases.On the other hand, in the displacement detector 100 according to the first exemplary embodiment, since the four-bit phase adjustment of the transmission signal and the four-bit amplitude adjustment of the transmission signal are performed separately, the total capacitance ratio is 16 plus 16, that is, 32. It should therefore be appreciated that advantages are obtained in terms of reducing the area of the circuit and thus in terms of reducing the cost.As described above, according to the present embodiment, the crosstalk can be eliminated with high accuracy by accurately adjusting the phase and amplitude of the crosstalk correction signal with a simple and inexpensive configuration.Second Exemplary EmbodimentNext, a displacement detector according to a second exemplary embodiment will be described. In the displacement detector according to the present exemplary embodiment, the configuration of the variable-capacitance amplitude adjustment unit of the signal processing unit is different from that in the displacement detector 100 according to the first exemplary embodiment. A variable-capacitance amplitude adjustment unit 39 according to the second exemplary embodiment will be described below.FIG. 12 schematically shows a configuration of the variable-capacitance amplitude adjustment unit 39 according to the second exemplary embodiment. The variable-capacitance amplitude adjustment unit 39 includes capacitors C 11 to C 14 and switches S 11 to S 14. In the present example, the capacitance values of the capacitors C 11 to C 14 are different from each other. The signal SIG 1 output from the variable-capacitance phase matching units 31 to 34 is input to one end of each of the switches S 11 to S 14. The capacitors C11 to C14 are respectively inserted between the other ends of the switches S11 to S14 and the ground. The control signals CTL1 to CTL4 are provided to the switches S11 to S14 to control the opening and closing of the switches S11 to S14 as a reference. Hereinafter, each of the capacitors C 11 to C 14 is also referred to as a third capacitor. Each of the switches S 11 to S 14 is also referred to as a third switch. Each of the control signals CTL 1 to CTL 4 of the second exemplary embodiment is also referred to as a third control signal.According to the present embodiment, it is possible to change the capacitance values of the capacitors for attenuating the signal SIG 1 in sixteen steps by controlling the opening and closing of the switches S 11 to S 14. As a result, a signal generated by attenuating the signal SIG 1 may be provided to the demodulation circuit 36 as the crosstalk correction signal COR.As described above, according to the present embodiment as well, as in the first exemplary embodiment, it is possible to realize a displacement detector that can restrict or eliminate crosstalk of a capacitive displacement detector.In the variable-capacitance amplitude adjustment unit 39, a part of the capacitors C 11 to C 14 may be used as the attenuation capacitor C ATT of the demodulation circuit 36 according to the first exemplary embodiment. The snubber capacitor C ATT may be disposed away from the capacitors C 11 to C 14.Further Exemplary EmbodimentsNote that the present invention is not limited to the above-described exemplary embodiments, and may be modified as appropriate without departing from the spirit of the present invention. For example, although it has been described that the variable-capacitance phase matching units 31 to 34 have the same configuration, the variable-capacitance phase matching units 31 to 34 may have different configurations in whole or in part.The configurations of the variable-capacitance phase matching units 31 to 34 are not limited to the configuration described with reference to FIG. 7, for example. Other embodiments that can adjust the phase of the transmit signal may also be employed, if desired. For example, an example in which the phase of the transmission signal is changed in sixteen steps has been described above. However, the phase of the transmission signal may be changed in more than sixteen steps by changing one or both of the number of AND circuits and the number of capacitors. The phase of the transmission signal does not have to be stepped, but can also be changed continuously.The configurations of the variable-capacitance amplitude adjustment units 35 to 39 are not limited to the above, for example. Other embodiments that can adjust the amplitude of the signal may also be used. For example, an example in which the amplitude of the signal is changed in sixteen steps has been described above. However, the amplitude of the signal may be changed in more than sixteen steps by changing the number of AND circuits, the number of OR circuits, the number of switches, and the number of capacitors, individually or in combination, respectively. The amplitude of the signal does not have to be stepped, but can also be changed continuously.From the description of the invention it will be apparent that the embodiments of the invention may be modified in various ways. These modifications are not to be understood as departing from the spirit and scope of the invention, since all such modifications as would be apparent to one skilled in the art are intended to be included within the scope of the following claims.

Claims

A displacement detector, wherein the displacement detector is a capacitive displacement detector configured to receive a transmission signal output from a transmission signal output unit by a receiving electrode disposed in a detection head to detect a displacement between the detection head and a scale based on the received signal, wherein the transmission signal is transmitted from a transmitting electrode disposed in the detection head to the receiving electrode through a coupling electrode disposed in the scale, wherein the displacement detector comprises: phase adjustment units configured to generate a phase adjusted signal from the transmission signal output from the transmission signal output unit; an amplitude adjustment unit configured to adjust an amplitude of the phase adjusted signal by the phase adjustment unit to generate a crosstalk correction signal; and a demodulation unit configured to sample a signal generated by synthesizing the crosstalk correction signal and the received signal and demodulate the sampled signal.The displacement detector according to claim 1, wherein the phase adjustment units adjust a voltage of the transmission signal by capacitive voltage division based on a predetermined condition and synthesize the adjusted voltages to generate a signal having a phase opposite to a phase of the crosstalk included in the received signal, and the amplitude adjustment unit causes an amplitude of the signal generated by the phase adjustment units to match an amplitude of the crosstalk based on a predetermined condition to generate the crosstalk correction signal.The displacement detector according to claim 1 or 2, wherein the phase matching unit comprises a plurality of first capacitors, one end of the first capacitor is connected to an input of the amplitude matching unit, and among the plurality of first capacitors, the number of the first capacitors whose other ends receive the transmission signal is controlled in response to a first control signal.The displacement detector according to claim 3, wherein capacitance values of the plurality of first capacitors are different from each other.The displacement detector according to any one of claims 1 to 4, wherein the amplitude adjustment unit comprises a plurality of second capacitors, and the amplitude adjustment unit is configured to be able to change the number of the second capacitors connecting between the demodulation unit and the amplitude adjustment unit among the plurality of second capacitors.The displacement detector according to claim 5, comprising a plurality of first switches inserted between the phase matching units and the plurality of second capacitors or between the demodulation unit and the plurality of second capacitors, wherein the plurality of first switches are configured to be opened and closed in response to a second control signal, wherein among the plurality of first switches, the number of the first switches to be closed is controlled in response to the second control signal.The displacement detector according to claim 6, wherein the demodulation unit samples a voltage of a signal detection capacitor charged by the signal generated by synthesizing the received signal and the crosstalk correction signal in response to a sampling signal, and discharges the charge charged in the signal detection capacitor in response to a discharge signal.The displacement detector according to claim 7, comprising a plurality of second switches connected to a demodulation unit side end of each of the plurality of second capacitors and ground, wherein the plurality of second switches are simultaneously opened in response to the discharge signal, or among the plurality of second switches, the number of second switches to be closed can be controlled in response to the second control signal.The displacement detector according to claim 8, comprising: a plurality of AND circuits, wherein the second control signal is input to one end of the AND circuit and the sampling signal is input to the other end of the AND circuit, and wherein the opening and closing of the plurality of first switches is reference-controlled in response to output signals of the plurality of AND circuits; and a plurality of OR circuits, wherein the discharge signal is input to one end of the OR circuit and an inverted signal of the second control signal is input to the other end of the OR circuit, and wherein the opening and closing of the plurality of second switches is reference-controlled in response to output signals of the plurality of OR circuits.The displacement detector according to any one of claims 1 to 4, wherein the amplitude adjustment unit comprises: a plurality of third switches that are opened and closed in response to a third control signal, one end of each of the plurality of third switches is connected to an output of the phase adjustment unit; and a plurality of third capacitors, one end of each of the plurality of third capacitors is connected to the other ends of the plurality of third switches as reference, and the other ends of the plurality of third capacitors are connected to ground, and among the plurality of third switches, the number of third switches to be closed is controlled in response to the third control signal.

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