SILICON CARBIDE DEVICE WITH COMPENSATION LAYER AND METHOD FOR MANUFACTURING IT

Abstract

Method for manufacturing a silicon carbide device, comprising: implanting first dopants through a larger opening (411) of a first process mask (410) into a silicon carbide body (100), wherein the larger opening (411) exposes a first surface section of the silicon carbide body (100); a trench (800) being formed in the silicon carbide body (100) in a second surface section, which is exposed through a smaller opening (421) in a second process mask (420), wherein the second surface section is a subsection of the first surface section, wherein the larger opening (411) and the smaller opening (421) are designed to be self-aligned with each other, and wherein at least a part of the implanted first dopants forms at least a compensation layer area (181), the compensation layer area (181) extends parallel to a trench side wall (801) and the vertical dopant distribution in the compensation layer area (181) is box-shaped; a forming of an anode region of a power half-lead diode or a transistor cell (TC), wherein the anode region is formed between a first surface (101) of the silicon carbide body (100) and the compensation layer regions (181), and wherein the transistor cell (TC) has a source region (110) and a body region (120), wherein the source region (110) and the body region (120) form a pn junction, and wherein the source region (110) and the body region (120) are formed between the first surface (101) of the silicon carbide body (100) and the compensation layer regions (181).

Description

TECHNICAL AREA

[0001] Examples of the present disclosure relate to a silicon carbide device, in particular to a silicon carbide device with a compensation layer, and to methods for manufacturing silicon carbide devices with a compensation layer. BACKGROUND

[0002] The most significant difference between conventional power semiconductor devices and superjunction power semiconductor devices is a series of lateral junctions between n-doped and p-doped regions in the voltage-holding layer of the superjunction power semiconductor device. A lateral depletion effect within the voltage-holding layer enables high voltage blocking capability with a comparatively low on-resistance. A prerequisite for high voltage blocking capability is sufficient charge balance between the n-doped and p-doped regions in the voltage-holding layer.Fabrication of silicon superjunction devices typically involves a multi-epitaxy / multi-implantation process with masked p-type doping or masked doping with both p-type and n-type doping per epitaxial layer, multi-implantation at different implantation energies, trench etching combined with epitaxial growth within the trench, or trench etching combined with a gas-phase doping process of the trench wall. Forming compensation structures with high vertical extent and sufficiently well-defined charge compensation becomes more challenging if the diffusion coefficient of dopants in the semiconductor material is low.

[0003] Publication US 2014 / 0159144A1 describes the formation of a superjunction structure in a silicon substrate beneath trench-gate structures. A gate trench is etched into a silicon substrate. Donor atoms are implanted through the trench floor. The implanted donor atoms diffuse laterally to beyond the sidewall of the gate trench. A spacer mask is then formed within the gate trench, covering the sidewalls and exposing a central section of the trench floor. Using the spacer mask as an etching mask, a second trench is formed beneath the gate trench, with a smaller lateral width than the gate trench. Donor atoms are implanted through the bottom of this second trench and diffuse laterally. The implanted and diffused donor atoms form vertically separated p-doped regions of a superjunction structure.Similarly, publication US 2001 / 0053568A1 describes the formation of a superjunction structure in silicon by repeated trench etching, implanting a dopant through the trench bottom, and laterally diffusing the dopant, with each subsequent trench being etched into the trench bottom of the previously created trench.

[0004] The publication US 2004 / 0157384A1 initially forms a stepped trench. Starting from a substrate surface, the trench width of each sub-trench is defined by a spacer mask on the sidewalls of the previously created sub-trench, and the trench width decreases with increasing distance from the substrate surface. All spacer masks are then removed, and an oxide layer is grown on the exposed stepped sidewalls. The thickness of the oxide layer is chosen such that, during subsequent ion implantation, the dopants penetrate the substrate only through the horizontal steps and the trench bottom. The width of the steps determines the number of implanted ions. In a subsequent high-temperature step, the implanted ions diffuse laterally and vertically, forming a continuous compensation zone that extends along the sidewalls and the trench bottom.

[0005] Publication US 2009 / 0272982A1 describes the fabrication of SiC MOSFETs with trench-gate electrodes. Ions implanted through initial openings in a first mask form implanted source regions. A layer of SiO₂ is deposited onto the first mask and anisotropically etched. This process creates secondary openings in the SiO₂ layer at the initial openings of the first mask, each exposing a central portion of the previously formed implanted source regions. The SiO₂ layer, together with these secondary openings, forms a second mask for trench etching through the implanted source regions to create the trench-gate electrodes. Remaining portions of the implanted source regions on either side of each trench-gate electrode form the source regions of a transistor cell symmetrically arranged with respect to the respective trench-gate electrode.

[0006] For the process described in German patent application DE 10 2014 117 719 A1 for the fabrication of a semiconductor device with superjunction structures, trenches are first formed in a semiconductor substrate. The trenches are lined with a p-doped semiconductor layer. Before or after the formation of the p-doped semiconductor layer, proton-induced donors are formed in the sections of the semiconductor substrate between the trenches, with the average proton-induced donor concentration decreasing more or less strictly with increasing distance from a process surface of the semiconductor layer. An alkaline solution is applied to the semiconductor substrate, filling the trenches and covering the process surface. A positive voltage is applied between the semiconductor substrate and the p-doped semiconductor layer, and between the semiconductor layer and the alkaline solution.The pn junction between the p-doped semiconductor layer and the n-doped regions of the semiconductor substrate is reverse-biased. A first depletion zone forms, which extends laterally from the pn junction into the p-doped semiconductor layer, increasing with the dopant concentration of the n-doped regions of the semiconductor substrate. The etching solution dissolves the p-doped semiconductor layer until a second depletion zone between the etching solution and the p-doped semiconductor layer reaches the first depletion zone. The width of the resulting grooves increases with increasing distance from the process surface.

[0007] There is a need to provide a silicon carbide device that incorporates a compensation structure with high vertical extent and / or well-defined charge compensation at competitive costs. SUMMARY

[0008] One embodiment of the present disclosure relates to a method for manufacturing a silicon carbide device. First, dopants are implanted into a silicon carbide body through a larger opening in a first process mask. The larger opening exposes a first surface section of the silicon carbide body. A trench is formed in the silicon carbide body in a second surface section, which is exposed through a smaller opening in a second process mask. The second surface section is a subsection of the first surface section. The larger opening and the smaller opening are formed in a self-aligned manner with respect to each other. At least a portion of the implanted first dopants forms at least a compensation layer region extending parallel to a trench sidewall.

[0009] Another embodiment of the present disclosure relates to a silicon carbide device. The silicon carbide device includes a filling structure extending from a first lateral cross-sectional plane of a silicon carbide body to a second lateral cross-sectional plane. The filling structure includes at least one stepped sidewall. The stepped sidewall includes at least two steep sidewall regions that are laterally displaced relative to each other. Compensation layer regions are formed in the silicon carbide body. Each compensation layer region extends along one of the steep sidewall regions.

[0010] The expert will recognize additional features and advantages upon reading the following detailed description and examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The accompanying drawings are enclosed to provide a further understanding of the embodiments and are incorporated into and form part of this patent description. The drawings illustrate embodiments of a silicon carbide device and a method for manufacturing a silicon carbide device and, together with the description, serve to explain the principles of the embodiments. Further embodiments are described in the following detailed description and the claims. Fig. Figures 1A and 1B show simplified vertical cross-sectional views of an area of ​​a silicon carbide body to illustrate a method for forming a silicon carbide device with a compensation structure according to an embodiment which includes etching a trench into a doped auxiliary area. Fig. Figures 2A and 2B show simplified vertical cross-sectional views of an area of ​​a silicon carbide body to illustrate a method for forming a silicon carbide device with a compensation structure according to an embodiment which includes vertical implantation into sidewall areas of a trench. Fig. Figures 3A - 3N show simplified vertical cross-sectional views of an area of ​​a silicon carbide body to illustrate a method for forming a silicon carbide device with trench-gate structures according to one embodiment using spacers. Fig. Figures 4A - 4D show simplified vertical cross-sectional views of an area of ​​a silicon carbide body according to an embodiment that provides compensation setting areas. Fig. Figures 5A-5C show simplified vertical cross-sectional views of an area of ​​a silicon carbide body to illustrate a method for forming a silicon carbide device according to an embodiment which includes implantation after forming a trench with stepped trench sidewalls. Fig. Figure 5D shows a simplified vertical cross-sectional view of an area of ​​a silicon carbide body to illustrate a method for forming a silicon carbide device according to an embodiment that provides self-aligned gate trenches. Fig. Figures 6A - 6B show simplified vertical cross-sectional views of an area of ​​a silicon carbide body according to an embodiment that provides compensation connection areas. Fig. Figures 7-9 illustrate schematic vertical cross-sectional views of areas of silicon carbide devices with compensation structures containing laterally displaced steep compensation layer areas, according to embodiments relating to transistor cells with trench-gate structures and one-sided channels. Fig. Figure 10 illustrates a schematic vertical cross-sectional view of an area of ​​a silicon carbide device with a compensation structure containing laterally displaced steep compensation layer areas, according to an embodiment relating to transistor cells with planar gate structures. Fig. Figures 11A - 11B are schematic lateral and vertical cross-sectional views of an area of ​​a SiC-SJ-TMOSFET (silicon carbide superjunction trench metal oxide semiconductor field-effect transistor) with a double-sided channel according to one embodiment. Fig. Figures 12A - 12B are schematic lateral and vertical cross-sectional views of an area of ​​a two-sided channel SiC-SJ-TMOSFET according to another embodiment. DETAILED DESCRIPTION

[0012] The following detailed description refers to the accompanying drawings, which form part thereof and in which specific embodiments are shown for illustrative purposes, illustrating how a silicon carbide device and a method for manufacturing a silicon carbide device can be implemented in practice. It is understood that other embodiments may be used and structural or logical modifications may be made without departing from the scope of this disclosure. For example, features illustrated or described for one embodiment may be used in or in connection with other embodiments to arrive at yet another embodiment. It is intended that this disclosure includes such modifications and changes. The drawings are not to scale and are for illustrative purposes only.Corresponding elements are designated with the same reference symbols in the various drawings, unless otherwise stated.

[0013] The terms "have," "contain," "comprise," "exhibit," and the like are open-ended terms, indicating the presence of the identified structures, elements, or features, but not excluding the presence of additional elements or features. Indefinite and definite articles should encompass both the plural and the singular unless the context clearly indicates otherwise.

[0014] The term "electrically connected" describes a permanent, low-resistance connection between electrically connected elements, for example, a direct contact between the elements in question or a low-resistance connection via a metal and / or a highly doped semiconductor material. The term "electrically coupled" implies that one or more intermediate elements suitable for signal and / or power transmission may be connected between the electrically coupled elements, for example, elements that are controllable to temporarily provide a low-resistance connection in a first state and a high-resistance electrical decoupling in a second state. An "ohmic contact" is a non-rectifying electrical junction with a linear or nearly linear current-voltage characteristic.

[0015] The figures illustrate relative doping concentrations by indicating "-" or "+" next to the doping type "n" or "p". For example, "n-" indicates a doping concentration lower than that of an "n" doped area, while an "n+" doped area has a higher doping concentration than an "n" doped area. Doped areas with the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different "n" doped areas can have the same or different absolute doping concentrations.

[0016] Two adjacent doping regions of the same conductivity type but with different dopant concentrations form a unipolar transition, e.g., an (n / n+) transition or (p / p+) transition, along an interface between the two doping regions. In a unipolar transition, a dopant concentration profile orthogonal to the unipolar transition may exhibit a step or inflection point where the dopant concentration profile changes from concave to convex or vice versa.

[0017] A charge-compensating layer is a layer that at least partially compensates for the charge in an adjacent, complementarily doped layer or region when both layers are depleted or partially depleted. For example, the integral of the doping density along a lateral line across the charge-compensating layer and the adjacent complementarily doped layer or region may lie in a range of -20% to +20% of the integral of the doping density along a lateral line across the more heavily doped layer of the charge-compensating layer and the complementarily doped layer or region. The charge-compensating layer will be completely depleted at least at the typical breakdown voltage of the device or at a lower blocking voltage.

[0018] A charge-compensating layer and one or two adjacent complementarily doped layer(s) or region(s) exhibiting the defined degree of charge compensation can form a unit cell of a compensation structure. For simplicity, the charge-compensating layer will be referred to as the "compensation layer" in the following. A section of a charge-compensating layer will be referred to as the "compensation layer region" in the following.

[0019] For physical dimensions, specified ranges include the boundary values. For example, a range for a parameter y from a to b is read as a ≤ y ≤ b. The same applies to ranges with a boundary value such as "at most" and "at least".

[0020] The main components of a layer or structure made of a chemical compound or alloy are those elements whose atoms form the chemical compound or alloy. For example, nickel and silicon are the main components of a nickel silicide layer, and copper and aluminum are the main components of a copper-aluminum alloy.

[0021] The term "on" should not be interpreted as meaning "directly on". Rather, if one element is positioned "on" another element (e.g., a layer is "on" another layer or "on" a substrate), another component (e.g., another layer) can be positioned between the two elements (e.g., another layer can be positioned between a layer and a substrate if the layer is "on" the substrate).

[0022] With regard to structures and doped regions formed in a silicon carbide body, a second region lies "below" a first region if the minimum distance between the second region and a first surface on the front of the silicon carbide body is greater than the maximum distance between the first region and the first surface. The second region lies "directly below" the first region where the vertical projections of the first and second regions onto the first surface overlap. The vertical projection is orthogonal to the first surface.

[0023] The term "power semiconductor device" refers to semiconductor devices with a high voltage blocking capability of at least 30 V, for example 100 V, 600 V, 3.3 kV or more, and with a nominal inrush or forward current of at least 1 A, for example 10 A or more.

[0024] In general, a "layer" exhibits a surface extent along two orthogonal directions and an approximately uniform thickness orthogonal to this surface extent. The thickness may be less than, for example, 10% at most, the smallest linear extent along the surface extent. The surface extent of a lateral layer is parallel to a lateral plane. A layer extending parallel to a trench sidewall has a surface extent parallel to the trench sidewall and may have an approximately uniform thickness in one direction orthogonal to the trench sidewall.

[0025] According to one embodiment, a method for manufacturing a silicon carbide device may include the implantation of first dopants through a larger opening of a first process mask into a silicon carbide body.

[0026] The silicon carbide body can be one of several silicon carbide bodies arranged side by side and laterally connected to each other. The laterally connected silicon carbide bodies can be regions of a silicon carbide substrate.

[0027] The silicon carbide substrate can consist of, or contain, a silicon carbide disc or wafer cut from a single-crystal silicon carbide ingot. For example, the silicon carbide substrate can include an epitaxial layer and / or a substrate region, the substrate region being obtained, for example, by sawing or wafer slitting from a single-crystal silicon carbide ingot. The diameter of the silicon carbide substrate can conform to a production standard for semiconductor wafers and can be, for example, 100 mm (4 in), 150 mm (6 in), 175 mm (7 in), 200 mm (8 in), or even up to 300 mm (12 in).

[0028] The silicon carbide substrate material can be, for example, 15R-SiC (silicon carbide of the 15R polytype), 2H-SiC, 4H-SiC, or 6H-SiC. In addition to the main constituents silicon and carbon, the silicon carbide substrate can contain dopants such as nitrogen (N), phosphorus (P), beryllium (Be), boron (B), aluminum (Al), and / or gallium (Ga). Furthermore, the silicon carbide substrate can contain undesirable impurities such as hydrogen, fluorine, and / or oxygen.

[0029] The silicon carbide substrate can have two substantially parallel main surfaces of the same shape and size and a lateral surface connecting the edges of the two main surfaces. For example, the silicon carbide substrate can have the shape of a polygonal (e.g., right-angled or hexagonal) prism with one or more rounded edges, a right cylinder, or a slightly oblique cylinder, with some of the sides inclined at an angle of not more than 8°, 5°, or 3°, respectively. One or more flats or notches can be formed along the lateral surface.

[0030] The silicon carbide substrate can extend laterally in a plane spanned by lateral directions. Accordingly, the silicon carbide body can have a surface extent along two lateral directions and a thickness along a vertical direction perpendicular to the lateral directions. A first surface of the silicon carbide body forms a section of a first principal surface at the front face of the silicon carbide substrate.

[0031] The first process mask can be a homogeneous layer of one material or it can contain two or more sublayers of different materials. For example, the first process mask can contain a layer of silicon oxide and / or a layer of silicon nitride. The first process mask can be formed on, for example, directly on, the first surface of the silicon carbide body.

[0032] The larger opening can extend vertically through the first process mask. The larger opening can expose a first surface section of the first surface. The first surface section can be planar or it can contain a trench. The larger opening can be strip-shaped. Alternatively, the larger opening can be, for example, a regular polygon with or without rounded or chamfered corners, a circle, or an oval.

[0033] The first dopants can be implanted into an implantation site in such a way that the distribution of the implanted first dopants along the vertical direction is highly uniform, e.g., over at least 50%, or even at least 70%, or even at least 80% of the vertical extent of the implantation site. In other words, the vertical distribution of the dopants in the compensation layer area can be approximately uniform (a so-called "box-shaped" distribution) over at least 50% (or 70% or 80%) of the vertical extent of the implantation site. For example, implanting the first dopants can include high-energy implantation through an energy filter.The implanted dopants can exhibit an approximately uniform energy distribution between a minimum and a maximum energy, and / or the implanted dopants are distributed approximately uniformly along the vertical direction. According to other embodiments, implanting the first dopants can include at least: (i) a grid-guided or channeled ion beam implantation, (ii) an ion beam implantation at a variety of different accelerating voltages, or (iii) an ion beam implantation at a variety of different implantation angles. With each of these methods, it may be possible to approximate a box-shaped vertical dopant profile to some extent.A vertical homogeneous doping level can mean that the difference in doping level in this area is less than 60%, less than 40%, or even less than 20% of a maximum doping level in this area.

[0034] Prior to or following the implantation of the first dopants, a trench may be formed in a second surface section of the first surface of the silicon carbide body. The trench may be circular, polygonal, or strip-shaped and may extend laterally from one side of a central active region of the silicon carbide body to the opposite side. The central active region may contain functional transistor cells of a power semiconductor device or the anode region(s) of a power semiconductor diode or MPS (merged-pin Schottky) diode.

[0035] Alternatively, the trench can be a needle-shaped trench with two orthogonal lateral extensions of the same order of magnitude. For example, a needle-shaped trench can have two equal or nearly equal orthogonal lateral extensions. The trench can have at least one steep trench sidewall. For example, the trench sidewall can include one, two, or more steep sidewall sections. The steep sidewall sections can, for example, be vertical or can deviate from the vertical direction by ±10 degrees.

[0036] The second surface section can be exposed through a smaller opening in a second process mask. The second surface section can be a true subsection of the first surface section. In other words, a lateral area of ​​the second surface section can be smaller than a lateral area of ​​the first surface section. The second surface section can be a central section of the first surface section. For example, the second surface section and the first surface section can be concentric and / or can share a common central area (e.g., a common centerline or center).

[0037] A lateral cross-sectional area of ​​the larger aperture is larger than a lateral cross-sectional area of ​​the smaller aperture in the same cross-sectional plane. The smaller and larger apertures can be self-aligned with each other. For example, the positions of both the larger and smaller apertures can be defined using a single photolithography process. In other words, the position of the larger aperture relative to the smaller aperture can be independent of any adjustment or alignment process that aligns the follower photomask to an alignment mark defined by a predecessor photomask on the silicon carbide substrate.

[0038] At least some of the implanted initial dopants can form a compensation layer extending parallel to the trench sidewall, for example, to a steep section of the trench sidewall. The dopant distribution within the compensation layer along the vertical direction can be highly uniform, for example, over at least 50%, 70%, or even 80% of the vertical extent of the compensation layer. For instance, the vertical dopant distribution within the compensation layer can be approximately uniform ("box-shaped") over at least 50% (or 70% or 80%) of the vertical extent of the compensation layer.

[0039] With the larger and smaller openings self-aligned relative to each other, the thickness of the compensation layer region and the total amount of charges within it can be independent of mask alignment tolerances. Mask alignment tolerances can be significant for some substrates. For example, mask alignment tolerances can be significant on substrates such as 4H-SiC, which feature an off-axis cut. On substrates with an off-axis cut, the surfaces on which alignment marks are formed are inclined to the principal lattice planes. The off-axis cut can exacerbate surface distortions and degrade an alignment mark formed on it.

[0040] With the self-aligned approach, the amount of implanted first dopants in the compensation layer region can be precisely defined with high reproducibility. It is possible to provide a superjunction structure with a narrow tolerance window for a degree of charge equilibrium across the entire vertical extent of the superjunction structure, or at least across 50% of its vertical extent. The avalanche and breakdown behavior of the silicon carbide superjunction devices can be accurately predicted.

[0041] The compensation layer areas can have a comparatively narrow lateral width, making it possible to provide adjacent first compensation layers at a comparatively small center-to-center distance.

[0042] The process can also enable the vertical stacking of compensation layer regions in a step-like manner without intermediate epitaxy. Consequently, it may be possible to provide superjunction structures with a comparatively large vertical extent with relatively little effort.

[0043] According to one embodiment, the first dopants can be implanted before the trench is formed. The smaller opening can be created by forming a spacer along a side wall of the larger opening. In other words, the second process mask for forming the trench can comprise the first process mask used to implant the first dopants and a spacer along a side wall of the larger opening. In this way, it is possible to obtain self-aligned first and smaller openings with comparatively little effort.

[0044] According to one embodiment, forming the trench and the compensation layer regions can involve at least one repetition of an implantation / etching sequence. That is, forming the compensation layer regions can comprise at least two implantation / etching sequences: a first implantation / etching sequence (e.g., as described above) and a repetition of the implantation / etching sequence in at least one further implantation / etching sequence. In general, n implantation / etching sequences can be performed, where n = 1, ..., nmax and nmax ≥ 2.

[0045] The implantation / etching sequences may include one or more additional processes between the implantation process and the etching process, and / or one or more additional processes between two successive implantation / etching sequences. For example, each implantation / etching sequence may include a heat treatment between the implantation process and the etching process.

[0046] The implantation / etching sequence can involve implanting initial dopants through a larger opening and forming a trench section within a section exposed by a smaller opening. The lateral cross-sectional area of ​​the smaller opening in the nth implantation / etching sequence can be smaller than the lateral cross-sectional area of ​​the larger opening in the nth implantation / etching sequence. The initial and smaller openings used in the same implantation / etching sequence can be self-aligned with each other. For example, the smaller opening can be formed by creating a spacer along a side wall of the larger opening.

[0047] The lateral cross-sectional area of ​​the larger opening of the (n+1)th implantation / etching sequence can be as large as, or smaller than, the lateral cross-sectional area of ​​the smaller opening of the nth implantation / etching sequence. For example, the larger opening of the (n+1)th implantation / etching sequence can be the same size as the smaller opening of the nth implantation / etching sequence. The implantation / etching sequence can be repeated, for example, once or twice, meaning that a total of two or three implantation / etching sequences can be performed (i.e., nmax = 2 or nmax = 3, respectively). According to another embodiment, four or more implantation / etching sequences can be performed (nmax ≥ 4).

[0048] By repeating the implantation / etching sequence at least once, at least a first trench sidewall with a stepped shape can be formed. This stepped shape can enable the formation of a superjunction structure with a comparatively large vertical extent in a semiconductor material with low diffusion coefficients for dopants. The stepped trenches can allow for compensatory structures with a vertical extent exceeding the upper limit for high-energy implantation through a flat main surface. In particular, providing a trench with a stepped sidewall can increase the vertical extent of doped regions that can be formed by an implantation process that utilizes an energy filter, a lattice guidance effect, a variable tilt angle, and / or variable implantation energy.

[0049] A compensation structure with a high vertical extent can enable silicon carbide power devices that combine high voltage breakdown capability with low on-resistance. In particular, in silicon carbide devices with a blocking voltage of at least 1.2 kV, e.g., at least 1.6 kV or at least 3 kV, the on-resistance of the voltage-holding layer can dominate the turn-on or conduction losses. Therefore, providing the voltage-holding layer with a compensation structure can effectively reduce these conduction losses.

[0050] Furthermore, the method can function without any intermediate epitaxial layer or can reduce the number of intermediate epitaxial layers. Compensation layers of a silicon carbide body can be formed in a self-aligned manner across different levels without the need for alignment markers. This self-aligned approach makes it possible to form comparatively narrow compensation layer regions. It is also possible to create adjacent first compensation layers with a relatively small center-to-center spacing and a comparatively high dopant concentration.

[0051] The dopant concentration in compensation layer regions formed on different levels can vary. Different mean dopant concentrations in compensation layer regions on different levels can contribute to precise shaping of the electric field in the blocking mode of the silicon carbide device.

[0052] For example, shifting the maximum of the electric field towards the vertical center of the superjunction structure can reduce or avoid TRAPATT (Trapped Plasma Avalanche-Triggered Transit) oscillations in the silicon carbide device.

[0053] According to one embodiment, further first dopants can be implanted through a trench bottom. These further first dopants can form a compensation layer region extending from the trench bottom into the silicon carbide body. The lateral width of the compensation layer region and the lateral width of the trench bottom can be equal. In other embodiments, the lateral width of the compensation layer region can be greater than the lateral width of the trench bottom, for example, due to scattering, lattice guidance, diffusion, and / or angular effects. The compensation layer region can further increase the vertical extent of a superjunction structure. The compensation layer region can have a box-shaped, vertical dopant profile. The mean dopant concentration in the compensation layer region can be equal to or different from the mean dopant concentration in an adjacent compensation layer region.

[0054] According to another embodiment, the first dopants can be implanted after the trench has been formed. For example, after completion of the trench formation, the second process mask with the smaller openings can be replaced by the first process mask containing the larger openings, with the larger openings being self-aligned with the smaller openings.

[0055] For example, after forming the trench and before removing the second process mask, an alignment structure can be formed. The alignment structure can be placed in the smaller opening in the second process mask, for example, filling it. The second process mask can then be removed. An auxiliary spacer can be formed along the sidewall of the exposed upper section of the alignment structure. The first process mask can be deposited. A planarization process can remove areas of the first process mask layer that were deposited above the alignment structure and the auxiliary spacer. The alignment structure and the auxiliary spacer can be selectively removed with respect to the first process mask layer.

[0056] According to another example, the smaller opening of the second process mask can be enlarged to form the first process mask with the larger opening. For example, wet etching or selective removal of an initial spacer formed prior to the first trench etch can enlarge the smaller opening.

[0057] By implanting the first dopants after completion of the trench, for example after forming a trench with stepped trench sidewalls and with two or more trench sections of different widths, it may be possible to create compensation layer areas in different levels and a compensation soil area in a cost-effective manner using a single implantation process.

[0058] According to one embodiment, the larger opening can be formed by enlarging the smaller opening, for example by wet etching. In this way, the larger openings can be created with comparatively little effort.

[0059] According to one embodiment, trench formation can involve at least one repetition of an etching sequence, wherein the etching sequence involves forming a trench section in a portion of the silicon carbide body exposed through a smaller opening. The smaller opening of the (n+1)th etching sequence can be smaller than the smaller opening in the nth etching sequence. In this way, it may be possible to form compensation layer regions in different levels and a compensation floor region using a single implantation process.

[0060] According to one embodiment, the smaller opening of the (n+1)th etching sequence can be formed by creating a spacer along a side wall of the smaller opening of the nth etching sequence. In this way, it may be possible to create trenches with stepped side walls and precisely defined step widths in a cost-effective manner.

[0061] According to one embodiment, auxiliary dopants can be implanted into the silicon carbide body. The auxiliary dopants and the primary dopants can have complementary conductivity types. Implantation of the auxiliary dopants can involve ion beam implantation, with the ion beam being inclined with respect to a vertical direction. The implanted auxiliary dopants can form compensation zones on opposite sides of each trench segment. In the compensation zones, the mean net dopant concentration can be higher than in the primary layer at the same level.

[0062] Each compensation setting area can be in contact with two vertically adjacent compensation layer areas. For example, the auxiliary dopants can be implanted into the bottom of the nth trench segment before the trench segment of the (n+1)th implantation / etching sequence is formed. Each compensation setting area can be located directly below a compensation layer area along the nth trench segment and laterally adjacent to a compensation layer area along the (n+1)th trench segment.

[0063] The compensation setting regions may exhibit gentle discontinuities, which can be seen in the degree of charge equilibrium along the vertical direction at the steps of the stepped trench sidewall. Steep changes in the degree of charge equilibrium can result in local peaks in electric field strength during a blocking mode of the silicon carbide device. Smoothing these charge equilibrium discontinuities can reduce local electric field strength maxima and may contribute to improvements in, for example, the blocking capability of the devices.

[0064] According to one embodiment, the silicon carbide body can contain a main layer. The main layer and the compensation layer regions can have complementary conductivity profiles. The trench can extend into the main layer. Compensation regions can, for example, be formed laterally by regions of the main layer between adjacent trenches. The compensation regions can also include regions of the main layer laterally between adjacent compensation soil regions.

[0065] The compensation soil region and the compensation layer regions associated with the same trench can form a p-type column or layer. A compensation region can form an n-type column or layer. Alternatively, the compensation soil region and the compensation layer regions associated with the same trench can form an n-type column or layer, and a compensation region can form a p-type column or layer. A plurality of laterally arranged n-type and p-type columns or layers can form a superjunction structure, at least in the central active region of the silicon carbide device.

[0066] A transistor cell (e.g., a multitude of transistor cells) is formed. The transistor cell has a source region and a body region. The source region and the body region form a pn junction. The source region and the body region are located between a first surface of the silicon carbide body and the compensation layer regions. The transistor cell can be, for example, a cell of a field-effect transistor with an insulated gate or a cell of a junction or junction field-effect transistor.

[0067] It is possible to provide power semiconductor switching devices, for example MOSFETs (metal oxide semiconductor field-effect transistors), with a superjunction structure.

[0068] According to an alternative embodiment, an anode region can be formed between the first surface and the compensation layer regions. It may be possible to form power semiconductor diodes with this anode region. The anode region and the compensation layer regions can have the same conductivity type. The anode region and the compensation regions can form a main pn junction of the power semiconductor diode. The anode region can contain a single doped well or can be structured by regions with a conductivity type opposite to that of the anode region. The oppositely doped regions can extend from the first surface to the compensation regions. The oppositely doped regions and a front electrode can form Schottky contacts. In this way, it may be possible to provide high-voltage MPS diodes with a superjunction structure.

[0069] According to one embodiment, after the trench has been formed, additional dopants can be implanted into the silicon carbide body. The additional dopants and the compensation layer regions can have the same conductivity type. Implanting the additional dopants can involve ion beam implantation, with the ion beam being inclined with respect to the vertical direction. The implanted additional dopants can form compensation connection regions.

[0070] For example, the trench sections can be designed to completely or almost completely cut through the auxiliary regions. As a result, compensation layer regions formed along the sidewalls of adjacent trench sections may be separated from one another or may only be weakly connected. The compensation connection regions can reliably connect compensation layer regions associated with adjacent trench sections. In this way, it is possible to provide superjunction structures where each compensation layer region is electrically connected to a defined electrical potential, for example, the anode potential of a power semiconductor diode or the emitter potential of a power semiconductor switching device. Continuous doping in the compensation layer regions can help to avoid a delayed and / or lossy turn-on behavior of the silicon carbide device.

[0071] According to another embodiment, a silicon carbide device can contain a filling structure and compensation layer regions. The filling structure can extend from a first lateral cross-sectional plane of a silicon carbide body to a second lateral cross-sectional plane.

[0072] The silicon carbide body can have two opposing main surfaces extending along lateral directions and a lateral surface connecting the edges of the two main surfaces. The thickness of the silicon carbide body is measured along a vertical direction orthogonal to the lateral directions.

[0073] The filling structure can be strip-shaped. For example, the filling structure can extend laterally from one side of a central active region of the silicon carbide device to the opposite side. Alternatively, the filling structure can be needle-shaped with two orthogonal lateral extensions of approximately the same size. The two orthogonal lateral extensions of a needle-shaped filling structure can be, for example, equal or nearly equal. A lateral cross-section of a needle-shaped filling structure can be, for example, a regular polygon with or without rounded or chamfered corners, a circle, or an oval.

[0074] The infill structure can have at least one stepped sidewall. The stepped sidewall can comprise at least two steep sidewall sections that are laterally offset from each other. In a vertical cross-sectional plane orthogonal to the stepped sidewall, the stepped sidewall can exhibit a stair-like structure with steep sidewall sections forming the risers and shallow sidewall sections forming the treads. The steep sidewall sections can be vertical or nearly vertical, with the angle between each steep sidewall section and the vertical direction ranging from 0 degrees to ±10 degrees. The shallow sidewall sections can be lateral or nearly lateral, with the angle between each shallow sidewall section and the lateral plane ranging from 0 degrees to ±10 degrees.Each flat sidewall section connects two vertically adjacent steep sidewall sections. The steep sidewall can comprise one, two, three, or more steps. In other words, each sidewall section can comprise one, two, three, or more flat sidewall sections.

[0075] The compensation layer regions can be doped areas within the silicon carbide body. Each compensation layer region can extend along one of the steep sidewall regions. For example, compensation layer regions can be formed along each steep sidewall region. Each compensation layer region can extend from one vertical end of a steep sidewall region to the other vertical end of the steep sidewall region. In other words, the compensation layer region can extend along the entire steep sidewall region. The vertical dopant distribution within each compensation layer region can be approximately uniform (box-shaped). The mean dopant concentrations in vertically adjacent compensation layer regions can be the same or different.

[0076] The staggered arrangement of vertically adjacent compensation layer regions enables the formation of superjunction structures with a vertical extent greater than the maximum projected range for the implanted species in the silicon carbide body for a given maximum implantation energy. Furthermore, the laterally staggered arrangement of steep compensation layer regions allows for highly variable fine-tuning of the charge balance along the vertical direction.

[0077] According to one embodiment, the filling structure can include two stepped sidewalls on opposite sides of the filling structure. For example, the filling structure can be symmetrical with respect to a vertical plane of symmetry, wherein the plane of symmetry lies in the center of the filling structure and can extend parallel to a lateral longitudinal extension of the filling structure.

[0078] Stepped sidewalls on opposite sides can effectively enable the formation of laterally displaced compensation layer regions in different levels of the silicon carbide body.

[0079] According to one embodiment, a compensation layer can be formed within the silicon carbide body. This compensation layer can be in contact with a base surface of the filler structure. For example, the lateral extent of the compensation layer and the lateral width of the base surface of the filler structure can be equal or approximately equal (e.g., within a tolerance of ±10% or ±5%). The vertical distribution of the dopants in the compensation layer can be approximately uniform. Furthermore, the compensation layer can increase the vertical extent of a superjunction structure, and the charge equilibrium along the entire vertical extent of the superjunction structure can be precisely defined with comparatively little effort.

[0080] According to one embodiment, the compensation base region and the compensation layer regions are structurally connected. The filler structure, the base compensation region, and the compensation layer regions adjacent to the filler structure can form an n-type column or layer, or a p-type column or layer, of a superjunction structure. It is possible to electrically connect the entire p-type or n-type column to a defined potential by electrically connecting only a single compensation layer region to that defined potential. If the silicon carbide device is a MOSFET or contains one, the defined potential can be the source potential of the silicon carbide device. The proposed superjunction structure avoids a delayed and / or lossy turn-on behavior of the MOSFET.

[0081] According to one embodiment, the filling structure contains at least one dielectric structure. The dielectric structure can help to prevent the filling structure from adversely affecting the breakdown voltage capability of the silicon carbide device.

[0082] According to one embodiment, compensation regions can be formed in the silicon carbide body. The compensation regions can be in contact with the compensation layer regions, with each compensation layer region being located laterally between the filling structure and one of the compensation regions. The compensation layer regions and the compensation regions can form stepped, vertical pn transitions. For example, a compensation region can form an n-type column or layer, or a p-type column or layer. The compensation layer regions and the compensation base region adjacent to an identical filling structure can form an oppositely doped column, e.g., a p-type column for n-type compensation regions or an n-type column for p-type compensation regions. A plurality of such adjacent p-type and n-type columns can form a superjunction structure.A p-type column and an n-type column directly adjacent to the p-type column can form a unit cell of the superjunction structure. Along a lateral line through the unit cell, the line integral of the doping density of the p-type dopants can lie in a range of -20% to +20% of the line integral of the doping density of the n-type dopants.

[0083] The compensation areas can contain differently doped sub-areas, with each sub-area in contact with a different compensation layer region. The sub-areas of the compensation areas can result from differently doped sub-layers (levels) of the main layer.

[0084] An emitter region is formed within the silicon carbide body. The emitter region and the compensation layer regions can have the same conductivity type. The emitter region is located between a first surface of the silicon carbide body and the first lateral cross-sectional plane. For example, a p-doped emitter region can contain the anode region of a power semiconductor diode or the body regions of transistor cells. The superjunction structure can be part of a power semiconductor diode with a high reverse voltage capability or part of a power semiconductor switching device, such as a MOSFET, with a high reverse voltage capability. For example, the reverse voltage capability of the silicon carbide device can be at least 1.2 kV, e.g., at least 1.6 kV, or at least 3 kV.

[0085] According to one embodiment, a compensation connection area can connect two adjacent compensation layer areas. The compensation connection area and the compensation layer areas can have the same conductivity type. The compensation connection area can connect two vertically adjacent compensation layer areas.

[0086] According to one embodiment, a compensation adjustment region can be in contact with two adjacent compensation layer regions. The compensation adjustment region and the compensation layer regions can have complementary conductivity types. Each compensation adjustment region can be in contact with two vertically adjacent compensation layer regions. The compensation adjustment regions can contribute to smoothing charge equilibrium discontinuities near the steps between adjacent steep sidewall regions and the filler structure.

[0087] Fig. Sections 1A-6B describe methods for forming a compensation structure with compensation areas of a first conductivity type and with compensation layer regions of a second conductivity type. The first conductivity type can be the n-type, and the second conductivity type can be the p-type. The compensation areas and the compensation layer regions can form a regular structure of lateral pn junctions.

[0088] The procedures involve a combination of masked ion implantation and masked trench etching. Openings in the mask for ion implantation and openings in the mask for trench etching can be self-aligned with each other. Fig. In 1A-1B, 3A-3N and 4A-4D, etching of trenches is followed by implantation of ions. Fig. 2A-2B and 6A-6C are followed by the implantation of ions and the etching of trenches.

[0089] Fig. Figure 1A shows a silicon carbide body 100 and a first process mask 410 formed on a first surface 101 of the silicon carbide body 100. The silicon carbide body 100 can be a region of a silicon carbide substrate. The silicon carbide substrate can comprise a plurality of silicon carbide bodies arranged side by side and laterally connected to one another. Each silicon carbide body 100 can form the semiconductor die (chip) of a power semiconductor device. The first surface 101 of the silicon carbide body 100 can be a section of a major surface on a front face of the silicon carbide substrate.

[0090] The silicon carbide body 100 can contain a doped main layer 130. The main layer 130 can be formed by epitaxy. The main layer 130 can have a first conductivity type. For example, the main layer 130 can be n-doped. The first process mask 410 can contain a single homogeneous layer or can comprise two or more sublayers of different materials. Larger openings 411 in the first process mask 410 expose first surface sections of the first surface 101.

[0091] Through the larger openings 411, initial dopants are implanted into the silicon carbide body 100. For example, an ion beam can be directed onto the first surface 101. The initial dopants form doped auxiliary regions 170 in sections of the silicon carbide body 100 below the larger openings 411. The auxiliary regions 170 exhibit a second conductivity type. The auxiliary regions 170 and the main layer 130 can form p-junctions. The ion beam can be controlled and / or modified to generate an approximately uniform vertical distribution of the initial dopants in the auxiliary regions 170.

[0092] A second process mask 420 is formed. The second process mask 420 can be formed by modifying the first process mask 410. For example, the larger openings 411 can be transformed into smaller openings 421. A lateral cross-section of the smaller openings 421 is smaller than a lateral cross-section of the larger openings 411. For circular openings, the diameter of the smaller openings 421 is smaller than the diameter of the larger openings 411. For rectangular openings with or without rounded or chamfered corners, at least one lateral width of the smaller openings 421 is smaller than a corresponding lateral width of the larger openings 411. The larger and smaller openings 411, 421 can be concentric or approximately concentric.

[0093] For example, each smaller opening 421 can be formed by forming a spacer 431 along the inner sidewall of a larger opening 411. Forming the spacer 431 can involve depositing a conformal auxiliary layer on the first process mask 410. The auxiliary layer is sufficiently thin so that it does not completely fill the larger openings 411. A directed etching process can remove lateral areas of the auxiliary layer on the first process mask 410 and on the first surface 101. Residues of the auxiliary layer form the spacers 431 along the inner sidewalls of the larger openings 411. Fig. 1A.

[0094] Fig. Figure 1B shows the second process mask 420 with the smaller openings 421. The smaller openings 421 expose second surface sections of the first surface 101 and are connected to the larger openings 411. Fig. 1A preferably self-aligned. The second surface sections are central subsections of the first surface sections.

[0095] Trenches 800 are formed in the silicon carbide body 100 directly below the smaller openings 421. The formation of the trenches 800 may involve anisotropic etching, for example, reactive ion etching. The vertical extent of the trenches 800 may be equal to or less than the vertical extent of the auxiliary regions 170. The formation of the trenches 800 involves the removal of a central region of each auxiliary region 170. The remaining regions of each auxiliary region 170 form compensation layer regions 181. Each compensation layer region 181 extends along a steep sidewall section 811 of the trench 800.

[0096] Fig. Figure 2A shows trenches 800 formed in a main layer 130 of a silicon carbide body 100 directly below smaller openings 421 of a second process mask 420. A first process mask 410 with larger openings 411, which are wider than the smaller openings 421, can be formed. For example, an isotropic etching process, such as wet etching, can laterally remove or ablate the second process mask 420, transforming the smaller openings 421 into the larger openings 411. Initial dopants are implanted into the silicon carbide body 100 through the larger openings 411.

[0097] According to Fig. 2B The implanted first dopants form compensation layer areas 181 directly below the first surface 101, which extend along steep sidewall sections 811 of the trench 800. Furthermore, the first dopants form compensation soil areas 189 below the trenches 800. Each compensation soil area 189 extends from a trench floor 809 into the main layer 130.

[0098] Fig. Figures 3A-3N illustrate a method that uses trenches 800 with stepped trench sidewalls 801 to form a compensation structure 800, wherein trench sections in different levels of a silicon carbide body can have different mean widths.

[0099] The silicon carbide body 100 contains a main layer 130 of a first conductivity type. A process mask layer is deposited on the first surface 101 of the silicon carbide body 100. A photoresist layer is deposited on a top surface of the process mask layer. A photolithography process forms a photoresist mask 490 from the photoresist layer. The structure of the photoresist mask 490 is transferred to the process mask layer, forming a first process mask 410 with larger openings 411.

[0100] Fig. Figure 3A shows the larger openings 411, which expose the first surface sections of the first surface 101 of the silicon carbide body 100. The first process mask 410 is sufficiently thick to locally block deep vertical implantations of dopants into the silicon carbide body 100. For example, the first process mask 410 can contain silicon oxide or a metal, e.g., tungsten (W). The first process mask 410 can have sufficient thickness to mask implantations of aluminum ions, nitrogen ions, and / or boron ions with an implantation energy of up to 25 MeV. For example, the thickness of the process mask 410 can be in the range of 0.3 µm to 37 µm, 0.5 µm to 12 µm, or 1 µm to 4 µm.

[0101] The photoresist mask 490 can be removed. Dopants are implanted through the larger openings 411 into a first level F1 of the silicon carbide body 100. The implantation beam can be modified and / or controlled such that the vertical range of the implanted dopants exhibits an approximately uniform distribution within the first level F1.

[0102] According to Fig. 3B, the implanted first dopants form first auxiliary regions 171 in the vertical projection of the larger openings 411 in the first level F1. A vertical extent of the first level F1 can, for example, be in a range from 0.2 µm to 20 µm, e.g., from 0.5 µm to 7 µm or from 1 µm to 3 µm. Within the first auxiliary regions 171, the vertical dopant distribution can be approximately uniform.

[0103] A first auxiliary layer 460 can be formed on the front face of the silicon carbide body 100. The first auxiliary layer 460 can cover lateral and vertical surfaces with an approximately uniform thickness.

[0104] Fig. Figure 3C shows the first auxiliary layer 460, which covers an upper surface of the first process mask 410, side walls of the larger openings 411 of Fig. 3B lines and covers the first surface sections. The thickness of the first auxiliary layer 460 is less than 50% or even less than 25% of the smallest width of the larger openings 411. The first auxiliary layer 460 may, for example, be or contain a silicon oxide layer.

[0105] Lateral regions of the first auxiliary layer 460 are removed. For example, an anisotropic etching process such as reactive ion beam etching can selectively remove the lateral regions of the first auxiliary layer 460.

[0106] As in Fig. As illustrated in 3D, remnants of the first auxiliary layer 460 of Fig. 3C first spacers 431 along inner side walls of the larger openings 411. The first spacers 431 and the first process mask 410 of Fig. 3B form a second process mask 420. The second process mask 420 contains smaller openings 421 that expose central sections of the first auxiliary areas 171. The second process mask 420 with the smaller openings 421 is used as an etching mask for forming trenches. For example, the second process mask 420 masks a reactive ion beam etch.

[0107] Fig. 3E shows the first trench sections 810, extending from the first surface 101 into the first auxiliary areas 171. Remains of the first auxiliary areas 171 of Fig. 3D on both lateral sides of the first trench sections 810 form compensation layer areas 181. The vertical extent of the compensation layer areas 181 can be equal to or greater than the vertical extent of the first trench sections 810. In particular, the vertical extent of the compensation layer areas 181 is equal to the vertical extent of the first trench sections 810.

[0108] The vertical extent of the first trench sections 810 can be equal to or less than the vertical extent of the first auxiliary area 171. In the illustrated embodiment, the vertical extent of the first trench sections 810 is less than the vertical extent of the first level F1. Remnants of the first auxiliary areas below the first trench sections 810 and below the compensation layer areas 181 form soil layers 179.

[0109] The second process mask 420 can mask further implantation of first dopants, e.g., p-type dopants such as aluminum atoms, into a second level F2 of the silicon carbide body 100. In other words, the second process mask 420 for the first level F1 can be used as a first process mask 410-F2 with larger openings 412 to mask ion implantation of further first dopants into the second level F2.

[0110] Fig. Figure 3F shows second auxiliary areas 172 extending from a lower edge of the soil layer 179 into the silicon carbide body 100. The lateral extent of the first auxiliary areas 172 can be equal to or less than the lateral extent of the first trench sections 810. In some embodiments, lateral dispersion can result in second auxiliary areas 172 with a lateral extent greater than the lateral extent of the first trench sections 810.

[0111] The vertical distribution of the first dopants in the second level F2 is approximately uniform. The mean dopant concentration in the second auxiliary areas 172 may be equal to or differ from the mean dopant concentration in the first compensation layer areas 181 in the first level F1. The second level F2 may have the same or approximately the same vertical extent as the first level F1.

[0112] Alternatively, the vertical extent of the second layer F2 can differ significantly from the vertical extent of the first layer F1, whereby the vertical extent of the second layer F2 can be greater or less than the vertical extent of the first layer F1. A second auxiliary layer 470 can be deposited on the front face of the silicon carbide body 100.

[0113] Fig. Figure 3G shows the second auxiliary layer 470, which covers, in a uniform thickness, the upper surface of the first process mask 410-F2 with larger openings 412 for masking an ion implantation into the second level F2, the side walls of the larger openings 412, the side walls of the first trench sections 810, and the bottom of the first trench section 810. Anisotropic etching can selectively remove the lateral areas of the second auxiliary layer 470. Residues of the second auxiliary layer 470 form further spacers 432.

[0114] As in Fig. As illustrated in 3H, the first process mask 410-F2 of Fig. 3G and the spacers 431, 432 form a second process mask 420-F2 with smaller openings 422 for masking a trench etch into the second level F2. The additional spacers 432 line the side walls of the smaller openings 421 in the first process mask 410-F2 of Fig. 3F and the side walls of the first trench sections 810. The second process mask 420-F2 masks another anisotropic etching, forming the second trench sections 820.

[0115] Fig. Figure 3I shows the second trench sections 820, which extend from the bottom of the first trench sections 810 into the second level F2. The second trench sections 820 may extend down to the bottom of the second level F2 or they may not reach the bottom of the second level F2. Remains of the second auxiliary areas 172 of Fig. 3H on opposite sides of every second trench section 820 form further compensation layer areas 181. Below the compensation layer areas 181, remnants of the soil layers 179 form, which in Fig. As shown in Figure 3H, compensation connection areas 186 are located vertically below the compensation layer areas 181 in the first floor F1. Each connection area 186 is in direct contact with a vertically adjacent compensation layer area 181 and with a laterally adjacent compensation layer area 181.

[0116] Remnants of the second auxiliary areas 172 below the second trench sections 820 and below the compensation layer areas 181 in the second level F2 form further soil layers 179. Further initial dopants can be implanted through the smaller openings 422 of the second process mask 420-F2.

[0117] As in Fig. As illustrated in Figure 3J, the additional dopant materials form compensation soil areas 189 in the third level F3. The first and second trench sections 810, 820 form a trench 800 with stepped trench sidewalls 801. The compensation soil areas 189 extend from the trench floor 809 of trenches 800 into the third level F3. Below the compensation layer areas 181 in the second level F2, remnants of the soil layers 179 form Fig. 31 Further compensation connection areas 186. The further compensation connection areas 186 connect the compensation soil area 189 with two compensation layer areas 181, which are formed on opposite side walls of the second trench section 820. The second process mask 820-F2 can be removed.

[0118] According to Fig. 3K are compensation layer areas 181, which are formed along opposite side walls of the same trench 800, and a compensation soil area 189, which is formed below the trench 800, connected to each other and forming first columns, e.g. p-type columns, of a compensation structure 180. Sections of the main layer 130 between adjacent first columns form compensation areas 182. The compensation areas 182 form second columns, e.g. n-type columns, of a compensation structure 180. The n-type columns and the p-type columns form a regular structure of vertical pn transitions with steps.

[0119] The trenches 800 can be filled with a suitable material. Masked implantations can create further endowed areas in the first floor F1.

[0120] Fig. 3L shows filling structures 190, which fill the trenches 800 of Fig. 3K filling. The 190 filling structures can contain one or more dielectric materials. For example, the 190 filling structures can contain only silicon oxide or silicon oxide in combination with at least one other material. The other materials can include silicon nitride, a doped semiconductor material, and / or an intrinsic semiconductor material.

[0121] An average dopant concentration in each of the first level F1, the second level F2, and the third level F3 can be configured such that, in each of the levels F1, F2, F3, there is essentially charge compensation with the compensation layer regions 181. Since absolute compensation cannot be achieved due to process variations or other reasons, one or more of the levels can deliberately deviate from exact charge compensation.As an example, doping in the first level F1 can be selected such that a charge of layer region 181 in the first level F1 is not completely compensated, doping in the second level F2 can be selected such that a charge of layer region 181 in the second level F2 is essentially compensated, and doping in the third level F3 can be selected such that a charge of layer region 181 in the third level F3 is overcompensated. Of course, the inverse doping scheme or any other doping scheme can be chosen.

[0122] If the trenches are filled with doped semiconductor material, this doping level can be taken into account when selecting the doping parameter of the compensation layers and / or when selecting the doping levels of the first, second, and third levels F1, F2, F3 respectively to achieve the desired degree of charge equilibrium. Deep shielding regions 169 of the conductivity type of the compensation layer regions 181 can be formed along the first surface 101. Each deep shielding region 169 can form direct vertical contact with a single compensation layer region 181 or can overlap with a single compensation layer region 181.

[0123] An uppermost layer F0 can be formed by epitaxy on the first floor F1, can be formed from an upper region of the first floor F1, or can be provided before the formation of the trenches 800 between the first surface 101 and the first floor. Masked ion implantations into the uppermost layer F0 can form doped regions of transistor cells. Gate trenches 850 can be formed in the uppermost layer F0.

[0124] Fig. 3M shows the gate trenches 850. The gate trenches 850 extend through the uppermost layer F0 and expose the filler structure 190 and the upper surfaces of the compensation layer regions 181 in the first level F1. The gate trenches 850 can be strip-shaped. A lateral longitudinal axis of the gate trenches 850 can extend parallel to a lateral longitudinal axis of the filler structures 190. According to another embodiment, the lateral longitudinal axis of the gate trenches 850 can extend at an inclination, e.g., orthogonally, to a lateral longitudinal axis of the filler structures 190. The doped regions in the uppermost layer F0 can include uppermost shielding regions 168, source regions 110, body regions 120, and current spreading regions 137.

[0125] A gate dielectric 159 can be formed that lines at least one of the side walls of each gate groove 850. Formation of the gate dielectric 159 can involve thermal oxidation of released silicon carbide and / or deposition of one or more dielectric materials. One or more conductive materials can be deposited in the gate grooves 850.

[0126] Fig. 3N shows transistor cells TC formed in the top layer F0. Each transistor cell TC contains a gate structure 150 located in one of the gate grooves 850 of Fig. 3M is formed. The gate structures 150 contain a conductive gate electrode 155 and a gate dielectric 159. The gate dielectric 159 is formed between the gate electrode 155 and the silicon carbide body 100 at least along an active first gate sidewall 151 of the gate structure 150.

[0127] Each transistor cell TC contains a body region 120 of the second conductivity type. The body region 120 is in direct contact with the active first gate sidewall 151. A source region 110 is formed between the first surface 101 and the body region 120. A current spread region 137 may be formed between the body region 120 and an adjacent compensation region 182. The current spread region 137 and the adjacent compensation region 182 may form a unipolar junction or may have the same mean net dopant concentration. The source region 110 and the current spread region 137 exhibit the first conductivity type. The body region 120 forms a first pn junction with the current spread region 137 and a second pn junction with the source region 110.

[0128] A shielding area 160 can include a top shielding area 168 and a deep shielding area 169. Fig. 3L comprise. The shielding area 160 extends along an inactive second gate sidewall 152 of the gate structure 150. Each shielding area 160 is in direct contact with a compensation layer area 181.

[0129] Fig. Figures 4A-4D illustrate a method to at least partially compensate for excess dopants. For example, the compensation compound regions 186 of Fig. 3N provides a local excess of dopants. A local excess of dopants typically results in a significant decrease in the degree of charge equilibrium.

[0130] In Fig. 4A is a vertical extent of the first trench section 810 less than the vertical extent of the first level F1. Soil layers 179 are as described with reference to Fig. 3E described. Auxiliary dopants of the first conductivity type can be implanted into a section of the silicon carbide body 100 directly below and / or into the bottom layers 179. Implantation of the auxiliary dopants can include inclined implantation, with implantation angles ψ between a vertical direction 104 and the ion beam 105 in a range of 5° to 20° and from -5° to -20°.

[0131] The implanted auxiliary dopants form intermediate layers 885 below the first trench sections 810. The intermediate layers 885 can be n-doped layers formed below p-doped soil layers 179. The intermediate layers 885 and the soil layers 179 can partially overlap, whereby in the overlapping area the intermediate layers 885 can at least partially compensate for the doping in the soil layer 179. A lateral width of the intermediate layer 885 can be greater than a lateral width of the first trench section 810, so that the intermediate layer 885 contains sections directly below the compensation layer areas 181 in the first level F1.

[0132] Further initial dopants are implanted with a comparatively high average energy through the soil of the first trench sections 810 to create second auxiliary areas 172, as with reference to Fig. 3E and Fig. 3F described, to be trained.

[0133] Fig. Figure 4B shows the second aid areas 172, as they are located with reference to Fig. 3F were described. Remnants of the intermediate layer 885 of Fig. 4A form compensation setting areas 185 on both sides of every second auxiliary area 172.

[0134] A second trench section 820 can, as with reference to Fig. 3H and Fig. 3I described, are formed, wherein a further soil layer 179 and a further intermediate layer 885, as described with reference to Fig. 4A was described, they can be trained.

[0135] As in Fig. As illustrated in Figure 4C, the compensation adjustment areas 185 in the second level F2 can be formed directly below the compensation connection areas 186 in the first level F1 and in lateral contact with the compensation layer areas 181 in the second level F2. Compensation floor areas 189 can be formed, as illustrated in Figure 4C. Fig. The 3J described will be trained.

[0136] According to Fig. 4D remnants of the intermediate layer 885 in the third level F3 can form compensation adjustment areas 185 on opposite sides of each compensation floor area 189. The compensation adjustment areas 185 in the third level F3 can form directly below the compensation connection areas 186 in the second level F2 and in lateral contact with the compensation floor area 189.

[0137] In the Fig. 5A to 5C illustrated procedures and in the procedure according to Fig. 5D forms a single implantation of all compensation layer areas 181 and the lower compensation area 189.

[0138] Fig. Figure 5A shows a second process mask 420 with a smaller opening 421. A first trench section 810 is formed in the vertical projection of the smaller opening 421.

[0139] The first trench section 810 can extend from the first surface 101 into a first level F1 of the silicon carbide body 100. According to one embodiment, the second process mask 420 can comprise a first process mask 410 and a spacer 431 that lines a larger opening in the first process mask 410.

[0140] A further spacer 432 is formed, lining the inner side wall of the smaller opening 421 and the inner side wall of the first trench section 810. The second process mask 420 and the further spacer 432 form a further second process mask 420-F2 with smaller openings 422, which can mask further etching into the silicon carbide body 100. A second trench section 820 is formed in an exposed section of the trench floor of the first trench section 810.

[0141] As in Fig. As illustrated in Figure 5B, the second trench section 820 can extend from the trench floor of the first trench section 810 into a second level F2 of the silicon carbide body 100. The first trench section 810 and the second trench section 820 form a trench 800.

[0142] A first process mask 410 with larger openings 411 is formed, the larger openings 411 exposing the trenches 800 and collar surface sections 101c of the first surface 101 around the openings of the trenches 800. For example, the spacers 432, 431 can be selectively removed to expose and restore the first process mask 410.

[0143] First dopants are implanted through the larger openings 411, whereby the implantation beam is controlled and / or modified to obtain an approximately uniform distribution of the implanted first dopants along the vertical direction, e.g. over at least 50% or even at least 70% or even at least 80% of the vertical extent of each implantation area.

[0144] According to Fig. 5C form the implanted first dopants in a single implantation process using a single implantation mask compensation layer areas 181 and compensation floor areas 189.

[0145] The compensation layer areas 181 can be formed along all steep sidewall sections 811 of the trenches 800. The maximum implantation depth and the vertical extent of the trench sections 810, 820 can be the same. Alternatively, the maximum implantation depth can be less than the vertical extent of the trench sections 810, 820. In both cases, further inclined implantation can form compensation connection areas, as described with reference to Fig. 4A - 4B is described. In the illustrated alternative, the maximum implantation depth is greater than the vertical extent of the trench sections 810, 820. The implantation forms compensation connection areas 186 directly below each compensation layer area 181.

[0146] The compensation soil areas 189 extend from the soil surface 809 of the trenches 800 into the third level F3. Compensation adjustment areas can be formed as described with reference to Fig. Sections 6A to 6B are described. An uppermost layer can be formed on the first level F1, for example by means of epitaxy, and gate electrodes can be placed in the uppermost layer, as for example with regard to Fig. 3N was described, to be trained.

[0147] Fig. 5D refers to a process with a silicon carbide body 100 which, prior to the formation of the trenches 800, contains a top layer F0 between the first floor F1 and the first surface 101. A process mask 410, as in Fig. As described in sections 5A-5C, the structure can be formed on the uppermost layer F0 and is used to create gate trenches 850 in the uppermost layer F0. After the gate trenches 850 are formed, the first and second trench sections 810 and 820 are created at the bottom of the gate trenches 850 in the first and second levels F1 and F2.

[0148] Fig. Figure 5D shows that the final implantation mask (first process mask 410), which is used to form the compensation layer regions 181 and the compensation floor regions 189, can be identical to the gate trench etching mask or can be obtained from the gate trench etching mask by modifying it. Modifying the gate trench etching mask can, for example, include forming spacers or wet etching. Forming the gate trenches 850 in the top layer F0 can also be combined with the multiple implantation / etching sequence described in [reference to relevant section]. Fig. 3A - 3N was described.

[0149] Fig. 6A and Fig. 6B refers to a process that connects vertically adjacent compensation layer areas 181 in a process stage after forming a trench 800 with at least two trench sections 810, 820.

[0150] According to Fig. 6A The vertical extent of the first trench sections 810 and the vertical extent of the first level F1 are equal. The vertical extent of the second trench sections 820 and the vertical extent of the second level F2 are equal. Vertically adjacent compensation layer areas 181 may be separated from each other.

[0151] At least two symmetrical, inclined implantations can implant complementary dopants of the conductivity type of the compensation layer regions 181 into the trench sidewalls 801. Implantation angles φ between a vertical direction and the ion beam can be in a range of 5° to 20° and from -5° to -20°.

[0152] As in Fig. As illustrated in Figure 6B, the implanted supplementary dopants form compensatory connection areas along the edges of the stepped trench sidewalls 801 and along the edges between the trench sidewalls 801 and the trench floor 809. The compensatory connection areas 186 connect the compensatory floor areas 189 and the compensatory layer areas 181, which are formed along the same trench 800.

[0153] Fig. Figure 7 shows a silicon carbide device 500 containing transistor cells TC and a compensation structure 180. The silicon carbide device 500 contains a silicon carbide body 100, which, as above, is connected to Fig. 1A - 1B, Fig. 2A - 2B, Fig. 3A-3N, Fig. 4A-4B, Fig. 5A-5C and Fig. 6A-6B was described.

[0154] A first surface 101 on a front side and a second surface 102 on a back side of the silicon carbide body 100 are approximately parallel to each other. The thickness of the silicon carbide body 100 is given along a vertical direction 104. The vertical direction 104 can be parallel to a surface normal on a planar first surface 101 or to a surface normal on a mean plane of a ribbed first surface 101. The first surface 101 can be inclined to a principal crystal plane of the silicon carbide lattice. For example, the first surface 101 can be inclined to the (0001) plane of a silicon carbide body 100 with a hexagonal crystal lattice at an angle to the axis of about 4 degrees.

[0155] The transistor cells TC can be formed along trench gate structures 150 extending from the first surface 101 into the silicon carbide body 100. The gate structures 180 can be strip-shaped. That is, the length of the gate structures 150 along a lateral first direction is greater than the width of the gate structures 150 along a lateral second direction orthogonal to the first direction. The gate structures 150 can be long strips extending along a lateral longitudinal direction through a central active region of the silicon carbide body 100. In other embodiments, lateral cross-sections of the gate structures 150 can be circles, ovals, or regular polygons, e.g., quadrilaterals, squares, or hexagons, with or without rounded or chamfered corners.

[0156] The gate structures 150 contain a conductive gate electrode 155, which may contain or consist of a highly doped polycrystalline silicon layer and / or a metal-containing layer. A gate dielectric 159 separates the gate electrode 155 from the silicon carbide body 100 along at least one side of the gate structure 150. The gate dielectric 159 may contain or consist of thermally grown or deposited silicon oxide, silicon nitride, silicon oxynitride, another deposited dielectric material, or any combination thereof. The thickness of the gate dielectric 159 can be selected to obtain transistor cells TC with a threshold voltage in the range of 1.0 V to 8 V. The gate structures 150 may contain only the gate electrode 155 and the gate dielectric 159, or they may contain additional conductive and / or dielectric structures.

[0157] The gate structures 150 can be equally spaced and / or have the same width. The center-to-center distance between adjacent gate structures 150 can range from 1 µm to 10 µm, e.g., from 2 µm to 5 µm. The length of the gate structures 150 can be up to several millimeters. The extent of the gate structures 150 can range from 0.3 µm to 5 µm, e.g., from 0.5 µm to 2 µm. The base of the gate structures 150 can be rounded.

[0158] Opposing first and second gate sidewalls 151, 152 of each of the gate structures 150 can run substantially along the vertical direction 104 or can be inclined at a conical angle with respect to the vertical direction 104. In the latter case, the gate structures 150 can taper with increasing distance from the first surface 101. The conical angle between the gate sidewalls 151, 152 and the vertical direction 104 at the first surface 101 can be chosen according to the orientation of the crystal axes and / or according to the angle to the axis.

[0159] For example, the absolute value of the cone angle between the first gate sidewall 151 and the vertical direction 104 can deviate from the absolute value of the angle to the axis by no more than ±1° (e.g., in the case of 4H-SiC, the cone angle can range from at least 3° to at most 5°). However, the cone angle can differ in orientation from the angle to the axis. The cone angle between the second gate sidewall 152, which is opposite to the first gate sidewall 151, and the vertical direction can be oriented opposite to the cone angle of the first sidewall 151. The larger the cone angle, the narrower the gate structure 150 becomes, starting from the first surface 101.

[0160] In general, at least the first gate sidewall 151 can extend substantially along a crystal plane of the silicon carbide body 100 in which charge carrier mobility is high (e.g., one of the {11-20} or {1-100} crystal planes). The first gate sidewall 151 can be an active sidewall, meaning that the channel region can extend along the first gate sidewall 151. In some embodiments (e.g., in the case of a vertical trench gate structure 150), the second gate sidewall 152 can also be an active sidewall. In other embodiments (e.g., in the case of a tapered trench gate structure 150), the second gate sidewall 152 can be an inactive sidewall.

[0161] Doped regions in areas of the silicon carbide body 100 laterally between two adjacent gate structures 150 can comprise a source region 110, a body region 120, a current-spreading region 137, and a shielding region 160. The source region 110 and the current-spreading region 137 exhibit a first conductivity type. The body region 120 and the shielding region 160 exhibit the complementary second conductivity type. In the illustrated embodiment, the first conductivity type is an n-type, and the second conductivity type is a p-type. In alternative embodiments, the first conductivity type can be a p-type, and the second conductivity type can be an n-type.

[0162] Source region 110, body region 120, and current spreading region 137 can be in direct contact with the first gate sidewall 151 of a first gate trench structure 150. Body region 120 separates source region 110 and current spreading region 137. Source region 110 can be located between the first surface 101 and body region 120. Body region 120 and source region 110 form a pn junction. Body region 120 and current spreading region 137 form a pn junction.

[0163] The vertical extent of the body region 120 corresponds to one channel length of the transistor cells TC and can range from 0.2 µm to 1.5 µm. Along the lateral direction orthogonal to the cross-sectional plane, the source region 110 can extend without interruption along the entire lateral length of the gate structure 150.

[0164] The shielding region 160 is formed between the body region 120 and the inactive second gate sidewall 152 of an adjacent gate structure 150. The body region 120 and the shielding region 160 can form a unipolar transition. The shielding region 160 extends along the inactive second gate sidewall 152 of the second gate structure 150 from the first surface 101 into the silicon carbide body 100. The vertical extent of the shielding region 160 is greater than the vertical extent of the gate structures 150.

[0165] A maximum dopant concentration in the shielding region 160 can be higher than a maximum dopant concentration in the body region 120. A vertical dopant concentration profile in the shielding region 160 can exhibit a local maximum at a position below the trench-gate structure 150. Along the inactive second gate sidewall 152, a dopant concentration in the shielding region 160 can be higher than, i.e., at least ten times higher than, a dopant concentration in the body region 120 along the active first gate sidewall 151. Along the lateral direction orthogonal to the cross-sectional plane, the shielding region 160 can extend without interruption along the entire lateral length of the gate structure 150.

[0166] The compensation structure 180 can be formed in a main layer 130. The main layer 130 is formed between the gate structures 150 and the second surface 102. The main layer 130 can be a layer grown by epitaxy. The main layer 130 can be uniformly doped or can have a non-uniform vertical distribution of dopants. For example, the main layer 130 can contain two or more vertically stacked levels F1, ..., Fn with n greater than 1. Each level, F1, F2, ..., can have a uniform dopant concentration or can have a non-uniform vertical dopant profile. The levels F1, F2, ..., can have the same vertical extent, or at least one of the levels F1, F2, ..., can have a vertical extent that differs from at least one of the other levels F1, F2, .... A vertical extent of each level F1, F2, ...The particle size can be in a range from 0.5 µm to 7 µm, for example, from 1 µm to 5 µm. The levels F1, F2, ... can have the same average dopant concentration, or at least one of the levels F1, F2, ... can have an average dopant concentration that differs from at least one of the other levels F1, F2, ... For example, the average dopant concentration in each level F(n+1) can be lower than the average dopant concentration in level Fn.

[0167] A highly doped contact region or drain layer 139 can be formed between the main layer 130 and the second surface 102. The contact region 139 can exhibit the first conductivity type for a power MOSFET or a diode. For IGBTs, the backside contact or a backside emitter region can be p-doped. The contact region 139 can be a substrate region or contain one obtained from a crystalline ingot, and / or can contain a highly doped region of a layer formed by epitaxy. Along the second surface 102, the dopant concentration in the contact region 139 is sufficiently high to ensure a low-resistance ohmic contact between the contact region 139 and a metal structure.

[0168] The main layer 130 can be directly adjacent to the contact area 139. Alternatively, a spacer layer can separate the main layer 130 and the contact area 139. The spacer layer can have the first conductivity type and can contain a buffer layer. The vertical extent of the spacer layer can be between 0.5 µm and 50 µm or between 1 µm and 10 µm. The average dopant concentration in the spacer layer can, for example, be in the range of 3 × 10⁻⁶. 17 cm -3 up to 10 19 cm -3 lay.

[0169] The compensation structure 180 in the main layer 130 can contain a superjunction structure with first columns of the first conductivity type and second columns of the second conductivity type. The first and second columns of the compensation structure 180 are balanced with respect to charge to a predefined degree. For example, the lateral line integral through the first column deviates from the lateral line integral through the second column in the same lateral plane by no more than ±20%, ±10%, or even ±5%. The lateral line integrals are taken along a lateral direction perpendicular to a pn junction between the first and second columns.

[0170] Every second column can contain compensation layer areas 181 and a compensation soil area 189, wherein the compensation layer areas 181 and the compensation soil area 189 can be connected to each other and can be in contact with the same fill structure 190.

[0171] The infill structure 190 extends from an uppermost surface of the first level F1 of the main layer 130 into the main layer 130. The infill structure 190 has stepped sidewalls 191. Each stepped sidewall 191 can contain two or more steep sidewall regions 192, which are laterally displaced from each other. The steep sidewall regions 192 can be vertical or can deviate from the vertical direction, for example, by up to ±10 degrees. Flat sidewall regions 193 connect adjacent steep sidewall regions 192. The flat sidewall regions 193 can be lateral or nearly lateral, with an angle between each flat sidewall region 193 and the lateral plane that can be in a range of 0 degrees to ±25 degrees, for example, from 0 degrees to ±10 degrees.

[0172] The compensation layer areas 181 can extend in a uniform thickness along each steep sidewall area 192 on opposite sides of the infill structure 190. Pairs of compensation layer areas 181 can be formed on opposite sides of the infill structure 190 in the same level F1, F2, ... Compensation layer areas 181 formed in different levels F1, F2, ... can be laterally displaced relative to each other. The compensation base area 189 extends from a base surface 199 of the infill structure 190 into the main layer 130. Every second column can be structurally connected to at least one shielding area 160. For example, a compensation layer area 181 of a second column can be in direct contact with a shielding area 160.

[0173] The lateral width of a compensation layer region 181 can range from 50 nm to 2 µm. The mean net dopant concentration in a compensation layer region 181 can range from 10 17 cm -3 up to 10 19 cm -3 The laterally integrated net doping concentration in each compensation layer area 181 can be in a range of 10 12 cm -2 up to 10 14 cm -2 or in a range of 5·10 12 cm -2 up to 2·10 13 cm -2 to allow for complete depletion in the locked state of the device. For example, the laterally integrated net dopant concentration in every second column and in every first column can be in a range within ±20% of half the breakdown charge of crystalline silicon carbide, e.g., in a range within 0.8 * 10 13 cm -2 up to 1.2 * 10 13 cm-2 , lie. A compensation layer region 181 can, for example, have a lateral width of 50 nm and a mean net dopant concentration of 10 19 cm -3 or a lateral width of 2 µm and a mean net dopant concentration of 10 17 cm -3 exhibit.

[0174] The filling structure 190 can be a homogeneous structure or a layered structure containing two or more different materials. The filling structure 190 can contain a dielectric material, a conductive material, and / or an intrinsic semiconductor material.

[0175] For example, the filling structures 190 can be composed entirely of silicon oxide or can contain at least one dielectric material other than silicon oxide, wherein the overall temperature coefficient of the filling structure 190 can be closer to the temperature coefficient of single-crystal silicon carbide than to the temperature coefficient of silicon oxide. For example, the filling structures 190 can contain at least one silicon nitride and one silicon oxide.

[0176] The silicon oxide may contain silicon oxide formed using TEOS (tetraethyl orthosilane) as a precursor material, HDP (high-density plasma) silicon oxide and / or an oxide densified after deposition.

[0177] Each first column of the superjunction structure 180 can contain a compensation area 182. Each compensation area 182 contains a section of the main layer 130 laterally between adjacent second columns. The compensation areas 182 can be substantially uniformly doped along the vertical direction. Each compensation area 182 can contain compensation subsections 1821, 1822, ... Each compensation subsection 1821, 1822, ... can be located in a different level F1, F2, ... The vertical extents of the compensation subsections 1821, 1822, ... can be the same or different.

[0178] The mean dopant concentrations in the compensation subsections 1821, 1822, ... can be the same or different. For example, the mean dopant concentration of a compensation subsection 1821, 1822, ... can depend on the width of the compensation subsection 1821, 1822, ... For example, the mean dopant concentration in a narrower compensation subsection 1821, 1822, ... can be higher than in a wider compensation subsection 1821, 1822, ... A higher mean dopant concentration can at least partially compensate for a smaller lateral extent with respect to the total amount of dopant in the compensation subsection 1821, 1822, ... For example, for each compensation subsection 1821, 1822, ... the integrated dopant concentration along a lateral cross-sectional line through the respective compensation subsection 1821, 1822, ... can be determined.within a range of ± 10% of the same target value.

[0179] Different mean dopant concentrations of the compensation subsection 1821, 1822, ... can contribute to precise shaping of the electric field in the blocking mode of the silicon carbide device 500 at different levels. For example, shifting a maximum of an electric field towards the vertical center of the superjunction structure TRAPATT can reduce or prevent oscillations in the silicon carbide device.

[0180] Each current spreading region 137 can be in direct contact with one or more compensation regions 182. The current spreading regions 137 and the first floor F1 of the main layer 130 can have the same dopant concentration or can form a unipolar transition.

[0181] A first load electrode 310 on the front face of the silicon carbide body 100 is electrically connected to the source regions 110, the body regions 120, and the shielding regions 160. The gate electrode 155 can be electrically connected to a gate metallization on the front face of the silicon carbide body 100. The gate metallization forms a gate terminal or is electrically connected or coupled to one.

[0182] Areas of an interlayer dielectric 210 separate the first load electrode 310 and the gate electrode 155 in the gate structures 150. The first load electrode 310 can form a first load terminal, which can be an anode terminal of an MCD or a source terminal of a MOSFET, or can be electrically connected or coupled to one.

[0183] A second load electrode 320 forms a low-resistance ohmic contact with the contact area 139. The second load electrode 320 can form a second load terminal, which can be a cathode terminal of an MCD or a drain terminal of a MOSFET, or can be electrically connected or coupled to such a terminal.

[0184] The illustrated silicon carbide device 500 is an n-channel SiC SJ TMOSFET, wherein the first load electrode 310 forms a source terminal S or is electrically connected or coupled to one, and wherein the second load electrode 320 forms a drain terminal D or is electrically connected or coupled to one. The silicon carbide device 500 comprises a plurality of transistor cells TC and a plurality of gate structures 150, wherein the transistor cells TC are electrically connected in parallel.

[0185] In Fig. Figure 8 shows that the filling structure 190 includes a lining region 194, which separates a filling region 195 and the silicon carbide body 100. The lining region 194 can contain a conductive material, for example, p-doped silicon carbide, whereby this doping must be taken into account when selecting the doping levels of the compensation layers so that the desired degree of charge equilibrium is achieved. Alternatively, the lining region 194 can be a dielectric lining. The filling region 195 can contain dielectric material or conductive material, e.g., doped polycrystalline silicon carbide.

[0186] The silicon carbide device 500 further comprises compensation adjustment areas 185. Each compensation adjustment area 185 is formed directly below and in contact with a compensation layer area 181. Each compensation adjustment area 185 is formed laterally adjacent to and in contact with another compensation layer area 181 or with the compensation base area 189.

[0187] In Fig. The filling structures 190 contain a field plate 196. A dielectric region 197 of the filling structures 190 insulates the field plate 196 and the silicon carbide body 100. The field plate 196 can extend along the entire longitudinal extent of the gate structure 150 and can be electrically connected to the first load electrode 310 in a cross-sectional plane parallel to the illustrated cross-section. The field plate 196 contains a conductive material, for example, a metal-containing material, doped polycrystalline silicon, or doped polycrystalline silicon carbide. The vertical extent of the field plate 196 can be at most 200 nm, e.g., at most 60 nm. A dielectric structure 198, for example, thermally grown silicon oxide, can separate the gate electrode 155 and the field plate 196.The field plate 196 can contribute to a reduction of the electric field strength at the bottom of the gate structure 150 and can improve the reliability of the gate dielectric 159.

[0188] Fig. Figure 10 illustrates a compensation structure 180 based on filling structures 190 with stepped sidewalls 191 in combination with planar gate structures 150. Two transistor cells TC can be formed laterally within any region of the silicon carbide body 100 between two adjacent filling structures 190. The two transistor cells TC can be symmetrical with respect to a vertical plane of symmetry and can share a common planar gate structure 150.

[0189] The planar gate structure 150 is formed over a section of the first surface 101 between adjacent filling structures 190. The planar gate structure 150 includes a gate dielectric 159 and a gate electrode 155. The gate dielectric 159 can be formed directly on the first surface 101. The gate electrode 155 can be formed directly on the gate dielectric 159.

[0190] Source regions 110, body regions 120, and current-spreading regions 137 of transistor cells TC can be formed in an upper section of the first level F1 of the main layer 130. The body region 120 of the left transistor cell TC is directly adjacent to a section of the first surface 101 below the gate electrode 155 and can be in contact with the first compensation layer region 181 located at the very top on the left side. The body region 120 of the right transistor cell TC is directly adjacent to another section of the first surface 101 below the gate electrode 155 and can be in contact with the first compensation layer region 181 located at the very top on the right side. The source regions 110 of the transistor cells TC are formed between the first surface 101 and the respective body region 120.The current spreading region 137 is shared between the two transistor cells TC and is directly adjacent to a section of the first surface 101 directly below a central area of ​​the gate electrode 155. The current spreading region 137 can be in contact with a compensation region 182. For example, the current spreading region 137 and the compensation region 152 can form a unipolar junction.

[0191] The filling structures 190 may be slightly recessed. Regions of the first load electrode 310 may form contact structures 315 extending from the plane of the first surface 101 down into the silicon carbide body 100 to the recessed filling structure 190. The contact structures 315 may form lateral ohmic contacts with the source regions 110 and with upper sections of the uppermost compensation layer regions 181.

[0192] Fig. Figures 11A - 11B show a silicon carbide device 500 with trench-gate structures 150 running orthogonally to the filling structures 190.

[0193] Fig. Figures 12A-12B show transistor cells TC based on gate structures 150 with bi-sided channels and active first and second gate sidewalls 151, 152. Source regions 110, body regions 120, current-spreading regions 137, and shielding regions 160 can extend from a first gate sidewall 151 of a first gate structure 150 to a second gate sidewall 152 of a second gate structure 150, with metal source contact structures extending from the first surface 101 through the source regions 110 into the body regions 120. Regions containing the source regions 110, the body regions 120, and the current-spreading regions 137 can alternate with shielding regions 160 along a lateral direction parallel to the lateral longitudinal extent of the gate structures 150.

[0194] In Fig. 3, Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8, Fig. 9, Fig. 10, Fig. 11 to Fig. Figure 12 shows three levels F1 to F3 and a top layer F0. However, these are only examples. The number of levels can be smaller or larger by using more or fewer process loops of masking, trench etching, and implantation steps as described above.

[0195] To illustrate this, various scenarios relating to a silicon carbide device were described. Similar techniques can be implemented in semiconductor devices based on other types and materials of composite semiconductors for the silicon carbide body, e.g., gallium nitride (GaN) or gallium arsenide (GaAs), etc.

[0196] For illustrative purposes, various techniques for the self-alignment of larger openings in a first process mask with respect to smaller openings in a second process mask have also been described. Similar techniques can be implemented in other types and forms of training process masks with openings that can be aligned with high accuracy and reproducibility on silicon carbide substrates.

Claims

[1] Method for manufacturing a silicon carbide device comprising: implanting first dopants through a larger opening (411) of a first process mask (410) into a silicon carbide body (100), wherein the larger opening (411) exposes a first surface section of the silicon carbide body (100); a trench (800) being formed in the silicon carbide body (100) in a second surface section, which is exposed through a smaller opening (421) in a second process mask (420), wherein the second surface section is a subsection of the first surface section, wherein the larger opening (411) and the smaller opening (421) are designed to be self-aligned with each other, and wherein at least a part of the implanted first dopants forms at least a compensation layer area (181), the compensation layer area (181) extends parallel to a trench side wall (801) and the vertical dopant distribution in the compensation layer area (181) is box-shaped; a forming of an anode region of a power half-lead diode or a transistor cell (TC), wherein the anode region is formed between a first surface (101) of the silicon carbide body (100) and the compensation layer regions (181), and wherein the transistor cell (TC) has a source region (110) and a body region (120), wherein the source region (110) and the body region (120) form a pn junction, and wherein the source region (110) and the body region (120) are formed between the first surface (101) of the silicon carbide body (100) and the compensation layer regions (181). [2] Method according to the preceding claim, wherein the first dopants are implanted prior to forming the trench (800) and wherein the smaller opening (421) is formed by forming a spacer (431) along a side wall of the larger opening (411). [3] A method according to any one of the preceding claims, wherein forming the trench (800) and the compensation layer regions (181) comprises at least one repetition of an implantation / etching sequence, wherein the implantation / etching sequence comprises implanting first dopants through a larger opening (411, 412, ...) and forming a trench section (810, 820, ...) in a section exposed by a smaller opening (421, 422, ...), wherein the smaller opening (421, 422, ...) is formed by forming a spacer (431, 432, ...) along a side wall of the larger opening (411, 412, ...) and wherein a width of the larger opening (411, 412, ...) of the (n+1)th implantation / etching sequence is equal to a width of the smaller opening (421, 422, ...) of the nth implantation / etching sequence or smaller than this. [4] Method according to any of the preceding claims, further comprising: an implantation of further first dopants through a trench bottom (809) of the trench (800), wherein the further first dopants form a compensation bottom area (189) extending from the trench bottom (809) into the silicon carbide body (100). [5] Method according to claim 1, wherein the first dopants are implanted after forming the trench (800). [6] Method according to the preceding claim, wherein the larger opening (411) is formed by widening the smaller opening (421). [7] Method according to one of the two preceding claims, wherein forming the trench (800) comprises at least one repetition of an etching sequence, wherein the etching sequence comprises forming a trench section (810, 820, ...) in a section exposed by a smaller opening (421, 422, ...), wherein the smaller opening (422, 423, ...) of the (n+1)th etching sequence is smaller than the smaller opening (421, 422, ...) of the nth etching sequence. [8] Method according to the preceding claim, wherein the smaller opening (422, 423, ...) of the (n+1)th etching sequence is formed by forming a spacer (432, 433, ...) along a side wall of the smaller opening (421, 422, ...) of the nth etching sequence. [9] Method according to one of the two preceding claims, further comprising: an implantation of auxiliary dopants into the silicon carbide body (100), wherein the auxiliary dopants and the first dopants have complementary conductivity types, wherein an implantation of the auxiliary dopants comprises an ion beam implantation, wherein the ion beam (105) is inclined with respect to a vertical direction (104), and wherein the implanted auxiliary dopants form compensation setting regions (185) on opposite sides of the trench sections (810, 820, ...). [10] Method according to any of the preceding claims, wherein the silicon carbide body (100) has a main layer (130), the main layer and the compensation layer regions (181) have complementary conductivity types and the trench (800) extends into the main layer (130). [11] Method according to any of the preceding claims, further comprising: After forming the trench (800), additional dopants of the conductivity type of the first dopants are implanted into the silicon carbide body (100), wherein the implantation of the additional dopants includes an ion beam implantation, the ion beam (105) being inclined with respect to a vertical direction (104), the implanted additional dopants forming interconnection regions (186) and each interconnection region (186) being in contact with and / or overlapping with two adjacent compensation layer regions (181). [12] Silicon carbide device comprising: a filling structure (190) extending from a first lateral cross-sectional plane (H1) of a silicon carbide body (100) to a second lateral cross-sectional plane, wherein the filling structure (190) has at least one stepped side wall (191), wherein the stepped side wall (191) contains at least two steep side wall regions (192) that are laterally displaced from each other, and wherein the width of the filling structure (190) decreases stepwise with increasing distance from a first surface (101) of the silicon carbide body (100); Compensation layer regions (181) formed in the silicon carbide body (100), each compensation layer region (181) extending along one of the steep sidewall regions (192) and having a box-shaped vertical dopant distribution in the compensation layer region (181); and an anode region of a power half-lead diode or a transistor cell (TC), wherein the anode region is formed between a first surface (101) of the silicon carbide body (100) and the compensation layer regions (181), and wherein the transistor cell (TC) has a source region (110) and a body region (120), wherein the source region (110) and the body region (120) form a pn junction, and wherein the source region (110) and the body region (120) are formed between the first surface (101) of the silicon carbide body (100) and the compensation layer regions (181). [13] Silicon carbide device according to the preceding claim, wherein the filling structure (190) has two stepped side walls (191) on opposite sides. [14] Silicon carbide device according to one of the two preceding claims, further comprising: a compensation soil region (189) formed in the silicon carbide body (100), wherein the compensation soil region (189) is in contact with a soil surface (199) of the filling structure (190). [15] Silicon carbide device according to one of the three preceding claims, wherein the compensation floor area (199) and the compensation layer areas (181) are structurally connected to each other. [16] Silicon carbide device according to one of the four preceding claims, wherein the filling structure (190) contains at least one dielectric structure. [17] Silicon carbide device according to any one of the five preceding claims, further comprising: Compensation areas (182) in contact with the compensation layer areas (181), wherein each compensation layer area (181) lies laterally between the filling structure (190) and one of the compensation areas (182), and wherein the compensation layer areas (181) and the compensation areas (182) form pn junctions. [18] Silicon carbide device according to any one of the six preceding claims, further comprising: a compensation connection area (186) that connects two adjacent compensation layer areas (181), wherein the compensation connection areas (186) and the compensation layer areas (181) have the same conductivity type. [19] Silicon carbide device according to any one of the seven preceding claims, further comprising: a compensation setting area (185) in contact with two adjacent compensation layer areas (181), wherein the compensation setting area (185) and the compensation layer areas (181) have different conductivity types.

Images