switch circuit

Abstract

Switch circuit, comprising: a first switch path comprising at least four series-connected transistors of an n-conductivity type; a second switch path connected in parallel to the first switch path with at least four transistors of a p-conductivity type connected in series, a control circuit configured to provide the following voltages to control terminals of the transistors of the first switch path: • a first protective voltage to an input-side first transistor (Mn1), wherein the first protective voltage is dimensioned to protect a second transistor (Mn2) connected immediately downstream of the first transistor (Mn1); • to provide a second protective voltage to a fourth transistor (Mn4) on the output side, wherein the second protective voltage is dimensioned to protect a third transistor (Mn3) connected directly upstream of the fourth transistor (Mn4); • a first switching voltage to the second transistor (Mn2); • a second switching voltage to the third transistor (Mn3); wherein the control circuit is further configured to provide the following voltages to the control terminals of the transistors of the second switch path: • a third protective voltage to an input-side first transistor (Mp1), wherein the third protective voltage is dimensioned to protect a second transistor (Mp2) connected immediately downstream of the first transistor (Mp1); • a fourth protective voltage to a fourth transistor (Mp4) on the output side, the fourth protective voltage being dimensioned to protect a third transistor (Mp3) immediately upstream of the fourth transistor (Mp4); • a third switching voltage to the second transistor (Mp2); and • a fourth switching voltage to the third transistor (Mp3) wherein the control circuit is arranged to switch on the switch circuit • to provide the first protection voltage (Vin+Von) as an input voltage (Vin) of the switch circuit plus a voltage (Von) such that the first transistor (Mn1) of the first switch path is switched to conductive; • to provide the second protection voltage (Vout+Von) as an output voltage (Vout) of the switch circuit plus a voltage (Von) such that the fourth transistor (Mn4) of the first switch path is switched to conductive; • to provide the first switching voltage (Vin+Von) as the input voltage (Vin) of the switch circuit plus a voltage (Von) such that the second transistor (Mn2) of the first switch path is switched to conductive; • to provide the second switching voltage (Vout+Von) as the output voltage (Vout) of the switch circuit plus a voltage (Von) such that the third transistor (Mn3) of the first switch path is switched to conduction; • to provide the third protection voltage (Vin-Von) as an input voltage (Vin) of the switch circuit minus a voltage (Von) such that the first transistor (Mp1) of the second switch path is switched to conductive; • to provide the fourth protection voltage (Vout-Von) as an output voltage (Vout) of the switch circuit minus a voltage (Von) such that the fourth transistor (Mp4) of the second switch path is switched to conduction; • to provide the third switching voltage (Vin-Von) as the input voltage (Vin) of the switch circuit minus a voltage (Von) such that the second transistor (Mp2) of the second switch path is switched to conduction; and • to provide the fourth switching voltage (Vout-Von) as the output voltage (Vout) of the switch circuit less a voltage (Von) such that the third transistor (Mp3) of the second switch path is switched to conduction.

Description

[0001] The invention relates to a switch circuit.

[0002] It is possible that high voltages must be handled by devices (e.g., field-effect transistors) that do not have the appropriate dielectric strength. An example of this is overvoltage-tolerant input / output interfaces.

[0003] For example, it may be desirable to provide an analog switch in the form of a switching circuit. Such a switching circuit is intended to conduct an analog input voltage applied to an input terminal of the switching circuit to or block it from an output terminal of the switching circuit.

[0004] A conventional switch circuit is a so-called T-gate 100, as in Fig. 1. The conventional T-gate 100 typically has an input terminal 102, a switching control terminal 104, a first transistor (e.g., an NMOS field-effect transistor) 106, a second transistor (e.g., a PMOS field-effect transistor) 108, an inverter 110, and an output terminal 112. An input voltage Vin is applied to the input terminal 102, and a switching control voltage Von / off is applied to the switching control terminal 104, which controls whether the T-gate 100 is switched on as a switch, and thus the input voltage Vin is to be passed from the input terminal 102 to the output terminal 112 and provided there as the output voltage Vout, or whether the T-gate 100 is switched off as a switch, thus blocking the T-gate 100. A control terminal (e.g.,Gate terminal) of the first transistor 106 is directly connected to the switching control terminal 104, and thus the switching control voltage Von / off is applied to the control terminal of the first transistor 106. An inverter 110, which is also connected on the input side to the switching control terminal 104 and on the output side to a control terminal (e.g., gate terminal) of the second transistor 108, inverts the switching control voltage Von / off and thus controls the control terminal of the second transistor 108 with the inverse switching control voltage Von / off. The input terminal 102 is connected to a first controlled terminal (e.g., drain terminal) of the first transistor 106 and to a first controlled terminal (e.g., source terminal) of the second transistor 108. Furthermore, a second controlled terminal (e.g., source terminal) of the first transistor 106 and a second controlled terminal (e.g.,The drain terminal of the second transistor 108 is both connected to the output terminal 112, at which the output voltage Vout is provided. Since the two transistors 106, 108 are of different conductivity types, either both transistors 106, 108 are conductive or both transistors 106, 108 are non-conductive.

[0005] Furthermore, there may be an additional operating condition: In the off state of the T-gate 100, the switch must also block voltages that are higher than a first high reference potential (e.g., operating potential VDD) and lower than a second low reference potential (e.g., ground potential GND). Therefore, in another conventional T-gate 200, it is provided to expand the T-gate 100 by a second T-gate (see Fig. 2). Shunt transistors (also called bypass transistors) are placed between these two T-gates to ensure that at least the second T-gate is definitely off. Fig. 2 shows an example of such an extended T-gate 200. More specifically, a third transistor (e.g., an NMOS transistor) 202 is connected in series with the first transistor 106, with the two control terminals of the first transistor 106 and the third transistor 202 being connected to one another. Furthermore, a fourth transistor (e.g., a PMOS transistor) 204 is connected in series with the second transistor 108, with the two control terminals of the second transistor 108 and the fourth transistor 204 being connected to one another. A first bypass transistor (e.g., a PMOS transistor) 206 has a first controlled terminal connected between a controlled terminal of the first transistor 106 and a controlled terminal of the third transistor 202.A second controlled terminal of the first bypass transistor 206 is coupled to the first high reference potential VDD, and the control terminal of the first bypass transistor 206 is connected to the switching control terminal 104. Furthermore, a second bypass transistor (e.g., an NMOS transistor) 208 having a first controlled terminal is connected between a controlled terminal of the second transistor 108 and a controlled terminal of the fourth transistor 204. A second controlled terminal of the second bypass transistor 208 is coupled to the second low reference potential GND, and the control terminal of the second bypass transistor 208 is connected to the output of the inverter 110.

[0006] However, such solutions do not work if the transistors' rated voltage is lower than the supply voltage. For example, if the gate terminal of an NMOS transistor is connected to a high reference potential VDD or to a low reference potential GND to enable or disable the input voltage Vin, the gate oxide of the NMOS transistor may be broken down when the input voltage Vin has just reached the opposite state (GND / VDD).

[0007] Another switching circuit is described in DE 10 2016 223 354 B4. The switching circuit comprises three transistors connected in series. The switching circuit requires a charge pump with a pump voltage greater than 7.5V to provide auxiliary currents, and the switching circuit also does not consider bypass transistors.

[0008] Another switching circuit is described in EP 4 213 385 A1. It consists of two P-type transistors connected in series between a first signal node and an internal node. When both transistors are on, signals are transmitted between the nodes. When both transistors are off, signal communication is interrupted. In the off state, a third P-type transistor, connected between the first and second transistors and controlled by the first signal node, monitors and adjusts the voltage limiting the gate-source voltage of the first transistor.

[0009] Embodiments of the invention are illustrated in the figures and are explained in more detail below.

[0010] It shows Fig. 1 a conventional T-gate; Fig. 2 a conventional extended T-gate; Fig. 3A to 3D show switch paths of a series circuit of transistors with respective drive voltages according to various aspects of this disclosure; Fig. 4 shows a switch circuit according to various aspects of this disclosure; Fig. 5 illustrates a switch circuit according to various aspects of this disclosure; Fig. 6A and Fig. 6B illustrates partial control circuits according to various aspects of this disclosure; Fig. 7A and Fig. 7B illustrates partial control circuits according to various aspects of this disclosure; Fig. 8A and Fig. 8B illustrates partial control circuits according to various aspects of this disclosure; Fig. 9A and Fig. 9B illustrates partial control circuits according to various aspects of this disclosure; Fig. 10A and Fig. 10B illustrates partial control circuits according to various aspects of this disclosure; Fig. 11A and Fig. 11B illustrates partial control circuits according to various aspects of this disclosure; Fig. 12A and Fig. 12B illustrates partial control circuits according to various aspects of this disclosure; Fig. 13A and Fig. 13B illustrates partial control circuits according to various aspects of this disclosure; Fig. 14 shows a switch circuit according to various aspects of this disclosure; Fig. 15 shows a first diverter circuit according to various aspects of this disclosure; Fig. 16 shows a second diverter circuit according to various aspects of this disclosure; Fig. 17 illustrates a switch circuit according to various aspects of this disclosure; Fig. 18 illustrates a first switch path with clamping circuits according to various aspects of this disclosure; Fig. 19 shows a second switch path with clamping circuits according to various aspects of this disclosure; and Fig. 20 a multiplexer according to various aspects of this disclosure.

[0011] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology such as "top", "bottom", "front", "back", "fore", "rear", etc., will be used with reference to the orientation of the described figure(s). Since components of embodiments can be positioned in a number of different orientations, the directional terminology is for the purpose of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention.It is understood that the features of the various exemplary embodiments described herein may be combined with one another unless specifically stated otherwise. The following detailed description is therefore not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.

[0012] Throughout this description, the terms "connected," "attached," and "coupled" are used to describe both a direct and indirect connection, a direct or indirect connection, and a direct or indirect coupling. In the figures, identical or similar elements are provided with identical reference numerals where appropriate.

[0013] Various aspects of this disclosure provide a switching circuit with relatively few transistors and no required charge pump, wherein the recommended operating voltage of the transistors is lower than the input voltage to be processed.

[0014] Examples described herein may relate to high voltages and low voltages. Some examples described herein may relate to switching circuits for processing voltages in a range of approximately 5 V, while using transistors having a recommended operating voltage in a range of 2.5 V. In connection with these examples, 5 V may be understood as a high voltage, while 2.5 V may be understood as a low voltage. In connection with other examples described herein, any voltage greater than a recommended operating voltage of a transistor or an applicable operating voltage applicable to transistors may be understood as a high voltage, and a voltage equal to or less than the recommended operating voltage may be understood as a low voltage.

[0015] The recommended operating voltage may be a device-dependent (e.g., transistor-dependent) voltage or a device-dependent (e.g., transistor-dependent) potential between a control terminal, such as a gate or base of a transistor, and a controlled terminal of the transistor, such as a source terminal or drain terminal, a collector terminal, or an emitter terminal. For example, the recommended operating voltage may be specified in a transistor datasheet. The recommended operating voltage (also referred to as the rated voltage) may be a voltage applied to the transistor's terminals that enables regular operation without damage to the transistor element due to the application of an overvoltage.Accordingly, a recommended operating voltage of a transistor (for example, a gate-source voltage) VGSOP may be 2.5 volts and would correspond to a low voltage, and a maximum applicable operating voltage (which is usually higher than the corresponding recommended operating voltage) shall be, for example, 3.25 V, which corresponds to an allowable range (tolerance range) of 30% of the recommended voltage range.

[0016] Transistors used in various aspects of this disclosure may be planar transistors, fin transistors, or vertical transistors. The transistors may be field-effect transistors (FETs) or (at least partially) bipolar transistors. The transistors may be (e.g., normally-off) metal-oxide-semiconductor (MOS) FETs, for example, n-channel MOSFETs (also referred to as n-conductivity type MOSFETs) or p-channel MOSFETs (also referred to as p-conductivity type MOSFETs). The transistors may be normally-off field-effect transistors or normally-on field-effect transistors. The transistors may have one or more control terminals (e.g., gate terminal or base terminal) and a plurality of controlled terminals (e.g., source terminal or emitter terminal and drain terminal or collector terminal).

[0017] A cascode can be understood as a circuit comprising a transistor (e.g., a MOSFET), also referred to as a cascode transistor, with a voltage (e.g., a constant voltage) at the control terminal (e.g., gate terminal) of the cascode transistor and an input current source connected to a controlled terminal (e.g., source terminal) of the cascode transistor. A cascode stage typically consists of a transistor in a source configuration and a transistor in a gate configuration connected in series. Within the context of various aspects of this disclosure, cascode transistors are variously used as protection transistors to protect other transistors, which distribute a voltage drop across a transistor to be protected that is excessive (without the cascode transistors) among several transistors.

[0018] In various aspects, a scenario is encountered where a 5 V device (5 V supply, 5 V IOs) is transferred to a manufacturing process that does not provide 5 V transistors.

[0019] In various aspects, a switch circuit is provided which has the same functionality as the switch circuits in Fig. 1 or Fig. 2, but exhibits no reliability issues, even when using transistors with a lower voltage rating than the respective operating voltage. Furthermore, no charge pump is required, which is often undesirable for creating artificial overvoltages or undervoltages. Finally, the switching circuit is designed to operate with essentially no power consumption in the off state.

[0020] In the context of this description, a logical "on" signal represents a signal with a voltage level that activates and thus switches on a respective transistor to whose control input (e.g., gate terminal) the voltage level is applied. Thus, a logical "on" signal for a transistor of an n-conductivity type (e.g., an NMOS transistor) corresponds to a logic value of "1" and corresponds to a high voltage (e.g., 5 V). Furthermore, a logical "on" signal for a transistor of a p-conductivity type (e.g., a PMOS transistor) corresponds to a logic value of "0" and corresponds to a low voltage (e.g., 0 V).

[0021] In the context of this description, a logical "off" signal represents a signal with a voltage level that deactivates and thus switches off a respective transistor to whose control input (e.g., gate terminal) the voltage level is applied. Thus, a logical "off" signal for a transistor of an n-conductivity type (e.g., an NMOS transistor) corresponds to a logic value of "0" and corresponds to a low voltage (e.g., 0 V). Furthermore, a logical "off" signal for a transistor of a p-conductivity type (e.g., a PMOS transistor) corresponds to a logic value of "1" and corresponds to a high voltage (e.g., 5 V).

[0022] In various aspects, a transistor stack (at least two transistors in series) is provided to replace the single-pass transistors. Suitable voltage definitions for the intermediate nodes are specified. Furthermore, means for driving the control terminals (e.g., gate terminals) of the transistors with suitable voltages are clearly provided. The main functionality is clearly achieved by wiring several blocks together, whereby these individual blocks can be set to the active state or to a (high-impedance) tri-state (hi-Z).

[0023] Fig. 3A shows a conceptual representation of an NMOS branch 406 (also referred to as first switch path 406) of a switch circuit in the “on” state 300.

[0024] The first switch path 406 comprises a series circuit of four transistors Mn1, Mn2, Mn3, Mn4 (e.g., four NMOS transistors Mn1, Mn2, Mn3, Mn4). The four transistors Mn1, Mn2, Mn3, Mn4 of the first switch path 406 can be transistors of a first conductivity type, for example, of an n-conductivity type. The control terminal (e.g., the gate terminal) of a first transistor Mn1 of the first switch path 406 is controlled for switching on by a control circuit such that a first protection voltage Vin+Von is applied to the control terminal. The first protection voltage Vin+Von is dimensioned to protect a second transistor Mn2 of the first switch path 406, which is connected directly downstream of the first transistor Mn1 of the first switch path 406 in the series circuit (in addition, the first protection voltage Vin+Von can also be dimensioned to protect the first transistor Mn1 of the first switch path 406 itself). The control terminal (e.g.The gate terminal (e.g., the gate terminal) of the second transistor Mn2 of the first switch path 406 is controlled by the control circuit such that a first switching voltage Vin+Von is applied to the control terminal. The value of the first switching voltage may, but need not, be equal to the value of the first protection voltage. The control terminal (e.g., the gate terminal) of a third transistor Mn3 of the first switch path 406, which is connected directly downstream of the second transistor Mn2 of the first switch path 406, is controlled by the control circuit such that a second switching voltage Vout+Von is applied to the control terminal. The value of the second switching voltage may, but need not, be equal to the value of a second protection voltage described below. The control terminal (e.g.,The gate terminal (i.e., the gate terminal) of a fourth transistor Mn4 of the first switch path 406 is controlled by a control circuit such that a second protection voltage Vout+Von is applied to the control terminal. The second protection voltage Vout+Von is dimensioned to protect a third transistor Mn3 of the first switch path 406, which is connected directly upstream of the fourth transistor Mn4 of the first switch path 406 in the series circuit (additionally, the second protection voltage Vout+Von can also be dimensioned to protect the fourth transistor Mn4 of the first switch path 406 itself).

[0025] To switch on the transistors Mn1, Mn2, Mn3, Mn4 of the first switch path 406: - the first protection voltage Vin+Von applied to the control terminal of the first transistor Mn1 is an input voltage Vin of the switch circuit plus a voltage Von, so that the first transistor Mn1 of the first switch path 406 is switched to conductive; - the second protection voltage Vout+Von applied to the control terminal of the fourth transistor Mn4 is an output voltage Vout of the switch circuit plus a voltage Von, so that the fourth transistor Mn4 of the first switch path 406 is switched to conductive; - the first switching voltage Vin+Von applied to the control terminal of the second transistor Mn2 is the input voltage Vin of the switch circuit plus a voltage Von, so that the second transistor Mn2 of the first switch path 406 is switched to conduction; and - the second switching voltage Vout+Von applied to the control terminal of the third transistor Mn3 is the output voltage Vout of the switch circuit plus a voltage Von, so that the third transistor Mn3 of the first switch path 406 is switched to conductive.

[0026] It should be noted that, for the purposes of this description, the voltage Von (which can also be descriptively referred to as the turn-on voltage for a transistor) is always defined as a positive voltage. Furthermore, it should be noted that the voltage Von for an NMOS transistor and the voltage Von for a PMOS transistor can also assume different values.

[0027] Illustratively, the first transistor Mn1 and the second transistor Mn2 of the first switch path 406 are driven by the input voltage Vin plus a certain "on" voltage (e.g., Von). For example, the first transistor Mn1 and the second transistor Mn2 of the first switch path 406 can be 2.5 V EA transistors.

[0028] The value of the "on" voltage (e.g., Von) can be in the order of 2.5 V. The exact value is not important. However, it should be high enough to bring the respective transistor(s) into a conducting state with a sufficiently low on-resistance Ron. When the input voltage Vin approaches an operating potential VDD, this may no longer function without a charge pump. However, a charge pump is not required within the various aspects of this disclosure, since the complete switch circuit also has a second switch path 408 complementary to the first switch path 406 (e.g., a PMOS branch (as will be explained in more detail below)), which takes over this task at a high input voltage Vin; similar to a conventional T-gate (see Fig. 1). Furthermore, a second pair of transistors (switches) is provided in the first switching path 406, which is driven by Vout+Von, as described above. In the forward mode ("on" state), this could be overkill, since at the end, when Vout=Vin, all gate voltages are equal and all drain / source voltages are also equal.

[0029] Fig. Figure 3B shows a conceptual representation of the NMOS branch 406 of the switch circuit in the “off” state 310.

[0030] To switch off the transistors Mn1, Mn2, Mn3, Mn4 of the first switch path 406: - the first protection voltage VDD / 2 applied to the control terminal of the first transistor Mn1 is dimensioned to protect a gate insulation layer of the second transistor Mn2 of the first switch path 406 (in addition, the first protection voltage VDD / 2 may further be dimensioned to protect a gate insulation layer of the first transistor Mn1 of the first switch path 406 itself); - the second protection voltage VDD / 2 applied to the control terminal of the fourth transistor Mn4 is dimensioned to protect a gate insulation layer of the third transistor Mn3 of the first switch path 406 (in addition, the second protection voltage VDD / 2 may further be dimensioned to protect a gate insulation layer of the fourth transistor Mn4 of the first switch path 406 itself); - the first switching voltage GND applied to the control terminal of the second transistor Mn2 is dimensioned as a first reference potential (e.g. ground potential GND); and - the second switching voltage GND applied to the control terminal of the third transistor Mn3 is dimensioned as a second reference potential (e.g. ground potential GND).

[0031] The transistors Mn1, Mn2, Mn3, and Mn4 (switches) of the first switch path 406 are intended to be off in the "off" state under all input / output conditions. The gate terminal of the first transistor Mn1 of the first switch path 406 and the gate terminal of the fourth transistor Mn4 of the first switch path 406 are clearly at a safe voltage because, even if the input voltage Vin / output voltage Vout are slightly outside the supply rails, the gate oxide of the first transistor Mn1 of the first switch path 406 and the fourth transistor Mn4 of the first switch path 406 can still withstand the voltage difference to the first protection voltage (e.g., half the operating potential VDD = VDD / 2) or to the second protection voltage (e.g., half the operating potential VDD = VDD / 2). In an example case, the maximum allowable gate oxide voltage of the transistors Mn1, Mn2, Mn3, Mn4 of the first switch path 406 is 3.6 V.At the same time, the first transistor Mn1 of the first switch path 406 and the fourth transistor Mn4 of the first switch path 406 protect the "inner" circuit of the first switch path 406 (formed by the second transistor Mn2 of the first switch path 406 and the third transistor Mn3 of the first switch path 406) from high voltages, since only voltages below, for example, VDD / 2 can "propagate". To ensure that these intermediate voltages (first protection voltage and second protection voltage) do not exceed, for example, VDD / 2 (generally: voltages that could be dangerous for the second transistor Mn2 of the first switch path 406 and the third transistor Mn3 of the first switch path 406), some safety clamps (in other words, clamping circuits) can be connected to prevent these voltages from becoming too high. Depending on some details (e.g.parasitic capacitors), these clamping circuits may be useful, or they may be omitted. The gate terminal of the second transistor Mn2 of the first switch path 406 and the gate terminal of the third transistor Mn3 of the first switch path 406 can now be safely connected to a low reference potential (e.g., ground potential GND) to block the input voltage Vin, as also shown in . Fig. 2 is shown.

[0032] Fig. Figure 3C shows a conceptual representation of a PMOS branch 408 (also referred to as second switch path 408) of a switch circuit in the “on” state 320.

[0033] The second switch path 408 comprises a series circuit of four transistors Mp1, Mp2, Mp3, Mp4 (e.g., four PMOS transistors Mp1, Mp2, Mp3, Mp4). The four transistors Mp1, Mp2, Mp3, Mp4 of the second switch path 408 can be transistors of a second conductivity type (which is different from the first conductivity type), for example, of a p-conductivity type. The control terminal (e.g., the gate terminal) of a first transistor Mp1 of the second switch path 408 is controlled to turn on by a control circuit such that a third protection voltage Vin-Von is applied to the control terminal.The third protection voltage Vin-Von is dimensioned to protect a second transistor Mp2 of the second switch path 408, which is connected directly downstream of the first transistor Mp1 of the second switch path 408 in the series circuit (in addition, the third protection voltage Vin-Von can also be dimensioned to protect the first transistor Mp1 of the second switch path 408 itself). The control terminal (e.g., the gate terminal) of the second transistor Mp2 of the second switch path 408 is controlled by the control circuit such that a third switching voltage Vin-Von is applied to the control terminal. The value of the third switching voltage can, but does not have to, be equal to the value of the third protection voltage Vin-Von. The control terminal (e.g.,The gate terminal (e.g., the gate terminal) of a third transistor Mp3 of the second switch path 408, which is connected directly downstream of the second transistor Mp2 of the second switch path 408, is controlled by the control circuit such that a fourth switching voltage Vout-Von is applied to the control terminal. The value of the fourth switching voltage can, but does not have to, be equal to the value of a fourth protective voltage Vout-Von, which will be described below. The control terminal (e.g., the gate terminal) of a fourth transistor Mp4 of the second switch path 408 is controlled by a control circuit such that the fourth protective voltage Vout-Von is applied to the control terminal.The fourth protection voltage Vout-Von is dimensioned to protect the third transistor Mp3 of the second switch path 408, which is connected immediately upstream of the fourth transistor Mp4 of the second switch path 408 in the series circuit (in addition, the fourth protection voltage Vin-Von can also be dimensioned to protect the fourth transistor Mp4 of the second switch path 408 itself).

[0034] To switch on the transistors Mp1, Mp2, Mp3, Mp4 of the second switch path 408: - the third protection voltage Vin-Von applied to the control terminal of the first transistor Mp1 is an input voltage Vin of the switch circuit less a voltage Von, so that the first transistor Mp1 of the second switch path 408 is switched to conduction; - the fourth protection voltage Vout-Von applied to the control terminal of the fourth transistor Mp4 is an output voltage Vout of the switch circuit less a voltage Von, so that the fourth transistor Mp4 of the second switch path 408 is switched to conduction; - the third switching voltage Vin-Von applied to the control terminal of the second transistor Mp2 is the input voltage Vin of the switch circuit minus a voltage Von, so that the second transistor Mp2 of the second switch path 408 is switched to conduction; and - the fourth switching voltage Vout-Von applied to the control terminal of the third transistor Mp3 is the output voltage Vout of the switch circuit less a voltage Von, so that the third transistor Mp3 of the second switch path 408 is switched to conductive.

[0035] Illustratively, the first transistor Mp1 and the second transistor Mp2 of the second switch path 408 are driven by the input voltage Vin minus a certain "on" voltage (e.g., Von). For example, the first transistor Mp1 of the second switch path 408 and the second transistor Mp2 of the second switch path 408 can be 2.5 V EA transistors.

[0036] The value of the "on" voltage (e.g., Von) can be on the order of 2.5 V. The exact value is not important. However, it should be high enough to bring the respective transistor(s) into a conducting state with a sufficiently low on-resistance Ron. Furthermore, a second pair of transistors (switches) is provided in the second switching path 408, which is driven by Vout-Von, as described above.

[0037] Fig. Figure 3D shows a conceptual representation of the PMOS branch 408 of the switch circuit in the “off” state 330.

[0038] To switch off the transistors Mp1, Mp2, Mp3, Mp4 of the second switch path 408: - the third protection voltage VDD / 2 applied to the control terminal of the first transistor Mp1 is dimensioned to protect a gate insulation layer of the second transistor Mp2 of the second switch path 408 (in addition, the third protection voltage VDD / 2 may further be dimensioned to protect a gate insulation layer of the first transistor Mp1 of the second switch path 408 itself); - the fourth protection voltage VDD / 2 applied to the control terminal of the fourth transistor Mp4 is dimensioned to protect a gate insulation layer of the third transistor Mp3 of the second switch path 408 (in addition, the fourth protection voltage VDD / 2 may further be dimensioned to protect a gate insulation layer of the fourth transistor Mp4 of the second switch path 408 itself); - the third switching voltage VDD applied to the control terminal of the second transistor Mp2 is dimensioned as a third reference potential (e.g. operating potential VDD); and - the fourth switching voltage VDD applied to the control terminal of the third transistor Mp3 is dimensioned as a fourth reference potential (e.g. operating potential VDD).

[0039] The transistors Mp1, Mp2, Mp3, and Mp4 (switches) of the second switch path 408 should also be blocked in the "off" state under all input / output conditions. The gate terminal of the first transistor Mp1 of the second switch path 408 and the gate terminal of the fourth transistor Mp4 of the second switch path 408 are clearly at a safe voltage because, even if the input voltage Vin / output voltage Vout are slightly outside the supply rails, the gate oxide of the first transistor Mp1 of the second switch path 408 and the fourth transistor Mp4 of the second switch path 408 can still withstand the voltage difference to the third protection voltage (e.g., half the operating potential VDD = VDD / 2) and the fourth protection voltage (e.g., half the operating potential VDD = VDD / 2), respectively. In an example case, the maximum allowable gate oxide voltage of transistors Mp1, Mp2, Mp3, Mp4 of the second switch path 408 is 3.6 V.At the same time, the first transistor Mp1 of the second switch path 408 and the fourth transistor Mp4 of the second switch path 408 protect the "inner" circuit (formed by the second transistor Mp2 of the second switch path 408 and the third transistor Mp3 of the second switch path 408) from high voltages, since only voltages above, for example, VDD / 2 can "propagate." To ensure that these intermediate voltages (third protection voltage and fourth protection voltage) do not exceed, for example, VDD / 2 (generally: voltages that could be dangerous for the second transistor Mp2 of the second switch path 408 and the third transistor Mp3 of the second switch path 408), one can connect some safety clamps (in other words, clamping circuits) that prevent these voltages from becoming too high. Depending on some details (e.g., parasitic capacitors), these clamping circuits may be useful or they may be omitted.The gate terminal of the second transistor Mp2 of the second switch path 408 and the gate terminal of the third transistor Mp3 of the second switch path 408 can now be safely connected to a high reference potential (for example, the operating potential VDD) in order to block the input voltage Vin, as also shown in . Fig. 2 is shown.

[0040] Fig. 4 shows a switch circuit 400 according to various aspects of this disclosure.

[0041] The switch circuit 400 may have an input terminal 402 for receiving the input voltage Vin and an output terminal 412 for providing the output voltage Vout. Furthermore, the switch circuit 400 may have a switch control terminal 404 for receiving a switch control voltage Vswitch_on / off. If the switch control voltage Vswitch_on / off has a logical "on" signal, all eight transistors Mn1, Mn2, Mn3, Mn4, Mp1, Mp2, Mp3, Mp4 are to be turned on, and the input voltage Vin applied to the input terminal 402 is to be connected to the output terminal 412, so that the input voltage Vin is provided there. If the switch control voltage Vsch_on / off has a logical “off” signal, all eight transistors Mn1, Mn2, Mn3, Mn4, Mp1, Mp2, Mp3, Mp4 are to be switched off and the input voltage Vin applied to the input terminal 402 is disconnected from the output terminal 412.

[0042] Furthermore, the switch circuit 400 may comprise the first switch path 406 with the four transistors of the first conductivity type Mn1, Mn2, Mn3, Mn4, as shown in Fig. 3A and Fig. 3B. Furthermore, the switch circuit 400 may comprise the second switch path 408 with the four transistors of the second conductivity type Mp1, Mp2, Mp3, Mp4, as shown in Fig. 3C and Fig. 3D. The first switch path 406 and the second switch path 408 are connected in parallel to each other and both are coupled on the input side to the input terminal 402 and coupled on the output side to the output terminal 412. Finally, the switch circuit 400 can have a control circuit 410 which individually generates the control voltages for the individual transistors Mn1, Mn2, Mn3, Mn4 of the first switch path 406 and for the individual transistors Mp1, Mp2, Mp3, Mp4 of the second switch path 408 and provides them to the respective control terminals (e.g. gate terminals) of the transistors Mn1, Mn2, Mn3, Mn4, Mp1, Mp2, Mp3, Mp4 and thus switches the transistors Mn1, Mn2, Mn3, Mn4, Mp1, Mp2, Mp3, Mp4 respectively conductive (in other words conductive) or blocking.If all eight transistors Mn1, Mn2, Mn3, Mn4, Mp1, Mp2, Mp3, Mp4 of the switch circuit 400 are conductive (this is the case when the switch control voltage Vswitch_on / off signals a logical "on" state by means of a logical "on" signal), then the input voltage Vin is passed to the output terminal 412 and the output voltage Vout is then substantially equal to the input voltage Vin. However, if the eight transistors Mn1, Mn2, Mn3, Mn4, Mp1, Mp2, Mp3, Mp4 of the switch circuit 400 are blocked (this is the case when the switch control voltage Vswitch_on / off signals a logical "off" state by means of a logical "off" signal), then the input voltage Vin is not passed to the output terminal 412.

[0043] For a more detailed description of the interconnection of the individual components, the input terminal 402 is directly coupled to an input-side controlled terminal of the first transistor Mn1 of the first switch path 406 and directly to an input-side controlled terminal of the first transistor Mp1 of the second switch path 408. Furthermore, the output terminal 412 is directly coupled to an output-side controlled terminal of the fourth transistor Mn4 of the first switch path 406 and directly to an output-side controlled terminal of the fourth transistor Mp4 of the second switch path 408.

[0044] The control circuit 410 may have a plurality (for example, 16 sub-control circuits), which are explained in more detail below (see Fig. 5). Each of the partial control circuits generates at least one partial control voltage for individually controlling the control terminals of the transistors Mn1, Mn2, Mn3, Mn4, Mp1, Mp2, Mp3, Mp4 of the switch paths 406, 408.

[0045] A first sub-control circuit 502 of the control circuit 410 may be configured to generate the first protection voltage Vin+Von for switching on the first transistor Mn1 of the first switch path 406.

[0046] The first sub-control circuit 502 may, for example, have a series circuit, as in Fig. 6A. However, the first sub-control circuit 502 can in principle have any other structure, as long as it generates the first protective voltage Vin+Von for switching on the first transistor Mn1 of the first switch path 406 and supplies this voltage to the control terminal of the first transistor Mn1 of the first switch path 406. Thus, the first protective voltage Vin+Von for switching on the first transistor Mn1 of the first switch path 406 can also be generated by replacing a resistor R, described below, with one or two (or even three) diodes connected in series. Alternatively, a source follower transistor Pn4 of the second conductivity type, also described in more detail below, can be dimensioned so "weakly" that it alone builds up a corresponding voltage drop and no additional components are required.

[0047] First, it should be noted that 400 different logic signals can be provided to turn the switch circuit on and off. It should be noted that the stacking variant (but also an LDMOS variant, i.e., a switch circuit with LDMOS transistors (LDMOS: planar diffused metal oxide semiconductor)) provides, in addition to the low-side logic, dedicated high-side logic (signals labeled "hs" or "hsq") and level shifters between these areas.

[0048] Fig. 6A shows the first sub-control circuit 502, which generates the first protection voltage Vin+Von to turn on the first transistor Mn1 of the first switch path 406. The first sub-control circuit 502 may, for example, comprise a series connection of the following electronic components: - a current source, for example formed by a transistor of the second conductivity type (e.g. a PMOS transistor) Pn1; - a cascode transistor Pn3 of the second conductivity type (e.g. a PMOS transistor) coupled to the current source Pn1; - an electrical resistance R; - a source follower transistor Pn4 of the second conductivity type (e.g. a PMOS transistor) coupled to the electrical resistor R, the control terminal of which is coupled to the input voltage Vin of the switch circuit 400.

[0049] The first protection voltage Vin+Von is provided at a first connection node 602 between the cascode transistor Pn3 and the electrical resistor R. The connection node can be directly connected to the control terminal of the first transistor Mn1 of the first switch path 406.

[0050] In this example, the input terminal 402 is directly connected to a control terminal (e.g., gate terminal) of the source follower transistor Pn4. The PMOS transistor Pn1 acts as a current source (and forms a type of current mirror with a master diode (not shown). An optional high-side switching transistor Pn2 of the second conductivity type (e.g., a PMOS transistor) is "on" in the switched-on state and passes the current to the cascode transistor Pn3, which acts as a cascode device. The source follower transistor Pn4 acts as a source follower for the input voltage Vin and, together with the electrical (e.g., ohmic) resistor R, generates the voltage "Von." The drain terminal of the source follower transistor Pn4 is connected to a first (low) reference potential (e.g., ground potential GND) via an optional first switching transistor Nn1 of the first conductivity type (e.g., an NMOS transistor).The first switching transistor Nn1 can be directly connected to the switch control terminal 404 and is controlled by the switch control voltage Vsch_on / off (it is switched on when the switch control voltage Vsch_on / off is switched on by means of a logic “on” signal).

[0051] All cascode voltages (Vcasc_lo, Vcasc_mid, Vcasc_hi) could be tied to, say, half the operating potential VDD / 2, but it has been found that performance can be increased by shifting them slightly to higher or lower values. For example, a first cascode voltage Vcasc_mid is VDD / 2, a second cascode voltage Vcasc_hi is approximately half a diode drop to one diode drop higher than half the operating potential VDD / 2 (VDD / 2 + approximately half a diode drop to one diode drop) (this serves to avoid cross-currents as much as possible), and a third cascode voltage Vcasc_lo is approximately half a diode drop to one diode drop lower than half the operating potential VDD / 2 (VDD / 2 - approximately half a diode drop to one diode drop) (this also serves to avoid cross-currents as much as possible).

[0052] The first sub-control circuit 502 may also have additional optional components, which may be provided individually or in combination, even if in Fig. 7A shows an expanded first sub-control circuit 502A with several additional components.

[0053] Thus, the supplemented first sub-control circuit 502A may further comprise the first high-side switching transistor Pn2 of the second conductivity type, coupled between the current source Pn1 and the cascode transistor Pn3, which is switched to conduction by means of a high-side switching voltage Vsch_ein_hsq (logical "on" signal) to switch on the switching circuit 400. Within the scope of this disclosure, the nomenclature "_hsq" is to be understood to mean that such a signal is an "active low" signal of the high side. This means that it activates a transistor, or in other words, switches it on, with a low voltage (e.g., 0 V).

[0054] Furthermore, additionally or alternatively, the first switching transistor Nn1 connected downstream of the source follower transistor Pn4 in the series circuit can be provided, at whose control input the switch control voltage Vsch_on / off for switching on (logical “on” signal) of the switch circuit 400 is applied.

[0055] An additional first transistor of the first conductivity type (e.g., an NMOS transistor) Nn2 can be connected between the source follower transistor Pn4 and the first switching transistor Nn1. It has been shown that the additional first transistor Nn2 contributes to reducing the load caused by hot charge carriers in the source follower transistor Pn4. The additional first transistor Nn2 can be connected in a diode circuit.

[0056] The entire (supplemented) first sub-control circuit 502, 502A serves to either generate the first protection voltage Vin+Von or be in a high-impedance state (off state). All cascode voltages (casc_lo, casc_mid, casc_hi) could be tied to VDD / 2, but it has been found that performance can be increased by shifting them slightly to higher or lower values, as explained above.

[0057] A first input transistor Nn10 of the first conductivity type (e.g., an NMOS transistor), whose first controlled terminal can be directly coupled to the input terminal 402, whose second controlled terminal can be coupled to the control terminal of the source follower transistor Pn4, and to whose control terminal the first cascode voltage Vcasc_mid can be applied, serves as a control element for the input voltage Vin. A second input transistor Pn10 can serve as a further control element for the input voltage Vin, whose first controlled terminal can be (e.g., directly) coupled to a low reference potential (e.g., GND), whose second controlled terminal can be (e.g., directly) coupled to the second controlled terminal of the first input transistor Nn10 and the control terminal of the source follower transistor Pn4, and to whose control terminal the third cascode voltage Vcasc_lo can be applied. When the control voltage (e.g.,Since the gate voltage at the control terminal of the source follower transistor Pn4 can rise to very high values, the gate-drain voltage could become unacceptably high. Therefore, the gate voltage is limited to values ​​(less than) VDD / 2. Higher values ​​are not useful because the "to-gate" voltage (in other words, the voltage applied to the control terminal of the first transistor Mn1 of the first switch path 406) would be limited to VDD anyway. The second input transistor Pn10 acts as a kind of safety clamp, preventing the voltage at the control terminal of the source follower transistor Pn4 from becoming too high. During normal operation, it should never become conductive and can therefore be omitted.

[0058] A second sub-control circuit 504 of the control circuit 410 may be configured to generate the first protection voltage VDD / 2 for switching off the first transistor Mn1 of the first switch path 406.

[0059] The second sub-control circuit 504 may, for example, comprise a series circuit, as shown in Fig. 6B. However, the second sub-control circuit 504 can in principle have any other structure, as long as it generates the first protection voltage VDD / 2 for turning off the first transistor Mn1 of the first switch path 406 and supplies it to the control terminal of the first transistor Mn1 of the first switch path 406.

[0060] Fig. Figure 6B shows the second sub-control circuit 504, which generates the first protection voltage VDD / 2. The second sub-control circuit 504 may, for example, comprise a series connection of the following electronic components: - a first switching transistor Pn5 of the second conductivity type, to whose control input a high-side turn-off voltage Vsch_aus_hsq for turning off the switch circuit is applied; - a clamping circuit (for example, comprising a first clamping transistor Nn7 of the first conductivity type (e.g., an NMOS transistor) and a second clamping transistor Pn7 of the second conductivity type (e.g., a PMOS transistor) connected in series therewith) for providing a clamped voltage as the first protection voltage VDD / 2 at a second connection node 604, which may be at the same potential as the first connection node 602), wherein the second cascode voltage Vcasc_hi is applied to the control terminal of the first clamping transistor Nn7 and the third cascode voltage Vcasc_lo is applied to the control terminal of the second clamping transistor Pn7; and - a second switching transistor Nn5 of the first conductivity type (e.g. an NMOS transistor, at whose control input a switch-off voltage is applied as switch switching voltage Vsch_on / off (logical "off" signal) for switching off the switch circuit 400.

[0061] Thus, Fig. 6B illustrates the sub-control circuit that is active in the "off" state. In this case, the first sub-control circuit 502 (see Fig. 6A) passive (i.e. there is a high impedance at the “to-gate” node, also referred to as the first connection node 602).

[0062] In this mode, the first switching transistor Pn5 and the second switching transistor Nn5 are turned on, and the first clamping transistor Nn7 and the second clamping transistor Pn7 clamp the to-gate voltage. The second cascode voltage Vcasc_hi and the third cascode voltage Vcasc_lo are chosen so that no static current flows, but the to-gate voltage is still clamped to approximately VDD / 2. In principle, this would also work if the third cascode voltage Vcasc_lo and the second cascode voltage Vcasc_hi were connected to VDD / 2, but in this case, the clamping window would be somewhat larger.

[0063] The second sub-control circuit 504 may also have additional optional components, which may be provided individually or in combination, even if in Fig. 7B shows an expanded second sub-control circuit 504A with several additional components.

[0064] Thus, the supplemented second sub-control circuit 504A may further comprise an additional second transistor Pn6 of the second conductivity type (e.g., a PMOS transistor) and an additional third transistor Nn6 of the first conductivity type (e.g., an NMOS transistor). The additional second transistor Pn6 is connected between the first switching transistor Pn5 and the first clamping transistor Nn7, and a control terminal of the additional second transistor Pn6 is connected to the second cascode voltage Vcasc_hi. The additional second transistor Pn6 and the additional third transistor Nn6 are not absolutely necessary, but help reduce the load caused by hot charge carriers.

[0065] Overall, either the (e.g. supplemented) first partial control circuit 502, 502A is made of Fig. 6A, Fig. 7A active (on state) or the (e.g. supplemented) second sub-control circuit 504, 504A from Fig. 6B, Fig. 7B (off state).

[0066] A third sub-control circuit 506 of the control circuit 410 may be configured to generate the first switching voltage Vin+Von for switching on the second transistor Mn2 of the first switch path 406.

[0067] The third sub-control circuit 506 may, for example, comprise a series circuit, as shown in Fig. 8A. However, the third sub-control circuit 506 can in principle have any other structure, as long as it generates the first switching voltage Vin+Von for turning on the second transistor Mn2 of the first switch path 406 and supplies it (for example, at a third connection node 802) to the control terminal of the second transistor Mn2 of the first switch path 406.

[0068] Fig. Figure 8A shows the third sub-control circuit 506, which generates the first protection voltage Vin+Von. The third sub-control circuit 506 is clearly very similar to the first sub-control circuit 502, whereby the first switching transistor Nn1 is no longer required, since in the "OFF" state the "to-gate" voltage is to be "pulled" to a low reference potential (e.g., ground potential GND) anyway. Otherwise, the third sub-control circuit 506 can be identical to the first sub-control circuit 502, which is why, to avoid repetition, the description of the first sub-control circuit 502 with reference to Fig. 6A is referred to.

[0069] The third sub-control circuit 506 may also have additional optional components, which may be provided individually or in combination, even if in Fig. 9A, a supplemented third sub-control circuit 506A with several additional components is shown. The supplemented third sub-control circuit 506A differs from the supplemented first sub-control circuit 502A in the same way as the third sub-control circuit 506 differs from the first sub-control circuit 502, which is why, to avoid repetition, the description of the supplemented first sub-control circuit 502A with reference to Fig. 7A is referred to.

[0070] A fourth sub-control circuit 508 of the control circuit 410 may be configured to generate the first switching voltage GND for switching off the second transistor Mn2 of the first switch path 406.

[0071] The fourth sub-control circuit 508 may, for example, comprise a circuit as shown in Fig. 8B. However, the fourth sub-control circuit 508 can in principle have any other structure, as long as it generates the first switching voltage GND for switching off the second transistor Mn2 of the first switch path 406 and supplies it (for example, at a fourth connection node 804) to the control terminal of the second transistor Mn2 of the first switch path 406.

[0072] Fig. Figure 8B shows the fourth sub-control circuit 508, which generates the first protection voltage GND. The fourth sub-control circuit 508 is very similar to the second sub-control circuit 504, but the following transistors are no longer required, since the second switching transistor Nn5 and the additional optional third transistor Nn6 (in Fig. 8b not shown) are sufficient to pull the “to-gate” node to the low reference potential (e.g. ground potential GND): - the first switching transistor Pn5; - the additional second transistor Pn6; - the first clamping transistor Nn7; and - the second clamping transistor Pn7.

[0073] To avoid repetition, reference is made to the description of the second sub-control circuit 504 with reference to Fig. 6B.

[0074] The fourth sub-control circuit 508 may also have additional optional components, which may be provided individually or in combination, even if in Fig. 9B shows an expanded fourth sub-control circuit 508A with several additional components.

[0075] The fourth sub-control circuit 508 may also have additional optional components, which may be provided individually or in combination, even if in Fig. 9B, a supplemented fourth sub-control circuit 508A is shown with only one additional component. The supplemented fourth sub-control circuit 508A differs from the supplemented second sub-control circuit 504A in the same way as the fourth sub-control circuit 508 differs from the second sub-control circuit 504, which is why, to avoid repetition, the description of the supplemented second sub-control circuit 504A with reference to Fig. 7B is referred to.

[0076] Overall, either the (e.g. supplemented) third sub-control circuit 506, 506A is made of Fig. 8A, Fig. 9A active (on state) or the (e.g. supplemented) fourth sub-control circuit 508, 508A from Fig. 8B, Fig. 9B (off state).

[0077] A fifth sub-control circuit 510 of the control circuit 410 may be configured to generate the second switching voltage Vout+Von for switching on the third transistor Mn3 of the first switch path 406.

[0078] The fifth sub-control circuit 510 can, for example, be essentially identical to the third sub-control circuit 506, with the difference that the input voltage Vin is not applied to the control terminal (e.g., the gate terminal) of the source follower transistor Pn4, but rather the output voltage Vout. The fifth sub-control circuit 510 is also connected (e.g., directly) by its connection node to the control terminal of the third transistor Mn3 of the first switch path 406. However, the fifth sub-control circuit 510 can, in principle, have any other structure, as long as it generates the second switching voltage Vout+Von for switching on the third transistor Mn3 of the first switch path 406 and supplies it to the control terminal of the third transistor Mn3 of the first switch path 406.

[0079] The fifth sub-control circuit 510 can, in the same way as the third sub-control circuit 506, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented third sub-control circuit 506 with reference to Fig. 9A.

[0080] A sixth sub-control circuit 512 of the control circuit 410 may be configured to generate the second switching voltage GND for switching off the third transistor Mn3 of the first switch path 406.

[0081] The sixth sub-control circuit 512 may be substantially identical to the fourth sub-control circuit 508 (see Fig. 8B), with the difference that the sixth sub-control circuit 512 is connected (e.g., directly) by its fourth connection node 804 to the control terminal of the third transistor Mn3 of the first switch path 406. However, the sixth sub-control circuit 512 can, in principle, have any other configuration, as long as it generates the second switching voltage GND for switching off the third transistor Mn3 of the first switch path 406 and supplies it to the control terminal of the third transistor Mn3 of the first switch path 406.

[0082] The sixth sub-control circuit 512 can, in the same way as the fourth sub-control circuit 508, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented fourth sub-control circuit 508 with reference to Fig. 9B.

[0083] Overall, either the (e.g. supplemented) fifth sub-control circuit 510 is active (on state) or the (e.g. supplemented) sixth sub-control circuit 512 (off state).

[0084] A seventh sub-control circuit 514 of the control circuit 410 may be configured to generate the second protection voltage Vout+Von for switching on the fourth transistor Mn4 of the first switch path 406.

[0085] The seventh sub-control circuit 514 may, for example, be substantially identical to the first sub-control circuit 502 (see Fig. 6A), with the difference that the control terminal (e.g., the gate terminal) of the source follower transistor Pn4 is not supplied with the input voltage Vin, but with the output voltage Vout. The seventh sub-control circuit 514 is also connected (e.g., directly) via its connection node 602 to the control terminal of the fourth transistor Mn4 of the first switch path 406. However, the seventh sub-control circuit 514 can, in principle, have any other configuration, as long as it generates the second protection voltage Vout+Von for switching on the fourth transistor Mn4 of the first switch path 406 and supplies it to the control terminal of the fourth transistor Mn4 of the first switch path 406.

[0086] The seventh sub-control circuit 514 can, in the same way as the first sub-control circuit 502, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented first sub-control circuit 506 with reference to Fig. 7A.

[0087] An eighth sub-control circuit 516 of the control circuit 410 may be configured to generate the second protection voltage VDD / 2 for switching off the fourth transistor Mn4 of the first switch path 406.

[0088] The eighth sub-control circuit 516 may, for example, be substantially identical to the second sub-control circuit 504 (see Fig. 6B), with the difference that the eighth sub-control circuit 516 is connected (e.g., directly) by its second connection node 604 to the control terminal of the fourth transistor Mn4 of the first switch path 406. However, the eighth sub-control circuit 516 can, in principle, have any other configuration, as long as it generates the second protection voltage VDD / 2 for switching off the fourth transistor Mn4 of the first switch path 406 and supplies it to the control terminal of the fourth transistor Mn4 of the first switch path 406.

[0089] The eighth sub-control circuit 516 can, in the same way as the second sub-control circuit 504, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented second sub-control circuit 504 with reference to Fig. 7B.

[0090] Overall, either the (e.g. added) seventh sub-control circuit 514 is active (on state) or the (e.g. added) eighth sub-control circuit 516 (off state).

[0091] A ninth sub-control circuit 518 of the control circuit 410 may be configured to generate the third protection voltage Vout-Von for switching on the first transistor Mp1 of the second switch path 408.

[0092] Illustratively, the components and the provided voltages of the second switch path 408 are complementary to the components of the first switch path 406. In other words, transistors of the first conductivity type (e.g., n-conductivity type) in the first switch path 406 are replaced in the second switch path 408 by transistors of the second conductivity type (e.g., p-conductivity type). Furthermore, transistors of the second conductivity type (e.g., p-conductivity type) in the first switch path 406 are replaced in the second switch path 408 by transistors of the first conductivity type (e.g., n-conductivity type) in the second switch path 408. Furthermore, the high reference potential (e.g., operating potential VDD) is replaced by the low reference potential (e.g., ground potential GND). Furthermore, the low reference potential (e.g., ground potential GND) is replaced by the high reference potential (e.g., operating potential VDD).

[0093] Fig. Figure 10A shows the ninth sub-control circuit 518, which generates the third protection voltage Vin-Von. The ninth sub-control circuit 518 may, for example, comprise a series connection of the following electronic components: - a current source, for example formed by a transistor of the first conductivity type (e.g. an NMOS transistor) Np1; - a cascode transistor Np3 of the first conductivity type (e.g. an NMOS transistor) coupled to the current source Np1; - an electrical resistance R; - a source follower transistor Np4 of the first conductivity type (e.g. an NMOS transistor) coupled to the electrical resistor R, the control terminal of which is coupled to the input voltage Vin of the switch circuit 400.

[0094] The third protection voltage Vin-Von is provided at a fifth connection node 1002 between the cascode transistor Np3 and the electrical resistor R. The fifth connection node 1002 can be directly connected to the control terminal of the first transistor Mp1 of the second switch path 408.

[0095] In this example, the input terminal 402 is directly connected to a control terminal (e.g., gate terminal) of the source follower transistor Np4 of the second switch path 408. The NMOS transistor Np1 of the second switch path 408 acts as a current source (and forms a type of current mirror with a master diode (not shown). An optional low-side switching transistor Np2 of the first conductivity type (e.g., an NMOS transistor) of the second switch path 408 is "on" in the switched-on state and passes the current to the cascode transistor Np3 of the second switch path 408, which acts as a cascode device. The source follower transistor Np4 of the second switch path 408 acts as a source follower for the input voltage Vin and, together with the electrical (e.g., ohmic) resistor R, generates the voltage "Von."The drain terminal of the source follower transistor Np4 of the second switch path 408 is connected to a high reference potential (e.g., operating potential VDD) via the optional first switching transistor Pp1 (which is clearly a high-side switching transistor) of the second conductivity type (e.g., PMOS transistor) of the second switch path 408. The first switching transistor Pp1 of the second switch path 408 can be connected to the switch control terminal 404, for example, by means of an intermediate level shifter circuit (not shown), and is controlled by the switch control voltage Vsch_on / off (it is switched to conductive when the switch control voltage Vsch_on / off is logically "on"). The switch control voltage Vsch_on / off is logically "on" for the second switch path 408 when the switch control voltage Vsch_on / off is logically "off" for the first switch path 406, and vice versa. It is with reference to . Fig. 3A to Fig. 3D that the same circuit is referred to, but in different states (ON / OFF). The NMOS part (shown in Fig. 3A and Fig. 3B) and the PMOS part (shown in Fig. 3C and Fig. 3D) are always together either in the ON state or in the OFF state.

[0096] In the Fig. 6A to Fig. However, in Figure 13B, this is exactly the opposite. If the circuit in the respective Fig. xA (x = 6, 7, 8, 9, 10, 11, 12, or 13) is in the ON state, then the circuit in the corresponding Fig. xB is in the OFF state, and if the circuit in the respective Fig. xA is in the OFF state, then the circuit in the corresponding Fig. xB is in the ON state.

[0097] The ninth sub-control circuit 518 may also have additional optional components, which may be provided individually or in combination, even if in Fig. 11A shows an expanded first sub-control circuit 518A with several additional components.

[0098] Thus, the supplemented ninth sub-control circuit 518A may further comprise the first low-side switching transistor Np2 of the first conductivity type of the second switch path 408, which is coupled between the current source Np1 of the second switch path 408 and the cascode transistor Np3 of the second switch path 408 and is switched to conductive by means of a switching voltage Vsch_ein to switch on the switch circuit 400.

[0099] Furthermore, additionally or alternatively, the first switching transistor Pp1 of the second switch path 408 can be provided, which is connected downstream of the source follower transistor Np4 of the second switch path 408 in the series circuit, and at whose control input the switch control voltage Vsch_ein_hsq for switching on (logically “ON”) the switch circuit 400 is applied.

[0100] An additional first transistor of the second conductivity type (e.g., a PMOS transistor) Pp2 of the second switch path 408 can be connected between the source follower transistor Np4 of the second switch path 408 and the first switching transistor Pp1 of the second switch path 408. It has been shown that the additional first transistor Pp2 of the second switch path 408 contributes to reducing the load caused by hot charge carriers in the source follower transistor Np4 of the second switch path 408. The additional first transistor Pp2 of the second switch path 408 can be connected in a diode circuit.

[0101] The entire (supplemented) ninth sub-control circuit 518, 518A serves to either generate the third protection voltage Vin-Von or be in a high-impedance state (off state). All cascode voltages (casc_lo, casc_mid, casc_hi) could be tied to, for example, half of the operating potential VDD / 2, but it has been found that performance can be increased by shifting them slightly to higher or lower values, as explained above.

[0102] A first input transistor Pp10 of the second conductivity type (e.g., a PMOS transistor) of the second switch path 408, whose first controlled terminal can be directly coupled to the input terminal 402, whose second controlled terminal can be coupled to the control terminal of the source follower transistor Np4 of the second switch path 408, and to whose control terminal the first cascode voltage Vcasc_mid can be applied, serves as a control element for the input voltage Vin. A second input transistor Np10 of the second switch path 408 can serve as a further control element for the input voltage Vin, whose first controlled terminal can be (e.g., directly) coupled to a high reference potential (e.g., operating potential VDD), whose second controlled terminal (e.g.,directly) to the second controlled terminal of the first input transistor Pp10 of the second switch path 408 and the control terminal of the source follower transistor Np4 of the second switch path 408, and to whose control terminal the second cascode voltage Vcasc_hi can be applied. If the control voltage (e.g. gate voltage) at the control terminal of the source follower transistor Np4 of the second switch path 408 can drop to very low values, the gate-drain voltage could become unacceptably low. In this context, it should be noted that the gate-drain voltage can assume a negative value (drain can be at VDD); this value must not become too negative. Therefore, the gate voltage is limited to values ​​(greater than), for example, half of the operating potential VDD / 2. Lower values ​​are not useful because the "to-gate" voltage is already limited by, for example, the ground potential GND.The second input transistor Np10 of the second switch path 408 acts as a kind of safety clamp, preventing the voltage at the control terminal of the source follower transistor Np4 of the second switch path 408 from becoming too low. During normal operation, it should never become conductive and can therefore be omitted.

[0103] A tenth sub-control circuit 520 of the control circuit 410 may be configured to generate the third protection voltage VDD / 2 for switching off the first transistor Mp1 of the second switch path 408.

[0104] The tenth sub-control circuit 520 may, for example, comprise a series circuit, as shown in Fig. 10B. However, the tenth partial control circuit 520 may in principle have any other structure, as long as it generates the third protection voltage VDD / 2 for turning off the first transistor Mp1 of the second switch path 408 and supplies it to the control terminal of the first transistor Mp1 of the second switch path 408.

[0105] Fig. 10B shows the tenth sub-control circuit 520, which generates the third protection voltage VDD / 2 at a sixth connection node 1004 (the potential at the fifth connection node 1002 may be equal to the potential at the sixth connection node 1004). The tenth sub-control circuit 520 may, for example, comprise a series connection of the following electronic components: - a first switching transistor Np5 of the first conductivity type of the second switch path 408, to whose control input a switch-off voltage Vsch_aus is applied for switching off the switch circuit 400; - a clamping circuit (for example, comprising a first clamping transistor Pp7 of the second conductivity type (e.g., a PMOS transistor) of the second switch path 408 and a second clamping transistor Np7 of the first conductivity type (e.g., an NMOS transistor) of the second switch path 408 connected in series thereto) for providing a clamped voltage as the third protection voltage VDD / 2, wherein the third cascode voltage Vcasc_lo is applied to the control terminal of the first clamping transistor Pp7 of the second switch path 408 and the second cascode voltage Vcasc_hi is applied to the control terminal of the second clamping transistor Np7 of the second switch path 408; and - a second switching transistor Pp5 of the second conductivity type (e.g. a PMOS transistor) of the second switch path 408, to whose control input a switch-off voltage Vsch_aus_hsq (logic "on") for switching off the switch circuit 400 is applied.

[0106] Thus, Fig. 10B clearly shows the tenth sub-control circuit 520, which is active in the "off" state. In this case, the ninth sub-control circuit 518 (see Fig. 10A) passive (i.e. there is a high impedance at the “to-gate” node, also referred to as the fifth connection node 1002).

[0107] In this mode, the first switching transistor Np5 of the second switching path 408 and the second switching transistor Pp5 of the second switching path 408 are turned on, and the first clamping transistor Pp7 of the second switching path 408 and the second clamping transistor Np7 of the second switching path 408 form a clamp for the "to-gate" voltage. The second cascode voltage Vcasc_hi and the third cascode voltage Vcasc_lo are chosen so that "no" static current flows, but the "to-gate" voltage is still clamped to approximately one voltage (for example, half the operating potential VDD / 2). In principle, this would also work if the third cascode voltage Vcasc_lo and the second cascode voltage Vcasc_hi were connected to half the operating potential VDD / 2, but in this case the clamping window would be somewhat larger.

[0108] The tenth sub-control circuit 520 may have additional optional components, which may be provided individually or in combination, even if in Fig. 11B shows an added tenth sub-control circuit 520A with several additional components.

[0109] Thus, the supplemented tenth sub-control circuit 520A may further comprise an additional second transistor Np6 of the first conductivity type (e.g., an NMOS transistor) of the second switch path 408 and an additional third transistor Pp6 of the second conductivity type (e.g., a PMOS transistor) of the second switch path 408. The additional second transistor Np6 of the second switch path 408 is connected between the first switching transistor Np5 of the second switch path 408 and the first clamping transistor Pp7 of the second switch path 408, and a control terminal of the additional second transistor Np6 of the second switch path 408 is connected to the second cascode voltage Vcasc_hi. The additional second transistor Np6 of the second switch path 408 and the additional third transistor Pp6 of the second switch path 408 are not absolutely necessary, but help reduce the load caused by hot charge carriers.

[0110] Overall, either the (e.g. supplemented) ninth sub-control circuit 518, 518A is made of Fig. 10A, Fig. 11A active (on state) or the (e.g. supplemented) tenth sub-control circuit 520, 520A from Fig. 10B, Fig. 11B (off state).

[0111] An eleventh sub-control circuit 522 of the control circuit 410 may be configured to generate the third switching voltage Vin-Von for switching on the second transistor Mp2 of the second switch path 408.

[0112] The eleventh sub-control circuit 522 may, for example, have a series circuit, as in Fig. 12A. However, the eleventh partial control circuit 522 can in principle have any other structure, as long as it generates the third switching voltage Vin-Von for turning on the second transistor Mp2 of the second switch path 408 and supplies it to the control terminal of the second transistor Mp2 of the second switch path 408 at a seventh connection node 1006.

[0113] Fig. 12A shows the eleventh sub-control circuit 522, which generates the third switching voltage Vin-Von. The eleventh sub-control circuit 522 is clearly very similar to the ninth sub-control circuit 518, whereby the first switching transistor Pp1 of the second switch path 408 is no longer required, since in the "OFF" state the "to-gate" voltage is to be "pulled" to a high reference potential (e.g., operating potential VDD) anyway. Otherwise, the eleventh sub-control circuit 522 can be identical to the ninth sub-control circuit 518, which is why, to avoid repetition, the description of the ninth sub-control circuit 518 with reference to Fig. 10A is referred to.

[0114] The eleventh sub-control circuit 522 may also have additional optional components, which may be provided individually or in combination, even if in Fig. 13A, an expanded eleventh sub-control circuit 522A is shown with several additional components. The expanded eleventh sub-control circuit 522A differs from the expanded ninth sub-control circuit 518A in the same way as the eleventh sub-control circuit 522 differs from the ninth sub-control circuit 518, which is why, to avoid repetition, the description of the expanded ninth sub-control circuit 518A with reference to Fig. 11A is referred to.

[0115] A twelfth sub-control circuit 524 of the control circuit 410 may be configured to generate the third switching voltage VDD for switching off the second transistor Mp2 of the second switch path 408.

[0116] The twelfth sub-control circuit 524 may, for example, comprise a transistor as shown in Fig. 12B. However, the twelfth partial control circuit 524 can in principle have any other structure, as long as it generates the third switching voltage VDD for turning off the second transistor Mp2 of the second switch path 408 and supplies it to the control terminal of the second transistor Mp2 of the second switch path 408 at an eighth connection node 1008.

[0117] Fig. Figure 12B shows the twelfth sub-control circuit 524, which generates the third switching voltage VDD. Visually, the twelfth sub-control circuit 524 is very similar to the tenth sub-control circuit 520, except that the following transistors are no longer required, since the second switching transistor Pp5 of the second switching path 408 and the additional third transistor Pp6 of the second switching path 408 are sufficient to pull the "to-gate" node (in other words, the eighth connection node 1008) to the high reference potential (e.g., operating potential VDD): - the first switching transistor Np5 of the second switch path 408; - the additional second transistor Np6 of the second switch path 408; - the first clamping transistor Pp7 of the second switch path 408; and - the second clamping transistor Np7 of the second switch path 408.

[0118] To avoid repetition, reference is made to the description of the tenth sub-control circuit 520 with reference to Fig. 10B.

[0119] The twelfth sub-control circuit 524 may have additional optional components, which may be provided individually or in combination, even if in Fig. 13B shows an added twelfth sub-control circuit 524A with several additional components.

[0120] The twelfth sub-control circuit 524 may have additional optional components, which may be provided individually or in combination, even if in Fig. 13B, an expanded twelfth sub-control circuit 524A is shown with several additional components. The expanded twelfth sub-control circuit 524A differs from the expanded tenth sub-control circuit 520A in the same way as the twelfth sub-control circuit 524 differs from the tenth sub-control circuit 520, which is why, to avoid repetition, the description of the expanded tenth sub-control circuit 520A with reference to Fig. 11B is referred to.

[0121] Overall, either the (e.g. supplemented) eleventh sub-control circuit 522, 522A is made of Fig. 12A, Fig. 13A active (on state) or the (e.g. supplemented) twelfth sub-control circuit 524, 524A from Fig. 12B, Fig. 13B (off state).

[0122] A thirteenth sub-control circuit 526 of the control circuit 410 may be configured to generate the fourth switching voltage Vout-Von for switching on the third transistor Mp3 of the second switch path 408.

[0123] The thirteenth sub-control circuit 526 can, for example, be essentially identical to the eleventh sub-control circuit 522, with the difference that the input voltage Vin is not applied to the control terminal (e.g., the gate terminal) of the source follower transistor Np4 of the second switch path 408, but rather the output voltage Vout. The thirteenth sub-control circuit 526 is also connected (e.g., directly) by its seventh connection node 1006 to the control terminal of the third transistor Mp3 of the second switch path 408. However, the thirteenth sub-control circuit 526 can, in principle, have any other structure, as long as it generates the fourth switching voltage Vout-Von for turning on the third transistor Mp3 of the second switch path 408 and supplies it to the control terminal of the third transistor Mp3 of the second switch path 408.

[0124] The thirteenth sub-control circuit 526 can, in the same way as the eleventh sub-control circuit 522, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented eleventh sub-control circuit 522A with reference to Fig. 13A.

[0125] A fourteenth sub-control circuit 528 of the control circuit 410 may be configured to generate the fourth switching voltage VDD for switching off the third transistor Mp3 of the second switch path 408.

[0126] For example, the fourteenth sub-control circuit 528 may be substantially identical to the twelfth sub-control circuit 524 (see Fig. 12B), with the difference that the fourteenth sub-control circuit 528 is connected (e.g., directly) by its eighth connection node 1008 to the control terminal of the third transistor Mp3 of the second switch path 408. However, the fourteenth sub-control circuit 528 can, in principle, have any other configuration, as long as it generates the fourth switching voltage VDD for turning off the third transistor Mp3 of the second switch path 408 and supplies it to the control terminal of the third transistor Mp3 of the second switch path 408.

[0127] The fourteenth sub-control circuit 528 can, in the same way as the twelfth sub-control circuit 524, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented twelfth sub-control circuit 524A with reference to Fig. 13B.

[0128] Overall, either the (e.g., added) thirteenth sub-control circuit 526 is active (on state) or the (e.g., added) fourteenth sub-control circuit 528 (off state).

[0129] A fifteenth sub-control circuit 530 of the control circuit 410 may be configured to generate the fourth protection voltage Vout-Von for switching on the fourth transistor Mp4 of the second switch path 408.

[0130] For example, the fifteenth sub-control circuit 530 may be substantially identical to the ninth sub-control circuit 518 (see Fig. 10A), with the difference that the control terminal (e.g., the gate terminal) of the source follower transistor Np4 of the second switch path 408 is not supplied with the input voltage Vin, but with the output voltage Vout. The fifteenth sub-control circuit 530 is also connected (e.g., directly) by its fifth connection node 1002 to the control terminal of the fourth transistor Mp4 of the second switch path 408. However, the fifteenth sub-control circuit 530 can, in principle, have any other structure, as long as it generates the fourth protection voltage Vout-Von for switching on the fourth transistor Mp4 of the second switch path 408 and supplies it to the control terminal of the fourth transistor Mp4 of the second switch path 408.

[0131] The fifteenth sub-control circuit 530 can, in the same way as the ninth sub-control circuit 518, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented ninth sub-control circuit 518A with reference to Fig. 11A.

[0132] A sixteenth sub-control circuit 532 of the control circuit 410 may be configured to generate the fourth protection voltage VDD / 2 for switching off the fourth transistor Mp4 of the second switch path 408.

[0133] The sixteenth sub-control circuit 532 may, for example, be substantially identical to the tenth sub-control circuit 520 (see Fig. 10B), with the difference that the sixteenth sub-control circuit 532 is connected (e.g., directly) by its sixth connection node 1004 to the control terminal of the fourth transistor Mp4 of the second switch path 408. However, the sixteenth sub-control circuit 532 can, in principle, have any other configuration, as long as it generates the fourth protection voltage VDD / 2 for turning off the fourth transistor Mp4 of the second switch path 408 and supplies it to the control terminal of the fourth transistor Mp4 of the second switch path 408.

[0134] The sixteenth sub-control circuit 532 can, in the same way as the tenth sub-control circuit 520, also have additional optional components, which can be provided individually or in combination. For this purpose, reference is made to the above description of the supplemented tenth sub-control circuit 520A with reference to Fig. 11B.

[0135] Overall, either the (e.g., added) fifteenth sub-control circuit 530 is active (on state) or the (e.g., added) sixteenth sub-control circuit 532 (off state).

[0136] Fig. 14 shows a switch circuit 1400 according to various aspects of this disclosure with additional optional shunt circuits 1402, 1404. It should be noted that in various embodiments, only one of the two shunt circuits 1402, 1404, i.e. either a first shunt circuit 1402 or a second shunt circuit 1404, may be provided.

[0137] These shunt circuits 1402, 1402 should not generate excessively high voltages. The generation of the required auxiliary voltages will be discussed in more detail below.

[0138] The first shunt circuit 1402 is coupled between the second transistor Mn2 of the first switch path 406 and the third transistor Mn3 of the first switch path 406. The first shunt circuit 1402 is configured such that the third transistor Mn3 of the first switch path 406 is safely turned off when the switch circuit 400 is turned off.

[0139] The first shunt circuit 1402 includes some cascode transistors to limit the voltages.

[0140] An exemplary implementation of the first diverter circuit 1402 is shown in Fig. 15. The first diverter circuit 1402 may comprise the following electronic components in a series circuit, starting from a node 1502 between the second transistor Mn2 of the first switch path 406 and the third transistor Mn3 of the first switch path 406 to a high reference potential (e.g., operating potential VDD): - a first bypass transistor Nn21 of the first conductivity type (e.g. NMOS transistor), whose first controlled terminal is connected to the node 1502 and to whose control terminal the first cascode voltage Vcasc_mid is applied; - a second bypass transistor Nn20 of the first conductivity type (e.g. NMOS transistor) connected in a diode circuit, the first controlled terminal of which is connected to the second controlled terminal of the first bypass transistor Nn21; - a third bypass transistor Pn21 of the second conductivity type (e.g. PMOS transistor), whose first controlled terminal is connected to the second controlled terminal and the control terminal of the second bypass transistor Nn20 and to whose control terminal the third cascode voltage Vcasc_lo is applied; and - a fourth bypass transistor Pn20 of the second conductivity type (e.g. PMOS transistor), whose first controlled terminal is connected to the second controlled terminal of the third bypass transistor Pn20, whose second controlled terminal is coupled to the high reference potential (e.g. operating potential VDD), and to whose control terminal a high-side turn-off voltage Vsch_aus_hsq is applied.

[0141] Illustratively, the fourth bypass transistor Pn20 serves to switch the structure on and off, the first bypass transistor Nn21 limits the voltage at the sensitive midpoint between the second transistor Mn2 of the first switch path 406 and the third transistor Mn3 of the first switch path 406. The second bypass transistor Nn20 helps to reduce the load caused by hot charge carriers.

[0142] The second shunt circuit 1404 is coupled between the second transistor Mp2 of the second switch path 408 and the third transistor Mp3 of the second switch path 408. The second shunt circuit 1404 is configured such that the third transistor Mp3 of the second switch path 408 is safely turned off when the switch circuit 400 is turned off.

[0143] The second shunt circuit 1404 also includes some cascode transistors to limit the voltages.

[0144] An exemplary implementation of the second diverter circuit 1404 is shown in Fig. 16. The second diverter circuit 1404 may comprise the following electronic components in a series circuit, starting from a node 1602 between the second transistor Mp2 of the second switch path 408 and the third transistor Mp3 of the second switch path 408 to a low reference potential (e.g., ground potential GND): - a fifth bypass transistor Pp21 of the second conductivity type (e.g. PMOS transistor), whose first controlled terminal is connected to the node 1602 and to whose control terminal the first cascode voltage Vcasc_mid is applied; - a sixth bypass transistor Pp20 of the second conductivity type (e.g. PMOS transistor) connected in a diode circuit, the first controlled terminal of which is connected to the second controlled terminal of the fifth bypass transistor Pp21; - a seventh bypass transistor Np21 of the first conductivity type (e.g. NMOS transistor), whose first controlled terminal is connected to the second controlled terminal and the control terminal of the sixth bypass transistor Pp20 and to whose control terminal the second cascode voltage Vcasc_hi is applied; and - an eighth bypass transistor Np20 of the first conductivity type (e.g. NMOS transistor), whose first controlled terminal is connected to the second controlled terminal of the seventh bypass transistor Np20, whose second controlled terminal is coupled to the low reference potential (e.g. ground potential GND), and to whose control terminal a turn-off voltage Vsch_aus is applied.

[0145] The functions of the individual transistors of the second diverter circuit 1404 are the same as the functions of the transistors of the first diverter circuit 1402.

[0146] Fig. 17 shows a switch circuit 1700 according to various aspects of this disclosure, in which one or more clamp circuits 1702, 1704, 1706, 1708 may be provided. Only one of the clamp circuits 1702, 1704, 1706, 1708 may be provided, or two of the clamp circuits 1702, 1704, 1706, 1708 may be provided in any combination, or even three of the clamp circuits 1702, 1704, 1706, 1708 may be provided in any combination. Furthermore, one or both of the drain circuits 1402, 1404 may be omitted.

[0147] Each of the clamping circuits 1702, 1704, 1706, 1708 limits the voltage at the respective intermediate nodes to sufficiently low values.

[0148] As already mentioned, not all of these clamp circuits 1702, 1704, 1706, and 1708 are absolutely necessary. Depending on the operating conditions and noise in the layout, more or fewer clamp circuits 1702, 1704, 1706, and 1708 may be useful.

[0149] A first clamp circuit 1702 is coupled between the first transistor Mn1 of the first switch path 406 and the second transistor Mn2 of the first switch path 406. The first clamp circuit 1702 is configured to clamp a voltage at a first clamp node 1710 between the first transistor Mn1 of the first switch path 406 and the second transistor Mn2 of the first switch path 406 to a predefined first value. A second clamp circuit 1704 is coupled between the third transistor Mn3 of the first switch path 406 and the fourth transistor Mn4 of the first switch path 406. The second clamp circuit 1704 is configured to clamp a voltage at a second clamp node 1712 between the third transistor Mn3 of the first switch path 406 and the fourth transistor Mn4 of the first switch path 406 to a predefined second value.

[0150] A third clamp circuit 1706 is coupled between the first transistor Mp1 of the second switch path 408 and the second transistor Mp2 of the second switch path 408. The third clamp circuit 1706 is configured to clamp a voltage at a third clamp node 1714 between the first transistor Mp1 of the second switch path 408 and the second transistor Mp2 of the second switch path 408 to a predefined third value. A fourth clamp circuit 1708 is coupled between the third transistor Mp3 of the second switch path 408 and the fourth transistor Mp4 of the second switch path 408. The fourth clamp circuit 1708 is configured to clamp a voltage at a fourth clamp node 1716 between the third transistor Mp3 of the second switch path 408 and the fourth transistor Mp4 of the second switch path 408 to a predefined fourth value.

[0151] An exemplary implementation of the first clamp circuit 1702 is shown in Fig. 18. The second clamping circuit 1704 may have an identical structure to the first clamping circuit 1702, which is why a redundant description of an implementation of the second clamping circuit 1704 is omitted.

[0152] The first clamping circuit 1702 may comprise, in a series circuit, starting from the first clamping node 1710 between the first transistor Mn1 of the first switch path 406 and the second transistor Mn2 of the first switch path 406 to a low reference potential (e.g., ground potential GND), the following electronic components: - a first clamping transistor Pn30 of the second conductivity type (e.g. PMOS transistor), whose first controlled terminal is connected to the first clamping node 1710 and to whose control terminal the third cascode voltage Vcasc_lo is applied; - a second clamping transistor Nn31 of the first conductivity type (e.g. NMOS transistor), whose first controlled terminal is connected to the second controlled terminal of the first clamping transistor Pn30 and to whose control terminal the third cascode voltage Vcasc_lo is applied; and - a third clamping transistor Nn32 of the first conductivity type (e.g. NMOS transistor), whose first controlled terminal is connected to the second controlled terminal of the second clamping transistor Nn31, whose second controlled terminal is connected to a low reference potential (e.g. ground potential GND), and to whose control terminal a switch-off voltage Vsch_aus is applied.

[0153] An exemplary implementation of the third clamp circuit 1706 is shown in Fig. 19. The fourth clamping circuit 1708 may have an identical structure to the third clamping circuit 1706, which is why a redundant description of an implementation of the fourth clamping circuit 1708 is omitted.

[0154] The third clamping circuit 1706 may comprise, in a series circuit, starting from the third clamping node 1714 between the first transistor Mp1 of the second switch path 408 and the second transistor Mp2 of the second switch path 408 to a high reference potential (e.g., operating potential VDD), the following electronic components: - a fourth clamping transistor Np30 of the first conductivity type (e.g. NMOS transistor), whose first controlled terminal is connected to the third clamping node 1714 and to whose control terminal the second cascode voltage Vcasc_hi is applied; - a fifth clamping transistor Pp31 of the second conductivity type (e.g. PMOS transistor), whose first controlled terminal is connected to the second controlled terminal of the fourth clamping transistor Np30 and to whose control terminal the second cascode voltage Vcasc_hi is applied; and - a sixth clamping transistor Pp32 of the second conductivity type (e.g., a PMOS transistor), whose first controlled terminal is connected to the second controlled terminal of the fifth clamping transistor Pp31, whose second controlled terminal is connected to a high reference potential (e.g., operating potential VDD), and to whose control terminal a high-side turn-off voltage Vsch_aus_hsq is applied. The high-side turn-off voltage Vsch_aus_hsq can be clearly a high-side signal.

[0155] The switch circuits described above can be used in all circuits in which T-gates can be used, for example in an analog-to-digital converter, in a filter circuit or in an analog multiplexer.

[0156] Fig. 20 shows an analog multiplexer 2000 according to various aspects of this disclosure.

[0157] The exemplary multiplexer 2000 has four switch circuits 2002, 2004, 2006, 2008, wherein each of these switch circuits 2002, 2004, 2006, 2008 can be configured like the switch circuits 400, 500, 1400, 1700 described above. By selecting a single channel into the conducting mode, the selected voltage can be passed to the output.

[0158] Thus, a first input voltage Vin1 applied to a first input terminal 2010 of the first switch circuit 2002 can be forwarded to an output terminal 2026 or isolated therefrom depending on a first switch signal Vin / off1 applied to a first switch terminal 2012 of the first switch circuit 2002.

[0159] Furthermore, a second input voltage Vin2 applied to a second input terminal 2014 of the second switch circuit 2004 can be forwarded to the output terminal 2026 or isolated therefrom depending on a second switch signal Vin / off2 applied to a second switch terminal 2016 of the second switch circuit 2004.

[0160] A third input voltage Vin3 applied to a third input terminal 2018 of the third switch circuit 2006 can also be forwarded to the output terminal 2026 or isolated therefrom depending on a third switch signal Vin / off3 applied to a third switch terminal 2020 of the third switch circuit 2006.

[0161] Finally, a fourth input voltage Vin4 applied to a fourth input terminal 2022 of the fourth switch circuit 2008 can be forwarded to the output terminal 2026 or isolated therefrom depending on a fourth switch signal Vin / off4 applied to a fourth switch terminal 2024 of the fourth switch circuit 2008.

[0162] Various aspects of the revelation are explained below: The invention is a switching circuit. The switching circuit comprises a first switching path with at least four series-connected transistors of an n-conductivity type; a second switching path connected in parallel to the first switching path with at least four series-connected transistors of a p-conductivity type.The switch circuit further comprises a control circuit configured to provide the following voltages to control terminals of the transistors of the first switch path: a first protection voltage to a first transistor on the input side, the first protection voltage being dimensioned to protect a second transistor connected directly downstream of the first transistor; a second protection voltage to a fourth transistor on the output side, the second protection voltage being dimensioned to protect a third transistor connected directly upstream of the fourth transistor; a first switching voltage to the second transistor; a second switching voltage to the third transistor. The control circuit is further configured to: to provide the following voltages to control terminals of the transistors of the second switch path: a third protection voltage to an input-side first transistor, wherein the third protection voltage is dimensioned to protect a second transistor immediately downstream of the first transistor; a fourth protection voltage to a fourth transistor on the output side, wherein the fourth protection voltage is dimensioned to protect a third transistor immediately upstream of the fourth transistor; a third switching voltage to the second transistor; and a fourth switching voltage to the third transistor. The control circuit is further configured to switch on the switch circuit by providing the first protection voltage as an input voltage of the switch circuit plus a voltage such that the first transistor of the first switch path is switched to conductive; providing the second protection voltage as an output voltage of the switch circuit plus a voltage such that the fourth transistor of the first switch path is switched to conductive; providing the first switching voltage as the input voltage of the switch circuit plus a voltage such that the second transistor of the first switch path is switched to conductive; providing the second switching voltage as the output voltage of the switch circuit plus a voltage such that the third transistor of the first switch path is switched to conductive;providing the third protection voltage as an input voltage of the switch circuit minus a voltage such that the first transistor of the second switch path is switched to conduction; providing the fourth protection voltage as an output voltage of the switch circuit minus a voltage such that the fourth transistor of the second switch path is switched to conduction; providing the third switching voltage as the input voltage of the switch circuit minus a voltage such that the second transistor of the second switch path is switched to conduction; and providing the fourth switching voltage as the output voltage of the switch circuit minus a voltage such that the third transistor of the second switch path is switched to conduction.

[0163] In Example 2, the subject matter of Example 1 can optionally include that the third switching voltage is logically inverse to the first switching voltage; and that the fourth switching voltage is logically inverse to the second switching voltage.

[0164] In Example 3, the subject matter of any of Examples 1 to 3 can optionally include that the control circuit is configured, for switching off the switch circuit, to dimension the first protection voltage to protect a gate insulation layer of the second transistor of the first switch path; to dimension the second protection voltage to protect a gate insulation layer of the third transistor of the first switch path; to dimension the first switching voltage as a first reference potential; to dimension the second switching voltage as a second reference potential; to dimension the third protection voltage to protect a gate insulation layer of the second transistor of the second switch path; to dimension the fourth protection voltage to protect a gate insulation layer of the third transistor of the second switch path; to dimension the third switching voltage as a third reference potential;and to dimension the fourth switching voltage as a fourth reference potential.;

[0165] In Example 4, the subject matter of any of Examples 1 to 3 can optionally include that the switch circuit further comprises: a first shunt circuit coupled between the second transistor of the first switch path and the third transistor of the first switch path, the first shunt circuit configured such that the third transistor of the first switch path is turned off when the switch circuit is turned off; and / or a second shunt circuit coupled between the second transistor of the second switch path and the third transistor of the second switch path, the second shunt circuit configured such that the third transistor of the second switch path is turned off when the switch circuit is turned off.

[0166] In Example 5, the subject matter of any of Examples 1 to 4 can optionally include that the switch circuit further comprises: a first clamp circuit coupled between the first transistor of the first switch path and the second transistor of the first switch path, the first clamp circuit configured to clamp a voltage at a node between the first transistor of the first switch path and the second transistor of the first switch path to a predefined first value; and / or a second clamp circuit coupled between the third transistor of the first switch path and the fourth transistor of the first switch path, the second clamp circuit configured to clamp a voltage at a node between the third transistor of the first switch path and the fourth transistor of the first switch path to a predefined second value.

[0167] In Example 6, the subject matter of any of Examples 1 to 5 can optionally include that the switch circuit further comprises: a third clamp circuit coupled between the first transistor of the second switch path and the second transistor of the second switch path, the third clamp circuit configured to clamp a voltage at a node between the first transistor of the second switch path and the second transistor of the second switch path to a predefined third value; and / or a fourth clamp circuit coupled between the third transistor of the second switch path and the fourth transistor of the second switch path, the fourth clamp circuit configured to clamp a voltage at a node between the third transistor of the second switch path and the fourth transistor of the second switch path to a predefined fourth value.

[0168] In Example 7, the subject matter of any of Examples 1 to 6 can optionally include that the switch circuit further comprises: an input terminal for receiving the input voltage, wherein the input terminal is directly coupled to an input-side controlled terminal of the first transistor of the first switch path and directly to an input-side controlled terminal of the first transistor of the second switch path; an output terminal for providing an output voltage, wherein the output terminal is directly coupled to an output-side controlled terminal of the fourth transistor of the first switch path and directly to an output-side controlled terminal of the fourth transistor of the second switch path.

[0169] In Example 8, the subject matter of any of Examples 1 to 7 can optionally comprise that the control circuit comprises a first sub-control circuit configured to generate the first protection voltage for switching on the first transistor of the first switch path, wherein the first sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the p-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the p-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the first protection voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0170] In Example 9, the subject matter of Example 8 can optionally include that the first sub-control circuit further comprises a first high-side switching transistor of p-conductivity type coupled between the current source and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0171] In Example 10, the subject matter of any of Examples 8 or 9 can optionally include that the first sub-control circuit further comprises a first switching transistor connected downstream of the source follower transistor, at the control input of which a turn-on voltage for turning on the switching circuit is applied.

[0172] In Example 11, the subject matter of any of Examples 1 to 10 can optionally include that the control circuit comprises a second sub-control circuit configured to generate the first protection voltage for switching off the first transistor of the first switch path, wherein the second sub-control circuit comprises a series circuit of the following components: a first switching transistor of the p-conductivity type, to whose control input a high-side switch-off voltage for switching off the switch circuit is applied; a clamping circuit for providing a clamped voltage as the first protection voltage; and a second switching transistor of the n-conductivity type, to whose control input a switch-off voltage for switching off the switch circuit is applied.

[0173] In Example 12, the subject matter of any of Examples 1 to 11 can optionally comprise that the control circuit comprises a third sub-control circuit configured to generate the first switching voltage for switching on the second transistor of the first switch path, wherein the third sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the p-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the p-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the first switching voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0174] In Example 13, the subject matter of Example 12 can optionally include that the third sub-control circuit further comprises a first high-side switching transistor of the p-conductivity type coupled between the current source and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0175] In Example 14, the subject matter of any of Examples 1 to 13 can optionally comprise that the control circuit comprises a fourth sub-control circuit configured to generate the first switching voltage for switching off the second transistor of the first switch path, wherein the fourth sub-control circuit comprises a second switching transistor of the n-conductivity type, to whose control input a switch-off voltage for switching off the switch circuit is applied.

[0176] In Example 15, the subject matter of any of Examples 1 to 14 can optionally comprise that the control circuit comprises a fifth sub-control circuit configured to generate the second switching voltage for switching on the third transistor of the first switch path, wherein the fifth sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the p-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the p-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the second switching voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0177] In Example 16, the subject matter of Example 15 can optionally include that the fifth sub-control circuit further comprises a first high-side switching transistor of p-conductivity type coupled between the current source and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0178] In Example 17, the subject matter of any of Examples 1 to 16 may optionally include that the control circuit comprises a sixth sub-control circuit configured to generate the second switching voltage for switching off the third transistor of the first switch path, wherein the sixth sub-control circuit comprises a second switching transistor of the n-conductivity type, to whose control input a switch-off voltage for switching off the switch circuit is applied.

[0179] In Example 18, the subject matter of any of Examples 1 to 17 can optionally comprise that the control circuit comprises a seventh sub-control circuit configured to generate the second protection voltage for switching on the fourth transistor of the first switch path, wherein the seventh sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the p-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the p-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the second protection voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0180] In Example 19, the subject matter of Example 18 can optionally include that the seventh sub-control circuit further comprises a first high-side switching transistor of p-conductivity type coupled between the current source and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0181] In Example 20, the subject matter of any of Examples 18 or 19 can optionally include that the seventh sub-control circuit further comprises a first switching transistor connected downstream of the source follower transistor, at the control input of which a turn-on voltage for turning on the switching circuit is applied.

[0182] In Example 21, the subject matter of any of Examples 1 to 20 can optionally include that the control circuit comprises an eighth sub-control circuit configured to generate the second protection voltage for turning off the fourth transistor of the first switch path, wherein the eighth sub-control circuit comprises a series circuit of the following components: a first switching transistor of the p-conductivity type, to whose control input a high-side turn-off voltage for turning off the switch circuit is applied; a clamping circuit for providing a clamped voltage as the second protection voltage; and a second switching transistor of the n-conductivity type, to whose control input a turn-off voltage for turning off the switch circuit is applied.

[0183] In Example 22, the subject matter of any of Examples 1 to 21 can optionally comprise that the control circuit comprises a ninth sub-control circuit configured to generate the third protection voltage for switching on the first transistor of the second switch path, wherein the ninth sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the n-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the n-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the third protection voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0184] In Example 23, the subject matter of Example 22 can optionally include that the ninth sub-control circuit further comprises a first high-side switching transistor of n-conductivity type coupled between the current source and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0185] In Example 24, the subject matter of any of Examples 22 or 23 can optionally include that the ninth sub-control circuit further comprises a first switching transistor connected downstream of the source follower transistor, to whose control input a turn-on voltage for turning on the switching circuit is applied.

[0186] In Example 25, the subject matter of any of Examples 1 to 24 can optionally include that the control circuit comprises a tenth sub-control circuit configured to generate the third protection voltage for turning off the second transistor of the second switch path, wherein the tenth sub-control circuit comprises a series circuit of the following components: a first switching transistor of the n-conductivity type, to whose control input a high-side turn-off voltage for turning off the switch circuit is applied; a clamping circuit for providing a clamped voltage as the third protection voltage; and a second switching transistor of the p-conductivity type, to whose control input a turn-off voltage for turning off the switch circuit is applied.

[0187] In Example 26, the subject matter of any of Examples 1 to 25 can optionally include that the control circuit comprises an eleventh sub-control circuit configured to generate the third switching voltage for switching on the second transistor of the second switch path, wherein the eleventh sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the n-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the n-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the third switching voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0188] In Example 27, the subject matter of Example 26 can optionally include that the eleventh sub-control circuit further comprises a first high-side switching transistor of the n-conductivity type coupled between the current source (N1_6) and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0189] In Example 28, the subject matter of any of Examples 1 to 27 can optionally include that the control circuit comprises a twelfth sub-control circuit configured to generate the third switching voltage for switching off the second transistor of the second switch path, wherein the twelfth sub-control circuit comprises a second switching transistor of the p-conductivity type, to whose control input a switch-off voltage for switching off the switch circuit is applied.

[0190] In Example 29, the subject matter of any of Examples 1 to 28 can optionally include that the control circuit comprises a thirteenth sub-control circuit configured to generate the fourth switching voltage for switching on the third transistor of the second switch path, wherein the thirteenth sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the n-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the n-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the fourth switching voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0191] In Example 30, the subject matter of Example 29 can optionally include that the thirteenth sub-control circuit further comprises a first high-side switching transistor of n-conductivity type coupled between the current source and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0192] In Example 31, the subject matter of any of Examples 1 to 30 can optionally include that the control circuit comprises a fourteenth sub-control circuit configured to generate the fourth switching voltage for switching off the third transistor of the second switch path, wherein the fourteenth sub-control circuit comprises a second switching transistor of the p-conductivity type, to whose control input a switch-off voltage for switching off the switch circuit is applied.

[0193] In Example 32, the subject matter of any of Examples 1 to 31 can optionally include that the control circuit comprises a fifteenth sub-control circuit configured to generate the fourth protection voltage for switching on the fourth transistor of the second switch path, wherein the fifteenth sub-control circuit comprises a series circuit of the following components: a current source; a cascode transistor of the n-conductivity type coupled to the current source; an electrical resistor; a source follower transistor of the n-conductivity type coupled to the electrical resistor, the control terminal of which source follower transistor is coupled to an input voltage of the switch circuit; wherein the fourth protection voltage is provided at a connection node between the cascode transistor and the electrical resistor.

[0194] In Example 33, the subject matter of Example 32 can optionally include that the fifteenth sub-control circuit further comprises a first high-side switching transistor of n-conductivity type coupled between the current source and the cascode transistor, which is switched to be conductive for switching on the switching circuit.

[0195] In Example 34, the subject matter of any of Examples 32 or 33 can optionally include that the fifteenth sub-control circuit further comprises a first switching transistor connected downstream of the source follower transistor, to whose control input a turn-on voltage for turning on the switching circuit is applied.

[0196] In Example 35, the subject matter of any of Examples 1 to 34 can optionally include that the control circuit comprises a sixteenth sub-control circuit configured to generate the second protection voltage for turning off the fourth transistor of the second switch path, wherein the sixteenth sub-control circuit comprises a series circuit of the following components: a first switching transistor of the n-conductivity type, to whose control input a high-side turn-off voltage for turning off the switch circuit is applied; a clamping circuit for providing a clamped voltage as the fourth protection voltage; and a second switching transistor of the p-conductivity type, to whose control input a turn-off voltage for turning off the switch circuit is applied.

Claims

[1] Switch circuit, comprising: a first switch path comprising at least four series-connected transistors of an n-conductivity type; a second switch path connected in parallel to the first switch path with at least four transistors of a p-conductivity type connected in series, a control circuit configured to provide the following voltages to control terminals of the transistors of the first switch path: • a first protective voltage to an input-side first transistor (Mn1), wherein the first protective voltage is dimensioned to protect a second transistor (Mn2) connected immediately downstream of the first transistor (Mn1); • to provide a second protective voltage to a fourth transistor (Mn4) on the output side, wherein the second protective voltage is dimensioned to protect a third transistor (Mn3) connected directly upstream of the fourth transistor (Mn4); • a first switching voltage to the second transistor (Mn2); • a second switching voltage to the third transistor (Mn3); wherein the control circuit is further configured to provide the following voltages to the control terminals of the transistors of the second switch path: • a third protective voltage to an input-side first transistor (Mp1), wherein the third protective voltage is dimensioned to protect a second transistor (Mp2) connected immediately downstream of the first transistor (Mp1); • a fourth protective voltage to a fourth transistor (Mp4) on the output side, the fourth protective voltage being dimensioned to protect a third transistor (Mp3) immediately upstream of the fourth transistor (Mp4); • a third switching voltage to the second transistor (Mp2); and • a fourth switching voltage to the third transistor (Mp3) wherein the control circuit is arranged to switch on the switch circuit • to provide the first protection voltage (Vin+Von) as an input voltage (Vin) of the switch circuit plus a voltage (Von) such that the first transistor (Mn1) of the first switch path is switched to conductive; • to provide the second protection voltage (Vout+Von) as an output voltage (Vout) of the switch circuit plus a voltage (Von) such that the fourth transistor (Mn4) of the first switch path is switched to conductive; • to provide the first switching voltage (Vin+Von) as the input voltage (Vin) of the switch circuit plus a voltage (Von) such that the second transistor (Mn2) of the first switch path is switched to conductive; • to provide the second switching voltage (Vout+Von) as the output voltage (Vout) of the switch circuit plus a voltage (Von) such that the third transistor (Mn3) of the first switch path is switched to conduction; • to provide the third protection voltage (Vin-Von) as an input voltage (Vin) of the switch circuit minus a voltage (Von) such that the first transistor (Mp1) of the second switch path is switched to conductive; • to provide the fourth protection voltage (Vout-Von) as an output voltage (Vout) of the switch circuit minus a voltage (Von) such that the fourth transistor (Mp4) of the second switch path is switched to conduction; • to provide the third switching voltage (Vin-Von) as the input voltage (Vin) of the switch circuit minus a voltage (Von) such that the second transistor (Mp2) of the second switch path is switched to conduction; and • to provide the fourth switching voltage (Vout-Von) as the output voltage (Vout) of the switch circuit less a voltage (Von) such that the third transistor (Mp3) of the second switch path is switched to conduction. [2] Switch circuit according to claim 1 • wherein the third switching voltage is logically inverse to the first switching voltage; and • wherein the fourth switching voltage is logically inverse to the second switching voltage. [3] Switch circuit according to one of claims 1 to 2, wherein the control circuit is arranged to switch off the switch circuit • dimensioning the first protection voltage (VDD / 2) to protect a gate insulation layer of the second transistor (Mn2) of the first switch path; • dimensioning the second protection voltage (VDD / 2) to protect a gate insulation layer of the third transistor (Mn3) of the first switch path; • to dimension the first switching voltage (GND) as a first reference potential; • to dimension the second switching voltage (GND) as a second reference potential; • dimensioning the third protection voltage (VDD / 2) to protect a gate insulation layer of the second transistor (Mp2) of the second switch path; • dimensioning the fourth protection voltage (VDD / 2) to protect a gate insulation layer of the third transistor (Mp3) of the second switch path; • to dimension the third switching voltage (VDD) as a third reference potential; and • to dimension the fourth switching voltage (VDD) as a fourth reference potential. [4] Switch circuit according to one of claims 1 to 3, further comprising: • a first diverter circuit coupled between the second transistor (Mn2) of the first switch path and the third transistor (Mn3) of the first switch path, which is configured such that the third transistor (Mn3) of the first switch path is switched off when the switch circuit is switched off; and / or • a second shunt circuit coupled between the second transistor (Mp2) of the second switch path and the third transistor (Mp3) of the second switch path, which is arranged such that the third transistor (Mp3) of the second switch path is switched off when the switch circuit is switched off. [5] Switch circuit according to one of claims 1 to 4, further comprising: • a first clamping circuit coupled between the first transistor (Mn1) of the first switch path and the second transistor (Mn2) of the first switch path, which is configured to clamp a voltage at a node between the first transistor (Mn1) of the first switch path and the second transistor (Mn2) of the first switch path to a predefined first value; and / or • a second clamping circuit coupled between the third transistor (Mn3) of the first switch path and the fourth transistor (Mn4) of the first switch path, the second clamping circuit being configured to clamp a voltage at a node between the third transistor (Mn3) of the first switch path and the fourth transistor (Mn4) of the first switch path to a predefined second value. [6] Switch circuit according to one of claims 1 to 5, further comprising: • a third clamping circuit coupled between the first transistor (Mp1) of the second switch path and the second transistor (Mp2) of the second switch path, which is configured to clamp a voltage at a node between the first transistor (Mp1) of the second switch path and the second transistor (Mp2) of the second switch path to a predefined third value; and / or • a fourth clamping circuit coupled between the third transistor (Mp3) of the second switch path and the fourth transistor (Mp4) of the second switch path, the fourth clamping circuit being configured to clamp a voltage at a node between the third transistor (Mp3) of the second switch path and the fourth transistor (Mp4) of the second switch path to a predefined fourth value. [7] Switch circuit according to one of claims 1 to 6, further comprising: • an input terminal for receiving the input voltage (Vin), the input terminal being directly coupled to an input-side controlled terminal of the first transistor (Mn1) of the first switch path and directly to an input-side controlled terminal of the first transistor (Mp1) of the second switch path; • an output terminal for providing an output voltage (Vout), wherein the output terminal is directly coupled to an output-side controlled terminal of the fourth transistor (Mn4) of the first switch path and directly to an output-side controlled terminal of the fourth transistor (Mp4) of the second switch path. [8] Switch circuit according to one of claims 1 to 7, wherein the control circuit comprises a first sub-control circuit which is arranged to generate the first protection voltage (Vin+Von) for switching on the first transistor (Mn1) of the first switch path, wherein the first sub-control circuit comprises a series circuit of the following components: • a current source (P1_1); • a cascode transistor (P3_1) of p-conductivity type coupled to the current source (P1_1); • an electrical resistance (R_1); • a source follower transistor (P4_1) of the p-conductivity type coupled to the electrical resistor (R_1), the control terminal of which is coupled to an input voltage (Vin) of the switch circuit; • wherein the first protection voltage (Vin+Von) is provided at a connection node between the cascode transistor (P3_1) and the electrical resistor (R_1). [9] Switch circuit according to claim 8, wherein the first sub-control circuit further comprises a first high-side switching transistor (P2_1) of the p-conductivity type coupled between the current source (P1_1) and the cascode transistor (P3_1), which is switched to be conductive for switching on the switch circuit (Vsw_on_hsq_1). [10] Switch circuit according to claim 8 or 9, wherein the first sub-control circuit further comprises a first switching transistor (N1_1) connected downstream of the source follower transistor (P4_1), to whose control input a switch-on voltage (Vsw_on_1) for switching on the switch circuit is applied. [11] Switch circuit according to one of claims 1 to 10, wherein the control circuit comprises a second sub-control circuit which is arranged to generate the first protection voltage (VDD / 2) for switching off the first transistor (Mn1) of the first switch path, wherein the second sub-control circuit comprises a series circuit of the following components: • a first switching transistor (P5_1) of the p-conductivity type, to whose control input a high-side turn-off voltage (Vsw_off_hsq_1) for turning off the switch circuit is applied; • a clamp circuit (N7_1; P7_1) for providing a clamped voltage as the first protection voltage (VDD / 2); and • a second switching transistor (N5_1) of the n-conductivity type, to whose control input a switch-off voltage (Vsw_off_1) is applied for switching off the switch circuit. [12] Switch circuit according to one of claims 1 to 11, wherein the control circuit comprises a third sub-control circuit which is arranged to generate the first switching voltage (Vin+Von) for switching on the second transistor (Mn2) of the first switch path, wherein the third sub-control circuit comprises a series circuit of the following components: • a power source (P1 2); • a cascode transistor (P3_2) of p-conductivity type coupled to the current source (P1_2); • an electrical resistance (R_2); • a source follower transistor (P4_2) of the p-conductivity type coupled to the electrical resistor (R_2), the control terminal of which is coupled to an input voltage (Vin) of the switch circuit; • wherein the first switching voltage (Vin+Vout) is provided at a connection node between the cascode transistor (P3_2) and the electrical resistor (R_2). [13] Switch circuit according to claim 12, wherein the third sub-control circuit further comprises a first high-side switching transistor (P2_2) of the p-conductivity type coupled between the current source (P1_2) and the cascode transistor (P3_2), which is switched to be conductive (Vsw_on_hsq_2) for switching on the switch circuit. [14] Switch circuit according to one of claims 1 to 13, wherein the control circuit comprises a fourth sub-control circuit which is configured to generate the first switching voltage (GND) for switching off the second transistor (Mn2) of the first switch path, wherein the fourth sub-control circuit comprises a second switching transistor (N5_2) of the n-conductivity type, at the control input of which a switch-off voltage (Vsw_off_2) for switching off the switch circuit is applied. [15] Switch circuit according to one of claims 1 to 14, wherein the control circuit comprises a fifth sub-control circuit which is arranged to generate the second switching voltage (Vout+Vin) for switching on the third transistor (Mn3) of the first switch path, wherein the fifth sub-control circuit comprises a series circuit of the following components: • a current source (P1_3); • a cascode transistor (P3_3) of p-conductivity type coupled to the current source (P1_3); • an electrical resistance (R_3); • a source follower transistor (P4_3) of the p-conductivity type coupled to the electrical resistor (R_3), the control terminal of which is coupled to an input voltage (Vin) of the switch circuit; • wherein the second switching voltage (Vout+Von) is provided at a connection node between the cascode transistor (P3_3) and the electrical resistor (R_3). [16] Switch circuit according to claim 15, wherein the fifth sub-control circuit further comprises a first high-side switching transistor (P2_3) of the p-conductivity type coupled between the current source (P1_3) and the cascode transistor (P3_3), which is switched to be conductive (Vsw_on_hsq_3) for switching on the switch circuit. [17] Switch circuit according to one of claims 1 to 16, wherein the control circuit comprises a sixth sub-control circuit which is configured to generate the second switching voltage (GND) for switching off the third transistor (Mn3) of the first switch path, wherein the sixth sub-control circuit comprises a second switching transistor (N5_3) of the n-conductivity type, at the control input of which a switch-off voltage (Vsw_off_3) for switching off the switch circuit is applied. [18] Switch circuit according to one of claims 1 to 17, wherein the control circuit comprises a seventh sub-control circuit which is arranged to generate the second protection voltage (Vout+Von) for switching on the fourth transistor (Mn4) of the first switch path, wherein the seventh sub-control circuit comprises a series circuit of the following components: • a power source (P1 4); • a cascode transistor (P3_4) of p-conductivity type coupled to the current source (P1_4); • an electrical resistance (R_4); • a source follower transistor (P4_4) of the p-conductivity type coupled to the electrical resistor (R_4), the control terminal of which is coupled to an input voltage (Vin) of the switch circuit; • wherein the second protection voltage (Vout+Von) is provided at a connection node between the cascode transistor (P3_4) and the electrical resistor (R_4). [19] Switch circuit according to claim 18, wherein the seventh sub-control circuit further comprises a first high-side switching transistor (P2_4) of the p-conductivity type coupled between the current source (P1_4) and the cascode transistor (P3_4), which is switched to be conductive (Vsw_on_hsq_4) for switching on the switch circuit. [20] Switch circuit according to claim 18 or 19, wherein the seventh sub-control circuit further comprises a first switching transistor (N1_4) connected downstream of the source follower transistor (P4_4), to whose control input a switch-on voltage (Vsw_on_4) for switching on the switch circuit is applied. [21] Switch circuit according to one of claims 1 to 20, wherein the control circuit comprises an eighth sub-control circuit which is arranged to generate the second protection voltage for switching off the fourth transistor (Mn4) of the first switch path, wherein the eighth sub-control circuit comprises a series circuit of the following components: • a first switching transistor (P5_4) of the p-conductivity type, to whose control input a high-side turn-off voltage (Vsw_off_hsq_4) for turning off the switch circuit is applied; • a clamping circuit (N7_4; P7_4) for providing a clamped voltage as the second protection voltage (Vout+Von); and • a second switching transistor (N5_4) of the n-conductivity type, at whose control input a switch-off voltage (Vsw_off_4) for switching off the switch circuit is applied.

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