Radar sensor assembly, method, computer program product

Abstract

Radar sensor assembly (10) for detecting an environment, comprising: - an input interface (110) designed to receive an input signal (1), - a digital-to-analog sequencer (120) designed to sequence the input signal (1) into a digital transmit signal (2), - a digital-to-analog converter (210) designed to convert the digital transmit signal (2) into an analog transmit signal (3), - a radar frontend (300) designed to transmit a radar signal (4) into the environment in accordance with the analog transmit signal (3) and to receive an analog radar echo signal (5), - an analog-to-digital converter (240) designed to convert the analog radar echo signal (5) into a digital radar echo signal (6), - an analog-to-digital sequencer (140) designed to sequence the digital radar echo signal (6) into a digital output signal (7), and - an output interface (150) designed to transmit the digital output signal (7), wherein at least the input interface (110), the digital-to-analog sequencer (120), the analog-to-digital sequencer (140) and the output interface (150) are provided by a single Field Programmable Gate Array (100), characterized by that the digital-to-analog converter (210) is further configured to send synthetic radar echo signals (8) to the analog-to-digital converter (240), particularly in an analog simulation mode (II).

Description

[0001] The invention relates to a radar sensor assembly, a method for operating a sensor assembly, a computer program product and a computer-readable storage medium.

[0002] Radar technology plays an indispensable role in the precise acquisition and interpretation of environmental data. Particularly when combined with driver assistance systems, radar sensors enable reliable 360-degree monitoring of the vehicle's surroundings, thus significantly improving road safety. The same applies to the use of radar sensors in traffic safety technology, where they are employed in stationary and mobile traffic safety systems.

[0003] This results in diverse requirements for the development, production, and field deployment of radar sensors. These requirements necessitate the design of complex signal path architectures.

[0004] DE 10 2015 224 782 A1 describes a method for operating a radar device for a motor vehicle.

[0005] US 2019 / 0049495A1 describes a procedure and techniques for controlling quantum systems and related systems and methods.

[0006] DE 10 2021 110 820 B3 describes a radar sensor device, a radar system with a corresponding radar sensor device, a motor vehicle, and a method each for operating and manufacturing a radar sensor device.

[0007] DE 11 2015 007 190 T5 describes a device for dynamic signal generation and analysis.

[0008] DE 20 2017 007 519 U1 describes a level radar with a short measurement time.

[0009] It is therefore an object of the present invention to cover as many of the requirements as possible. In particular, it is an object of the invention to provide a radar sensor assembly, a method for operating a radar sensor assembly, a computer-implemented method, and a computer-readable storage medium which enables, in particular in an efficient manner, the manufacture and reliable operation of a radar sensor assembly.

[0010] The foregoing problem is solved by a radar sensor assembly, a method, a computer program product, and a computer-readable storage medium. Further features and details of the invention will become apparent from the dependent claims, the description, and the drawings. Features and details described in connection with the radar sensor assembly according to the invention naturally also apply in connection with the method according to the invention and / or in connection with the computer program product according to the invention and / or in connection with the computer-readable storage medium according to the invention, and vice versa, so that the disclosure regarding the individual aspects of the invention always includes or allows for reciprocal reference.

[0011] According to the invention, a radar sensor assembly for detecting an environment is provided, comprising: - an input interface designed to receive an input signal, - a digital-to-analog sequencer designed to sequence the input signal into a digital output signal, - a digital-to-analog converter designed to convert the digital transmit signal into an analog transmit signal, - a radar front end designed to transmit a radar signal into the environment in accordance with the analog transmit signal and to receive an analog radar echo signal, - an analog-to-digital converter designed to convert the analog radar echo signal into a digital radar echo signal, - an analog-to-digital sequencer designed to sequence the digital radar echo signal into a digital output signal, and - an output interface designed to transmit the digital output signal, wherein at least the input interface, the digital-to-analog sequencer, the analog-to-digital sequencer and the output interface are provided by a single Field Programmable Gate Array.

[0012] In other words, a device for sensing information from an environment, in particular a vehicle, is provided, comprising at least one input for receiving input information, a DA sequencer for transferring the input information into a transmission information, a DA converter for converting the transmission information into analog information, a radar transceiver for transmitting radar radiation according to the analog information and receiving the echo caused by the radar radiation in the environment, an AD converter for converting the echo into digital radar echo information, an AD sequencer for transferring the digital radar echo information into digital output information, and an output for transmitting the digital output information, wherein at least the input, the DA sequencer, the AD sequencer, and the output are provided by a single Field Programmable Gate Array.

[0013] A radar sensor assembly can be understood as a group of elements intended to be assembled and form a functional unit. The components of the radar sensor assembly may be arranged in a housing. Alternatively or additionally, at least one component, in particular those components not located on the Field Programmable Gate Array (FPGA), may be arranged at a distance from it within the assembly. In particular, the radar front end can thus be flexibly positioned for environmental sensing, especially on a vehicle and / or in a mobile or stationary traffic safety system. The radar sensor assembly can be considered part of a radar sensor. The radar sensor may include further devices, in particular at least one processor, main memory, or network interface.The processor can be configured to evaluate the radar echo signal, particularly in its processed form as an output signal. Alternatively or additionally, the output signal can be evaluated, at least partially, in a Field Programmable Gate Array (FGA). The processor can also be configured to provide an input signal. The evaluation can include converting the radio echo signal into environmental information. The main memory of a radar sensor can be understood as a central memory area designed for temporary data storage and connected to the processor, in particular via a high-speed data bus and / or a specific interface.

[0014] Environmental sensing can include object detection. Objects can be, in particular, vehicles, pedestrians, bicycles, and other obstacles in the environment, especially the environment of a vehicle and / or a mobile or stationary traffic safety system. Furthermore, environmental sensing can also include distance and / or angle measurement. In other words, measuring a distance and / or an angle to an object can be provided. Environmental sensing can also include measuring at least a speed. Furthermore, the sensing can be implemented as a 360° (all-around) scan of the environment. Environmental sensing can serve as input data for a vehicle assistance system and / or a mobile or stationary traffic safety system.

[0015] An input interface can be understood as a point that allows the receipt of external data, signals, or information. It may be intended that the input interface is implemented, at least partially, as software, particularly as a configuration, and especially running on the Field Programmable Gate Array.

[0016] The input interface can be configured to receive data from a processor. The processor can be part of a radar sensor, which includes the radar sensor assembly.

[0017] The digital-to-analog sequencer is designed to sequence the input signal into a digital transmit signal. In other words, it converts the input signal into a transmit signal specific to the radar frontend. The transmit signal can be adapted to the radar frontend. The digital-to-analog sequencer can be implemented, at least partially, as software, particularly as a configuration, and especially running on the Field Programmable Gate Array (FPGA). Multiple digital-to-analog sequencers can operate in parallel.

[0018] A digital-to-analog converter (DAC) can be understood as an electronic device or circuit that converts digital signals into analog signals. This conversion can involve transforming a digital value into a corresponding analog voltage or current. The digital-to-analog converter can be implemented as a circuit, particularly as an integrated circuit (IC). Multiple digital-to-analog converters, especially those connected in parallel, may be used to convert complex digital signals into corresponding analog signals.

[0019] The radar front end is designed to transmit a radar signal into the environment in accordance with the analog transmit signal and to receive an analog radar echo signal. For this purpose, at least one antenna may be provided on the radar front end to emit and / or absorb electromagnetic radiation. Furthermore, separate receiving and transmitting antennas may be provided.

[0020] An analog-to-digital converter (ADC) can be understood as an electronic device or circuit that converts analog signals into digital signals. This conversion can involve transforming an analog voltage into a corresponding digital value. The ADC can be implemented as a circuit, particularly as an integrated circuit (IC). Multiple ADCs, especially those connected in parallel, may be used to convert complex analog radar echo signals into corresponding digital radar echo signals.

[0021] The analog-to-digital sequencer is designed to sequence the digital radar echo signal into a digital output signal. In other words, the digital radar echo signal is converted into an output signal in which information about the environment contained in the echo signal, particularly temporal information, is processed. The digital-to-analog sequencer may be implemented at least partially as software, specifically as a configuration, and may run on a field-programmable gate array. Multiple analog-to-digital sequencers may operate in parallel.

[0022] The output interface can be understood as a point that enables the transmission of data, signals, or information, in particular the output signal. It may be provided that the output interface is implemented at least partially as software, in particular as a configuration, and especially running on the Field Programmable Gate Array. The output interface may be configured to send data to the processor of the radar sensor.

[0023] A Field Programmable Gate Array (FGA) can be understood as an integrated circuit (IC) designed to load a logic circuit as data and behave according to the logic of that circuit data. The FGA can be implemented as a single chip. Providing the input interface, digital-to-analog sequencer, analog-to-digital sequencer, output interface, and any other components can be understood as meaning that a configuration file for the FGA contains specifications for wiring the logic of the FGA in such a way that the switching logic of these components is implemented by the FGA.

[0024] Overall, the radar sensor assembly according to the invention offers the advantage of versatile application in development, production, and field applications, particularly its ability to support the development process, its quality-assured manufacturing, and its reliable operation. The described structure results in a three-stage signal path architecture. The Field Programmable Gate Array (FGPA) provides at least the input interface, the digital-to-analog sequencer, the analog-to-digital sequencer, and the output interface, and processes exclusively digital signals. The digital-to-analog converters and analog-to-digital converters form the interface to the analog radar front end. This results in three circuit sections: The first corresponds to the digital logic and is implemented in the Field Programmable Gate Array. The second section represents the analog and mixed-signal chain of the radar sensor assembly. The third section is the radar front end.The routing of analog and digital signals through the complexes is digitally configurable, particularly within the Field Programmable Gate Array (FGA). This three-stage design allows the radar sensor assembly to operate in a variety of operating and test modes, some of which are described below. This supports the development process, ensures quality during manufacturing, and guarantees reliable operation in the field at all times.

[0025] The invention may include a delay device configured to receive the digital transmission signal and forward it to the analog-to-digital sequencer and / or to initiate the conversion of the analog radar echo signal into the digital radar echo signal at the analog-to-digital converter by sending a start command. Furthermore, the delay device may wait for a predetermined delay period before forwarding the signal and / or during the start process. This delay period may be configured to establish temporal synchronization, particularly between the analog-to-digital converter and the analog-to-digital sequencer. This achieves the advantage that each sample of the analog or synthetic radar echo signal is precisely matched with the correct received sample of the digital radar echo signal. This simplifies its subsequent processing.

[0026] Furthermore, the delay device can be provided by the single Field Programmable Gate Array. This offers the advantage that, in particular, the connection to the analog-to-digital sequencer can be immediate and virtually delay-free, thus reliably avoiding unwanted delays. The delay element can be configured to receive signals from the digital-to-analog sequencer and forward them to the analog-to-digital sequencer and / or the start signal to the analog-to-digital converter, especially after a delay period. The delay device can also be configured so that the indices of a sequence of samples of the digital transmit signal coincide exactly with corresponding indices of the sequence of the analog and / or digital radar echo signal. In the processor's main memory, modulation values ​​and associated received samples for further processing are then stored at the same indices.

[0027] Within the scope of the invention, it is conceivable that a multiplexer is provided which is configured to forward the analog radar echo signal and its phase information or the analog transmit signal of the digital-to-analog converter. It can further be provided that these signals are forwarded to the analog-to-digital converter and / or to a preamplifier connected upstream of the analog-to-digital converter. The multiplexer can be configured to select either the analog radar echo signal or the analog transmit signal and pass it through to the output of the multiplexer. Several multiplexers can also be operated in parallel. The provision of a multiplexer offers the advantage that the entire signal processing becomes testable and potential errors can thus be detected. The multiplexer can be designed as a separate electrical circuit, in particular as an integrated circuit (IC), and / or separately from the field-programmable gate array (FGA).

[0028] Within the scope of the invention, it may be provided that at least the digital-to-analog converter or the analog-to-digital converter is implemented as independent electrical components or as part of a digital-to-analog module. In other words, it may be provided that the aforementioned components are not provided by the field-programmable gate array.

[0029] It is also conceivable that a preamplifier is provided, designed to amplify the analog radar echo signal and forward it to the analog-to-digital converter. The preamplifier can be designed to amplify the analog radar echo signal in such a way that, after amplification, it lies within the operating range of the analog-to-digital converter. This achieves the advantage that the signal quality of the digital radar echo signal provided by the analog-to-digital converter is particularly high and that the signal is neither clipped nor noisy.

[0030] It is also conceivable that the digital-to-analog converter is further configured, particularly in analog simulation mode, to send synthetic analog radar echo signals to the analog-to-digital converter. In other words, it may be possible to decouple the radar front-end from the signal path and simulate its operation. This creates the possibility of testing the functionality of the first two components separately from the radar front-end. Analog simulation mode can be used, for example, during manufacturing before connecting to the radar front-end. This allows defective assemblies to be identified and either repaired or replaced. However, analog simulation mode can also be used in the field and / or for fault analysis to narrow down the cause of a malfunction.This can be achieved by digitally calculating an environment, particularly a street scene, in a field-programmable gate array (FGA) and / or an external processor, and feeding it as an input signal at the input interface. Furthermore, the digital-to-analog converter (DAC) can output pre-calculated analog radar echo signals (i.e., synthetic received samples). These pre-calculated analog radar echo signals can then be fed to the DAC via the multiplexer and / or preamplifier. The delay element can be configured to determine the correct timing for the DAC to digitize the signal. The output signal from the output interface can then be read by a processor. This feeds the pre-calculated analog radar echo signals into the measurement algorithm.

[0031] Within the scope of the invention, it is optionally possible for the Field Programmable Gate Array to be configured, particularly in a digital simulation mode, to process the input signal exclusively within the Field Programmable Gate Array to produce a digital output signal. In other words, the Field Programmable Gate Array can enable a bypass mode in which the signals are only passed through and processed within the Field Programmable Gate Array, and the behavior of components separate from the Field Programmable Gate Array is simulated. It can be provided that, in particular by a processor and / or the Field Programmable Gate Array, an environment, especially a street scene, is digitally calculated and output exclusively via the components provided by the Field Programmable Gate Array.Consequently, all calculated samples are bypassed by the digital-to-analog converter and analog-to-digital converter and output back to the output interface in a purely digital and bit-accurate manner, and in particular, read back into the processor. This allows the synthetic received samples to be fed back into the measurement algorithm. This mode can be used particularly advantageously, for example, during algorithm development, in production, and also at a later stage to identify faulty Field Programmable Gate Arrays and either replace or repair them.

[0032] Furthermore, the invention may include a network interface configured to input a synthetic and / or recorded radar echo signal, particularly in playback mode. This signal can be transmitted analogously via the digital-to-analog converter to the analog-to-digital converter or processed digitally, particularly exclusively, within the field-programmable gate array to produce a digital output signal. In other words, the network interface can feed a recorded or synthetic environment, particularly a street scene, into the input interface of the FPGA via the main memory of the radar sensor and reproduce it analogously or digitally with correct timing through the signal paths of the measurement algorithm. It may also be provided that the output signal can be read out via the network interface in addition to the output interface.In this way, the functionality of other devices, especially those downstream of the radar front end, can be checked.

[0033] With regard to the present invention, it is conceivable that the Field Programmable Gate Array is further configured, particularly in a signal test mode, to input a test function into the digital-to-analog converter via the input interface, forward it to the analog-to-digital converter, and extract an output function via the output interface.

[0034] It may be possible to apply fast Fourier transforms (FFTs) and / or linear regressions to the measured values ​​at the output of the analog-to-digital converter (ADC). FFTs are used to determine noise levels in the analog circuitry and their signal. Noise ratios, electrostatic discharge (ESD) damage in semiconductors, non-linearities in operational amplifiers, defective resistors, capacitors, and signal path interruptions can thus be determined or detected. Linear regression allows for the comparison of different ADCs. The residuals from the linear regression enable the quantification of the comparison results. Defective and / or cracked capacitors in the signal paths can also be largely detected in this way, because in the event of a fault, glitches in their measured voltage values ​​typically occur due to capacitance jumps.In this case, the residuals of the linear regressions show values ​​that deviate from the norm.

[0035] The above problem is further solved by an inventive method for operating a radar sensor assembly for detecting an environment, in particular a radar sensor assembly according to the invention, wherein in a measurement operation - an input interface receives an input signal, - a digital-to-analog sequencer sequences the input signal into a digital output signal, - a digital-to-analog converter that converts the digital transmission signal into an analog transmission signal, - a radar front end emits a radar signal into the environment according to the analog transmit signal and receives an analog radar echo signal, - an analog-to-digital converter that converts the analog radar echo signal into a digital radar echo signal, - an analog-to-digital sequencer sequences the digital radar echo signal into a digital output signal, and - an output interface that sends out the digital output signal, wherein at least the input interface, the digital-to-analog sequencer, the analog-to-digital sequencer and the output interface are provided by a single Field Programmable Gate Array, and at least one further operating mode, in particular at least an analog simulation mode, a digital simulation mode, a playback mode or a signal test mode, is provided for testing at least one component of the radar sensor assembly.

[0036] The procedure can be implemented as a computer-based procedure.

[0037] The process steps can be carried out at least partially simultaneously and / or sequentially, whereby the order of the process steps is not limited by the specified sequence, so that individual steps can be carried out in different orders. Furthermore, individual or all steps can be repeated.

[0038] This results in the same advantages with regard to a method according to the invention as have already been described with regard to a radar sensor assembly according to the invention.

[0039] The essential feature of the invention is that, in analog simulation mode, the digital-to-analog converter sends synthetic analog radar echo signals to the analog-to-digital converter. Analog simulation mode can be used, for example, during manufacturing before connecting to the radar front end. This allows defective assemblies to be detected and either repaired or replaced. Analog simulation mode can also be used in the field and / or for fault analysis to narrow down the cause of a malfunction. For this purpose, it can be provided that an environment, in particular a street scene, is digitally calculated in the field programmable gate array and / or an external processor and fed into the input interface as an input signal. Furthermore, it can be provided that the digital-to-analog converter outputs pre-calculated analog radar echo signals (i.e., synthetic received samples).The pre-calculated analog radar echo signals can then be fed to the analog-to-digital converter via the multiplexer and / or the preamplifier. The delay element can be configured to dictate the correct timing for the analog-to-digital converter to digitize the signal. The output signal from the output interface can then be read by a processor. This allows the pre-calculated analog radar echo signals to be fed into the measurement algorithm.

[0040] It can be advantageous in a digital simulation mode for the input signal to be processed exclusively within the Field Programmable Gate Array (FGA) to produce a digital output signal. In other words, the FGA can enable a bypass mode in which the signals are only passed through and processed within the FGA, simulating the behavior of components separate from the FGA. In this scenario, it may be possible for a processor and / or the FGA to digitally calculate an environment, particularly a street scene, and output it exclusively via the components provided by the FGA.Consequently, all calculated samples are bypassed by the digital-to-analog converter and analog-to-digital converter and output back to the output interface with bit-perfect accuracy, and in particular, read back into the processor. This allows the synthetic received samples to be fed back into the measurement algorithm. This operating mode makes it particularly useful to verify the correct functionality of the Field Programmable Gate Array (FGA). This mode can be used to great advantage, for example, during the development of the measurement algorithm, in production, and even at a later stage, to identify faulty FGAs and either replace or repair them.

[0041] It is conceivable that in playback mode, a synthetic and / or recorded analog radar echo signal is fed in via a network interface, imprinted on the digital-to-analog converter, and forwarded to the analog-to-digital converter, or processed digitally, particularly exclusively, within the Field Programmable Gate Array (FPGA) to a digital output signal. In other words, the network interface can fill the radar sensor's main memory with a recorded or synthetic environment, especially a street scene. From there, it can be fed into the FPGA's input interface and reproduced analogously and / or digitally with accurate timing through the signal paths, output on the output interface, and finally fed to the measurement algorithm. It can also be provided that, in addition to the output interface, the output signal can be read out via the network interface through the radar sensor's main memory.In this way, the functionality of other devices, especially those downstream of the radar front end, can be checked.

[0042] Within the scope of the invention, it can be provided that, in a signal test mode, the field-programmable gate array injects an input signal, implemented as a test function, into the digital-to-analog converter via the input interface, forwards it to the analog-to-digital converter, and extracts it again via the output interface as an output signal implemented as a result function. It can be provided that fast Fourier transforms (FFTs) and / or linear regressions are applied to the measured value sequence at the output of the analog-to-digital converter. The FFTs serve to determine noise levels in the analog chains as well as their signal. Noise ratios, electrostatic discharge damage (ESD damage) in semiconductors and non-linearities in operational amplifiers, defective resistors, capacitors, and signal path interruptions can thus be detected. The linear regression makes it possible to compare digital-to-analog converters against each other.The residual values ​​of the linear regression allow for the quantification of the comparison result. Defective, cracked capacitors in the signal paths can also be largely detected in this way, because in the event of a fault, glitches typically appear in their measured voltage values ​​due to capacitance jumps. In such cases, the residuals of the linear regressions show values ​​that deviate from the norm.

[0043] The above problem is further solved by a computer program product according to the invention, comprising instructions which, when the program is executed by a computer, in particular by a radar sensor assembly according to the invention, cause it to execute a method according to the invention.

[0044] This results in the same advantages with regard to a computer program product according to the invention as have already been described with regard to a radar sensor assembly and / or a method according to the invention.

[0045] The above problem is further solved by a computer-readable storage medium comprising instructions which, when executed by a computer, in particular by a radar sensor assembly according to the invention, cause it to execute a method according to the invention.

[0046] This results in the same advantages with regard to a computer-readable storage medium according to the invention as have already been described with regard to a radar sensor assembly according to the invention and / or a method according to the invention and / or a computer program product according to the invention.

[0047] Further advantages, features, and details of the invention will become apparent from the following description, in which several exemplary embodiments of the invention are described in detail with reference to the drawings. The features mentioned in the claims and in the description can each be essential to the invention individually or in any combination. Fig. 1 a radar sensor assembly in a measurement operation, Fig. 2 a radar sensor assembly in an analog simulation mode, and Fig. 3 a radar sensor assembly in a digital simulation environment.

[0048] The Fig. Figure 1 shows a radar sensor assembly 10 for detecting an environment.According to the invention, the radar sensor assembly 10 comprises an input interface 110 configured for receiving an input signal 1, a digital-to-analog sequencer 120 configured for sequencing the input signal 1 into a digital transmit signal 2, a digital-to-analog converter 210 configured for converting the digital transmit signal 2 into an analog transmit signal 3, a radar front end 300 configured for transmitting a radar signal 4 into the environment corresponding to the analog transmit signal 3 and for receiving an analog radar echo signal 5, an analog-to-digital converter 240 configured for converting the analog radar echo signal 5 into a digital radar echo signal 6, an analog-to-digital sequencer 140 configured for sequencing the digital radar echo signal 6 into a digital output signal 7, and an output interface 150 configured for transmitting the digital output signal 7 to send out.In this process, at least the input interface 110, the digital-to-analog sequencer 120, the analog-to-digital sequencer 140 and the output interface 150 are provided by a single Field Programmable Gate Array 100.

[0049] Overall, the radar sensor assembly 10 according to the invention offers the advantage that it supports development processes, can be manufactured with quality assurance, and can be operated reliably. The described structure results in a three-stage signal path architecture. The FGPA provides at least the input interface 110, the digital-to-analog sequencer 120, the analog-to-digital sequencer 140, and the output interface 150, and processes exclusively digital signals. The digital-to-analog converters 210 and analog-to-digital converters 240 form the interface to the analog radar front end 300. This results in three circuit sections: The first corresponds to the digital logic and is implemented in the Field Programmable Gate Array 100. The second section represents the analog and mixed-signal chain of the radar sensor assembly 10. The third section is the radar front end 300.The routing of analog and digital signals through the complexes is digitally configurable, particularly in the Field Programmable Gate Array 100. This three-stage design allows the radar sensor assembly 10 to operate in a variety of operating and test modes, some of which are described below. This supports the development process, improves manufacturing quality, and ensures safe operation at all times.

[0050] The different additional operating modes II, III, IV, V are discussed in connection with the Fig. 2 to Fig. 3 explained. Based on the Fig. 1. Further details of the device are explained. These may also relate to the features described in the Fig. 2 to Fig. Refer to the 3 illustrated examples.

[0051] Within the scope of the invention, a delay device 130 may be provided, which is configured to receive the digital transmission signal 2 and forward it to the analog-to-digital sequencer 140 and / or to initiate the conversion of the analog radar echo signal 5 into the digital radar echo signal 6 at the analog-to-digital converter 240 by sending a start command. Furthermore, the delay device 130 may wait for a predetermined delay period, also called a delay, before forwarding the signal and / or during the start process. The delay period may be configured to establish temporal synchronization, in particular between the analog-to-digital converter 240 and the analog-to-digital sequencer 140. This achieves the advantage that each sample of the synthetic radar echo signal 8 or analog radar echo signal 5 is assigned precisely the correct received sample of the digital radar echo signal 6 from the analog-to-digital sequencer 140.This simplifies its further processing. In the . Fig. Figure 1 shows that the delay device 130 is arranged between the digital-to-analog sequencer 120 and the analog-to-digital sequencer 140 and connected to both. This arrangement can be a logical configuration within the FPGA programming that defines the signal flow. Furthermore, as also shown, the delay device 130 can be connected to the analog-to-digital converter 240. Both connections shown can be software-configured or hardware-based, in particular in the form of at least one conductor and / or cable.

[0052] Furthermore, it is conceivable that, as in Fig. Figure 1 shows a multiplexer 220 configured to forward the analog radar echo signal 5 and its phase information or the analog transmit signal 3 of the digital-to-analog converter 210. It can further be provided that these signals are forwarded to the analog-to-digital converter 240 and / or to a preamplifier 230 connected upstream of the analog-to-digital converter 240. The multiplexer 220 can be configured to select one signal from a number of signals, in particular parts of the analog radar echo signal 5 or analog transmit signal 3, and pass it through to the output of the multiplexer 220. The provision of a multiplexer 220 offers the advantage that the entire signal processing becomes testable and potential faults in the radar sensor assembly 10 can thus be detected. The multiplexer 220 can be configured as a separate electrical circuit, in particular as an integrated circuit (IC), and / or separately from the field-programmable gate array 100.Furthermore, it may be provided that at least the connection of the multiplexer 220 to the digital-to-analog converter 210, preamplifier 230 or analog-to-digital converter 240 is implemented as a hardware connection, in particular as a conductor track or cable.

[0053] In the Fig. 1. The representation in a separate line is intended to clarify that it is possible for at least the digital-to-analog converter 210 or the analog-to-digital converter 240 to be designed as independent electrical components or as part of a digital-to-analog module 200. As in the Fig. As shown in Figure 1, at least the multiplexer 220 or the preamplifier 230 can also be part of the digital-analog module 200. In other words, it may be intended that the aforementioned components are not provided by the field-programmable gate array 100.

[0054] It is also conceivable within the scope of the invention that a preamplifier 230 is provided, which is designed to amplify the analog radar echo signal 5 and forward it to the analog-to-digital converter 240. In the Fig. Figure 1 shows the preamplifier 230 arranged between the multiplexer 220 and the analog-to-digital converter 240 and connected to them. The preamplifier 230 can be configured to amplify the analog radar echo signal 5 so that, after amplification, it lies within the operating range of the analog-to-digital converter 240. This achieves the advantage that the signal quality of the digital radar echo signal provided by the analog-to-digital converter 240 is particularly high and the signal is neither clipped nor noisy.

[0055] The radar sensor assembly 10 may include further components not explicitly shown. For example, the components of the radar sensor assembly 10 may be arranged in a housing. Alternatively or additionally, it may also be provided that at least one component, in particular those components not located on the Field Programmable Gate Array 100, is / are arranged at a distance from it within the assembly. The radar sensor assembly 10 can be considered part of a radar sensor. The radar sensor may include further devices, in particular a processor. The processor may be configured to evaluate the radar echo signal, in particular to process it into the output signal 7. Alternatively or additionally, the output signal 7 may be evaluated, at least partially, in the Field Programmable Gate Array 100. The processor may also be configured to provide an input signal 1.The evaluation can include converting the radio echo signal into environmental information.

[0056] Arrows indicate in the Fig. Figure 1 shows the signal path in measurement mode I. Measurement mode I represents part of the procedure for operating the radar sensor assembly 10. The procedure in measurement mode I comprises the following: - an input interface 110 that receives an input signal 1, - a digital-to-analog sequencer 120, which sequences the input signal 1 into a digital transmit signal 2, - a digital-to-analog converter 210, which converts the digital transmit signal 2 into an analog transmit signal 3, - a radar frontend 300, which emits a radar signal 4 into the environment according to the analog transmit signal 3 and receives an analog radar echo signal 5, - an analog-to-digital converter 240, which converts the analog radar echo signal 5 into a digital radar echo signal 6, - an analog-to-digital sequencer 140, which sequences the digital radar echo signal 6 into a digital output signal 7, and - an output interface 150 that transmits the digital output signal 7, wherein at least the input interface 110, the digital-to-analog sequencer 120, the analog-to-digital sequencer 140, and the output interface 150 are provided by a single Field Programmable Gate Array 100. According to the invention, the method comprises providing at least one further operating mode II, III, IV, V, in particular at least one analog simulation mode II, one digital simulation mode III, one playback mode IV, or one signal test mode V, for testing at least one component of the radar sensor assembly 10.

[0057] The following will be discussed within the framework of the Fig. 2 to Fig. 3 the other operating modes II, III, IV; V are described.

[0058] The Fig. Figure 2 uses arrows to illustrate the situation in analog simulation mode II, where the digital-to-analog converter 210 sends synthetic analog radar echo signals 8 to the analog-to-digital converter 240. The digital-to-analog converter 210 can therefore be configured to send synthetic analog radar echo signals 8 to the analog-to-digital converter 240 in analog simulation mode II. This allows the functionality of the first two components to be tested separately from the radar front end 300. Analog simulation mode II can be used, for example, during manufacturing before connecting to the radar front end 300. This allows defective components to be identified and either repaired or replaced. However, analog simulation mode II can also be used in the field and / or for fault analysis to narrow down the cause of a malfunction.For this purpose, it can be provided that an environment, in particular a street scene, is digitally calculated in the Field Programmable Gate Array 100 and / or an external processor and fed into the input interface 110 as an input signal 1. Furthermore, it can be provided that the digital-to-analog converter 210 outputs pre-calculated analog radar echo signals 5, i.e., synthetic received samples. The pre-calculated analog radar echo signals 5 can then be fed to the analog-to-digital converter 240 via the multiplexer 220 and / or the preamplifier 230. It can be provided that the delay element specifies the correct time for digitization to the analog-to-digital converter 240. The output signal 7 output from the output interface 150 can then be read by a processor. This feeds the pre-calculated analog radar echo signals 5 into the measurement algorithm.

[0059] The Fig. Figure 3 also illustrates, using arrows, how in digital simulation mode III the input signal 1 is processed exclusively within the Field Programmable Gate Array 100 to a digital output signal 7. For this purpose, the Field Programmable Gate Array 100 can be configured to process the input signal 1 exclusively within the Field Programmable Gate Array 100 to a digital output signal 7 in digital simulation mode III. It can be provided that, in particular by a processor and / or the Field Programmable Gate Array 100, an environment, especially a street scene, is digitally calculated and output, in particular exclusively, via the components provided by the Field Programmable Gate Array 100.Consequently, all calculated samples are output purely digitally and bit-accurately, bypassing the digital-to-analog converter 210 and the analog-to-digital converter 240, and are read back into the processor. This allows the synthetic received samples to be fed back into the measurement algorithm. This operating mode makes it particularly useful to verify the correct functionality of the Field Programmable Gate Array 100. This mode can be used to great advantage, for example, during development, in production, or even at a later stage, to identify faulty Field Programmable Gate Arrays 100 and either replace or repair them.

[0060] Playback mode IV also uses the configurations of the Fig. 2 or Fig. 3. The network interface (not shown separately) fills the main memory of the radar sensor with a synthetic radar echo signal 8 or a recorded radar echo signal 9. From there, it is distributed to the input interface 110 of the FPGA. This imprints the synthetic radar echo signal 8 or the recorded radar echo signal 9 onto the digital-to-analog converter 210, which is then forwarded by the digital-to-analog converter 210 to the analog-to-digital converter 240 (in particular via the multiplexer 220 and / or the preamplifier 230) or digitally, in particular exclusively, processed within the field-programmable gate array 100 to a digital output signal 7. The radar sensor can therefore be configured to receive a synthetic and / or recorded radar echo signal 9, which is then processed according to Fig. 2 analog via the digital-to-analog converter 210 to the analog-to-digital converter 240 or after Fig. 3 is processed digitally, in particular exclusively, within the Field Programmable Gate Array 100 to produce a digital output signal 7. It may be provided that the output signal 7 can be read out via the network interface in addition to or as an alternative to the output interface. In this way, the functionality of further devices, in particular those downstream of the radar frontend 300, can be checked.

[0061] The signal test mode V also uses the configurations of the Fig. 2 or Fig. 3, by the Field Programmable Gate Array 100 inscribing an input signal 1, implemented as a test function, to the digital-to-analog converter 210 via the input interface 110 and the digital-to-analog sequencer 120, forwarding it to the analog-to-digital converter 240, or digitally, in particular exclusively, processing it within the Field Programmable Gate Array 100 to a digital output signal 7 and extracting it again via the output interface 150. The Field Programmable Gate Array 100 can therefore be configured to inscrib an input signal 1, implemented as a test function, to the digital-to-analog converter 210 via the input interface 110 and the digital-to-analog sequencer 120, forwarding it to the analog-to-digital converter 240, and extracting an output signal 7, implemented as a result function, via the output interface 150. The FFTs serve to determine noise levels in the analog chains of the Fig.2 and their signal. Noise levels, electrostatic discharge (ESD) damage in semiconductors, non-linearities in operational amplifiers, defective resistors, capacitors, and signal path interruptions can be determined or detected in this way. Linear regression allows for the comparison of digital-to-analog converter 210 against analog-to-digital converter 240. The residual values ​​of the linear regression allow for the quantification of the comparison result. Defective and / or cracked capacitors in the signal paths can also be largely detected in this way because, in the event of a fault, glitches in their measured voltage values ​​typically occur due to capacitance jumps. In this case, the residuals of the linear regressions show values ​​that deviate from the norm.

[0062] The preceding explanation of the embodiments describes the present invention solely by way of examples. Naturally, individual features of the embodiments can be freely combined with one another, provided this is technically feasible, without departing from the scope of the present invention.

[0063] In the following figures, identical reference numerals are used for the same technical features, even for different embodiments. Reference symbol list 1 Input signal 2 digital transmission signal 3 analog transmission signal 4 radar signal 5 analog radar echo signal 6 digital radar echo signal 7 Output signal 8 synthetic radar echo signals 9 recorded radar echo signal 10 Radar sensor assembly 100 Field Programmable Gate Array 110 Input interface 120 digital-to-analog sequencers 130 Delay device 140 analog-to-digital sequencers 150 output interface 200 Digital-to-analog module 210 Digital-to-analog converters 220 multiplexers 230 preamplifiers 240 analog-to-digital converters 300 radar front end I Measurement operation II Analog simulation operation III Digital simulation operation IV Playback operation V Signal test operation

Claims

[1] Radar sensor assembly (10) for detecting an environment, comprising: - an input interface (110) designed to receive an input signal (1), - a digital-to-analog sequencer (120) designed to sequence the input signal (1) into a digital transmit signal (2), - a digital-to-analog converter (210) designed to convert the digital transmit signal (2) into an analog transmit signal (3), - a radar frontend (300) designed to transmit a radar signal (4) into the environment in accordance with the analog transmit signal (3) and to receive an analog radar echo signal (5), - an analog-to-digital converter (240) designed to convert the analog radar echo signal (5) into a digital radar echo signal (6), - an analog-to-digital sequencer (140) designed to sequence the digital radar echo signal (6) into a digital output signal (7), and - an output interface (150) designed to transmit the digital output signal (7), wherein at least the input interface (110), the digital-to-analog sequencer (120), the analog-to-digital sequencer (140) and the output interface (150) are provided by a single Field Programmable Gate Array (100), characterized by , that the digital-to-analog converter (210) is further configured to send synthetic radar echo signals (8) to the analog-to-digital converter (240), particularly in an analog simulation mode (II). [2] Radar sensor assembly (10) according to claim 1, characterized by , that a delay device (130) is provided which is designed to to receive the digital transmission signal (2) and forward it to the analog-to-digital sequencer (140) and / or to start the conversion of the analog radar echo signal (5) into the digital radar echo signal (6) at the analog-to-digital converter (240) by sending a start command. [3] Radar sensor assembly (10) according to claim 1 or 2, characterized by , that a multiplexer (220) is provided which is designed to forward the analog radar echo signal (5) and its phase information or the analog transmit signal (3) of the digital-to-analog converter (210). [4] Radar sensor assembly (10) according to any one of the preceding claims, characterized by , that at least the digital-to-analog converter (210) or the analog-to-digital converter (240) are designed as independent electrical components or as part of a digital-to-analog module (200). [5] Radar sensor assembly (10) according to any one of the preceding claims, characterized by, that a preamplifier (230) is provided which is designed to amplify the analog radar echo signal (5) and forward it to the analog-to-digital converter (240). [6] Radar sensor assembly (10) according to any one of the preceding claims, characterized by , that the Field Programmable Gate Array (100) is designed, in particular in a digital simulation mode (III), to process the input signal (1) exclusively within the Field Programmable Gate Array (100) to a digital output signal (7). [7] Radar sensor assembly (10) according to any one of the preceding claims, characterized by, furthermore, a network interface is provided which is designed to input, in particular in a playback mode (IV), a synthetic radar echo signal (8) and / or a recorded radar echo signal (9), which can be transmitted analogously via the digital-to-analog converter (210) to the analog-to-digital converter (240) or digitally, in particular exclusively, within the Field Programmable Gate Array (100) to a digital output signal (7). [8] Radar sensor assembly (10) according to any one of the preceding claims, characterized by , that the Field Programmable Gate Array (100) is further designed, in particular in a signal test mode (V), to input an input signal (1) designed as a test function to the digital-to-analog converter (210) via the input interface (110), to forward it to the analog-to-digital converter (240) and to extract an output signal (7) designed as a result function via the output interface (150). [9] Method for operating a radar sensor assembly (10) for detecting an environment according to any one of claims 1 to 8, wherein in a measurement mode (I) - an input interface (110) receives an input signal (1), - a digital-to-analog sequencer (120) sequences the input signal (1) into a digital transmit signal (2), - a digital-to-analog converter (210) converts the digital transmit signal (2) into an analog transmit signal (3), - a radar front end (300) emits a radar signal (4) into the environment according to the analog transmit signal (3) and receives an analog radar echo signal (5), - an analog-to-digital converter (240) converts the analog radar echo signal (5) into a digital radar echo signal (6), - an analog-to-digital sequencer (140) sequences the digital radar echo signal (6) into a digital output signal (7), and - an output interface (150) sends out the digital output signal (7), wherein at least the input interface (110), the digital-to-analog sequencer (120), the analog-to-digital sequencer (140) and the output interface (150) are provided by a single Field Programmable Gate Array (100) and at least one further operating mode (II, III, IV, V), in particular at least an analog simulation mode (II), a digital simulation mode (III), a playback mode (IV) or a signal test mode (V), is provided for testing at least one component of the radar sensor assembly (10), characterized by , that in an analog simulation mode (II) the digital-to-analog converter (210) sends synthetic analog radar echo signals (8) to the analog-to-digital converter (240). [10] Method for operating a radar sensor assembly (10) according to claim 9, characterized by, that in a digital simulation operation (III) the input signal (1) is processed exclusively within the Field Programmable Gate Array (100) to a digital output signal (7). [11] Method for operating a radar sensor assembly (10) according to claim 9 or 10, characterized by , that in a playback mode (IV) a network interface feeds a synthetic and / or recorded analog radar echo signal (9) and impresses it on the digital-to-analog converter (210) and forwards it to the analog-to-digital converter (240) or digitally, in particular exclusively, within the Field Programmable Gate Array (100) is processed to a digital output signal (7). [12] Method for operating a radar sensor assembly (10) according to any one of claims 9 to 11, characterized by, that in a signal test operation (V) the Field Programmable Gate Array (100) induces an input signal (1) implemented as a test function via the input interface (110) to the digital-to-analog converter (210), forwards it to the analog-to-digital converter (240) and extracts it again via the output interface (150) as an output signal (7) implemented as a result function. [13] Computer program product comprising instructions which, when the program is executed by a computer, in particular by a radar sensor assembly (10) according to any one of claims 1 to 8, cause the latter to execute a method according to any one of claims 9 to 12. [14] Computer-readable storage medium comprising instructions which, when executed by a computer, in particular by a radar sensor assembly (10) according to any one of claims 1 to 8, cause it to execute a method according to any one of claims 9 to 12.

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