Efficient restoration of devices

Abstract

Embodiments of the present disclosure are directed to efficient methods for recovering a hardware device in a computer system. In general, embodiments of the present disclosure include a two-part process for recovering a device. In a first part of the two-part process, an initial firmware image may be provided to the recovering device over a first, slower communication bus of the computer system. This initial image may provide the kernel for the device to communicate over a second, faster communication bus of the computer system. A second part of the two-part process may then occur using the second, faster communication bus.

Claims

[1] Baseboard Management Controller (BMC), comprising the following: a first communication interface that, when coupled to a first communication bus, provides for communication on the first communication bus using a first communication protocol; a second communication interface which, when coupled to a second communication bus, provides for communication on the second communication bus using a second communication protocol, the second communication bus transmitting data at a higher rate than the first communication bus; and a control circuit that controls operations of the BMC, wherein the control circuit of the BMC, upon detecting the start of a device coupled to the first communication bus and the second communication bus, causes the BMC to perform a two-part recovery process, wherein a first part of the two-part recovery process uses the first communication interface and a second part of the two-part recovery process uses the second communication interface. [2] The BMC of claim 1, wherein the first part of the two-part recovery process comprises downloading a first firmware image for the device to the device via the first communication interface, the first firmware image comprising firmware to perform the second part of the two-part recovery process using the second communication protocol and the second communication bus. [3] The BMC of claim 2, wherein the second part of the two-part recovery process comprises downloading a second firmware image for the device to the device via the second communication interface, wherein the first firmware image and the second firmware image together enable the device to operate in a recovery state. [4] BMC according to one of the preceding claims, wherein the two-part recovery process is performed according to the Open Compute Project (OCP) specification. [5] BMC according to one of the preceding claims, wherein the first communication interface comprises a system management bus interface (SMBus). [6] The BMC of claim 5, wherein the second communication interface comprises a Peripheral Component Interconnect Express (PCIe) bus interface or a Universal Serial Bus (USB) bus interface. [7] BMC according to claim 6, wherein the second communication protocol comprises a Management Component Transport Protocol (MCTP). [8] Device comprising: a first communication interface that, when coupled to a first communication bus, provides for communication on the first communication bus using a first communication protocol; a second communication interface which, when coupled to a second communication bus, provides for communication on the second communication bus using a second communication protocol, the second communication bus transmitting data at a higher rate than the first communication bus; and a control circuit that controls operations of the device, wherein the control circuit of the device, upon starting the device, causes the device to perform a two-part recovery process, wherein a first part of the two-part recovery process uses the first communication interface and a second part of the two-part recovery process uses the second communication interface. [9] The device of claim 8, wherein the first part of the two-part recovery process comprises downloading a first firmware image for the device via the first communication interface from a Baseboard Management Controller (BMC) coupled to the first communication bus and the second communication bus, the first firmware image comprising firmware for executing the second part of the two-part recovery process using the second communication protocol and the second communication bus. [10] The device of claim 9, wherein the second part of the two-part recovery process comprises downloading a second firmware image for the device from the BMC via the second communication interface, the first firmware image and the second firmware image together enabling operation of the device in a recovery state. [11] The apparatus of claim 8, 9 or 10, wherein the two-part recovery process is performed according to the Open Compute Project (OCP) specification. [12] Device according to one of claims 8 to 11, wherein the first communication interface comprises a system management bus interface (SMBus). [13] The apparatus of claim 12, wherein the second communication interface comprises a Peripheral Component Interconnect express (PCIe) bus interface or a Universal Serial Bus (USB) bus interface. [14] The apparatus of claim 13, wherein the second communication protocol comprises a Management Component Transport Protocol (MCTP). [15] System comprising: a first communication bus using a first communication protocol; a second communication bus using a second communication protocol, the second communication bus transmitting data at a higher rate than the first communication bus; a Baseboard Management Controller (BMC) connected to the first communication bus and the second communication bus, the BMC including a control circuit that controls the operation of the BMC; and a device coupled to the first communication bus and the second communication bus, the device comprising control circuitry that controls operation of the device, wherein upon startup of the device, the control circuitry of the BMC and the control circuitry of the device cause the BMC and the device to perform a two-part recovery process, wherein a first part of the two-part recovery process uses the first communication bus and a second part of the two-part recovery process uses the second communication bus. [16] The system of claim 15, wherein the first part of the two-part recovery process comprises downloading a first firmware image for the device from the BMC to the device, the first firmware image comprising firmware that, when executed by the control circuitry of the device, causes the device to execute the second part of the two-part recovery process using the second communication protocol and the second communication bus. [17] The system of claim 16, wherein the second part of the two-part recovery process comprises downloading a second firmware image for the device from the BMC to the device, wherein the first firmware image and the second firmware image together enable the device to operate in a recovery state. [18] The system of claim 15, 16 or 17, wherein the two-part recovery process is performed according to the Open Compute Project (OCP) specification. [19] The system of any one of claims 15 to 18, wherein the first communication bus comprises a system management bus (SMBus). [20] The system of claim 19, wherein the second communication bus comprises a Peripheral Component Interconnect express (PCIe) bus or a Universal Serial Bus (USB) bus, and wherein the second communication protocol comprises a Management Component Transport Protocol (MCTP).

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