POWER SEMICONDUCTOR HOUSING WITH AN ELECTRICALLY CONDUCTIVE PASTE AND POWER ELECTRONICS SYSTEM
The power semiconductor package with a conductive paste and frame system addresses connection challenges by ensuring reliable electrical and mechanical contact for control/sensing, improving manufacturing efficiency and reducing waste.
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-02-25
- Publication Date
- 2026-03-12
AI Technical Summary
Existing power semiconductor packages face challenges in connecting driver boards to external control contacts without damaging them due to differing mechanical robustness and manufacturing/positioning tolerances, and require different connection techniques for power and control/sensing connections.
A power semiconductor package design featuring a molded body with openings filled with an electrically conductive paste, such as a gallium-indium-tin eutectic alloy, providing mechanical and electrical connections for control/sensing contacts, and a frame system for precise alignment and connection to driver boards.
The design reduces mechanical stress on control/sensing connections, ensures reliable electrical contact, and facilitates easy alignment with driver boards, enhancing manufacturing efficiency and reducing material waste.
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Abstract
Description
TECHNICAL AREA
[0001] The present disclosure relates to power semiconductor packages, in particular power semiconductor packages with an electrically conductive paste, and power electronics systems with such power semiconductor packages. BACKGROUND
[0002] A power semiconductor package can contain one or more power semiconductor dies configured to switch a power current. Furthermore, such power semiconductor dies can be configured to operate at relatively high voltages. Such a power semiconductor package is typically connected to a control or driver board, which includes a driver circuit configured to control or drive the power circuitry of the power semiconductor package. The power semiconductor package may include external power terminals for connecting the power circuitry integrated within the power semiconductor package to an external device, such as a busbar. Furthermore, the power semiconductor package may include external control contacts configured to receive control signals from the driver board or to send sensing signals to the driver board.The external power connections on the one hand and the external control contacts on the other may have significantly different requirements regarding their current and voltage carrying capacities and may therefore, for example, have different shapes and / or dimensions. The external control contacts may be more sensitive, i.e., less mechanically robust, than the external power connections. Furthermore, manufacturing and / or positioning tolerances may make it comparatively difficult to connect the driver board to the external control contacts without damaging them. DE 10 2009 034 578 A1 discloses an arrangement for contacting an electrically conductive carrier, over which an electrically insulating layer is applied, by means of a through-hole in the insulating layer into which solder material has been deposited.Improved power semiconductor packages and improved power electronics systems with power semiconductor packages can help solve these and other problems. SUMMARY
[0003] Several aspects relate to a power semiconductor package, comprising: a power electronic substrate comprising a first side and an opposing second side; at least one power semiconductor chip arranged over the first side of the power electronic substrate, the power semiconductor chip being electrically connected to the power electronic substrate; a molded body encapsulating the power semiconductor chip, the molded body comprising a first side arranged over the first side of the power electronic substrate and over the power semiconductor chip, a second side opposite the first side, and lateral sides connecting the first and second sides, the first side of the molded body having at least one opening such that the power electronic substrate is exposed from the molded body in the opening; and an electrically conductive paste.which is arranged in the opening and is exposed from the molded body, wherein the paste comprises or consists of a eutectic alloy and wherein the eutectic alloy comprises or consists of gallium-indium-tin.
[0004] Several aspects relate to a power electronics system, comprising: the power semiconductor package as previously described, a frame comprising a first side and an opposing second side, wherein the frame spans the power semiconductor package such that the second side of the frame faces the first side of the molded body, and a connector extending through the frame such that an upper end of the connector is positioned above the first side of the frame and a lower end of the connector is immersed in the paste.
[0005] The expert will recognize additional features and advantages upon reading the following detailed description and upon examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0006] The present disclosure is illustrated by way of example and without limitation in the figures of the accompanying drawings, in which the same reference symbols refer to similar or identical elements. The elements of the drawings are not necessarily to scale relative to one another. The features of the various examples shown may be combined, provided they are not mutually exclusive. Fig. 1A and Fig. Figure 1B illustrates a power semiconductor package with an electrically conductive paste configured to serve as an electrical and mechanical connection for an external control or sensing contact. Fig. 1A shows a sectional view and Fig. Figure 1B shows a top view of the power semiconductor package. Fig. 2A and Fig. Figure 2B illustrates another power semiconductor package with an electrically conductive paste. The package comprises a substrate with at least a first pad and a second pad, wherein a power semiconductor chip is placed on the first pad and the paste is placed on the second pad. Fig. 2A shows a sectional view and Fig. Figure 2B shows a top view of the power semiconductor package. Fig. 3A and Fig. Figure 3B illustrates a power electronics system comprising a power semiconductor package and a frame arranged above the power semiconductor package, wherein external control or sensing contacts of the power semiconductor package extend through the frame. Fig. 3A shows a sectional view and Fig. Figure 3B shows a top view of the power electronics system. Fig. 4A and Fig. Figure 4B illustrates another power electronics system with a large number of power semiconductor packages arranged under a common frame. Fig. 4A shows a sectional view and Fig. Figure 4B shows a top view of the power electronics system. Fig. Figure 5 illustrates a detail of another power electronics system, where an external control or sensing contact includes a bend. Fig. Figure 6 is a flowchart of an exemplary procedure for manufacturing a power semiconductor package. DETAILED DESCRIPTION
[0007] In the following detailed description, known structures and elements are shown schematically to facilitate the description of one or more aspects of revelation. In this regard, directional terminology, such as "above," "below," "left," "right," "top," "bottom," etc., is used with reference to the orientation of the described figure(s). Since components of revelation can be positioned in a number of different orientations, the directional terminology is used for illustrative purposes only. It is understood that other examples may be used and structural or logical modifications may be made.
[0008] Furthermore, while a particular feature or aspect of an example may be disclosed with respect to only one of several implementations, such feature or aspect may be combined with one or more other features or aspects of the other implementations as may be desirable and advantageous for a given or particular application, unless expressly stated otherwise or technically restricted. Moreover, to the extent that the terms "comprise," "incorporate," "with," or other variants thereof are used either in the detailed description or the claims, such terms shall be understood to mean inclusive in a manner similar to the term "comprise." The terms "coupled" and "connected" may be used together with derivatives thereof.It is understood that these terms can be used to indicate that two elements work together or interact, regardless of whether they are in direct physical or electrical contact or not; intermediary elements or layers may be provided between the "bonded," "attached," or "connected" elements. However, it is also possible for the "bonded," "attached," or "connected" elements to be in direct contact with each other. Furthermore, the term "exemplary" is meant merely as an example and not as the best or optimal solution.
[0009] The power semiconductor package examples described below can use various types of semiconductor dies or circuits integrated into the semiconductor dies, including AC / DC or DC / DC converter circuits, power MOS transistors, power Schottky diodes, JFETs (junction-gate field-effect transistors), power bipolar transistors, integrated power circuits, etc. The examples can also use semiconductor dies that incorporate MOS transistor structures or vertical transistor structures, such as IGBT (insulated-gate bipolar transistor) structures, or more generally, transistor structures in which at least one electrode is located on a first main face of the semiconductor chip and at least one other electrode is located on a second main face of the semiconductor chip opposite the first main face.
[0010] The semiconductor chip(s) may be made from a specific semiconductor material, for example Si, SiC, SiGe, GaAs, GaN, or from any other semiconductor material, and may also contain one or more of inorganic and organic materials that are not semiconductors, such as insulators, plastics, or metals.
[0011] An efficient power semiconductor package, an efficient power electronics system, and an efficient process for manufacturing a power semiconductor package can, for example, reduce material consumption, ohmic losses, chemical waste, etc., and can thus enable energy and / or resource savings. Improved power semiconductor packages, improved power electronics systems, and improved processes for manufacturing a power semiconductor package, as described here, can therefore contribute, at least indirectly, to green technology solutions—that is, climate-friendly solutions that provide a reduction in energy and / or resource consumption.
[0012] Fig. 1A and Fig. Figure 1B shows a power semiconductor package 100 with a power electronics substrate 110, at least one power semiconductor die 120, a shaped body 130 and an electrically conductive paste 140. Fig. 1A shows a sectional view and Fig. Figure 1B shows a top view of the power semiconductor package 100.
[0013] The power semiconductor package 100 can be configured for operation at high voltages, for example, 500 V or more, 1.2 kV or more, or 2 kV or more, and / or for operation at high currents, for example, 1 A or more, 10 A or more, or 100 A or more. Furthermore, the power semiconductor package 100 can incorporate any suitable electrical circuit, for example, a half-bridge circuit, a full-bridge circuit, a converter circuit, an inverter circuit, etc.
[0014] The power semiconductor package 100 can be configured for use in any suitable application, for example, automotive, industrial, or household applications. In particular, the power semiconductor package 100 can be configured for use in the main inverter of a vehicle's electric motor. The power semiconductor package 100 can be configured to connect to a driver board, the driver board being configured to drive one or more power semiconductor dies 120.
[0015] The power electronic substrate 110 comprises a first side 111 and an opposing second side 112, wherein the at least one power semiconductor chip 120 is arranged above the first side 111. Furthermore, the power semiconductor chip 120 is electrically connected to the power electronic substrate, in particular the first side 111, for example, via a soldered connection or a sintered connection. The connection can be made using any suitable joining material, for example, a soft solder, a diffusion solder, a silver paste, a gold paste, a copper paste, etc.
[0016] The power electronic substrate 110 can, for example, comprise or consist of a conductor frame. However, it is also possible that the power electronic substrate 110 comprises or consists of a type of substrate that includes two electrically conductive layers separated by a dielectric layer, such as direct-bonded copper (DBC), direct-bonded aluminum (DAB), active metal solder (AMB), insulated metal substrate (IMS), etc.
[0017] In one example, the second side 112 of the power electronic substrate 110 is exposed to a second side 132 of the molded body 130. The second side 112 of the power electronic substrate 110 can be configured for coupling with a heat sink, i.e., a heat sink or a base plate. If the power electronic substrate 110 is a conductor frame, an electrically insulating layer, e.g., a layer of thermal interface material (TIM), can be arranged between the second side 112 and the heat sink. If the power electronic substrate itself includes a dielectric layer that insulates the power semiconductor chip 120 from the second side 112, then such an additional insulating layer may not be necessary.
[0018] For example, the power semiconductor package 100 comprises a single power semiconductor chip 120. In this case, the power semiconductor package 100 is a discrete device comprising a single switch. However, the power semiconductor package 100 can also comprise a plurality of power semiconductor dies 120 that are electrically connected to form, for example, any of the circuits mentioned above. The power semiconductor dies 120 can all be of the same type of die, or they can be different types of dies.
[0019] The power semiconductor chip(s) 120 can be arranged on the power electronic substrate 110 such that a lower side of the power semiconductor chip(s) 120 faces the first side 111 of the power electronic substrate 110. A first-type power electrode, e.g., a drain electrode or an emitter electrode, on the lower side of the power semiconductor chip(s) can be coupled to the power electronic substrate 110 via the soldered or sintered connection mentioned above. A top side of the power semiconductor chip(s) 120, facing away from the power electronic substrate 110, can include a second-type power electrode, e.g., a source electrode or a collector electrode. The top side can also include a gate electrode. In one example, the positions of the first- and second-type power electrodes are reversed.
[0020] The shaped body 130 encapsulates the power semiconductor chip(s) 120. The shaped body 130 comprises a first side 131, which is arranged over the first side 111 of the power electronic substrate 110 and over the power semiconductor chip(s) 120, the second side 132, which is arranged opposite the first side 131, and lateral sides 132, which connect the first and second sides 131, 132.
[0021] The molded body 130 can be manufactured using any suitable molding technique, for example compression molding, injection molding, or compression molding. The molded body 130 can, for example, include inorganic filler particles configured to reduce the thermal resistance of the molded body 130.
[0022] According to one example, external power connections of the power semiconductor package 100 can be exposed from one or more of the lateral sides 133 of the molded body 130, compare Fig. 1B. Additionally or alternatively, external power connections may be exposed from the first side 131 of the molded body 130.
[0023] For example, the power semiconductor housing 100 can include a first external terminal 114 and a second external terminal 116, which are exposed from the lateral sides 133 of the molded body 130. The first and second external terminals 114 and 116 can, in particular, be power terminals of the power semiconductor housing 100. The external terminals 114 and 116 can be configured for coupling to busbars, for example, via welded connections and / or connections that include a screw.
[0024] As in the Fig. 1A and Fig. As shown in Figure 1B, the first side 131 of the molded body 130 includes at least one opening 134, such that the power electronic substrate 110 is exposed from the molded body 130 in the opening 134. Furthermore, the electrically conductive paste 140 is arranged in the opening 134 and is exposed to the outside of the molded body 130. The electrically conductive paste 140 can partially or completely fill the opening 134. The electrically conductive paste 134 can completely cover the power electronic substrate 110 in the opening 134, so that the power electronic substrate 110 is not exposed to the outside of the power semiconductor housing 100 in the opening 134. The opening 134 can be produced, for example, during molding using a suitable shaped molding tool. However, it is also possible that the opening is produced by removing material from the molded body 130, e.g.about a drilling process.
[0025] It should be noted that the power semiconductor package 100 can include any suitable number of openings 134, for example, one, two, three, four, five, six, etc. Furthermore, the opening(s) 134 on the first side 131 of the molded body 130 can be arranged in any suitable pattern and orientation. For example, the openings 134 can be arranged along a single line, along multiple lines, in a matrix, etc. The openings 134 can, for example, be arranged along one of the edges of the first side 131 or along multiple, e.g., opposite, edges of the first side 131.
[0026] The opening 134 can have any suitable shape and dimensions. For example, the opening 134 can have a substantially square or round shape when viewed from above the first side 131. The opening 134 can, for example, have a diameter or edge length x in the range of about 2 mm to about 8 mm. The lower limit of this range can also be about 3 mm, about 3.5 mm, or about 4 mm, and the upper limit can also be about 7 mm, about 6 mm, or about 5 mm. The opening 134 can, for example, have a depth y in the range of about 0.5 mm to about 5 mm. The lower limit of this range can also be about 1 mm, about 1.8 mm, or about 2 mm, and the upper limit can also be about 4 mm or about 3 mm.
[0027] The electrically conductive paste 140 can be configured to provide an electrical connection between the power electronics substrate 110 and the outside of the power semiconductor package 100. Such an electrical connection can, in particular, include a sensing connection or a control connection with a driver board. In other words, the electrically conductive paste 140 can be electrically connected to a control electrode of the power semiconductor chip 120 via the power electronics substrate 110. To provide a connection with a driver board, a pin can be inserted into the electrically conductive paste 140 such that the lower end of the pin extends into the electrically conductive paste 140 and the upper end of the pin can be connected to the driver board. The electrically conductive paste 140 can secure the pin electrically and mechanically to the power semiconductor package 100.
[0028] The electrically conductive paste 140 may, for example, comprise or consist of one or more of the following: a conductive adhesive, a eutectic alloy (e.g. comprising or consisting of gallium-indium-tin), a liquid metal with an additive metal powder, an organic material with electrically conductive filler particles (e.g. Ag particles or Au particles or a resin filled with carbon flakes), an organic film material filled with conductive particles (isotropic or anisotropic), a conductive ink (organic or inorganic), and a conductive organic material (intrinsic or doped) such as conjugated polymers, charge transfer complexes, or aromatic systems.
[0029] Electrically conductive paste 140 can be viscous at room temperature, meaning that a connection incorporating the electrically conductive paste 140 will not easily break under mechanical stress. The viscosity of the electrically conductive paste 140 can be comparable to that of peanut butter, for example. This high viscosity can prevent leakage of the electrically conductive paste 140. In the case of a eutectic alloy, the electrically conductive paste 140 can also exhibit an oxide microstructure configured to increase viscosity. In particular, the conductive paste 140 can provide a connection that is less rigid than, for example, a welded, soldered, or sintered joint. Therefore, less mechanical stress can be exerted on a sensing or control connection that includes a pin inserted into the electrically conductive paste 140.
[0030] Power connections of the power semiconductor package 100 can include welded, soldered, or sintered connections—in other words, connections that are rigid at room temperature. Generally, the power semiconductor package 100 is configured to have a power connection on the one hand and sensing and control connections on the other, using two different connection techniques. These different connection techniques address the different electrical and mechanical requirements of the power connections and the sensing and control connections, respectively.
[0031] Fig. 2A and Fig. Figure 2B schematically shows another power semiconductor package 200, which may be similar to or identical to the power semiconductor package 100, except for the differences described below.
[0032] In the power semiconductor package 200, the power semiconductor chip 120 is arranged on a first pad 110-1 of the power electronic substrate 110, and the electrically conductive paste 140 is arranged on another second pad 110-2 of the power electronic substrate 110. As shown in Fig. As shown in Figure 2A, the power semiconductor package 200 can, for example, comprise two first pads 110-1, with power semiconductor dies 120 arranged on both first pads 110-1.
[0033] The second pad 110-2 is exposed from one of the lateral sides 133 of the molded body 130. As shown in Fig. As shown in Figure 2B, the power semiconductor package 200 can comprise a plurality of second pads 110-2, all of which may be exposed from, for example, a single lateral side 133. It is also possible, of course, for the plurality of second pads 110-2 to be exposed from two or more lateral sides 133 of the molded body 130. The exposed portion of the second pad 110-2 may, for example, form a connecting rod of a conductor frame that includes the second pad 110-2.
[0034] In one example, the first and second pads 110-1 and 110-2 are both ladder frame components. In another example, the first pad 110-1 is not part of a ladder frame and could, for example, be a DCB, a DAB, etc.
[0035] As in Fig. As shown in Figure 2B, the power semiconductor package 200 can, for example, include a first to third external connection 114-118, which can be configured as power connections. The first and second external connections 114 and 116 can, for example, be a DC+ and a DC- connection, respectively, and the third external connection 118 can, for example, be a phase current connection of the power semiconductor package 200.
[0036] According to one example, no electrically conductive paste 140 is arranged over and coupled to the first pad 110-1 and / or no electrically conductive paste 140 is arranged over and coupled to any of the first to third external ports 114-118. According to another example, the electrically conductive paste 140 is arranged over and coupled to the first pad 110-1 and / or to one or more of the external ports 114-118 to provide a sensing connection with the first pad 110-1 or with the respective external port 114-118.
[0037] Fig. 3A and Fig. Figure 3B schematically shows a power electronics system 300 with a power semiconductor housing 310, an optional heat sink 320, a frame 330, and a connector 340. The power semiconductor housing 310 can, for example, correspond to the power semiconductor housing 100 or 200. Fig. Figure 3A shows a sectional view of the 300 system and Fig. Figure 3B shows a top view.
[0038] The heat sink 320 can, for example, comprise or consist of a base plate, a cooling plate, or a cooler. The heat sink 320 can, for example, comprise or consist of a metal or a metal alloy, such as Al or Cu. The power semiconductor package 310 is positioned above the heat sink 320 such that the second side 132 of the shaped body 130 faces the heat sink 320. The power semiconductor package 310 can be mechanically attached to the heat sink using any suitable means, such as a welded connection, a soldered connection, a sintered connection, and / or screws.
[0039] The frame 330 is made at least partially of an electrically insulating material, e.g., polymers, such as, but limited to, plastics, polytetrafluoroethylene (PTFE), etc. The frame comprises a first side 331 and an opposing second side 332. The frame 330 further spans the power semiconductor housing 310 such that the second side 332 of the frame 330 faces the first side 131 of the molded body 130. The frame 330 is mechanically fastened to the heat sink 320, for example, using fasteners 350, which may include, for example, screws or rivets. The fasteners may be located outside a base area of the power semiconductor housing 310 when viewed from above the first side 331 of the frame 330.
[0040] As in Fig. As shown in Figure 3B, the external terminals 114-118 of the power semiconductor package 310 can protrude from below the frame 330. This makes the external terminals 114-118 easily accessible when they are connected to an external device, for example by welding and / or screwing.
[0041] The frame 330 can comprise or consist of any suitable plastic material, for example, a hard plastic. The frame 330 can have any suitable dimensions and shape. For example, the frame 330 can comprise support sections 334 and a cover section 336, wherein the support sections 334 are coupled to the heat sink 320 and the cover section 336 partially or completely covers the power semiconductor housing 310. The frame 330 can, for example, comprise two support sections 334 arranged along two opposite lateral sides 133 of the molded body 130 of the power semiconductor housing 310.
[0042] The support sections 334 and the cover section 336 can have any suitable thickness. For example, the cover section 336 can have a thickness measured between the first and second sides 331, 332 in the range of about 1 mm to about 10 mm. The lower limit of this range can also be about 2 mm, about 3 mm, or about 4 mm, and the upper limit can also be about 8 mm or about 6 mm. A gap between the first side 131 of the molded body 130 and the second side 332 of the frame 330 can, for example, be in the range of about 0.1 mm to about 20 mm. The lower limit of this range can also be about 0.5 mm, about 1 mm, about 2 mm, or about 4 mm, and the upper limit can also be about 15 mm, about 10 mm, about 8 mm, or about 6 mm.
[0043] The connector(s) 340 extend through the frame 330 such that an upper end of the connector(s) 340 is positioned above the first side 331 of the frame 330 and a lower end of the connector(s) 340 is immersed in the electrically conductive paste 140. According to one example, the connector(s) 340 may already be connected to the power semiconductor housing 310 when the frame 330 is positioned over the power semiconductor housing 310. In other words, positioning the frame over the power semiconductor housing 310 may involve pinning the frame 330 onto the connector(s) 340. According to another example, the connector(s) 340 are inserted into the electrically conductive paste 140 after the frame 330 has been positioned over the power semiconductor housing 310.
[0044] The first side 331 of the frame 330 can be configured to accommodate a control board or driver board, and the connectors 340 are configured to electrically connect a control electrode of the power semiconductor chip 120 to the control or driver board. The frame 330 can, for example, be configured to determine positioning tolerances of the upper ends of the connectors 340 relative to each other. For this reason, the frame 330 can facilitate the process of placing a control or driver board over the power semiconductor package 310. The positions of the connectors 340 are precisely determined by the frame 330, and there may, for example, be a reduced risk of damaging the board and / or the connectors 340 due to misalignment.
[0045] Fig. 4A and Fig. Figure 4B schematically shows another power electronics system 400, which may be similar or identical to the power electronics system 300, except for the differences described below. Fig. 4A shows a sectional view and Fig. Figure 4B shows a top view from above frame 330.
[0046] The power electronics system 400 can, in particular, comprise a plurality of power semiconductor packages 310, wherein the frame 330 spans the plurality of power semiconductor packages 310. The power semiconductor packages 310 can, for example, be arranged laterally side by side along a first direction (the x-axis in Fig. 4B). The first to third external connections 114, 116 and 118 can be exposed from the lateral sides 133 of the shaped bodies 130 of the power semiconductor packages 310, which are arranged along a second direction (the y-axis in Fig. 4B) pointing perpendicularly to the first direction. Furthermore, the power semiconductor packages 310 can each comprise a plurality of deposits of electrically conductive paste 140 and connectors 340, which may, for example, also be arranged in lines along the second direction, compare Fig. 4B.
[0047] Fig. Figure 5 shows a sectional view of a detail of a power electronics system 500, which may be similar or identical to the power electronics system 300 or 400, except for the differences described below.
[0048] In particular, the connector 340 in the power electronics system 500 includes a bend in the range of 70° to 120° on the frame. The bend can be approximately or exactly 90°. In other words, an upper section of the connector 340 can bend along a first direction (the z-axis in Fig. 5) extend and another section of connector 340 can extend along a different second direction (a middle section extends along the x-axis in Fig. 5) According to an example, the connector 340 can include more than one such bend, compare Fig. 5.
[0049] For example, the frame 330 can include an opening 338 arranged vertically above the electrically conductive paste 140. The opening 338 can, for example, be configured to allow visual inspection of the connection between the connector 340 and the electrically conductive paste 140.
[0050] Fig. Figure 6 is a flowchart of an exemplary process 600 for manufacturing a power semiconductor package. Process 600 can be used, for example, to manufacture power semiconductor packages 100 and 200.
[0051] Method 600 comprises, in 601, a process of providing a power electronic substrate comprising a first side and an opposing second side; in 602, a process of arranging at least one power semiconductor chip over the first side of the power electronic substrate and electrically connecting the power semiconductor chip to the power electronic substrate; in 603, a process of encapsulating the power semiconductor chip with a shaped body, wherein the shaped body comprises a first side arranged over the first side of the power electronic substrate and over the power semiconductor chip, a second side opposite the first side, and lateral sides connecting the first and second sides, wherein the first side of the shaped body comprises at least one opening such that the power electronic substrate is exposed from the shaped body in the opening.and at 604 a process of arranging an electrically conductive paste in the opening so that the electrically conductive paste is exposed from the molded body. EXAMPLES
[0052] The power semiconductor package and the power electronics system are further explained below using specific examples.
[0053] Example 1 is a power semiconductor package comprising: a power electronic substrate comprising a first side and an opposite second side, at least one power semiconductor chip arranged over the first side of the power electronic substrate, the power semiconductor chip being electrically connected to the power electronic substrate, a molded body encapsulating the power semiconductor chip, the molded body comprising a first side arranged over the first side of the power electronic substrate and over the power semiconductor chip, a second side opposite the first side, and lateral sides connecting the first and second sides, the first side of the molded body comprising at least one opening such that the power electronic substrate is exposed from the molded body in the opening, and an electrically conductive paste arranged in the opening and exposed from the molded body.wherein the paste comprises or consists of a eutectic alloy and wherein the eutectic alloy comprises or consists of gallium-indium-tin.
[0054] Example 4 is the power semiconductor package according to one of the previous examples, where the paste is viscous at room temperature.
[0055] Example 5 is the power semiconductor package according to one of the previous examples, wherein the paste is electrically connected to a control electrode of the power semiconductor chip via the power electronic substrate.
[0056] Example 6 is the power semiconductor package according to one of the preceding examples, wherein the power semiconductor chip is arranged on a first pad of the power electronic substrate, the paste is arranged on a second pad of the power electronic substrate, and wherein the second pad is exposed from one of the lateral sides of the molded body.
[0057] Example 7 is the power semiconductor package according to Example 6, further comprising: a first, a second and a third external connection exposed from one or more other lateral sides of the molded body than the second pad.
[0058] Example 8 is a power electronics system comprising: the power semiconductor package according to any of the preceding examples, a frame which is at least partially made of an electrically insulating material comprising a first side and an opposing second side, wherein the frame spans the power semiconductor package such that the second side of the frame faces the first side of the molded body, and a connector extending through the frame such that an upper end of the connector is arranged above the first side of the frame and a lower end of the connector is immersed in the paste.
[0059] Example 9 is the power electronics system according to Example 8, further comprising: a plurality of power semiconductor packages according to any one of Examples 1 to 7, wherein the frame spans the plurality of power semiconductor packages, and a plurality of connectors connected to the pastes of the plurality of power semiconductor packages.
[0060] Example 10 is the power electronics system according to Example 9, wherein the power semiconductor packages are arranged laterally side by side along a first direction and wherein power terminals are exposed from lateral sides of the shaped bodies of the power semiconductor packages, pointing along a second direction perpendicular to the first direction.
[0061] Example 11 is the power electronics system according to one of Examples 8 to 10, wherein the first side of the frame is configured to accommodate a control board, and wherein the connector is configured to electrically connect a control electrode of the power semiconductor chip to the control board.
[0062] Example 12 is the power electronics system according to one of Examples 8 to 11, wherein the power electronics system comprises a plurality of connectors, and wherein positioning tolerances of the upper ends of the connectors of the plurality of connectors relative to each other are determined by the frame.
[0063] Example 13 is the power electronics system according to one of Examples 8 to 12, wherein the connector includes or consists of a press-fit pin.
[0064] Example 14 is the power electronics system according to one of Examples 8 to 13, wherein the connector includes a bend in the range of 70° to 120° on the frame.
[0065] Example 15 is the power electronics system according to any of Examples 8 to 14, wherein a connection between the connector and the power semiconductor package is free of any soldered, sintered or welded connections.
[0066] Example 16 is the power electronics system according to any of Examples 8 to 15, wherein the frame is mechanically fastened to the heat sink using screws or rivets, and wherein the screws or rivets are arranged outside a base face of the power semiconductor package when viewed from above the first side of the frame.
Claims
[1] Power semiconductor packages (100, 200, 310), comprising: a power electronic substrate (110) comprising a first side (111) and an opposite second side (112), at least one power semiconductor chip (120) arranged above the first side (111) of the power electronic substrate (110), wherein the power semiconductor chip (120) is electrically connected to the power electronic substrate (110), a shaped body (130) encapsulating the power semiconductor chip (120), the shaped body (130) comprising a first side (131) arranged over the first side (111) of the power electronic substrate (110) and over the power semiconductor chip (120), a second side (132) opposite the first side (131), and lateral sides (133) connecting the first and second sides (131, 132). wherein the first side (131) of the shaped body (130) comprises at least one opening (134) such that the power electronic substrate (110) is exposed from the shaped body (130) in the opening (134), and an electrically conductive paste (140) arranged in the opening (134) and exposed from the shaped body (130), wherein the paste (140) comprises or consists of a eutectic alloy and wherein the eutectic alloy comprises or consists of gallium-indium-tin. [2] Power semiconductor packages (100, 200, 310) according to any of the preceding claims, wherein the paste (140) is viscous at room temperature. [3] Power semiconductor housing (100, 200, 310) according to one of the preceding claims, wherein the paste (140) is electrically connected to a control electrode of the power semiconductor chip (120) via the power electronic substrate (110). [4] Power semiconductor package (200) according to one of the preceding claims, wherein the power semiconductor chip (120) is arranged on a first pad (110-1) of the power electronic substrate (110), the paste (140) is arranged on a second pad (110-2) of the power electronic substrate (110) and wherein the second pad (110-2) is exposed from one of the lateral sides (133) of the molded body (130). [5] Power semiconductor housing (200) according to claim 4, further comprising: a first, a second and a third external connection (114, 116, 118) which are exposed from one or more other lateral sides (133) of the mold body (130) than the second pad (110-2). [6] Power electronic system (300, 400, 500), comprising: the power semiconductor housing (310) according to one of the preceding claims, a frame (330) which is at least partially made of an electrically insulating material comprising a first side (331) and an opposing second side (332), wherein the frame (330) spans the power semiconductor housing (310) such that the second side (332) of the frame (330) faces the first side (131) of the shaped body (130), and a connector (340) extending through the frame (330) such that an upper end of the connector (340) is arranged over the first side (331) of the frame (330) and a lower end of the connector (340) is immersed in the paste (140). [7] Power electronic system (300, 400, 500) according to claim 6, further comprising: a plurality of power semiconductor packages (310) according to any one of claims 1 to 7, wherein the frame (330) spans the plurality of power semiconductor packages (310), and a multitude of connectors (340) which are connected to the pastes (140) of the multitude of power semiconductor packages (310). [8] Power electronic system (300, 400, 500) according to claim 7, wherein the power semiconductor housings (310) are arranged laterally next to each other along a first direction and wherein power terminals (114, 116, 118) are exposed from lateral sides (133) of the shaped bodies (130) of the power semiconductor housings (310) which point along a second direction perpendicular to the first direction. [9] Power electronic system (300, 400, 500) according to any one of claims 6 to 9, wherein the first side (331) of the frame (330) is configured to accommodate a control board, and wherein the connector (340) is configured to electrically connect a control electrode of the power semiconductor chip (120) to the control board. [10] Power electronic system (300, 400, 500) according to any one of claims 6 to 9, wherein the power electronic system (300) comprises a plurality of connectors (340), and wherein positioning tolerances of the upper ends of the connectors (340) of the plurality of connectors (340) relative to each other are determined by the frame (330). [11] Power electronic system (300, 400, 500) according to any one of claims 6 to 10, wherein the connector (340) comprises or consists of a press-fit pin. [12] Power electronic system (300, 400, 500) according to any one of claims 6 to 11, wherein the connector (340) comprises a bend in the range of 70° to 120° on the frame (330). [13] Power electronic system (300, 400, 500) according to any one of claims 6 to 12, wherein a connection between the connector (340) and the power semiconductor housing (310) is free of any soldered, sintered or welded connections. [14] Power electronic system (300, 400, 500) according to any one of claims 6 to 13, wherein the frame (330) is mechanically attached to the heat sink (320) using screws or rivets (350), and wherein the screws or rivets (350) are arranged outside a base area of the power semiconductor housing (310) when viewed from above the first side (331) of the frame (330).
Citation Information
Patent Citations
Semiconductor assembly and method for manufacturing a semiconductor assembly
DE102009034578A1