Semiconductor device and manufacturing process for it

The semiconductor device addresses air bubble formation by incorporating a hole in the wiring element to facilitate air escape during resin sealing, improving safety and insulation while maintaining cost-effectiveness.

DE112016007372B4Active Publication Date: 2025-01-23MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
DE112016007372
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2016-10-24
Publication Date
2025-01-23
Estimated Expiration
2036-10-24

AI Technical Summary

Technical Problem

The formation of air bubbles during resin sealing in semiconductor devices due to trapped air in tunnels between emitter electrodes and wiring elements reduces operational safety and insulation properties, and existing methods to mitigate this issue are costly and complex.

Method used

A semiconductor device design featuring a hole between first and second connecting points of a wiring element that allows air to escape during resin sealing, minimizing bubble formation at low cost.

Benefits of technology

The design effectively prevents air bubble formation by allowing air to escape through the hole in the wiring element during resin sealing, enhancing operational safety and insulation properties while reducing production costs.

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Abstract

Semiconductor device comprising: - a semiconductor chip (9); - first and second electrodes (12, 13) formed on an upper surface of the semiconductor chip (9) and spaced apart from each other; - a wiring element (15) comprising a first connection point (15a) bonded to the first electrode (12) and a second connection point (15b) bonded to the second electrode (13); and - a resin (2) that seals the semiconductor chip (9), the first and second electrodes (12, 13) and the wiring element (15), wherein: - a hole (18) is formed between the first connection point (15a) and the second connection point (15b), which extends upwards and downwards through the wiring element (15), and - the wiring element (15) protrudes upwards around the hole (18) in a chimney-like manner.
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Description

Area

[0001] The present invention relates to a semiconductor device and a manufacturing method thereof. background

[0002] Semiconductor devices are used in inverters or regenerative converters that control motors of electric vehicles, trains, and the like. Emitter electrodes on the upper surfaces of semiconductor chips are bonded to wiring elements with solder in the semiconductor devices (see, for example, PTL 1). Citation listPatent literature

[0003] Japanese patent application published in JP 2014-086501 A SummaryTechnical problem

[0004] Emitter electrodes are sometimes divided into multiple groups due to wiring for temperature sensors or gates on the top surfaces of semiconductor chips. Accordingly, there may be numerous solder joints or connection points between the multiple groups of emitter electrodes and wiring elements. Connection points that are located close to each other form tunnels between them, where air is trapped when resin flows into the tunnels from both open ends during resin sealing, resulting in air bubbles. Such air bubbles cause problems of reduced reliability and reduced insulation properties.

[0005] Although it would be possible to counteract this by injecting the resin in a low-pressure atmosphere or by heating the resin and the product to reduce the resin viscosity so that the resin could more easily reach difficult or complicated parts, this would lead to the problem of increased equipment costs and processing costs.

[0006] US 2015 / 0 061 098 A1 discloses a semiconductor device comprising a conductive portion with semiconductor elements arranged on a substrate, a housing accommodating the conductive portion, and a lead terminal integrated into the housing so as to be directly connected to the semiconductor elements or a connection of the substrate. The lead terminal has a voltage relief form for dissipating a voltage generated in the lead terminal.

[0007] US 2007 / 0 205 432 A1 discloses a heterojunction bipolar transistor for power amplifiers capable of delivering high power in a small area. The heterojunction consists of a plurality of transistor components arranged on a subcollector layer, with the collector layers of these transistor components separated from each other and the transistor components arranged in a line along the length of an emitter.

[0008] The present invention has been made to solve the above-described problem, and an object of the invention is to provide a semiconductor device that can reduce generation of air bubbles in the resin at low cost and a manufacturing method thereof. Solution to the problem

[0009] The object underlying the invention is achieved according to the invention in a semiconductor device with the features of claim 1 and in a method for manufacturing a semiconductor device with the features of claim 6. Advantageous further developments are the subject of the respective dependent claims.

[0010] A semiconductor device according to the present invention comprises: a semiconductor chip, first and second electrodes provided on an upper surface of the semiconductor chip and spaced from each other; a wiring member including a first connection point bonded to the first electrode and a second connection point bonded to the second electrode; and a resin sealing the semiconductor chip, the first and second electrodes, and the wiring member, wherein a hole extending upward and downward through the wiring member is provided between the first connection point and the second connection point. The wiring member protrudes upward around the hole in a chimney-like manner. Advantageous effects of the invention

[0011] In the present invention, during resin sealing, the air between the first and second connection points escapes upward through the hole in the wiring element. Thus, the generation of air bubbles in the resin can be suppressed at low cost. Short description of the drawings Fig. 1 is a perspective view illustrating a semiconductor device according to Embodiment 1 of the present invention. Fig. 2 is a plan view illustrating main parts of the semiconductor device according to Embodiment 1 of the present invention. Fig. 3 is a cross-sectional view along I-II of Fig. 2. Fig. 4 is a cross-sectional view along III-IV of Fig. 2. Fig. 5 is a cross-sectional view illustrating the manufacturing process step of the semiconductor device according to Embodiment 1 of the present invention. Fig. 6 is a cross-sectional view illustrating the manufacturing process step of the semiconductor device according to Embodiment 1 of the present invention. Fig. 7 is a plan view illustrating main parts of a semiconductor device according to the comparative example. Fig. 8 is a cross-sectional view illustrating the manufacturing process step of the semiconductor device according to the comparative example. Fig. 9 is a cross-sectional view illustrating the manufacturing process step of the semiconductor device according to the comparative example. Fig. 10 is a cross-sectional view illustrating the manufacturing process step of the semiconductor device according to the comparative example. Fig. 11 is a cross-sectional view illustrating a manufacturing process step of a semiconductor device according to Embodiment 2 of the present invention. Fig. 12 is a cross-sectional view illustrating main parts of a semiconductor device according to Embodiment 3 of the present invention. Fig. 13 is a cross-sectional view illustrating a manufacturing process step of the semiconductor device according to Embodiment 3 of the present invention. Fig. 14 is a cross-sectional view illustrating main parts of a semiconductor device according to Embodiment 4 of the present invention. Fig. 15 is a cross-sectional view illustrating a manufacturing process step of the semiconductor device according to Embodiment 4 of the present invention. Description of embodiments

[0012] Referring to the drawings, a semiconductor device and a manufacturing method thereof according to embodiments of the present invention will be described. The same components are denoted by the same symbols, and repeated descriptions thereof may be omitted. Embodiment 1

[0013] Fig. Figure 1 is a perspective view illustrating a semiconductor device according to Embodiment 1 of the present invention. The interior of a package 1 is sealed with a resin 2. The package 1 has a structure that prevents overflow of the resin 2. The package 1 is provided with a collector output part 3, an emitter output part 5, and a signal terminal 6.

[0014] Fig. 2 is a plan view illustrating main parts of the semiconductor device according to Embodiment 1 of the present invention. Fig. 3 is a cross-sectional view along I-II of Fig. 2. Fig. 4 is a cross-sectional view along III-IV of Fig. 2.

[0015] A substrate 7 is bonded to the bottom surface of the package 1. An electrode 8 of the substrate 7 is connected to the collector output part 3. A collector electrode 10 on the underside of a semiconductor chip 9 is bonded to the electrode 8 of the substrate 7 with a solder 11. The semiconductor chip 9 is an IGBT, but may be a MOSFET, an SBD, a PN diode, or the like.

[0016] First and second emitter electrodes 12 and 13, which are spaced apart from each other, are provided on an upper surface of the semiconductor chip 9. A wiring 14, which is not connected to the first and second emitter electrodes 12 and 13, is provided on the upper surface of the semiconductor chip 9 between the first emitter electrode 12 and the second emitter electrode 13. The wiring 14 is connected to a temperature sensor, a gate, or the like. The emitter electrode is separated into the first and second emitter electrodes 12 and 13 because of this wiring 14. The wiring 14 is connected to the signal terminal 6 with an aluminum wire or the like (not shown). Therefore, input signals are input to the gate of the semiconductor chip 9, or temperature output signals are output from the semiconductor chip 9 via the signal terminal 6 and the wiring 14.

[0017] A first soldering or connection point 15a of a wiring element 15 is bonded to the first emitter electrode 12 with a solder 16. A second connection point 15b of the wiring element 15 is bonded to the second emitter electrode 13 with a solder 17. The wiring element 15 is connected to the emitter output part 5.

[0018] The resin 2 seals the semiconductor chip 9, the first and second emitter electrodes 12 and 13, the wiring element 15, and so on. A hole 18 extending upward and downward through the wiring element 15 is provided between the first connection point 15a and the second connection point 15b.

[0019] Next, a manufacturing method of the semiconductor device according to this embodiment will be described. Fig. 5 and Fig. 6 are cross-sectional views illustrating the manufacturing process steps of the semiconductor device according to Embodiment 1 of the present invention. Fig. 5 and Fig. 6 correspond to the cross-sectional view of Fig. 4.

[0020] First, the hole 18 is formed between the first connection point 15a and the second connection point 15b of the wiring element 15 so as to extend upward and downward through the wiring element 15. Thereafter, the first and second emitter electrodes 12 and 13, which are provided on the upper surface of the semiconductor chip 9 and spaced apart from each other, are bonded to the first and second connection points 15a and 15b of the wiring element 15, respectively. This brings the device into the Fig. 5 before it is sealed with resin. Next, if the resin 2 is applied as shown in Fig. 6 is injected from the side of the wiring element 15, the air inside the tunnel between the first and second connection points 15a and 15b escapes upward through the hole 18 in the wiring element 15.

[0021] The effects of this invention will now be described in comparison with a comparative example. Fig. Figure 7 is a plan view illustrating main parts of a semiconductor device according to the comparative example. Hole 18 is not formed in wiring element 15 in the comparative example. Fig. 8 to Fig. 10 are cross-sectional views illustrating the manufacturing process steps of the semiconductor device according to the comparative example. Fig. 8 to Fig. 10 correspond to the cross-sectional view of Fig. 4. Fig. 8 shows the condition before resin sealing.

[0022] Generally, the resin 2 has high viscosity and poor flowability even before it begins to cure. Therefore, when the resin 2 is injected from the wiring element 15 side, the resin flows faster on the wiring element 15 than in the gap under the wiring element 15, as shown in Fig. 9. This leads to an air trap under the wiring element 15 due to the resin 2 flowing from both open ends into the tunnel between the first and second connection points 15a and 15b, resulting in an air bubble 19. Such an air bubble reduces operational reliability as well as insulation properties.

[0023] In contrast, in this embodiment, the air between the first and second connection points 15a and 15b escapes upward through the hole 18 in the wiring element 15 during resin sealing. Consequently, the generation of air bubbles in the resin 2 can be minimized at low cost. The hole 18 may be an elongated hole extending along the tunnel between the first and second connection points 15a and 15b to further facilitate air escape. Embodiment 2

[0024] Fig. 11 is a cross-sectional view illustrating a manufacturing process step of a semiconductor device according to Embodiment 2 of the present invention. In this embodiment, the resin 2 is injected through the hole 18 under the wiring member 15 to seal the semiconductor chip 9, the first and second emitter electrodes 12 and 13, and the wiring member 15. Other process steps are the same as those of Embodiment 1. The air under the wiring member 15 is forced out by the resin 2, so that generation of air bubbles in the resin 2 can be suppressed. Embodiment 3

[0025] Fig. 12 is a cross-sectional view illustrating main parts of a semiconductor device according to Embodiment 3 of the present invention. In this embodiment, one side in the width direction of the wiring member 15 is bent upward.

[0026] Fig. 13 is a cross-sectional view illustrating a manufacturing process step of the semiconductor device according to Embodiment 3 of the present invention. The bent portion of the wiring member 15 acts as a dam and temporarily stops the resin 2 flowing on the wiring member 15. This slows down the resin 2 flowing over and around the wiring member. Meanwhile, the resin 2 flows into the tunnel under the wiring member 15 from one side and pushes out the air, which can reduce the generation of air bubbles in the resin 2. The same effects can be achieved even if the wiring member 15 does not have the hole 18. Embodiment 4

[0027] Fig. 14 is a cross-sectional view illustrating main parts of a semiconductor device according to Embodiment 4 of the present invention. In this embodiment, the wiring member 15 protrudes upward around the hole 18 in a chimney-like manner.

[0028] Fig. 15 is a cross-sectional view illustrating a manufacturing process step of the semiconductor device according to Embodiment 4 of the present invention. The resin 2 flowing on the wiring member 15 can hardly flow over the hole 18 due to the chimney-like upwardly projecting portion. Consequently, air can easily escape through the hole 18, and thus, the generation of air bubbles in the resin 2 can be minimized.

[0029] The semiconductor chip 9 is not limited to a semiconductor chip formed of silicon, but may instead be formed of a wide-bandgap semiconductor having a wider bandgap than that of silicon. The wide-bandgap semiconductor is, for example, silicon carbide, a gallium nitride-based material, or diamond. A semiconductor chip formed of such a wide-bandgap semiconductor has high withstand voltage and high allowable current density and can thus be miniaturized. The use of such a miniaturized semiconductor chip enables miniaturization and high integration of the semiconductor device in which the semiconductor chip is integrated. Furthermore, since the semiconductor chip has high heat resistance, a radiation fin of a heat sink can be miniaturized, and a water-cooled part can be air-cooled, resulting in further miniaturization of the semiconductor device.Furthermore, since the semiconductor chip has low power loss and high efficiency, a highly efficient semiconductor device can be achieved. List of reference symbols

[0030] 2 resin; 9 semiconductor chip; 12 first emitter electrode; 13 second emitter electrode; 14 wiring; 15 wiring element; 15a first connection point; 15b second connection point; 18 hole

Claims

[1] A semiconductor device comprising: - a semiconductor chip (9); - first and second electrodes (12, 13) formed on an upper surface of the semiconductor chip (9) and spaced apart from each other; - a wiring element (15) having a first connection point (15a) bonded to the first electrode (12) and a second connection point (15b) bonded to the second electrode (13); and - a resin (2) sealing the semiconductor chip (9), the first and second electrodes (12, 13) and the wiring element (15), wherein: - a hole (18) is formed between the first connection point (15a) and the second connection point (15b), which hole extends upwards and downwards through the wiring element (15), and - the wiring element (15) projects upwards around the hole (18) in a chimney-like manner. [2] A semiconductor device according to claim 1, further comprising a wiring (14) formed on the upper surface of the semiconductor chip (9) between the first electrode (12) and the second electrode (13) and not connected to the first and second electrodes (12, 13). [3] A semiconductor device according to claim 1 or 2, wherein the hole (18) is an elongated hole (18). [4] A semiconductor device according to any one of the preceding claims, wherein the semiconductor chip (9) is made of a wide band gap semiconductor. [5] A semiconductor device according to any one of the preceding claims, wherein a height of a part projecting upwardly around the hole (18) in a chimney-like manner is greater than a thickness of the wiring member (15). [6] Manufacturing method of a semiconductor device, comprising: - forming a hole (18) extending upwards and downwards through the wiring element (15) between a first connection point (15a) and a second connection point (15b) of a wiring element (15); - bonding first and second electrodes (12, 13), which are formed on an upper surface of a semiconductor chip (9) and spaced apart from each other, to the first and second connection points (15a, 15b) of the wiring element (15), respectively; and - injecting resin (2) under the wiring element (15) through the hole (18) to seal the semiconductor chip (9), the first and second electrodes and the wiring element (15); wherein the wiring member (15) is formed to protrude upward around the hole (18) in a chimney-like manner.

Citation Information

Patent Citations

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