SILICON CARBIDE EPITAXIE SUBSTRATE AND METHOD FOR PRODUCING A SILICON CARBIDE SEMICONDUCTOR DEVICE

Abstract

Silicon carbide epitaxy substrate (100), comprising: a silicon carbide single crystal substrate (10) with a diameter of 100 mm or larger and with a principal surface (10A) inclined at an angle of more than 0 degrees and not more than 8 degrees with respect to a {0001} plane; a silicon carbide epitaxy layer (11) formed on the main surface (10A) and having a thickness of 20 µm or more; a basal plane dislocation (110, 111) contained in the silicon carbide epitaxy layer (11), wherein one end (111a) is connected to a screw dislocation (120) contained in the silicon carbide epitaxy layer (11) and the other end (111b) is present in a surface (11A) of the silicon carbide epitaxy layer (11), and a further basal plane dislocation (112) extending in the <11-20> direction and connected to the other end (111b) of the basal plane dislocation (110, 111), wherein the basal plane dislocation (110, 111) extends in a direction with an inclination of 20 degrees or more and 80 degrees or less with respect to a <11-20> direction in a {0001} basal plane, and where the density of the basal plane dislocation (110, 111) is 0.05 / cm 2 or less.

Description

Technical field

[0001] The present invention relates to a silicon carbide epitaxy substrate and a method for producing a silicon carbide semiconductor device. Background of the invention

[0002] Document WO 2009 / 0 350 085 A1 describes a silicon carbide epitaxy substrate as a silicon carbide epitaxy substrate in which a step dislocation and a basal plane dislocation associated with the step dislocation are reduced.

[0003] Document DE 10 2010 001 720 A1 relates to a single-crystal silicon carbide substrate with a penetration dislocation having a dislocation line that penetrates a c-surface of a (0001) plane, wherein an angle between the direction of the dislocation line of the penetration dislocation and a c-axis of a

[0001] orientation is less than or equal to 22.5°.

[0004] Document DE 11 2015 006 024 B4 relates to a silicon carbide single-crystal substrate with a diameter of not less than 100 mm and an oxygen concentration of not more than 1x10 17 cm -3 , a dislocation density of no more than 2x10 4 cm -2 and a stacking defect area ratio of no more than 2.0% Summary of the invention

[0005] A silicon carbide epitaxy substrate according to one aspect of the present invention comprises a silicon carbide single-crystal substrate with a diameter of 100 mm or more, having a main surface inclined at an angle of more than 0 degrees and less than 8 degrees with respect to a {0001} plane, a silicon carbide epitaxy layer provided on the main surface having a thickness of 20 µm or more, and a basal plane dislocation contained in the silicon carbide epitaxy layer, wherein one end of the dislocation is associated with a screw dislocation contained in the silicon carbide epitaxy layer and the other end is present in a surface of the silicon carbide epitaxy layer. A further basal plane dislocation extending in the <11-20> direction is associated with the other end of the basal plane dislocation.The basal plane dislocation extends in one direction with an inclination of 20 degrees or more and 80 degrees or less with respect to an <11-20> direction in a {0001} basal plane. The density of the basal plane dislocation is 0.05 / cm. 2 or less. Brief description of the drawings Fig. Figure 1 shows a partial cross-sectional view schematically representing a silicon carbide epitaxy substrate according to an embodiment of the present invention; and Fig. Figure 2 shows a top view schematically representing a basal plane dislocation, one end of which is connected to a screw dislocation, and another basal plane dislocation connected to the basal plane dislocation; Fig. Figure 3 shows a perspective view (1) schematically representing a basal plane dislocation, one end of which is connected to a screw dislocation, and another basal plane dislocation connected to the basal plane dislocation; Fig. Figure 4 shows a perspective view (2) schematically representing a basal plane dislocation, one end of which is connected to a screw dislocation, and another basal plane dislocation connected to the basal plane dislocation; Fig. Figure 5 shows a top view (1) schematically representing a basal plane dislocation in which one end is connected to a screw dislocation and a mechanism for generating another basal plane dislocation; Fig. Figure 6 shows a top view (2) schematically representing a basal plane dislocation in which one end is connected to a screw dislocation and a mechanism for generating another basal plane dislocation; Fig. Figure 7 shows a top view (3) schematically representing a basal plane dislocation in which one end is connected to a screw dislocation and a mechanism for generating another basal plane dislocation; Fig. Figure 8 shows a top view (4) schematically representing a basal plane dislocation in which one end is connected to a screw dislocation and a mechanism for generating another basal plane dislocation; Fig. Figure 9 shows a top view (5) schematically illustrating a basal plane dislocation in which one end is connected to a screw dislocation and a mechanism for generating another basal plane dislocation; Fig. Figure 10 shows a PL (photoluminescence) image (1) of the basal plane dislocation, one end of which is connected to a screw dislocation, and another basal plane dislocation; Fig. Figure 11 shows a PL (photoluminescence) image (2) of the basal plane dislocation, one end of which is connected to a screw dislocation, and another basal plane dislocation; Fig. Figure 12 shows a side view that schematically represents an example of a configuration of a film separator; Fig. Figure 13 shows a side view that schematically represents an example of a configuration of a film separator; Fig. Figure 14 shows a flowchart providing an overview of a process for producing a silicon carbide epitaxy substrate according to an embodiment of the present invention; Fig. Figure 15 shows a time diagram illustrating an example of temperature control and gas flow rate control in a film deposition device; Fig. Figure 16 shows a time diagram illustrating an example of temperature control and gas flow rate control in a film deposition device of a process for producing a silicon carbide epitaxy substrate without a rapid cooling step; Fig. Figure 17 shows a PL image of a dislocation in a silicon carbide epitaxy substrate produced by a silicon carbide epitaxy substrate preparation method without a rapid cooling step; Fig. Figure 18 shows a flowchart providing an overview of a process for manufacturing a silicon carbide semiconductor device according to an embodiment of the present invention; Fig. Figure 19 shows a process diagram (1) of a method for manufacturing a silicon carbide semiconductor device according to an embodiment of the present invention; Fig. Figure 20 shows a process diagram (2) of a method for manufacturing a silicon carbide semiconductor device according to an embodiment of the present invention; Fig. Figure 21 shows a process diagram (3) of a method for manufacturing a silicon carbide semiconductor device according to an embodiment of the present invention. Embodiments of the present invention [Description of the embodiments of the present invention]

[0006] However, it should be noted that the reliability of a semiconductor device decreases if the semiconductor device is fabricated using a silicon carbide epitaxy substrate that has many lattice defects, referred to as dislocations. Therefore, it is desirable to create a dislocation-free silicon carbide epitaxy substrate; however, this is very difficult to achieve. Accordingly, Patent Document 1 discloses a silicon carbide epitaxy substrate with reduced edge dislocation and basal plane dislocation associated with the edge dislocation.

[0007] However, the reliability of the semiconductor device to be manufactured cannot be sufficiently improved in the silicon carbide epitaxy substrate by only reducing the step dislocation and the basal plane dislocation associated with the step dislocation.

[0008] Therefore, it is desirable to create a silicon carbide epitaxy substrate to form a semiconductor device with high reliability.

[0009] Therefore, it is an object of the present invention to provide a silicon carbide substrate and a method for producing a silicon carbide epitaxy substrate which can reduce basal plane dislocation associated with screw dislocation.

[0010] An embodiment for carrying out a method of the present invention is described below. A description of identical elements and the like is omitted, while identical elements are identified by the same reference numerals. [Description of the embodiments of the present invention]

[0011] First, the embodiments of the present invention are listed and described below. In the following drawings, the same or corresponding elements are assigned the same reference numerals, and repetition of descriptions is omitted. Furthermore, with regard to crystallographic designation, a single orientation, a group orientation, a single plane, and a group plane are each represented by [], <>, (), and {}, respectively. In addition, a crystallographically negative index is usually expressed by a number with a bar “-” above it, but in this case, a negative sign is placed before the number. Furthermore, the epitaxial growth of the present invention is homoepitaxial growth.

[0012] [1] A silicon carbide epitaxy substrate according to an embodiment of the present invention comprises a silicon carbide single-crystal substrate having a diameter of 100 mm or more, having a main surface inclined at an angle of more than 0 degrees and less than 8 degrees with respect to a {0001} plane; a silicon carbide epitaxy layer formed on the main surface having a thickness of 20 µm or more; and a basal plane dislocation contained in the silicon carbide epitaxy layer, wherein one end is associated with a screw dislocation contained in the silicon carbide epitaxy layer and the other end is present in a surface of the silicon carbide epitaxy layer, the basal plane dislocation extending in a direction having an inclination of 20 degrees or more and 80 degrees or less with respect to a <11-20> direction into a {0001} basal plane, and wherein the density of the basal plane dislocation is 0.05 / cm2 or less. There is another basal plane dislocation extending in the <11-20> direction, which is connected to the other end of the basal plane dislocation.

[0013] The inventors of the present invention found a basal plane dislocation having one end associated with a screw dislocation and the other end forming a surface of the silicon carbide layer in the silicon carbide epitaxial substrate, which contains a silicon carbide epitaxial layer formed on a silicon carbide single-crystal substrate. The basal plane dislocation has a dislocation line having an inclination of 20 degrees or more and 80 degrees or less with respect to an <11-20> direction in the {0001} plane. According to the inventor's findings of the present invention, it is likely that the basal plane dislocation occurs in a silicon carbide single-crystal substrate with a principal surface inclined at an angle of more than 0 degrees and not less than 8 degrees with respect to a {0001} plane, and in particular with a diameter of 100 mm or more, and furthermore with a diameter of 150 mm or more.If such a basal plane dislocation is present, the number of basal plane dislocations increases, resulting in a silicon carbide epitaxy substrate with many basal plane dislocations. If a semiconductor device is fabricated using a silicon carbide epitaxy substrate containing many such basal plane dislocations, the reliability of the fabricated semiconductor device may deteriorate.

[0014] Thus, in the silicon carbide epitaxy substrate, the number of basal plane dislocations can be controlled to one or more across the entire surface and the density to 0.05 / cm². 2 or less, a deterioration in the reliability of a semiconductor device manufactured using the silicon carbide epitaxy substrate can be prevented.

[0015] Here, the number and density of basal plane dislocations can be calculated by analyzing the entire surface of the silicon carbide epitaxial layer using a photoluminescence (PL) imaging device and dividing the detected number of basal plane dislocations by the surface area of ​​the silicon carbide epitaxial layer. For example, a PLIS-100 PL imaging device (from PHOTON Design Corporation) can be used. The total area described above does not include any region not used for a semiconductor device. For example, the region not used for the semiconductor device is 3 mm from the edge of the substrate.

[0016] [2] The diameter of the silicon carbide single crystal substrate is set to 150 mm or larger.

[0017] [3] A method for manufacturing a silicon carbide semiconductor device comprises a step of manufacturing a silicon carbide epitaxy substrate and a step of processing a silicon carbide epitaxy substrate. [Details of the embodiments of the present invention]

[0018] In the following, an embodiment of the present invention (hereinafter referred to as the "present embodiment") is described with reference to the drawings, although the present invention is not limited to these illustrations. [Silicon carbide epitaxy substrate]

[0019] In the following, a silicon carbide epitaxy substrate 100 according to the present invention is described.

[0020] Fig. Figure 1 shows a cross-sectional view illustrating an example of the structure of the silicon carbide epitaxy substrate according to the present embodiment. The silicon carbide epitaxy substrate according to the present embodiment comprises a silicon carbide single-crystal substrate 10 having a principal surface 10A inclined by a dislocation angle θ with respect to a predetermined crystal plane, and a silicon carbide epitaxy layer 11 formed on the principal surface 10A of the silicon carbide single-crystal substrate 10. The predetermined crystal plane is preferably a (0001) plane or a (000-1) plane.

[0021] The silicon carbide epitaxy substrate 100 according to the present embodiment comprises a basal plane dislocation having one end connected to a screw dislocation and the other end forming a surface of the silicon carbide epitaxy substrate 100. The direction of the dislocation line of this basal plane dislocation has an angle of 20 degrees or more and 80 degrees or less with respect to an <11-20> direction in a {0001} basal plane. The number of basal plane dislocations is one or more, and the dislocation density is 0.05 / cm³. 2 or less.

[0022] With regard to the reliability of semiconductor devices fabricated using a silicon carbide epitaxy substrate, the basal plane dislocation density is preferably kept as low as possible and is ideally 0 (zero). However, since it is quite difficult to achieve a basal plane dislocation of 0, the basal plane dislocation density is preferably 0.05 / cm³. 2 or less, and even more preferably 0.03 / cm² 2 or less. [Basal plane dislocation]

[0023] The previously mentioned basal plane dislocation will be discussed below with reference to Fig. 2 to Fig. 4 described. Fig. Figure 2 shows a top view of the silicon carbide epitaxy substrate 100; Fig. Figure 3 shows a perspective view; and Fig. Figure 4 shows a perspective view with an enlarged main part. One end 111a of the previously mentioned basal plane dislocation 111 is associated with a screw dislocation 120, and the other end 111b forms a surface 11A of the silicon carbide epitaxy layer 11. This basal plane dislocation 111 has an angle ϕ of 20 degrees or more and 80 degrees or less with respect to the <11-20> direction in the {0001} basal plane.

[0024] In such a basal plane dislocation 111, the other end 111b is occasionally connected to another basal plane dislocation 112. The basal plane dislocation 111 and the further basal plane dislocation 112 are the result of research by the inventor of the present application. [Mechanism of dislocation generation]

[0025] The following describes a mechanism and the like for generating the basal plane dislocation 111 with reference to Fig. 5 to Fig. 9 described.

[0026] The silicon carbide epitaxy substrate according to the present embodiment is formed by depositing a silicon carbide epitaxy layer on a silicon carbide single-crystal substrate. The silicon carbide single-crystal substrate comprises a basal plane dislocation and a screw dislocation. Thus, the basal plane dislocation 110 and the screw dislocation 120 occur as shown in Fig. 5 shown, also in the silicon carbide epitaxy layer formed on the silicon carbide single crystal substrate, due to part of the basal plane dislocation and the screw dislocation in the silicon carbide epitaxy substrate.

[0027] The basal plane dislocation 110 generated in the silicon carbide epitaxy layer can slip and move in the <1-100> direction in the {0001} plane. Although the basal plane dislocation 110 shifts and moves in a direction represented by a dashed line arrow A, as shown in Fig. As shown in Figure 6, the displacement movement of the basal plane dislocation 110 thus stops at a position where the basal plane dislocation 110 meets the screw dislocation 120.

[0028] Then it moves, as in Fig. Figure 7 shows a section between the screw dislocation 120 of the basal plane dislocation 110 and the silicon carbide epitaxial layer, as indicated by a dashed line arrow B, until an angle ϕ with respect to the <11-20> direction is 20 degrees or more and 80 degrees or less in the {0001} plane, thereby forming the basal plane dislocation 111. One end 111a of the basal plane dislocation 111 is associated with the screw dislocation 120, and the other end 111b forms the surface of the silicon carbide epitaxial layer. That is, the other end 111b of the basal plane dislocation 111 reaches the surface of the silicon carbide epitaxial layer from the screw dislocation 120 and is such that it is contained within the surface. In this process, a further basal plane dislocation 112 occurs at the other end 111b of the basal plane dislocation 111. The basal plane dislocation 111 and the further basal plane dislocation 112 occur due to the previously mentioned mechanism.

[0029] Subsequently, the further basal plane dislocation 112, as shown by a dashed line arrow C, deviates from the other end 111b of the basal plane dislocation 111, shifts on the {0001} plane and moves in the <1-100> direction, as shown in Fig. Figure 8 shows that the further basal plane dislocation 112 then reappears at the other end 111b of the basal plane dislocation 111, and the basal plane dislocation deviates from the other end 111b of the basal plane dislocation 111, which is repeated. Thus, as shown in Fig. 9 shown, from the single basal plane dislocation 111 many basal plane dislocations.

[0030] Fig. 10 and Fig. Figure 11 shows PL images (PL images) of the silicon carbide epitaxy substrate. A PLIS-100 PL imaging device (from PHOTON Design Corporation) was used to measure the PL images. A mercury-xenon lamp was used as the excitation light source at room temperature, and light passed through a 313 nm bandpass filter was emitted onto a silicon carbide epitaxy substrate. The PL images are those obtained by light originating from the silicon carbide epitaxy substrate and passed through a filter transmitting light with a wavelength of 750 nm or longer. The PL images obtained in this way allow for the investigation of dislocation on the silicon carbide epitaxy layer but do not allow for the investigation of dislocation within the silicon carbide epitaxy substrate. Thus, the images shown in Figure 11 are of a different type. Fig. 10 and Fig. 11 Dislocation from the silicon carbide epitaxy layer shown. Fig. Figure 10 shows a state of an obliquely extending basal plane dislocation 111 coupled to another basal plane dislocation, and Fig. Figure 11 shows a state of a basal plane dislocation 111, which is zigzagged in the <11-20> and <1-100> directions. In the PL image in Fig. In Figure 11, a section in the <1-100> direction of the zigzag basal plane dislocation is represented by a bright line.

[0031] However, when examining the mechanism for generating the aforementioned basal plane dislocation, it is assumed that the dislocation is generated during the cooling of the silicon carbide epitaxial substrate after the deposition of the silicon carbide epitaxial layer, and not during the deposition of the silicon carbide epitaxial layer itself. That is, it is assumed that the displacement motion of the basal plane dislocation 110, which is described in Fig. 6 to Fig. Figure 9 shows that the stress is generated at a relatively high temperature, particularly at 1000 °C or higher, and is assumed to be caused by a stress induced in the silicon carbide epitaxy substrate. In the silicon carbide epitaxy substrate, the stress induced in the silicon carbide epitaxy substrate becomes large when there are large temperature differences. On the other hand, methods for producing a silicon carbide epitaxy layer include a cooling step of the silicon carbide epitaxy substrate, which increases the temperature difference within the substrate. During this cooling step, a stress is likely to occur, particularly within the silicon carbide epitaxy substrate.

[0032] In other words, while the deposition of the silicon carbide epitaxial layer is carried out at a very high temperature of around 1600 °C, the uniformity of the temperature distribution is relatively high in this case. After the deposition of the silicon carbide epitaxial layer, the entire assembly is not cooled to a uniform temperature, so fluctuations in the temperature distribution are likely to occur. Therefore, if a period of temperature fluctuation is long in the silicon carbide epitaxial substrate, it is assumed that basal plane dislocations 111 will appear and the number of other basal plane dislocations 112 will increase. Furthermore, according to the findings of the inventor of the present application, although basal plane dislocations 111 hardly occur in a small substrate of the silicon carbide single-crystal substrate 10, they are highly prevalent in a large substrate.For example, if the size of the silicon carbide single-crystal substrate is 100 mm² or larger, and if, furthermore, the size is 150 mm² (e.g., 6 inches) or larger, it is observed that basal plane dislocations occur strongly. This appears to be due to the fact that the difference in the temperature distribution increases with increasing area of ​​the silicon carbide single-crystal substrate, and that the stress is likely to occur with increasing temperature distribution.

[0033] Accordingly, the silicon carbide epitaxy substrate according to the present embodiment is obtained by rapidly cooling the silicon carbide epitaxy substrate while a gas is blown in after the silicon carbide epitaxy layer has been deposited on it. In other words, by rapidly cooling the silicon carbide epitaxy layer after its deposition, the time until the temperature reaches 1000 °C or lower, at which the displacement movement of the basal plane dislocation and the increase in the basal plane dislocation are rather unlikely to occur, is reduced. Thus, a silicon carbide epitaxy substrate with fewer basal plane dislocations 111 and fewer further basal plane dislocations 112 can be produced. [Film deposition device]

[0034] The following describes a method for producing a silicon carbide epitaxy substrate according to the present embodiment. First, a film deposition device for depositing a silicon carbide epitaxy layer onto the silicon carbide epitaxy substrate is described. Fig. Figure 12 shows a side view that schematically illustrates an example of a film separator configuration. Furthermore, it shows Fig. 13 a cross-sectional view along a dashed line 12A-12B. The film separator 1, which is in Fig. 12 and Fig. Figure 13 shows a lateral hot-wall CVD (chemical vapor deposition) device. As shown in Fig. As shown in Figure 12, the film deposition device 1 comprises a heating element 6, a thermal insulator 5, a quartz tube 4, and an induction heating coil 3. The heating element 6 is, for example, made of carbon. As shown in Fig. As shown in Figure 13, two heating elements 6 are provided in the film deposition device 1, and each of the heating elements 6 has a hollow structure shaped as a half-cylinder, comprising a curved section 6A and a flat section 6B. The two flat sections 6B are arranged facing each other, and a space surrounded by the two flat sections 6B forms a chamber 1A into which a silicon carbide single-crystal substrate 10 is placed. The chamber 1A is referred to as a “gas flow channel”.

[0035] The thermal insulator 5 is arranged to surround the outer circumferential sections of the heating elements 6. Chamber 1A is insulated from the outside of the film deposition device 1 by the thermal insulator 5. The quartz tube 4 is arranged to surround the outer circumferential sections of the thermal insulators 5. The induction heating coil 3 is wound around the outer circumferential section of the quartz tube 4. In the film deposition device 1, the heating elements are inductively heated by supplying an alternating current to the induction heating coil 3, thereby controlling the temperature in chamber 1A. The quartz tube 4 is hardly heated in the process, as the thermal insulators 5 insulate against the heat. [Method for the production of the silicon carbide epitaxy substrate]

[0036] The following describes a method for producing a silicon carbide epitaxy substrate according to the present embodiment.

[0037] Fig. Figure 14 shows a flowchart providing an overview of the process for producing the silicon carbide epitaxy substrate according to the present embodiment. As shown in Fig. As shown in Figure 14, the process for producing the silicon carbide epitaxy substrate of the present embodiment comprises a production step (S101), a pressure relief step (S102), a temperature increase step (S103), a hydrogen gas supply step (S104), an epitaxy growth step (S105), and a rapid cooling step (S106). According to the present embodiment, the basal plane dislocation in the silicon carbide single-crystal substrate 10 can be reduced by performing the rapid cooling step (S106) after the epitaxy growth step (S105). Each step is described below.

[0038] In manufacturing step (S101), a silicon carbide single-crystal substrate 10 is produced by cutting an ingot from, for example, a silicon carbide single crystal. For example, a wire saw is used for cutting. Preferably, a 4H polytype silicon carbide is used. This is because the 4H polytype is superior to other polytypes with respect to electron mobility, dielectric strength, and the like. The diameter of the silicon carbide single-crystal substrate 10 is 100 mm or more, and preferably 150 mm or more (for example, 6 inches or more). The larger the diameter, the more efficiently the manufacturing costs are reduced.

[0039] The silicon carbide single-crystal substrate 10 comprises a principal surface 10A on which a silicon carbide epitaxial layer 11 is subsequently grown. The silicon carbide single-crystal substrate 10 has a tilt angle greater than 0 degrees and not more than 8 degrees. In other words, the principal surface 10A is a surface inclined by a tilt angle θ greater than 0 degrees and not more than 8 degrees with respect to a predetermined crystal plane. By forming the tilt angle θ in the silicon carbide single-crystal substrate 10, a lateral directional growth of an atomic step is induced from the principal surface 10A during the growth of the silicon carbide epitaxial layer 11 by a CVD process; this step-flow growth is so-called. In this way, a single crystal is grown while maintaining one polytype of the silicon carbide single crystal substrate 10, thus preventing the mixing in of another polytype part.Herein, the predetermined crystal plane is preferably a (0001) plane or a (000-1) plane. In other words, the predetermined crystal plane is preferably a {0001} plane. One direction in which a deviation angle is formed is an <11-20> direction. The deviation angle θ is more preferably set to 2 degrees or more and 7 degrees or less, and more preferably to 3 degrees or more and 6 degrees or less, and more preferably to 3 degrees or more and 5 degrees or less. By setting the deviation angle in such a range, a balance can be maintained between preventing the formation of another polytype and maintaining a growth rate. The following steps are carried out in the film deposition device 1.

[0040] In the pressure relief step (S102), the silicon carbide single-crystal substrate 10 is placed in chamber 1A of the film deposition device 1, as shown in Fig. 12 and Fig. Figure 13 shows the process, and the pressure in chamber 1A is reduced. The silicon carbide single-crystal substrate 10 is placed on a susceptor (not shown in the drawings) in chamber 1A. The susceptor may be coated with a SiC coating or the like.

[0041] Fig. Figure 15 shows a time diagram illustrating the control of temperature and gas flow in chamber 1A after the pressure relief step (S102). Fig. The pressure relief step (S102) corresponds to a time period from time t1, when the pressure relief of chamber 1A begins, to time t2, when the pressure in chamber 1A reaches a setpoint after the silicon carbide single-crystal substrate 10 has been placed in chamber 1A. The setpoint of the pressure in the pressure relief step (S102) is, for example, approximately 1 × 10 -6 Pa.

[0042] In the temperature increase step (S103), the temperature in chamber 1A of the film deposition device 1 is heated to a second temperature T2. In the temperature increase step (S103), after exceeding a first temperature T1, which is lower than the second temperature T2, the temperature reaches the second temperature T2. As in Fig. As shown in Figure 15, the temperature increase begins at time t2; the temperature in chamber 1A reaches the first temperature T1 at time t3; and the temperature in chamber 1A further reaches the second temperature T2 at time t4. The first temperature T1 is, for example, 1100 °C.

[0043] Furthermore, the second temperature T2 is preferably 1500 °C or more and 1700 °C or less. If the second temperature T2 is below 1500 °C, it can be difficult to grow an interventional part uniformly in a subsequently described epitaxy growth step (S105), and the growth temperature may decrease. Moreover, if the second temperature T2 exceeds 1700 °C, the corrosive effect of the hydrogen gas becomes very strong, and the growth rate may decrease further. The second temperature T2 is even more preferably 1520 °C or more and 1680 °C or less, and even more preferably 1550 °C or more and 1650 °C or less. According to the present embodiment, the second temperature T2 is 1630 °C.

[0044] In the hydrogen gas supply step (S104), as described in Fig. As shown in Figure 15, hydrogen (H2) gas is introduced into chamber 1A from time t3 when the temperature in chamber 1A reaches the first temperature T1, and the pressure in chamber 1A is set to a predetermined pressure, for example, 8 kPa. The introduction of hydrogen gas begins at time t3, and the flow rate of the hydrogen gas gradually increases such that the flow rate of the hydrogen gas is 120 slm at time t4. Even during the hydrogen introduction step (S104), the temperature increase step (S103) continues until the temperature in chamber 1A of the film deposition device 1 reaches the second temperature T2. After the temperature in chamber 1A of the film deposition device 1 has reached the second temperature T2, the epitaxy growth step (S105) is carried out.

[0045] In the epitaxy growth step (S105), hydrocarbon gas and silane gas (SiH4) are introduced into chamber 1A of the film deposition device 1 containing hydrogen gas. The predetermined pressure in chamber 1A during the epitaxy growth step (S105) is, for example, 8 kPa. This allows the silicon carbide epitaxy layer 11 to grow on the main surface 10A of the silicon carbide single-crystal substrate 10.

[0046] The hydrocarbon gases that can be used are methane (Ch4) gas, ethane (C2H6) gas, propane (C3H8) gas, butane (C4H6) 40Hydrocarbon gas, acetylene (C2H2) gas, and similar gases can be used. Of these hydrocarbon gases, a single type can be used alone, or a mixed gas formed by combining two or more types can be used. In other words, the hydrocarbon gas preferably comprises one or more gases selected from the group consisting of methane, ethane, propane, butane, and acetylene. The flow rate of the hydrocarbon gas is preferably 5 sccm or more and 30 sccm or less. In the present embodiment, for example, propane is supplied as the hydrocarbon gas at a flow rate of 15 sccm.

[0047] Furthermore, the flow rate of the silane gas is not particularly restricted, but it is preferably adjusted such that the ratio (C / Si) of the number of carbon (C) atoms contained in the hydrocarbon gas to the number of silicon (Si) atoms contained in the silane gas is 0.5 or more and 2.0 or less. This is because SiC, which has a suitable stoichiometric mixing ratio, grows by epitaxial growth. According to the present embodiment, for example, silane gas is supplied at 45 sccm.

[0048] In the epitaxy growth step (S105), nitrogen (N2) and similar substances can be supplied as a dopant. The epitaxy growth step (S105) is carried out until time t5, during which time the target thickness of the silicon carbide epitaxy layer 11 is set.

[0049] After completion of the epitaxial growth step (S105), the rapid cooling step (S106) is performed. In the rapid cooling step (S106), the silicon carbide epitaxial substrate is rapidly cooled by blowing hydrogen or argon (Ar) onto it after epitaxial growth has ceased. According to the present embodiment, the flow rate of hydrogen gas is increased, and hydrogen gas is blown onto the silicon carbide epitaxial substrate after epitaxial growth has ceased. During this step, the pressure in chamber 1A may exceed 8 kPa. According to the present embodiment, a third temperature T3 can be set to approximately 700 °C at time t6, ten minutes after time t5.Therefore, after epitaxial growth, since the temperature can be set to 1000 °C or less within a short period of ten minutes or less, displacement of the basal plane dislocation is unlikely to occur. Thus, according to the present embodiment, the density of the basal plane dislocation 111 in the silicon carbide epitaxial substrate can be reduced to 0.05 / cm³. 2 or less determined.

[0050] The silicon carbide epitaxy substrate is then further cooled, and the supply of hydrogen gas is stopped at time t7 when the temperature reaches 600 °C. After the silicon carbide epitaxy substrate has cooled to time t7, when it reaches a temperature at which the formed silicon carbide epitaxy substrate can be removed from chamber 1A, the interior of chamber 1A is opened to allow atmospheric pressure to return to the ambient pressure, and the silicon carbide epitaxy substrate 100 is removed from chamber 1A.

[0051] The silicon carbide epitaxy substrate 100 according to the present embodiment can be produced by the steps mentioned above.

[0052] For comparison with the present embodiment, a case involving the cooling of a substrate is described below in which an epitaxial growth step was completed without performing the rapid cooling step (S106), which differs from the manufacturing process of the present embodiment. Fig. Figure 16 shows a time diagram illustrating the control of a temperature in chamber 1A and a flow rate during and after the pressure relief step in this case. A manufacturing process differing from the present embodiment in Fig. 15. A distinguishing aspect is that cooling is normally performed without rapidly cooling the silicon carbide epitaxy substrate on which epitaxial growth ceased after time t5 following the completion of the epitaxial growth step. In particular, according to the time diagram in Fig. 16. Cooling is carried out while the flow rate of the hydrogen gas is set to 100 slm from time t5, when epitaxial growth has ceased. The predetermined pressure in chamber 1A is, for example, 8 kPa. In this case, the temperature at time t16, after ten minutes have elapsed since time t5, is approximately 1200 °C, and not less than 1000 °C. Thus, at time t16, the basal plane dislocation shifts and moves, and it is assumed that basal plane dislocation 111 and the further basal plane dislocation 112 increase.

[0053] Cooling then continues, and the supply of hydrogen gas is stopped at time t17 when the temperature reaches 600 °C. After the silicon carbide epitaxy substrate has cooled to time t18, at which point it can be removed, the interior of chamber 1A is opened to the atmosphere, allowing the pressure inside to return to atmospheric pressure, and the silicon carbide epitaxy substrate is then removed from chamber 1A.

[0054] In Fig. Figure 17 shows a PL image of the silicon carbide epitaxy substrate produced using the previously mentioned manufacturing process of the in Fig. The time diagram shown in 16 is produced. Since in the Fig. In the 16 manufacturing processes shown, where the temperature is approximately 1200 °C, and thus not less than 1000 °C, the basal plane dislocations shift and move, even if ten minutes have passed since the end of epitaxial growth, and it is shown that a very large number of dislocations (approximately 40 / cm²) 2 ) are present, as in Fig. 17 shown.

[0055] According to the method for producing the silicon carbide epitaxial substrate of the present embodiment, rapid cooling of the silicon carbide epitaxial substrate after epitaxial growth can reduce the temperature to 1000 °C or less, at which it is unlikely that the basal plane dislocations will shift and move within a short time. Thus, the number of basal plane dislocations can be reduced compared to that in Fig. The silicon carbide epitaxy substrate shown in 17 can be further reduced. [Method for manufacturing a silicon carbide semiconductor device]

[0056] The following describes a method for manufacturing a silicon carbide semiconductor device 300 according to the present embodiment.

[0057] The method for manufacturing the silicon carbide semiconductor device according to the present embodiment essentially comprises an epitaxial substrate manufacturing step (S210: Fig. 18) and a substrate processing step (S220: Fig. 18).

[0058] First, the silicon carbide epitaxy substrate fabrication step (S210: Fig. 18) carried out. In particular, the silicon carbide epitaxy substrate is produced by the previously mentioned silicon carbide epitaxy substrate preparation method.

[0059] The substrate processing step (S220:) is then carried out. Fig. 18) is carried out. In particular, the silicon carbide semiconductor device is manufactured by processing the silicon carbide epitaxy substrate. During the “processing,” for example, a variety of steps are carried out, such as an ion implantation step, a heat treatment step, an etching step, an oxide film formation step, an electrode formation step, and a singulation step. In other words, the substrate processing step can include at least one step from the ion implantation step, the heat treatment step, the etching step, the oxide film formation step, the electrode formation step, and the singulation step.

[0060] The following describes a method for fabricating a MOSFET (metal oxide semiconductor field-effect transistor), which is an example of a silicon carbide semiconductor device. The substrate processing step (S220: Fig. 18) includes an ion implantation step (S221: Fig. 18), an oxide film formation step (S222, Fig. 18), an electrode formation step (S223: Fig. 18) and a singulation step (S224: Fig. 18).

[0061] First, the ion implantation step (S221: Fig. 18) is carried out. For example, p-type impurities, such as aluminum (Al), are introduced. This creates a body region 232 with a p-type conductivity. Subsequently, n-type impurities, such as phosphorus (P), are introduced at a predetermined position in the body region 232. In this way, a source region 233 with an n-type conductivity is created. Subsequently, p-type impurities, such as aluminum, are introduced at a predetermined position in the body region 232. In this way, a contact region 234 with a p-type conductivity is created (see Fig. 19).

[0062] In the silicon carbide epitaxy layer 11, a region other than the body region 232, the source region 233, and the contact region 234 becomes a drift region 231. The source region 233 is separated from the drift region 231 by the body region 232. Ion implantation can be carried out by heating the silicon carbide epitaxy substrate 100 to approximately 300 °C to approximately 600 °C. After ion implantation, an activation annealing step is performed on the silicon carbide epitaxy substrate 100. The impurities introduced into the silicon carbide epitaxy layer 11 are activated by the activation annealing step, and a carrier is generated in each region. An atmosphere for the activation annealing can be an argon (Ar) atmosphere. An activation annealing temperature can be, for example, approximately 1800 °C. The activation glow phase can last approximately 30 minutes.

[0063] The oxide film formation step (S222:) is then carried out. Fig. 18). For example, by heating the silicon carbide epitaxy substrate 100 in an oxygen-containing atmosphere, an oxide film 236 is formed on a surface 11A (see Fig. 20). The oxide film 236 is formed, for example, from silicon dioxide (SiO2) and the like. The oxide film 236 serves as a gate insulating film. The temperature of the thermal oxidation process can be, for example, about 1300 °C. The duration of the thermal oxidation step can be, for example, 30 minutes.

[0064] After the formation of the oxide film 236, further heat treatment can be carried out in a nitrogen environment. For example, the heat treatment can be performed in an atmosphere of nitric oxide (NO) and nitrogen oxide (N₂O) at 1100 °C for approximately one hour. Subsequently, heat treatment can be carried out in an argon atmosphere. For example, the heat treatment can be performed at approximately 1100 to approximately 1500 °C in the argon atmosphere for approximately one hour.

[0065] The electrode formation step (S223:) is then carried out. Fig. 18) carried out. The first electrode 241 is formed on the oxide film 236. The first electrode 241 serves as a gate electrode. The first electrode 241 is formed, for example, by a CVD process. The first electrode 241 is formed, for example, from polysilicon containing impurities and exhibiting conductivity. The first electrode 241 is formed at a position opposite the source region 233 and the body region 232.

[0066] The intermediate insulating film 237, which covers the first electrode 241, is then formed. The intermediate insulating film 237 is formed, for example, by a CVD process. The intermediate insulating film 237 is, for example, made of silicon dioxide. The intermediate insulating film 237 is formed such that it contacts the first electrode 241 and the oxide film 236. Consequently, the oxide film 236 and the intermediate insulating film 237 are removed at predetermined positions by etching. In this way, the source region 233 and the contact region 234 are exposed from the oxide layer 236.

[0067] For example, a second electrode 242 is formed on the exposed section by a sputtering process. The second electrode area 242 serves as the source electrode. The second electrode 242 is made of, for example, titanium, aluminum, silicon, and the like. After the formation of the second electrode, the second electrode 242 and the silicon carbide epitaxy substrate 100 are heated to, for example, approximately 900 to 1100 °C. Thus, the second electrode 242 and the silicon carbide epitaxy substrate 100 are in contact with each other to form an ohmic contact. Subsequently, an intermediate compound layer 238 is formed such that it is in contact with the second electrode 242. The intermediate compound layer 238 is made of, for example, an aluminum-containing material.

[0068] Subsequently, a passivation protection film (not shown in the drawing) is formed on the interlink layer 238, for example, by plasma-CVD. The passivation protection film contains, for example, a SiN film. A portion of the passivation protection film is etched down to the interlink layer 238, and an opening is created in the passivation protection film to connect a bond wire. A back-grinding step is then performed on the back face 10A of the silicon carbide single-crystal substrate 10. This thins the silicon carbide single-crystal substrate 10. A third electrode 243 is then formed on the back face 10B. The third back face 243 serves as a drain electrode. The third electrode 243 is formed, for example, from an alloy containing nickel and silicon (e.g., NiSi and the like).

[0069] Then a singulation step is performed (S224: Fig. 18) carried out. For example, the silicon carbide epitaxy substrate 100 is divided into a plurality of semiconductor chips by singulating the silicon carbide epitaxy substrate 100 along the singulation lines. In this way, a silicon carbide semiconductor device 300 is produced (see Fig. 21).

[0070] The above description covers the method for fabricating the silicon carbide semiconductor device using a MOSFET, but the fabrication method according to the present invention is not limited to this. The fabrication method according to the present invention can, for example, be applied to a variety of silicon carbide semiconductor devices, such as an IGBT (an insulated-gate bipolar transistor), an SBD (Schottky diode), a thyristor, a GTO (gate turn-off thyristor), and a PiN diode. Reference symbol list 1 film separator 1A Chamber 3 induction heating coils 4 quartz tubes 5 Thermal insulation material 6 heating element 6A Curvature section 6B Flat section 10 Silicon carbide single crystal substrate 10A Main area 10B Back surface 11 Silicon carbide epitaxial layer 11A Surface 100 silicon carbide epitaxy substrate 110 Basal plane displacement 111 Basal plane displacement 111a an end 111b other end 112 further basal plane displacements 120 screw displacement 231 Drift range 232 Body area 233 Source area 234 Contact area 236 Oxide film 237 Interlayer insulating film 238 Interconnect layer 241 first electrode 242 second electrode 243 third electrode

Claims

[1] Silicon carbide epitaxy substrate (100), comprising: a silicon carbide single crystal substrate (10) with a diameter of 100 mm or larger and with a principal surface (10A) inclined at an angle of more than 0 degrees and not more than 8 degrees with respect to a {0001} plane; a silicon carbide epitaxy layer (11) formed on the main surface (10A) and having a thickness of 20 µm or more; a basal plane dislocation (110, 111) contained in the silicon carbide epitaxy layer (11), wherein one end (111a) is connected to a screw dislocation (120) contained in the silicon carbide epitaxy layer (11) and the other end (111b) is present in a surface (11A) of the silicon carbide epitaxy layer (11), and a further basal plane dislocation (112) extending in the <11-20> direction and connected to the other end (111b) of the basal plane dislocation (110, 111), wherein the basal plane dislocation (110, 111) extends in a direction with an inclination of 20 degrees or more and 80 degrees or less with respect to a <11-20> direction in a {0001} basal plane, and where the density of the basal plane dislocation (110, 111) is 0.05 / cm 2 or less. [2] Silicon carbide epitaxy substrate (100) according to claim 1, wherein the diameter of the silicon carbide single crystal substrate (10) is set to 150 mm or larger. [3] Method for manufacturing a silicon carbide semiconductor device, comprising: a step for the production of a silicon carbide epitaxy substrate (100) according to claim 1 or 2, and a step to process a silicon carbide epitaxy substrate (100).

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