Method for producing a wafer

Abstract

A method of manufacturing a wafer as a product, comprising the steps of: Grinding and chamfering a peripheral edge portion of a wafer cut from a single crystal ingot; Lapping or double-sided grinding of the main surfaces of the chamfered wafer; Etching the lapped or double-sided ground wafer; single-sided or double-sided mirror polishing of the main surfaces of the etched wafer; and Mirror polishing a chamfered portion of the mirror polished wafer, wherein after the chamfering step, the chamfered portion of the wafer has a cross-sectional shape comprising: a first inclined portion extending from a first main surface, which is one of the main surfaces of the wafer, and inclined relative to the first main surface; a first arc portion which is an arc-shaped portion extending from the first inclined portion and having a radius of curvature R1; a second inclined portion extending from a second main surface, which is another main surface of the wafer, and inclined relative to the second main surface; a second arc portion which is an arc-shaped portion extending from the second inclined portion and having a radius of curvature R2; and an end portion connecting the first arc portion to the second arc portion and forming an outermost peripheral end portion of the wafer, during chamfering, the wafer to be a product is chamfered such that the chamfered wafer has R1 and R2 that are smaller than a target value range of R1 and R2 of the wafer product, and while mirror polishing the chamfered portion, the chamfered portion is mirror polished so that the mirror polished chamfered portion has R1 and R2 which are within the target value range of R1 and R2 of the wafer product, thereby manufacturing the wafer product.

Description

TECHNICAL FIELD

[0001] The present invention relates to a method for producing a wafer. STATE OF THE ART

[0002] In a method for manufacturing a semiconductor wafer, the following steps are generally performed sequentially: (a) a dicing step for cutting a thin wafer from a single crystal ingot, (b) a chamfering step for preventing cracking in an outer peripheral portion of the wafer, (c) a lapping step or a double-side grinding step for eliminating the thickness variation of the wafer, (d) an etching step for removing processing damage or impurities introduced by chamfering, lapping, or grinding, (e) a mirror polishing step for polishing one or both major surfaces of the wafer to a mirror finish, and (f) a mirror polishing step for polishing the chamfered portion to a mirror finish.

[0003] The etching step includes, for example, acid etching using a mixed acid containing hydrofluoric acid, nitric acid, acetic acid, and the like, and alkali etching using an alkali such as sodium hydroxide or potassium hydroxide.

[0004] Acid etching has the advantage that the etching rate and surface condition can be easily controlled, but also has the disadvantage that its high etching rate reduces the flatness of the wafer, which was improved by lapping and double-sided grinding.

[0005] Meanwhile, alkali etching can maintain the flatness of the wafer due to its low etching rate and has an advantage that a wafer with excellent flatness can be obtained after etching.

[0006] Recently, alkali etching has been widely used to meet the high flatness requirements. LIST OF CITING PATENTS LITERATURE Patent document 1: WO 2008 / 093488 A1 Patent document 2: JP 2015 - 153999 A Patent document 3: JP 2001 - 334 448 A Patent document 4: JP 2004 - 319 910 A SUMMARY OF THE INVENTIONTECHNICAL PROBLEM

[0007] However, since the etching rate varies depending on the crystal orientation, especially in alkali etching, the etching extents of the outermost circumferential and curved portions of the chamfered section vary depending on the crystal orientation angle. As a result, the chamfered cross-sectional shape varies from location to location in the circumferential direction.

[0008] However, the material removal during mirror polishing of the chamfered section in the subsequent process is uniform in the circumferential direction. Thus, the dimensional variation in the chamfered cross-sectional shape caused by alkali etching in the circumferential direction remains. This creates the problem of preventing a uniform chamfered cross-sectional shape in the circumferential direction.

[0009] In view of the problem described above, it is an object of the present invention to provide a method for manufacturing a wafer which can suppress a variation of a chamfered cross-sectional shape in the circumferential direction caused by etching. SOLUTION TO THE PROBLEM

[0010] The present invention has been made to solve the problem and provides a method for manufacturing a wafer as a product, comprising the steps of: Grinding and chamfering a peripheral edge portion of a wafer cut from a single crystal ingot; Lapping or double-sided grinding of the main surfaces of the chamfered wafer; Etching the lapped or double-sided ground wafer; single-sided or double-sided mirror polishing of the main surfaces of the etched wafer; and Mirror polishing a chamfered portion of the mirror polished wafer, wherein after the chamfering step, the chamfered portion of the wafer has a cross-sectional shape comprising: a first inclined portion extending from a first main surface, which is one of the main surfaces of the wafer, and inclined relative to the first main surface; a first arc portion which is an arc-shaped portion extending from the first inclined portion and having a radius of curvature R1; a second inclined portion extending from a second main surface, which is another main surface of the wafer, and inclined relative to the second main surface; a second arc portion which is an arc-shaped portion extending from the second inclined portion and having a radius of curvature R2; an end portion connecting the first arc portion to the second arc portion and forming an outermost peripheral end portion of the wafer, during chamfering, the wafer to be a product is chamfered such that the chamfered wafer has R1 and R2 that are smaller than a target value range of R1 and R2 of the wafer product, and during the mirror polishing of the chamfered portion, the chamfered portion is mirror polished so that the mirror polished chamfered portion has R1 and R2 which are within the target value range of R1 and R2 of the wafer product, thereby manufacturing the wafer product.

[0011] Such a wafer manufacturing method enables the production of a wafer product having R1 and R2 within the target range, wherein the wafer has a uniform, chamfered cross-sectional shape in the circumferential direction compared to wafers manufactured by conventional techniques.

[0012] In addition, chamfering is preferably performed so that R1 and R2 are within a range of 50 µm or more and 200 µm or less.

[0013] By performing chamfering to reach such a range, it is possible to more effectively achieve the uniformity of the chamfered cross-sectional shape in the circumferential direction in the wafer product.

[0014] Furthermore, in the method for producing a wafer, etching may be performed using an alkaline aqueous solution.

[0015] Such etching using an alkaline aqueous solution makes it easy to maintain the flatness of the main surfaces of the wafer. Furthermore, the inventive wafer manufacturing method can be particularly suitably used when alkaline etching is performed using an alkaline aqueous solution, which may affect the distribution of a chamfered cross-sectional shape in the wafer circumferential direction.

[0016] In addition, the single crystal ingot can be a single crystal silicon ingot.

[0017] The inventive method for producing a wafer can be particularly suitably used in a process for producing a single-crystalline silicon wafer obtained from a single-crystalline silicon ingot. ADVANTAGEOUS EFFECTS OF THE INVENTION

[0018] The inventive wafer manufacturing method makes it possible to produce a wafer product with R1 and R2 within a target value range, while maintaining a uniform, chamfered cross-sectional shape in the circumferential direction compared to wafers manufactured using conventional techniques. In particular, it is possible to produce a wafer with a uniform, chamfered cross-sectional shape in the circumferential direction even when etching is performed with an alkali, which may impair the chamfered cross-sectional shape in the wafer circumferential direction. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a flowchart showing an example of a method for manufacturing a wafer according to the present invention. Fig. 2 is a graph showing changes in the dimensions of an R1 value and an R2 value of the chamfered cross-sectional shape in the circumferential direction after chamfering according to Example 1. Fig. 3 is a graph showing changes in the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape in the circumferential direction after etching according to Example 1. Fig. 4 is a graph showing changes in the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape in the circumferential direction after a chamfered portion was mirror-polished according to Example 1. Fig. 5 is a graph showing changes in the dimension of a BC value of a cross-sectional shape in the circumferential direction after the chamfered portion was mirror-polished according to Example 1. Fig. 6 is a graph showing dimensional changes of an R1 value and an R2 value of the chamfered cross-sectional shape in a circumferential direction after chamfering according to Example 2. Fig. 7 is a graph showing changes in the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape in the circumferential direction after etching according to Example 2. Fig. 8 is a graph showing changes in the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape in the circumferential direction after a chamfered portion was mirror-polished according to Example 2. Fig. 9 is a graph showing changes in the dimension of a BC value of a chamfered cross-sectional shape in the circumferential direction after the chamfered portion was mirror-polished according to Example 2. Fig. 10 is a graph showing changes in dimensions of an R1 value and an R2 value of the chamfered cross-sectional shape in the circumferential direction after chamfering according to Comparative Example. Fig. 11 is a graph showing changes in the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape in the circumferential direction after etching according to Comparative Example. Fig. 12 is a graph showing changes in the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape in the circumferential direction after a chamfered portion according to Comparative Example was mirror-polished. Fig. 13 is a graph showing changes in a dimension of a BC value of a chamfered cross-sectional shape in the circumferential direction after the chamfered portion was mirror-polished according to Comparative Example. Fig. Figure 14 is a schematic sectional view for explaining the R1 value, R2 value and BC value of the chamfered cross-sectional shape. DESCRIPTION OF EMBODIMENTS

[0019] Embodiments of the present invention will be described below. However, the present invention is not limited thereto.

[0020] As described above, a wafer manufacturing method capable of solving the problem of circumferential variation of a chamfered cross-sectional shape caused by etching, particularly alkali etching, has been sought.

[0021] The present inventor has seriously considered the above-described problem. Consequently, the inventor has found that the above-mentioned problem can be solved by the following method: a chamfering step in which processing is performed so that the resulting arc portions have radii of curvature of R1 and R2 that are smaller than R1 and R2 values within a specification range of the chamfered shape in a final wafer; and a mirror-polishing step of the chamfered portion in which mirror-polishing is performed so that the resulting R1 and R2 values are within the specification range. This finding has led to the completion of a wafer manufacturing method of the present invention.

[0022] Various countermeasures have been proposed to address the problem that alkali etching causes an uneven chamfered cross-sectional shape at a wafer peripheral edge portion (e.g., Patent Documents 1 and 2). However, unlike the present invention, R1 and R2 in the chamfering stage were conventionally set to be no smaller than a specification of a finished wafer. In particular, in the conventional approach, in order to ensure that R1 and R2 of the arc portions of a final wafer are within a specification range, the arc portions immediately after chamfering are designed to have R1 and R2 equivalent to those of the finished wafer; meanwhile, the step of mirror-polishing the chamfered portion is performed so that R1 and R2 of the arc portions are not greatly changed.

[0023] The present invention will be described in more detail below with reference to the drawings. Fig. 1 is a flow chart for explaining an example of the inventive method for manufacturing a wafer.

[0024] First, as in Fig. 1(1), a single-crystal ingot is sliced to obtain a sliced wafer (step 1). In this case, a single-crystal silicon ingot can be used as the single-crystal ingot. The inventive wafer manufacturing method can be particularly suitably used in a method for manufacturing a semiconductor wafer, in particular, a single-crystal silicon wafer obtained from a single-crystal silicon ingot.

[0025] Next, as in Fig. 1(2), a peripheral edge portion of the wafer cut from the single crystal ingot in the above-described step 1 is ground and chamfered (step 2).

[0026] For this purpose, the cross-sectional shape of the chamfered portion of the wafer after the chamfering step (chamfered cross-sectional shape) is determined with reference to Fig. 14 described. Fig. 14 shows a wafer peripheral edge portion 11. The wafer has two main surfaces 21, 22. For convenience, one of the main surfaces is referred to as the first main surface 21, and another main surface is referred to as the second main surface 22. The chamfered cross-sectional shape includes: a first inclined portion 31 extending from the first main surface 21, which is one of the main surfaces of the wafer, and inclined relative to the first main surface 21; and a first arc portion 41, which is an arcuate portion extending from the first inclined portion 31 and has a radius of curvature R1.Furthermore, this chamfered cross-sectional shape includes: a second chamfered portion 32 extending from the second main surface 22, which is another main surface of the wafer, and inclined relative to the second main surface 22; and a second arc portion 42, which is an arc-shaped portion extending from the second chamfered portion 32 and has a radius of curvature R2. Furthermore, the chamfered cross-sectional shape includes an end portion 51 connecting the first arc portion 41 to the second arc portion 42 and forming an outermost peripheral end portion of the wafer. The end portion 51 may be substantially flat.

[0027] For this purpose, R1 is below the dimensions of the Fig. 14, the radius of curvature of the first arc portion 41 as described above is R2, and the radius of curvature of the second arc portion 42 as described above is R2. A further dimension of the chamfered cross-sectional shape can be defined as a "BC value." This BC value indicates a thickness of a wafer at a position 50 µm from the outermost circumferential end of the wafer toward the inside of the wafer (see Fig. 14).

[0028] In the present invention, in this chamfering step 2, the wafer to be a product is chamfered so that the chamfered wafer has R1 and R2 smaller than a target value range (ie, wafer product specification) of R1 and R2 of the wafer product.

[0029] For example, when the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are predetermined to be 250 μm or more and 300 μm or less in a specification of a final wafer product, chamfering is performed in the chamfering stage so that the resulting R1 value and the resulting R2 value are less than 250 μm. In the present invention, it is preferable to grind and chamfer the peripheral edge portion of the sliced wafer so that the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are specifically within a range of 50 μm or more and 200 μm or less. In this case, the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are more preferably 50 μm or more and 150 μm or less. In addition, the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are particularly preferably 50 µm or more and 100 µm or less.

[0030] In the present invention, the smaller the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape, the more preferable it is from the viewpoint that circumferential fluctuation of a chamfered cross-sectional shape caused by etching (particularly alkali etching) can be further suppressed. On the other hand, the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are preferably 50 μm or more as described above in order to suppress cracking, chipping, and breakage from the wafer outer periphery in processing steps performed after chamfering, as well as cracking, chipping, and breakage from the wafer outer periphery due to contact between the wafer and a handling device.

[0031] After the chamfering step 2 described above, the main surfaces of the chamfered wafer are then, as in Fig. 1(3) (step 3), lapped or double-sided ground.

[0032] Next, the lapped or double-sided ground wafer is etched as shown in Fig. 1(4) (Step 4) to eliminate processing damage caused by processing such as chamfering and / or lapping. In this case, etching is preferably performed using an alkaline aqueous solution. As the alkaline aqueous solution, a sodium hydroxide aqueous solution or a potassium hydroxide aqueous solution can be suitably used. In this way, when etching is performed with an alkaline aqueous solution such as a sodium hydroxide aqueous solution or a potassium hydroxide aqueous solution, etching can be performed while relatively suppressing shape change of the wafer main surfaces by etching, so that a flatter wafer can be obtained.

[0033] As described above, etching anisotropy during alkali etching on a wafer causes fluctuation of a chamfered cross-sectional shape in the circumferential direction. However, as in the present invention, the smaller the dimensions of the R1 value and R2 value of the chamfered cross-sectional shape after chamfering, the more the circumferential fluctuation of a chamfered cross-sectional shape caused by alkali etching can be suppressed.

[0034] Next, as in Fig. 1(5), the main surfaces of the etched wafer are subjected to single-sided or double-sided mirror polishing (step 5).

[0035] Next, as in Fig. As shown in Figure 1(6), a chamfered portion of the wafer with the mirror-polished main surface(s) is mirror-polished (step 6). During this mirror-polishing of the chamfered portion, the processing is performed such that the resulting R1 and the resulting R2 are within the target range of R1 and R2 of the wafer product. This mirror-polishing of the chamfered portion in step 6 makes it possible to enlarge the small R1 and R2 formed by chamfering in step 2. Thus, even if the R1 and R2 formed in step 2 are smaller than the specification of the finished wafer product, the R1 and R2 can be within the specification range in step 6.

[0036] Next, as in Fig. 1(7), the main surface(s) of the wafer may be subjected to final polishing if required (step 7).

[0037] Following the steps described above, the wafer product is manufactured. Such a wafer manufacturing method as described above can solve the conventional problem of circumferential chamfered cross-sectional shape variation caused particularly by alkali etching, and can produce a wafer with a precise chamfered shape with less variation.

[0038] As described above, the present invention should include: the chamfering step, in which R1 and R2 are set smaller than the target value range of the final wafer product, and the mirror polishing step of the chamfered portion, in which mirror polishing is performed so that the resulting R1 value and the resulting R2 value are within the target value range. The inventive method may include various steps other than these steps. For example, if necessary, a cleaning step, a heating step, or the like may be performed before and after each of the above-described steps according to conventional methods. EXAMPLE

[0039] In the following, the present invention will be described in more detail with reference to Examples and Comparative Examples. However, the present invention is not limited to these Examples. It is noted that all the Fig. The measured values shown in Figures 2 to 13 were measured using an edge profile measuring device LEP manufactured by KOBELCO Research Institute, Inc. (Example 1)

[0040] A wafer was manufactured as follows while setting the target values of R1, R2 of the finished wafer product to 220 µm or more and 300 µm or less.

[0041] First, a single-crystal silicon ingot was sliced to obtain a sliced wafer (Step 1). Next, a grinding wheel was rotated at high speed. The grinding wheel used had a groove shape designed to produce the R1 and R2 values of the chamfered cross-sectional shape within a range of 50 µm or more and 100 µm or less. After the cutting step, a peripheral edge portion of the silicon wafer held on a holding table was brought into contact with the grinding wheel and chamfered by rotating the wafer (Step 2).

[0042] At this time (immediately after chamfering in step 2), the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape were measured at nine locations within the circumference of the silicon wafer, namely at nine positions at 45° intervals, including 9° and 351°, with respect to a notch. Fig. 2 shows this result. As in Fig. As shown in Figure 2, the R1 and R2 were 50 µm or more and 100 µm or less at each location in the wafer circumferential direction. An R1max-R1min value was 7.3 µm, where R1max is the maximum value of R1, R1min is the minimum value of R1, and R1max-R1min is a difference between R1max and R1min. An R2max-R2min value was 6.0 µm, where R2max is the maximum value of R2, R2min is the minimum value of R2, and R2max-R2min is a difference between R2max and R2min.

[0043] Next, after the chamfering step, the silicon wafer was double-sided ground (Step 3). Specifically, two grinding wheels with diamond abrasive grains were pressed against two surfaces of the silicon wafer, while a grinding solution was supplied to the grinding wheels. Double-sided grinding was performed by rotating the wafer under this condition.

[0044] Next, after the double-sided grinding step, the silicon wafer was immersed in an aqueous sodium hydroxide solution with a mass concentration of approximately 52% for 10 minutes and heated to a liquid temperature of approximately 75°C. Etching was performed at a thickness of approximately 20 µm (Step 4). After the alkali etching step, the dimensions of the chamfered cross-sectional shape of the silicon wafer were measured at the same positions and under the same measurement conditions as above. Fig. 3 shows the result. As in Fig. 3, the chamfered cross-sectional shape immediately after the alkali etching step deviated further between the measuring points (R1max-R1min value: 21.6 µm, R2max-R2min value: 14.4 µm) than that shown in Fig. 2. In comparison with a chamfered cross-sectional shape immediately after etching in the comparative example to be described later ( Fig. 11), however, the uniformity of R1, R2 in the circumferential direction was greatly improved.

[0045] Next, after the etching step, both surfaces of the silicon wafer were mirror-polished (step 5). Specifically, the silicon wafer was held in a holding hole of a carrier for a double-sided polishing jig. The wafer was clamped between polishing pads attached to an upper and lower turntable of the double-sided polishing jig. The two surfaces were mirror-polished by rotating the turntables while a polishing compound was applied to the surfaces to be polished.

[0046] Next, the chamfered section was mirror-polished using a Type IV edge polishing jig manufactured by SpeedFam Company Limited so that the target value of R1 and R2 was 250 µm (Step 6). After the step of mirror-polishing the chamfered section, the dimensions of the chamfered cross-sectional shape of the silicon wafer were measured at the same positions as above. The measurement result of the dimensions of the chamfered cross-sectional shape, the R1 value, and in this case, the R2 value, is shown in Fig. 4 and that of the BC value in Fig. 5. In Fig. 5 shows the differences to each target BC value. As in Fig. 4, the distribution widths of R1 and R2 in the circumferential direction are small (R1max-R1min value: 21.6 µm, R2max-R2min value: 14.4 µm). This can be seen particularly from the comparison with Fig. 12. In addition, Fig. 4, the R1, R2 of the wafer were both at approximately 235 to 255 µm, which can be considered satisfactory within the target range. Meanwhile, as in Fig. 5, the deviation difference between the BC value of the finished wafer and the target BC value was small (a BCmax-BCmin value was 2.8 µm, where BCmax is the maximum value of deviation from the target BC value, BCmin is the minimum value of deviation from the target BC value, and BCmax-BCmin is a difference between BCmax and BCmin), and the distribution was also uniform. (Example 2)

[0047] A sliced wafer was obtained by the same method as in Example 1 and then chamfered with a grinding wheel according to the same method as in Example 1. The grinding wheel used had a groove shape designed to achieve dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape within 150 to 200 µm.

[0048] Next, double-sided grinding, alkali etching, double-sided mirror polishing, and mirror polishing of the chamfered portion were sequentially performed according to the same procedure as in Example 1.

[0049] As in Example 1, after the chamfering step, after the alkali etching step, and after the mirror polishing step on the chamfered portion, the dimensions of the chamfered cross-sectional shape were measured at the same positions as in Example 1 and under the same conditions as the above measurement conditions. Fig. Figure 6 shows the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape after the chamfering step. Fig. Figure 7 shows the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape after the alkali etching step. Fig. 8 shows the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape, and Fig. Figure 9 shows the BC value after the mirror polishing step on the chamfered section. (Comparison example)

[0050] A sliced wafer was obtained using the same method as in Example 1 and then chamfered with a grinding wheel using the same method as in Example 1. The grinding wheel used had a groove shape designed to achieve the R1 and R2 values of the chamfered cross-sectional shape within 250 to 300 µm. In other words, from chamfering onward, the R1 and R2 values were aimed to be within the specification range of the finished wafer product.

[0051] Next, double-sided grinding, alkali etching, double-sided mirror polishing, and mirror polishing of the chamfered portion were sequentially performed according to the same procedure as in Example 1.

[0052] As in Example 1, after the chamfering step, after the alkali etching step, and after the mirror polishing step on the chamfered portion, the dimensions of the chamfered cross-sectional shape were measured at the same positions as in Example 1 and under the same conditions as the above measurement conditions. Fig. Figure 10 shows the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape after the chamfering step. Fig. Figure 11 shows the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape after the alkali etching step. Fig. 12 shows the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape, and Fig. Figure 13 shows the BC value after the mirror polishing step on the chamfered section.

[0053] Table 1 summarizes the R1max-R1min value, R2max-R2min value and BCmax-BCmin value of each wafer finally obtained in Examples 1, 2 and Comparative Example. [Table 1] Beispiel 1 Beispiel 2 VergleichsBeispiel R1max-R1min [µm] 13,4 36,3 49,9 R2max-R2min [µm] 12,4 35,4 50,1 BCmax-BCmin [µm] 2,8 24,4 50,1

[0054] As shown in Table 1, compared with the wafer of Comparative Example, which is chamfered such that the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are within 250 to 300 µm, the wafer of Example 1, which is chamfered such that the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are within 50 to 100 µm, and the wafer of Example 2, which is chamfered such that the dimensions of the R1 value and the R2 value of the chamfered cross-sectional shape are within 150 to 200 µm, enable the production of wafers with chamfered cross-sectional shapes in which the R1 value, R2 value, and BC value are uniform in the circumferential direction. Furthermore, the comparison between Example 1 and Example 2 shows that Example 1, in which the R1 value and R2 value in the chamfering phase were smaller, enables the production of a wafer product with a more uniform chamfered cross-sectional shape in the circumferential direction.

[0055] It should be noted that the present invention is not limited to the embodiments described above.

Claims

[1] A method of manufacturing a wafer as a product, comprising the steps of: Grinding and chamfering a peripheral edge portion of a wafer cut from a single crystal ingot; Lapping or double-sided grinding of the main surfaces of the chamfered wafer; Etching the lapped or double-sided ground wafer; single-sided or double-sided mirror polishing of the main surfaces of the etched wafer; and Mirror polishing a chamfered portion of the mirror polished wafer, wherein after the chamfering step, the chamfered portion of the wafer has a cross-sectional shape comprising: a first inclined portion extending from a first main surface, which is one of the main surfaces of the wafer, and inclined relative to the first main surface; a first arc portion which is an arc-shaped portion extending from the first inclined portion and having a radius of curvature R1; a second inclined portion extending from a second main surface, which is another main surface of the wafer, and inclined relative to the second main surface; a second arc portion which is an arc-shaped portion extending from the second inclined portion and having a radius of curvature R2; and an end portion connecting the first arc portion to the second arc portion and forming an outermost peripheral end portion of the wafer, during chamfering, the wafer to be a product is chamfered such that the chamfered wafer has R1 and R2 that are smaller than a target value range of R1 and R2 of the wafer product, and while mirror polishing the chamfered portion, the chamfered portion is mirror polished so that the mirror polished chamfered portion has R1 and R2 which are within the target value range of R1 and R2 of the wafer product, thereby manufacturing the wafer product. [2] The method for manufacturing a wafer according to claim 1, wherein the chamfering is performed so that the R1 and the R2 are within a range of 50 µm or more and 200 µm or less. [3] A method of manufacturing a wafer according to claim 1 or 2, wherein the etching is carried out using an alkaline aqueous solution. [4] A method of manufacturing a wafer according to any one of claims 1 to 3, wherein the single crystal ingot is a single crystal silicon ingot.

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