METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE

Abstract

The invention relates to a method for producing a semiconductor structure, comprising the following steps: - epitaxial deposition of an epitaxial semiconductor layer sequence (1) with at least one p-doped semiconductor layer (2) which contains a p-dopant (26) and a passivation material (3), - wet-chemical etching of the epitaxial semiconductor layer sequence (1) so that degassing channels (4) are formed along crystal defects (5) in the epitaxial semiconductor layer sequence (1) from a main surface (6) of the epitaxial semiconductor layer sequence (1) at least up to the p-doped semiconductor layer (2), - expulsion of the passivation material (3) from the epitaxial semiconductor layer sequence (1) through the degassing channels (4). The invention also relates to a semiconductor structure.

Description

[0001] Description

[0002] METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE

[0003] The present application claims the priority of DE 10 2022 104 563 . 3 . The priority document is incorporated in its entirety by reference into the present disclosure

[0004] A method for producing a semiconductor structure and a semiconductor structure are specified.

[0005] The aim is to provide an improved method for producing a semiconductor structure, in which, in particular, a passivating substance is expelled from the semiconductor structure. This object is achieved by a method comprising the steps of patent claim 1.

[0006] Furthermore, an improved semiconductor structure is to be specified, in which, in particular, a passivating substance is expelled from the semiconductor structure. This object is achieved by an object having the features of patent claim 9.

[0007] Advantageous embodiments and further developments of the semiconductor structure and of the method for producing the semiconductor structure are specified in the dependent claims.

[0008] According to one embodiment of the method for producing a semiconductor structure, an epitaxial semiconductor layer sequence comprising at least one p-doped semiconductor layer comprising a p-dopant and a passivating substance is first epitaxially deposited. The epitaxial semiconductor layer sequence is preferably grown epitaxially on a growth substrate by metal-organic vapor deposition (MOCVD).

[0009] The epitaxial semiconductor layer sequence preferably comprises a II / IV compound semiconductor material or consists of a II / IV compound semiconductor material. A III / V compound semiconductor material comprises at least one element from the third main group, such as B, Al, Ga, In, and one element from the fifth main group, such as N, P, As. In particular, the term "III / V compound semiconductor material" encompasses the group of binary, ternary or quaternary compounds which contain at least one element from the third main group and at least one element from the fifth main group, for example a nitride compound semiconductor material.

[0010] Nitride compound semiconductor materials are compound semiconductor materials that contain nitrogen, such as the materials from the system In x Al y Gai- x-yN with 0 < x < 1 , 0 < y < 1 and x+y < 1 . For example, gallium nitride with x=y=0 is a material from this system .

[0011] Such binary, ternary or quaternary compounds may also contain, for example, one or more dopants and additional components.

[0012] During epitaxial growth of the epitaxial semiconductor layer sequence, the formation of crystal defects is difficult or impossible to avoid. For example, a lack of lattice matching between the growth substrate and the epitaxial semiconductor layer sequence leads to strains in the epitaxial semiconductor layer sequence. These strains can be at least partially relieved by the random formation of crystal defects during epitaxial growth. For example, thread dislocations arise as crystal defects in the epitaxial semiconductor layer sequence during epitaxial growth. Thread dislocations are also referred to as line dislocations. A thread dislocation is a disturbance of the periodicity of the crystal lattice of the epitaxial semiconductor layer sequence, which extends along a line, referred to below as dislocation line, through the epitaxial semiconductor layer sequence.Preferably, the dislocation line extends in a growth direction through the epitaxial semiconductor layer sequence. The arrangement of the crystal defects in the epitaxial semiconductor layer sequence is, in particular, random.

[0013] Thread dislocations can, for example, have a screw component or be formed as screw dislocations . In a screw dislocation, crystal planes cut by the dislocation line are connected to one another in a screw-like manner . If the dislocation line is circumnavigated, for example, along a crystal plane arranged perpendicular to the dislocation line, a displacement in the direction of the dislocation line occurs. The resulting displacement when the dislocation line is circumnavigated once along a crystal plane is called the Burgers vector . Screw dislocations are thread dislocations that can be characterized by a Burgers vector lying parallel to the dislocation line . In contrast, the Burgers vector in edge dislocations is perpendicular to the

[0014] Dislocation line . Thread dislocations with a screw component have a Burgers vector that points at least partially in the direction of the dislocation line . Screw dislocations and thread dislocations with a screw component in particular have a hollow core .

[0015] The p-doped semiconductor layer is preferably a buried semiconductor layer. Here and below, a semiconductor layer is referred to as "buried" if, in the growth direction of the epitaxial semiconductor layer sequence, at least one further semiconductor layer is arranged above and below the buried semiconductor layer.

[0016] The p-dopant serves as an electron acceptor and is introduced into the p-doped semiconductor layer during epitaxial growth. The p-dopant increases the charge carrier density of freely moving holes in the p-doped semiconductor layer.

[0017] The passivation substance consists of foreign atoms which are unintentionally introduced into the epitaxial semiconductor layer sequence, particularly during epitaxial growth. For example, the introduction of the passivation substance into the epitaxial semiconductor layer sequence is difficult or impossible to avoid due to the process. The passivation substance has a particular compensating effect on the p-dopant in the p-doped semiconductor layer. For example, the passivation substance acts as an electron donor in the p-doped semiconductor layer and / or forms bonding complexes with the p-dopant. The passivation substance thus reduces the charge carrier density of mobile holes in the p-doped semiconductor layer.In particular, the charge carrier density of mobile holes in the p-doped semiconductor layer is lower than the charge carrier density expected from the nominal concentration of the p-dopant due to the passivation agent. For example, the passivation agent reduces the charge carrier density of mobile holes in the p-doped semiconductor layer by up to three orders of magnitude, for example, by a factor of 5000.

[0018] According to a further embodiment of the method, the epitaxial semiconductor layer sequence is wet-chemically etched such that degassing channels are formed along crystal defects in the epitaxial semiconductor layer sequence from a main surface of the epitaxial semiconductor layer sequence at least as far as the p-doped semiconductor layer. During wet-chemical etching, a liquid etchant is applied to the epitaxial semiconductor layer sequence. The epitaxial semiconductor layer sequence can also be immersed in a liquid etchant. The liquid etchant, for example aqueous solutions of nitric acid or oxalic acid, is designed to dissolve atoms from the epitaxial semiconductor layer sequence and transport them away.

[0019] The wet-chemical etching of the epitaxial semiconductor layer sequence preferably takes place from a main surface of the epitaxial semiconductor layer sequence that faces away from the growth substrate. Alternatively or additionally, the epitaxial semiconductor layer sequence can be wet-chemically etched after the growth substrate has been detached from a growth substrate side. The wet-chemical etching is particularly designed to etch the epitaxial semiconductor layer sequence in the immediate vicinity of crystal defects present in the epitaxial semiconductor layer sequence. The liquid etchant can, for example, penetrate into the epitaxial semiconductor layer sequence along thread dislocations that extend through the epitaxial semiconductor layer sequence and decompose the latter in the immediate vicinity of the thread dislocations.The liquid etchant can particularly penetrate into thread dislocations that have a screw component or are formed as screw dislocations and thus have a hollow core.

[0020] The paper Massabuau et al., APL Mater. 8, 031115 (2020) describes thread dislocations in gallium nitride semiconductor layers as channels for liquid etchants. The content of this paper is hereby incorporated by reference.

[0021] According to a further embodiment of the method, the passivation substance is expelled from the epitaxial semiconductor layer sequence through the degassing channels. For example, the epitaxial semiconductor layer sequence is annealed so that the diffusivity of the passivation substance in the p-doped semiconductor layer is increased. The passivation substance can thus outgas through the degassing channels and is transported away from the p-doped semiconductor layer. A small proportion of the passivation substance can remain in the p-doped semiconductor layer. The at least partial expulsion of the passivation substance increases, in particular, the charge carrier density of mobile holes in the p-doped semiconductor layer.

[0022] According to a preferred embodiment, the method for producing a semiconductor structure comprises the following steps:

[0023] - epitaxial deposition of the epitaxial semiconductor layer sequence with at least the p-doped semiconductor layer comprising the p-dopant and the passivating substance,

[0024] - wet-chemical etching of the epitaxial semiconductor layer sequence, so that degassing channels are formed along crystal defects in the epitaxial semiconductor layer sequence from the main surface of the epitaxial semiconductor layer sequence at least up to the p-doped semiconductor layer,

[0025] - Expulsion of the passivation material from the epitaxial semiconductor layer sequence through the degassing channels.

[0026] It is preferable to carry out the steps listed above in the order listed.

[0027] In particular, during the epitaxial growth of p-doped semiconductor layers made of gallium nitride using metal-organic vapor phase epitaxy, hydrogen is incorporated into the semiconductor layer, acting as a passivating agent. To activate the p-dopant, the hydrogen must therefore be expelled from the p-doped semiconductor layer. However, this is difficult to achieve with buried p-doped semiconductor layers made of gallium nitride. In particular, the hydrogen cannot be expelled by n-doped semiconductor layers that are arranged above or below the p-doped semiconductor layer in the growth direction.

[0028] For example, the hydrogen can be expelled by lateral diffusion along a main extension plane of the semiconductor layer. Here and in the following, "lateral" refers to a direction perpendicular to the growth direction of the epitaxial semiconductor layer sequence. However, this is only possible for semiconductor structures with a small lateral extension of, for example, approximately 40 micrometers, as described in the publication Wong et al., Appl. Phys. Express 14, 086502 (2021), the disclosure content of which is hereby incorporated by reference. In particular, a process time for expelling the hydrogen is proportional to a diffusion length of hydrogen in the p-doped semiconductor layer and thus proportional to the lateral extension of the semiconductor structure.

[0029] Alternative epitaxial growth techniques to MOCVD can also be used, such as molecular beam epitaxy, to minimize the incorporation of hydrogen. However, this would compromise the production advantages of MOCVD. Furthermore, degassing channels can be etched into the semiconductor structure using photolithographic techniques. The resulting degassing channels have particularly large diameters, several hundred nanometers. Furthermore, the reactive ion etching processes required for this process cause significant damage to the sidewalls of the degassing channels.

[0030] The process described here is based on the idea of ​​gently widening existing thread dislocations in the epitaxial semiconductor layer sequence by wet-chemical etching. This creates degassing channels through which the hydrogen can be efficiently removed after epitaxial growth.

[0031] According to a further embodiment of the method, the epitaxial semiconductor layer sequence comprises or consists of a nitride compound semiconductor material. The p-dopant in the p-doped semiconductor layer is, for example, magnesium. The passivating substance is, for example, hydrogen, which, due to the process, is introduced into the epitaxial semiconductor layer sequence by metal-organic vapor-phase epitaxy.

[0032] According to a further embodiment of the method, the epitaxial semiconductor layer sequence has an n-doped semiconductor layer that is arranged between the p-doped semiconductor layer and the main surface of the epitaxial semiconductor layer sequence. The p-doped semiconductor layer is, in particular, a buried semiconductor layer, above which an n-doped semiconductor layer is arranged in the growth direction. If the semiconductor layer sequence consists of a nitride compound semiconductor material and the passivation substance is hydrogen, the hydrogen, in particular, cannot be expelled through the n-doped semiconductor layer.

[0033] According to a further embodiment of the method, the crystal defects are formed as thread dislocations in the epitaxial semiconductor layer sequence during epitaxial deposition and have a main extension direction that corresponds to the growth direction of the epitaxial semiconductor layer sequence. The thread dislocation has, in particular, a screw component or is formed as a screw dislocation and has a hollow core. The thread dislocation continues along the dislocation line in the epitaxial semiconductor layer sequence.

[0034] The filamentary dislocation propagates particularly in the growth direction through the epitaxial semiconductor layer sequence. During the epitaxial growth of the epitaxial semiconductor layer sequence, the filamentary dislocation can also propagate in a lateral direction through the epitaxial semiconductor layer sequence. The main extension direction thus indicates a preferred propagation direction of the filamentary dislocation, whereby the propagation direction of the filamentary dislocation can deviate from the main extension direction in the lateral direction.

[0035] According to a further embodiment of the method, the thread dislocations are formed as screw dislocations with a hollow core. In particular, the thread dislocations have a screw component, with the Burgers vector pointing at least partially in the direction of the dislocation line. The Burgers vector thus preferably has a component parallel to the growth direction.

[0036] According to a further embodiment of the method, wet-chemical etching is an electrochemical etching process in which the degassing channels are formed by widening the thread dislocations. In the electrochemical etching process, the epitaxial semiconductor layer sequence is introduced into a liquid etchant. The liquid etchant is in particular an electrolyte solution, which can be basic, acidic, or neutral and is designed to transport electrical charge carriers. Examples of liquid etchants are aqueous solutions of potassium hydroxide, sodium hydroxide, hydrochloric acid, oxalic acid, nitric acid, sulfuric acid, oxalic acid, succinic acid, or a sodium chloride solution.In the electrochemical etching process, the epitaxial semiconductor layer sequence is connected to one pole of an electrical voltage source via an electrical contact, while an opposite pole of the electrical voltage source is connected to an inert electrode immersed in the liquid etchant. The electrode comprises, for example, platinum or is made of platinum.

[0037] An electrical voltage difference between the epitaxial semiconductor layer sequence and the inert electrode leads to an electrical current between the semiconductor layer sequence and the electrode, whereby the epitaxial semiconductor layer sequence is at least partially decomposed by a combination of electrical and chemical processes. The etching rate depends, for example, on the applied electrical voltage difference and on the dopant concentration in the epitaxial semiconductor layer sequence.

[0038] According to a further embodiment of the method, the epitaxial semiconductor layer sequence is irradiated with electromagnetic radiation during the electrochemical etching. The electromagnetic radiation generates, in particular, a photocurrent in the epitaxial semiconductor layer sequence, which assists the electrochemical etching. According to a further embodiment of the method, the electrochemical etching of the epitaxial semiconductor layer sequence takes place in the absence of light. In other words, the epitaxial semiconductor layer sequence is not irradiated with electromagnetic radiation during the electrochemical etching. Thus, no additional photocurrent is generated that influences the etching rate.

[0039] According to a further embodiment of the method, the p-dopant is activated by expelling the passivating substance. For example, expelling the passivating substance breaks up bonding complexes between the p-dopant and the passivating substance. Furthermore, expelling the passivating substance reduces compensation of the p-dopant. Activating the p-dopant by expelling the passivating substance thus results in an increase in the charge carrier density of mobile holes in the p-doped semiconductor layer.

[0040] According to a further embodiment of the method, the main surface of the epitaxial semiconductor layer sequence is formed by a surface of an undoped cover layer. In other words, in a final step of the epitaxial deposition of the epitaxial semiconductor layer sequence, an undoped cover layer is epitaxially grown. The undoped cover layer is, in particular, largely inert towards the liquid etchant. Thus, the main surface of the epitaxial semiconductor layer sequence is protected by the undoped cover layer during wet-chemical etching. However, the liquid etchant can penetrate into the epitaxial semiconductor layer sequence through thread dislocations that also extend through the undoped cover layer and widen the thread dislocations to form degassing channels.

[0041] The undoped cover layer can remain as part of the epitaxial semiconductor layer sequence after wet-chemical etching, or it can be removed. For example, the cover layer protects the semiconductor layer sequence during subsequent process steps. The undoped cover layer is preferably at least partially removed before, for example, a metallic contact layer is applied to the semiconductor layer sequence. For example, the cover layer is removed using wet- or dry-chemical methods. In particular, dry-chemical removal of the cover layer in situ in an epitaxial deposition system is possible.

[0042] According to a further embodiment of the method, the degassing channels are at least partially filled with a dielectric after the passivation substance has been expelled. For example, the degassing channels are at least partially filled and / or at least partially closed with a dielectric, for example aluminum oxide or silicon dioxide, by atomic layer deposition or by vapor deposition. For example, walls, in particular side walls, of the degassing channels are lined with the dielectric. The dielectric is electrically insulating and is designed in particular to prevent electrical short circuits within the epitaxial semiconductor layer sequence, which can be caused, for example, by impurities in the degassing channels. Furthermore, a semiconductor structure is specified. The semiconductor structure can be produced in particular using the method described here.All features of the method for producing a semiconductor structure are also disclosed for the semiconductor structure and vice versa.

[0043] According to one embodiment, the semiconductor structure comprises an epitaxial semiconductor layer sequence with at least one p-doped semiconductor layer. The epitaxial semiconductor layer sequence preferably comprises a nitride compound semiconductor material. The p-doped semiconductor layer is, in particular, a buried semiconductor layer. An n-doped semiconductor layer is preferably arranged downstream of the p-doped semiconductor layer in the growth direction of the epitaxial semiconductor layer sequence.

[0044] According to a further embodiment, the semiconductor structure has a plurality of degassing channels. The degassing channels are formed by widened crystal defects. The crystal defects are, in particular, thread dislocations that have a screw component or are formed as screw dislocations and have a hollow core.

[0045] The degassing channels extend in the epitaxial semiconductor layer sequence from a main surface of the epitaxial semiconductor layer sequence at least to the p-doped semiconductor layer. A main extension direction of the degassing channels corresponds in particular to the growth direction of the epitaxial semiconductor layer sequence.

[0046] According to a preferred embodiment, the

[0047] Semiconductor structure has the following features: - the epitaxial semiconductor layer sequence with the at least one p-doped semiconductor layer,

[0048] - the multitude of degassing channels, whereby

[0049] - the degassing channels are widened crystal defects, and

[0050] - the degassing channels in the epitaxial semiconductor layer sequence extend from a main surface of the epitaxial semiconductor layer sequence at least as far as the p-doped semiconductor layer.

[0051] According to a further embodiment of the semiconductor structure, the epitaxial semiconductor layer sequence has an active layer configured to generate and / or absorb electromagnetic radiation. The semiconductor structure is, in particular, an optoelectronic semiconductor structure. For example, the semiconductor structure is part of a light-emitting diode, a laser diode, a photodiode, or a phototransistor. The semiconductor structure is, in particular, configured to generate or absorb electromagnetic radiation in a spectral range between infrared light and ultraviolet light.

[0052] The active layer, in particular, has a pn junction. The pn junction can be designed as a quantum well structure or a multiple quantum well structure. For the purposes of this application, the term "quantum well structure" encompasses, in particular, any structure in which charge carriers experience a quantization of their energy states through confinement. In particular, the term "quantum well structure" does not contain any information about the dimensionality of the quantization. It thus encompasses, among other things, quantum wells, quantum wires, and quantum dots, and any combination of these structures.

[0053] According to a further embodiment of the semiconductor structure, the epitaxial semiconductor layer sequence has pores that are arranged laterally around the degassing channels. Preferably, a pore is spatially directly connected to at least one degassing channel. The pores extend, for example, laterally in a polyp-like manner into the epitaxial semiconductor layer sequence around the degassing channels. The pores form in particular by the widening of the crystal defects during the wet-chemical etching of a doped semiconductor layer. A porosity of the epitaxial semiconductor layer sequence can be adjusted, for example, by suitable selection of process parameters, for example a temperature and / or an etching time, during the wet-chemical etching of the epitaxial semiconductor layer sequence.

[0054] According to a further embodiment of the semiconductor structure, the degassing channels penetrate the p-doped semiconductor layer, preferably completely. Degassing channels that penetrate the p-doped semiconductor layer improve the expulsion of the passivating substance from the p-doped semiconductor layer.

[0055] According to a further embodiment of the semiconductor structure, the p-doped semiconductor layer forms a tunnel junction layer. In particular, the p-doped semiconductor layer is a highly doped semiconductor layer having a p-dopant concentration of at least 10 19per cubic centimeter. The tunnel junction is configured, for example, as a hole injection layer in order to reduce a high electrical resistance of thick p-doped layers in nitride compound semiconductor materials. The tunnel junction can also be designed as an anode-side metal-semiconductor contact in order to avoid a high contact resistance between a metal of a connection contact and a p-doped layer of a nitride compound semiconductor material. Furthermore, the tunnel junction can be configured for the electrical connection of serially stacked active layers in the epitaxial semiconductor layer sequence, for example of a light-emitting diode.

[0056] According to a further embodiment of the semiconductor structure, the epitaxial semiconductor layer sequence has two active layers for generating electromagnetic radiation, between which the tunnel junction is arranged. Thus, for example, the luminance of a light-emitting diode can be increased without increasing the operating current. To power such a semiconductor structure, a forward voltage approximately twice as high as in the case of a single active layer is required, which advantageously increases the range of suitable driver components.

[0057] The semiconductor structure can also have more than two active layers, with a tunnel junction being arranged between each two adjacent active layers. The active layers can be configured to emit electromagnetic radiation in different spectral ranges. For example, the semiconductor structure has three active layers that are configured to emit electromagnetic radiation in the blue, green, and red spectral ranges. The active layers can preferably be controlled independently of one another. Thus, the semiconductor structure is, for example, an epitaxially stacked RGB pixel.

[0058] According to a further embodiment of the semiconductor structure, degassing channels in the region of an n-doped semiconductor layer of the tunnel junction have a greater lateral extent than in the remaining epitaxial semiconductor layer sequence. In particular, a porosity of the n-doped semiconductor layer of the tunnel junction is greater than in the remaining epitaxial semiconductor layer sequence. If an electrical voltage is applied to the semiconductor structure, this leads to a geometric field amplification of the electric field in the n-doped semiconductor layer of the tunnel junction. For example, the greater lateral extent of the degassing channels can result in peaks being formed in the n-doped semiconductor layer of the tunnel junction, at which peaks the electric field is increased. This particularly promotes tunneling of electrons at the tunnel junction.

[0059] According to a further embodiment of the semiconductor structure, the degassing channels are at least partially filled with a dielectric. The dielectric comprises, for example, aluminum oxide or silicon dioxide or is formed from one of these materials.

[0060] According to a further embodiment of the semiconductor structure, the degassing channels have a diameter between 1 nanometer and 250 nanometers, preferably between 1 nanometer and 50 nanometers, particularly preferably between 1 nanometer and 20 nanometers.

[0061] According to a further embodiment of the semiconductor structure, the degassing channels have an areal density of between 10 5 per square centimeter and including 10 8per square centimeter. A relatively high areal density of the crystal defects and thus of the degassing channels reduces the time required to expel the passivating agent.

[0062] Further advantageous embodiments and developments of the method for producing the semiconductor structure and of the semiconductor structure emerge from the exemplary embodiments described below in conjunction with the figures.

[0063] Figures 1 to 7 show schematic sectional views of stages of a method for producing a semiconductor structure according to an embodiment.

[0064] Figures 8 to 10 show schematic sectional views of semiconductor structures according to various embodiments.

[0065] Figure 11 shows an example of a scanning electron micrograph of an epitaxial semiconductor layer sequence.

[0066] Figure 12 shows a schematic perspective view of a screw dislocation. Figure 13 shows a schematic section of a

[0067] Semiconductor structure according to another embodiment.

[0068] Identical, similar, or functionally identical elements are provided with the same reference symbols in the figures. The figures and the relative sizes of the elements depicted in the figures are not to be considered to scale. Rather, individual elements, particularly layer thicknesses, may be exaggerated for clarity and / or clarity.

[0069] In the method for producing a semiconductor structure according to the exemplary embodiment of Figures 1 to 7, an epitaxial semiconductor layer sequence 1 is first grown epitaxially on a growth substrate 13 (Figure 1). The growth substrate 13 is formed, for example, from sapphire, silicon, gallium nitride, silicon carbide, or aluminum nitride, or comprises at least one of these materials. The epitaxial semiconductor layer sequence 1 comprises a nitride compound semiconductor material and an active layer 10 for generating electromagnetic radiation. The semiconductor structure is, for example, part of a light-emitting diode or a laser diode.

[0070] The epitaxial semiconductor layer sequence 1 has a tunnel junction 12, which is arranged downstream of the active layer 10 in a growth direction R of the epitaxial semiconductor layer sequence 1. The tunnel junction 12 comprises an n-doped semiconductor layer 7 and a p-doped semiconductor layer 2, wherein the p-doped semiconductor layer 2 faces the active layer 10. The semiconductor layer arranged downstream of the tunnel junction 12 in the growth direction R is in particular an n-doped current spreading layer 20. The n-doped current spreading layer 20 is, for example, an n-doped anode contact layer. The semiconductor layers 2, 7 of the tunnel junction 12 are highly doped and have a dopant concentration of at least 10 19per cubic centimeter. In comparison to a semiconductor structure without a tunnel junction 12, which in particular has a p-doped anode contact layer, the semiconductor structure described here with an n-doped anode contact layer 20 advantageously has a lower contact resistance to a metallic connection contact.

[0071] The epitaxial semiconductor layer sequence 1 has an undoped cover layer 8, which is arranged as the last layer in the growth direction R and forms a main surface 6 of the epitaxial semiconductor layer sequence 1. The undoped cover layer 8 is largely inert to a liquid etchant 14 and protects the surface of the epitaxial semiconductor layer sequence 1 during subsequent wet-chemical etching.

[0072] The epitaxial semiconductor layer sequence 1 is deposited on the growth substrate 13 in particular using a metal-organic vapor phase epitaxy process. As a result, hydrogen is incorporated in the epitaxial semiconductor layer sequence 1 due to the process. The hydrogen incorporated in the p-doped semiconductor layer 2 acts as a passivating substance 3 which at least partially compensates for the p-dopant 26 in the p-doped semiconductor layer 2. The p-doped semiconductor layer 2 thus has a lower charge carrier density of mobile holes than would be expected from a nominal concentration of the p-dopant. The epitaxial semiconductor layer sequence 1 has crystal defects 5 which are formed in particular as thread dislocations 5 and have a main direction of extension in the growth direction R of the epitaxial semiconductor layer sequence 1.The thread dislocations 5 arise, for example, from a mismatch between a crystal lattice of the growth substrate 13 and a crystal lattice of the epitaxial semiconductor layer sequence 1. During the epitaxial growth of the epitaxial semiconductor layer sequence 1, the crystal defects 5 continue, in particular, in the growth direction R. The thread dislocations 5 have, for example, a surface density between 10 and inclusive. 6 cm -2 and including 10 8 cm -2 At least some of the thread dislocations 5 are formed as screw dislocations 22 which have a hollow core 24 .

[0073] Figure 2 shows a schematic representation of a next step of the method for producing a semiconductor structure, in which the epitaxial semiconductor layer sequence 1 is electrochemically etched. For this purpose, the epitaxial semiconductor layer sequence 1 on the growth substrate 13 is immersed in a bath of a liquid etchant 14. The liquid etchant 14 comprises, for example, hydrochloric acid or oxalic acid. Alternatively, the liquid etchant 14 can also be basic or neutral. Furthermore, an inert electrode 15, which consists for example of platinum, is immersed in the liquid etchant 14. The epitaxial semiconductor layer sequence 1 and the electrode 15 are connected to opposite poles of an electrical voltage source 16.During electrochemical etching of the epitaxial semiconductor layer sequence 1, the liquid etchant 14 penetrates the epitaxial semiconductor layer sequence 1 via the filamentary dislocations 5 and at least partially dissolves the epitaxial semiconductor layer sequence 1 in the immediate vicinity of the filamentary dislocations 5. Thus, the filamentary dislocations 5 are widened, and degassing channels 4 form along the filamentary dislocations 5.

[0074] Figure 3 shows a schematic representation of a stage of the semiconductor structure after electrochemical etching. Degassing channels 4 have formed along the thread dislocations 5 from a main surface 6 of the epitaxial semiconductor layer sequence 1 to the p-doped semiconductor layer 2. The depth of the degassing channels 4 can be adjusted, for example, by a suitably selected etching time. The degassing channels 4 have an average diameter of between 1 nanometer and 20 nanometers.

[0075] Figure 4 shows an enlarged view of the degassing channels 4 from Figure 3. In particular, a structuring of side walls of the degassing channels 4 is shown, which is formed by the electrochemical etching. In the process, pores 11, for example, are formed in the epitaxial semiconductor layer sequence 1, which are arranged laterally around the degassing channels 4. The porosity of the epitaxial semiconductor layers through which the degassing channels 4 extend can be adjusted, for example, by a suitable choice of the parameters of the electrochemical etching. Figure 5 shows a further example of a stage of a semiconductor structure after the electrochemical etching. In contrast to the semiconductor structure in Figure 4, the degassing channels 4 here penetrate the p-doped semiconductor layer 2. This can, for example, facilitate the expulsion of the passivation substance 3 from the p-doped semiconductor layer 2 in a subsequent method step.

[0076] Figure 6 shows a semiconductor structure after the expulsion of the passivating substance 3. In particular, the semiconductor structure is annealed, thereby increasing the diffusivity of the passivating substance 3 in the p-doped semiconductor layer 2. In particular, the passivating substance 3 exits the epitaxial semiconductor layer sequence 1 via the degassing channels 4, whereby a small portion of the passivating substance 3 may remain in the p-doped semiconductor layer 2.

[0077] Figure 7 shows the semiconductor structure after a further method step, in which the degassing channels 4 are at least partially sealed with a dielectric 9, in particular aluminum oxide or silicon dioxide. The dielectric 9 is introduced into the degassing channels 4, for example, by atomic layer deposition or vapor deposition. The dielectric 9 is particularly designed to reduce the probability of an electrical short circuit in the epitaxial semiconductor layer sequence 1, which can be caused, for example, by a deposition of impurities in the degassing channels 4.

[0078] Figure 8 shows a schematic sectional view of a

[0079] Semiconductor structure with an epitaxial semiconductor layer sequence 1 having two active layers 10. The two active layers 10 are configured to generate electromagnetic radiation and are formed as series-connected pn junctions. A tunnel junction 12 is arranged between the two active layers 10. The tunnel junction 12 comprises an n-doped semiconductor layer 7 and a p-doped semiconductor layer 2 with high dopant concentrations in order to minimize a series resistance of the tunnel junction 12.

[0080] Degassing channels 4 filled with a dielectric 9 extend along thread dislocations 5 from a main surface 6 of the epitaxial semiconductor layer sequence 1 through an active layer 10 at least to the p-doped semiconductor layer 2 of the tunnel junction 12. The diameter of the degassing channels 4 is 10 nanometers.

[0081] The semiconductor structure is a thin-film chip in which the epitaxial semiconductor layer sequence 1 is arranged on a carrier 17 and the growth substrate 13 is detached. Furthermore, the epitaxial semiconductor layer sequence 1 has vias 18 for electrically contacting the active layers 10.

[0082] The semiconductor structure shown in Figure 8 is configured, in particular, as a high-performance luminescence diode with a lateral extent of at least 2 millimeters. Due to this large lateral extent of the semiconductor structure, lateral expulsion of the passivating substance 3 from the p-doped semiconductor layer 2 is not possible. Thread dislocations 5, which are widened by the electrochemical etching, form degassing channels 4 through which the passivating substance 3 is expelled, in particular, from the p-doped semiconductor layer 2 of the tunnel junction 12.

[0083] By connecting the two active layers 10 in series, the luminance during operation of the semiconductor structure is increased. However, the operating current remains essentially the same as in a semiconductor structure with only one active layer 10, while the operating voltage is approximately twice as high. This advantageously results in a larger selection of suitable driver components.

[0084] Figure 9 shows a further optoelectronic semiconductor structure with an epitaxial semiconductor layer sequence 1 which, in contrast to the semiconductor structure in Figure 8, has three active layers 10. A tunnel junction 12 is arranged between each adjacent active layer 10. Each of the active layers 10 is designed to generate electromagnetic radiation in a different spectral range. For example, during operation one active layer 10 emits light in the red spectral range, one active layer 10 emits light in the green spectral range and one active layer 10 emits light in the blue spectral range. Vias 18 are designed for independent electrical contact and thus for individually controlling the three active layers 10. The semiconductor structure shown in Figure 9 therefore forms a full-color LED which is designed as a thin-film chip.In particular, the epitaxial semiconductor layer sequence 1 is arranged on a carrier 17 which comprises a control circuit 19 for operating the active layers 10. The growth substrate 13 is detached from the epitaxial semiconductor layer sequence 1. Degassing channels 4 sealed with a dielectric 9 extend from a main surface 6 of the epitaxial semiconductor layer sequence 1 along thread dislocations 5 through two active layers 10 and through both tunnel junctions 12. The degassing channels 4 are designed in particular to activate the p-dopant 3 in the p-doped semiconductor layers 2 of the two tunnel junctions 12.

[0085] Figure 10 shows an exemplary embodiment of a semiconductor structure which comprises an epitaxial semiconductor layer sequence 1 with an active layer 10 for generating electromagnetic radiation, a tunnel junction 12 and a current spreading layer 20. The tunnel junction 12 has a p-doped semiconductor layer 2 and an n-doped semiconductor layer 7, which have a higher dopant concentration than the other semiconductor layers of the epitaxial semiconductor layer sequence 1. The current spreading layer 20 is n-doped and is arranged downstream of the tunnel junction 12 in the growth direction R of the epitaxial semiconductor layer sequence 1. In particular, the current spreading layer 20 has a lower dopant concentration than the tunnel junction 12. The current spreading layer 20 is designed as an n-doped anode contact layer, on which, for example, a metallic contact layer for electrically contacting the semiconductor structure can be applied.

[0086] The epitaxial semiconductor layer sequence 1 has degassing channels 4, which extend from a main surface 6 of the epitaxial semiconductor layer sequence 1 along thread dislocations 5 to the p-doped semiconductor layer 2 of the tunnel junction 12. Within the n-doped semiconductor layer 7 of the tunnel junction 12, the degassing channels 4 have a larger lateral extent than in the current spreading layer 20. For example, due to the higher dopant concentration, a charge carrier density and thus an etching rate during electrochemical etching in the n-doped semiconductor layer

[0087] 7 is larger than in the current spreading layer 20. The n-doped semiconductor layer 7 has, in particular, pores 11, which can be formed by the stronger etching in the lateral direction.

[0088] Due to the larger lateral extent of the degassing channels 4 and / or a porosity of the n-doped semiconductor layer 7, peaks 21 are formed in the n-doped semiconductor layer 7. When an electric field is applied to the semiconductor layer sequence 1, the peaks 21 lead to an increase in the electric field at the tunnel junction 12, which promotes tunneling of the charge carriers.

[0089] Figure 11 shows a section of an epitaxial semiconductor layer sequence 1 with an undoped cover layer

[0090] 8 made of gallium nitride and an n-doped semiconductor layer 7 made of gallium nitride. The n-doped semiconductor layer 7 has, in particular, pores 11 that were created by electrochemical etching of the epitaxial semiconductor layer sequence 1. In this case, the liquid etchant 14 has penetrated into the n-doped semiconductor layer 7 through thread dislocations 5 in the cover layer 8.

[0091] The perspective view in Figure 12 schematically shows a thread dislocation 5 in a cubic crystal lattice, which is in the form of a screw dislocation 22. The screw dislocation 22 is a disturbance in the periodicity of the crystal lattice and extends along a dislocation line 23 through the crystal. In particular, the screw dislocation 22 has a hollow core 24 which is free of atoms of the crystal lattice. Crystal planes which are intersected by the dislocation line 23 are connected to one another in a screw-like manner. The screw dislocation 22 is characterized by a Burgers vector 25 which points in the direction of the dislocation line 23. The screw dislocation 22 is in particular a topological defect in the crystal lattice which can be detected by determining the Burgers vector 25 even if the hollow core 24 of the screw dislocation 22 has been widened by the wet-chemical etching.

[0092] Figure 13 shows a section of an epitaxial semiconductor layer sequence 1, wherein degassing channels 4 are partially filled with a dielectric 9 after the passivation substance 3 has been expelled. In contrast to the semiconductor structure in Figure 7, the degassing channels 4 here are not completely filled with the dielectric 9. In particular, side walls 27 of the degassing channels 4 are lined with the dielectric 9, while a core of the degassing channels 4 remains free of the dielectric 9. In addition, bottom surfaces 28 of the degassing channels 4 can also be covered with the dielectric 9.

[0093] The invention is not limited to the embodiments described herein. Rather, the invention encompasses any novel feature and any combination of features, including, in particular, any combination of features in the claims, even if this feature or combination itself is not explicitly stated in the claims or embodiments.

[0094] Reference symbol list

[0095] 1 epitaxial semiconductor layer sequence

[0096] 2 p-doped semiconductor layer

[0097] 3 Passivating agent

[0098] 4 Degassing channel

[0099] 5 Crystal defect

[0100] 6 Main area

[0101] 7 n-doped semiconductor layer

[0102] 8 Top layer

[0103] 9 Dielectric

[0104] 10 active layer

[0105] 11 pores

[0106] 12 Tunnel crossing

[0107] 13 Growth substrate

[0108] 14 liquid etchant

[0109] 15 Electrode

[0110] 16 electrical voltage source

[0111] 17 carriers

[0112] 18 vias

[0113] 19 Control circuit

[0114] 20 Current spreading layer

[0115] 21 top

[0116] 22 screw displacement

[0117] 23 Dislocation line

[0118] 24 hollow core

[0119] 25 Burgers vector

[0120] 26 p-dopant f

[0121] 27 Side wall

[0122] 28 floor area

[0123] R Growth direction

Claims

Patent claims 1. Method for fabricating a semiconductor structure comprising the following steps: - epitaxial deposition of an epitaxial semiconductor layer sequence (1) with at least one p-doped semiconductor layer (2) comprising a p-doping agent f (26) and a passivation agent (3), - wet chemical etching of the epitaxial semiconductor layer sequence (1) , such that degassing channels (4) are formed along crystal defects (5) in the epitaxial semiconductor layer sequence (1) from a main surface (6) of the epitaxial semiconductor layer sequence (1) at least to the p-doped semiconductor layer (2), - Expulsion of the passivation material (3) from the epitaxial semiconductor layer sequence (1) through the degassing channels (4) .

2. Method according to the preceding claim, wherein the epitaxial semiconductor layer sequence (1) comprises a nitride compound semiconductor material.

3. Method according to any of the preceding claims, wherein the epitaxial semiconductor layer sequence (1) comprises an n-doped semiconductor layer (7) arranged between the p-doped semiconductor layer (2) and the main area (6) of the epitaxial semiconductor layer sequence (1).

4. A method according to any of the preceding claims, wherein the crystal defects (5) are formed during epitaxial deposition as thread dislocations (5) in the epitaxial semiconductor layer sequence (1) and have a principal direction of extension which is a Growth direction (R) of the epitaxial semiconductor layer sequence (1) corresponds.

5. Method according to the preceding claim, wherein the thread dislocations (5) are screw dislocations (22) are formed with a hollow core (24).

6. Method according to one of the preceding claims, wherein the epitaxial deposition is carried out such that the crystal defects (5) are formed in the epitaxial semiconductor layer sequence (1) according to a random arrangement.

7. Method according to one of the preceding claims, wherein the p-doping agent f (26) is activated by expelling the passivating agent (3).

8. Method according to one of the preceding claims, wherein the main surface (6) of the epitaxial semiconductor layer sequence (1) is formed by a surface of an undoped cover layer (8).

9. Method according to one of the preceding claims, wherein the degassing channels (4) are at least partially filled with a dielectric (9) after the passivation material (3) has been driven out.

10. Exhibiting semiconductor structure: - an epitaxial semiconductor layer sequence (1) with at least one p-doped semiconductor layer (2) , - a multitude of degassing channels (4) , wherein - the degassing channels (4) are enlarged crystal defects (5), and - the degassing channels (4) in the epitaxial semiconductor layer sequence (1) extend from a main area (6) of the epitaxial semiconductor layer sequence (1) at least to the p-doped semiconductor layer (2).

11. Semiconductor structure according to the preceding claim, wherein the epitaxial semiconductor layer sequence (1) comprises an active layer (10) configured to generate and / or absorb electromagnetic radiation.

12. Semiconductor structure according to one of claims 10 to 11, wherein the epitaxial semiconductor layer sequence (1) pores (11) has, which are arranged laterally around the degassing channels (4).

13. Semiconductor structure according to one of claims 10 to 12, wherein the degassing channels (4) penetrate the p-doped semiconductor layer (2).

14. Semiconductor structure according to one of claims 10 to 13, wherein the p-doped semiconductor layer (2) forms a layer of a tunnel junction (12).

15. Semiconductor structure according to the previous claim, wherein the epitaxial semiconductor layer sequence (1) comprises two active layers (10) for generating electromagnetic radiation, between which the tunnel junction (12) is arranged.

16. Semiconductor structure according to one of claims 14 to 15, in the degassing channels (4) in the area of ​​an n-doped The semiconductor layer (7) of the tunnel junction (12) has a larger lateral extent than the rest of the epitaxial semiconductor layer sequence (1), so that peaks are formed in the n-doped semiconductor layer (7) due to the larger lateral extent of the degassing channels.

17. Semiconductor structure according to one of claims 9 to 16, wherein the degassing channels (4) are at least partially filled with a dielectric (9).