Semiconductor device

Abstract

The present disclosure relates to a semiconductor device comprising: a first main terminal provided with a first potential; a second main terminal provided with a second potential lower than the first potential; a control terminal connected to an externally arranged overcurrent detection circuit; at least one semiconductor element containing a MOS transistor connected between the first main terminal and the second main terminal; and at least one diode having a cathode electrically connected to the first main terminal and an anode electrically connected to the control terminal, and protecting the overcurrent detection circuit, wherein the at least one semiconductor element is mounted on a printed circuit board and the at least one semiconductor element and the at least one diode are sealed with an insulating resin.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to semiconductor devices, and more particularly to a semiconductor device for use in a power converter such as an inverter. BACKGROUND TECHNOLOGY

[0002] A semiconductor device for use in a power converter and the like is provided with an overcurrent protection circuit that detects an overcurrent flowing through a switching element and stops the driving of the switching element. A scheme of the overcurrent protection circuit is dominated by two schemes: a desaturation voltage detection scheme and a sensing current detection scheme. An example of the former is a snubber device in Fig. 5 disclosed in Patent Document 1. DOCUMENTS ACCORDING TO THE PRIOR ART PATENT DOCUMENT

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2006-42410 SUMMARY PROBLEM TO BE SOLVED BY THE INVENTION

[0004] While a high-breakdown voltage diode is used to protect a detection circuit in a desaturation voltage detection scheme, the high-breakdown voltage diode is generally implemented on a control board and is thus electrically connected to a high-voltage terminal such as a drain terminal of the semiconductor device. Thus, it is necessary to ensure a long insulation distance between the drain terminal of the semiconductor device, which is connected to the high-breakdown voltage diode on the control board, and a terminal near the drain terminal, which leads to the problem of reducing the freedom in designing a substrate structure of the control board and the terminal arrangements of the semiconductor device. In addition, as described in Fig. 8 of Patent Document 1, the high breakdown voltage diode and the switching element are implemented on the same conductive material and filled with an insulating resin together with a circuit board including a snubber circuit, resulting in a large heat capacity of the semiconductor device, poor thermal connection between the high breakdown voltage diode and the switching element, and the problem of detection accuracy of an overcurrent detection circuit.

[0005] The present disclosure has been conceived to solve a problem as described above, and it is an object of the present disclosure to provide a semiconductor device having improved freedom in designing a control board and the semiconductor device and improved detection accuracy of an overcurrent detection circuit. MEANS TO SOLVE THE PROBLEM

[0006] A semiconductor device according to the present disclosure comprises: a first main terminal provided with a first potential; a second main terminal provided with a second potential lower than the first potential; a control terminal connected to an externally arranged overcurrent detection circuit; at least one semiconductor element including a MOS transistor connected between the first main terminal and the second main terminal; and at least one diode having a cathode electrically connected to the first main terminal and an anode electrically connected to the control terminal and protecting the overcurrent detection circuit, wherein the at least one semiconductor element is mounted on a circuit board, and the at least one semiconductor element and the at least one diode are sealed with an insulating resin. EFFECTS OF THE INVENTION

[0007] According to the semiconductor device according to the present disclosure, the at least one diode is arranged inside the semiconductor device, so that the first main terminal and the control terminal can be insulated by the insulating resin inside the semiconductor device, the freedom in designing an externally arranged control board and the terminal arrangement of the semiconductor device is improved, and the detection accuracy of the overcurrent detection circuit is improved. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram illustrating configurations of a semiconductor device according to Embodiment 1 of the present disclosure and an overcurrent detection circuit. Fig. 2 is a perspective view illustrating a configuration of the semiconductor device according to Embodiment 1 of the present disclosure, which has been sealed with a resin. Fig. 3 is a cross-sectional view of the semiconductor device according to Embodiment 1 of the present disclosure. Fig. 4 is a cross-sectional view of the semiconductor device according to Embodiment 1 of the present disclosure. Fig. 5 is a perspective view illustrating a configuration of a semiconductor device according to Embodiment 2 of the present disclosure, which has been sealed with a resin. Fig. 6 is a conceptual diagram illustrating a temperature distribution of a circuit board when a semiconductor element of the semiconductor device according to Embodiment 2 of the present disclosure is energized. Fig. 7 is a perspective view illustrating a configuration of a semiconductor device according to Embodiment 3 of the present disclosure, which has been sealed with a resin. Fig. 8 is a conceptual diagram illustrating a temperature distribution of the circuit board when semiconductor elements of the semiconductor device according to Embodiment 3 of the present disclosure are energized. Fig. 9 is a perspective view illustrating a configuration of a semiconductor device according to Embodiment 4 of the present disclosure, which has been sealed with a resin. Fig. 10 is a conceptual diagram illustrating a temperature distribution of the circuit board when semiconductor elements of the semiconductor device according to Embodiment 4 of the present disclosure are energized. Fig. 11 is a perspective view illustrating a configuration of a semiconductor device according to Embodiment 5 of the present disclosure, which has been sealed with a resin. Fig. 12 is an equivalent circuit diagram of the semiconductor device according to Embodiment 5 of the present disclosure. Fig. 13 is a cross-sectional view of a semiconductor device according to an embodiment 6 of the present disclosure. Fig. 14 is a perspective view illustrating a configuration of a semiconductor device according to Embodiment 7 of the present disclosure, which has been sealed with a resin. Fig. 15 is a cross-sectional view of the semiconductor device according to Embodiment 7 of the present disclosure. Fig. 16 is a circuit diagram showing configurations of a semiconductor device according to Embodiment 8 of the present disclosure and an overcurrent detection circuit. Fig. 17 is a perspective view illustrating a configuration of the semiconductor device according to Embodiment 8 of the present disclosure, which has been sealed with a resin. Fig. 18 is a cross-sectional view of the semiconductor device according to Embodiment 8 of the present disclosure. Fig. 19 is a circuit diagram showing configurations of a semiconductor device according to Embodiment 9 of the present disclosure and an overcurrent detection circuit. Fig. 20 is a perspective view illustrating a configuration of the semiconductor device according to Embodiment 9 of the present disclosure, which has been sealed with a resin. Fig. 21 is a cross-sectional view of the semiconductor device according to Embodiment 9 of the present disclosure. Fig. 22 is a perspective view illustrating a configuration of a semiconductor device according to Embodiment 10 of the present disclosure, which has been sealed with a resin. Fig. 23 is an equivalent circuit diagram of the semiconductor device according to Embodiment 10 of the present disclosure. Fig. 24 is a cross-sectional view of the semiconductor device according to Embodiment 10 of the present disclosure. Fig. 25 is a circuit diagram showing configurations of a semiconductor device as an underlying technology and an overcurrent detection circuit. Fig. 26 is a diagram showing a temperature characteristic of a saturation voltage of a MOSFET. DESCRIPTION OF THE EMBODIMENTS<Ausführungsform 1>

[0008] Fig. 1 is a circuit diagram showing configurations of a semiconductor device 100 according to Embodiment 1 of the present disclosure and an overcurrent detection circuit 90. As shown in Fig. As shown in Figure 1, the semiconductor device 100 comprises a semiconductor element SE including a MOS transistor Q1 as a metal-oxide-semiconductor field-effect transistor (MOSFET), a diode D1 connected in antiparallel with the MOS transistor Q1, and a temperature sensor TS that detects a temperature of the MOS transistor Q1, which are connected between a power terminal PT that supplies power and a reference potential GND. The semiconductor device 100 also includes a high-breakdown-voltage diode HD that has a cathode connected to a drain terminal DT of the MOS transistor Q1 and has a breakdown voltage of, for example, several hundred volts to several kilovolts. The high-breakdown-voltage diode HD is arranged to protect the overcurrent detection circuit 90 from a high voltage applied to the power terminal PT.

[0009] A source terminal ST of the MOS transistor Q1 is connected to the reference potential GND and to an anode of the diode D1, and a cathode of the diode D1 is connected to the drain terminal DT.

[0010] The temperature sensor TS contains a temperature detection diode and has a cathode terminal KT and an anode terminal AT.

[0011] Although a gate terminal GT of the MOS transistor Q1 and the cathode terminal KT and the anode terminal AT of the temperature sensor TS are connected to a control circuit CC provided for the overcurrent detection circuit 90, connections to the control circuit CC are omitted for simplicity.

[0012] Although the control circuit CC provided for the overcurrent detection circuit 90 controls a gate signal of the MOS transistor Q1, monitors an output signal of the temperature sensor TS, and monitors an overcurrent determination threshold, for the sake of simplicity, only a detection terminal DESAT that detects the overcurrent determination threshold and a signal input terminal IN to which an external signal is input are provided. Fig. 1 shown.

[0013] An anode of the high breakdown voltage diode HD is connected to a resistor R0 in the overcurrent detection circuit 90 via a control terminal PVT of the semiconductor device 100, and the resistor R0 is connected to the detection terminal DESAT of the control circuit CC. The resistor R0 is connected to one of the electrodes of a capacitor C1, and the other of the electrodes of the capacitor C1 is connected to a reference potential GND in the overcurrent detection circuit 90.

[0014] The reference potential GND in the overcurrent detection circuit 90 and the reference potential GND in the semiconductor device 100 are commonly connected.

[0015] While the Fig. While the semiconductor device 100 shown in Fig. 1 has the semiconductor element including the MOS transistor Q1 and the diode D1 connected between the power terminal PT and the reference potential GND, the semiconductor device 100 may have a configuration of an inverter circuit in which a pair of a transistor and a diode similar to the MOS transistor Q1 and the diode D1 are connected between the reference potential GND and a ground potential, and may have a configuration in which a plurality of inverter circuits are connected in parallel.

[0016] Fig. 2 is a perspective view illustrating a configuration of the semiconductor device 100 sealed with an insulating resin RS, and a contour of the insulating resin RS is indicated by dashed lines.

[0017] As in Fig. As illustrated in Figure 2, the semiconductor device 100 includes a circuit board CM1 serving as a heat spreader as a substrate, and the semiconductor element SE is mounted on a main surface as the upper surface of the circuit board CM1. A highly thermally conductive material such as copper and aluminum is used for the circuit board CM1, and the circuit board CM1 acts as a buffer material between the semiconductor element SE and an external heat sink, while increasing heat dissipation efficiency.

[0018] The semiconductor element SE is an element in which the MOS transistor Q1 and the diode D1, which are Fig. 1, wherein one end of the source terminal ST as a plate-like conductive material is connected to an upper surface as a main surface of the semiconductor element SE and the other end of the source terminal ST protrudes outward from one of side surfaces of the insulating resin RS.

[0019] A lower surface, as the other main surface, of the semiconductor element SE is electrically connected to the circuit board CM1. One end of the drain terminal DT, a plate-like conductive material, is connected to the upper surface of the circuit board CM1, and the other end of the drain terminal DT protrudes outward from one of the side surfaces of the insulating resin RS. The side surface of the insulating resin RS, from which the other end of the source terminal ST protrudes, and the side surface of the insulating resin RS, from which the other end of the drain terminal DT protrudes, are opposite to each other.

[0020] The temperature sensor TS is mounted on the upper surface of the semiconductor element SE, and a cathode electrode and an anode electrode (not shown) arranged on an upper surface of the temperature sensor TS are electrically connected via wires WR to one end of the cathode terminal KT and one end of the anode terminal AT, respectively, as plate-like conductive materials. The other end of the cathode terminal KT and the other end of the anode terminal AT protrude outward from the same lateral surface of the insulating resin RS from which the other end of the drain terminal DT protrudes.

[0021] An output of the temperature sensor TS is fed back to the control circuit CC via the cathode terminal KT and the anode terminal AT to the overcurrent detection circuit 90. When a temperature of the semiconductor element SE is higher than a predetermined value, a protective operation such as stopping a switching operation of the MOS transistor Q1 is performed. By mounting the temperature sensor TS on the upper surface of the semiconductor element SE, an accurate temperature of the semiconductor element SE can be detected and the protective operation can be accurately performed.

[0022] A gate pad (not shown) on the upper surface of the semiconductor element SE is electrically connected to one end of the gate terminal GT, a plate-like conductive material, via a wire WR. The other end of the gate terminal GT protrudes outward from the same lateral surface of the insulating resin RS from which the other end of the drain terminal DT protrudes.

[0023] The high-breakdown voltage diode HD is mounted on the upper surface of the circuit board CM1 at a position away from the semiconductor element SE. The high-breakdown voltage diode HD is electrically connected to one end of the control terminal PVT, a plate-like conductive material, via a wire WR. The other end of the control terminal PVT protrudes from the same lateral surface of the insulating resin RS from which the other end of the drain terminal DT protrudes. An upper surface and a lower surface of the high-breakdown voltage diode HD serve as the anode and cathode, respectively.

[0024] Fig. 3 is a line along the AA of Fig. 2 taken cross-sectional view, and Fig. 4 is a line BB from Fig. 2. The insulating resin RS is in the two Fig. 3 and Fig. 4 is not illustrated.

[0025] As in Fig. As illustrated in Figure 3, the semiconductor element SE and a cathode layer KD of the high breakdown voltage diode HD are connected to the upper surface of the circuit board CM1 through conductive materials CM2. For example, solder, conductive resins, Ag-sintered materials, and Cu-sintered materials can be used as the conductive materials CM2.

[0026] The source terminal ST is connected to a source electrode (not shown) of the MOS transistor Q1 on the upper surface of the semiconductor element SE through a conductive material CM3. The same material as the conductive material CM2 can be used as the conductive material CM3.

[0027] A cathode electrode of the diode D1 of the semiconductor element SE is common to the source electrode of the MOS transistor Q1, and an anode electrode of the diode D1 is common to a drain electrode of the MOS transistor Q1.

[0028] As in Fig. As illustrated in Figure 4, the cathode layer KD of the high breakdown voltage diode HD is disposed on one side of the lower surface of the high breakdown voltage diode HD and is connected to the upper surface of the circuit board CM1 through a conductive material CM2. An anode layer AD of the high breakdown voltage diode HD is disposed on a side of the upper surface opposite to the cathode layer KD, and the wire WR is connected to the anode layer AD by wire bonding. Although a cathode electrode and an anode electrode may be disposed on the cathode layer KD and the anode layer AD, respectively, they are not illustrated for simplicity. The wire WR is connected to one end of the control terminal PVT by wire bonding. For example, an aluminum wire can be used as the wire WR.

[0029] As described above, the semiconductor device 100 according to Embodiment 1 includes the high breakdown voltage diode HD therein to enable terminal insulation within the insulating resin RS, so that an insulation distance between the control terminal PVT and the drain terminal DT can be reduced compared to that in a conventional semiconductor device, and the freedom in designing the control board and the terminal arrangement of the semiconductor device is improved. The insulation distance between the control terminal PVT and the drain terminal DT is indicated by an arrow in Fig. 2 specified distance or gap ID is defined.

[0030] A desaturation detection voltage is defined by the sum of a saturation voltage of the MOS transistor Q1 as the switching element, a forward voltage of the high breakdown voltage diode HD, and a resistive power loss, and when the switching element is the MOSFET, the saturation voltage of the MOSFET has a large positive temperature characteristic, which affects an operating temperature range of the overcurrent detection circuit.

[0031] This problem is discussed using a Fig. 25 is described as the underlying technology. In Fig. 25 carry the same components as those of the overcurrent detection circuit 90 and the semiconductor device 100 described with reference to Fig. 1, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0032] As in Fig. 25, the overcurrent detection circuit 70 includes therein the high breakdown voltage diode HD, and the drain terminal DT of the MOS transistor Q1 of a semiconductor device 80 is connected to the control terminal PVT and the power terminal PT.

[0033] A cathode of the high breakdown voltage diode HD is connected to the control terminal PVT, and an anode of the high breakdown voltage diode HD is connected to the resistor R0 in the overcurrent detection circuit 70.

[0034] An overcurrent determination threshold V DESAT of the overcurrent detection circuit 70 with such a configuration is determined by the sum of a saturation voltage V DS of the transistor, a forward voltage V F the diode HD with high breakdown voltage, the saturation voltage V DS of the MOS transistor Q1 and the resistance power loss (I CHG × R DESAT ), as in Fig. 25, and is represented by an equation V DESAT = (I CHG × R DESAT ) + V F + V DS . I CHG is a current flowing through the resistor R1, and R DESAT is a resistance value of the resistor R0.

[0035] Fig. 26 is a graph showing a temperature characteristic of the saturation voltage of the MOSFET, and a horizontal axis represents an ambient temperature E T (°C), and a vertical axis represents the saturation voltage V DS (V).

[0036] As in Fig. 26, the saturation voltage V DS of the MOSFET with increasing temperature, a positive trend of the temperature characteristic towards a larger absolute value, so that the overcurrent determination threshold V DESAT with increasing ambient temperature E T increases.

[0037] The control circuit CC monitors the overcurrent determination threshold, and when the overcurrent determination threshold becomes equal to or greater than a given voltage, the operation transitions to an overcurrent protection operation; however, due to the limited monitoring range of the control circuit CC, an operating temperature range of an overcurrent protection circuit is affected when the overcurrent determination threshold is excessively high due to high temperature.

[0038] However, in the semiconductor device 100, the high breakdown voltage diode HD is arranged adjacent to the MOS transistor Q1, which forms a heat source, so that, compared with a case where the high breakdown voltage diode HD is arranged outside the semiconductor device, a temperature of the high breakdown voltage diode HD increases and the forward voltage decreases to match the temperature characteristic of the saturation voltage V DSof the MOSFET in order to improve the detection accuracy of the overcurrent protection circuit. <Ausführungsform 2>

[0039] Fig. 5 is a perspective view illustrating a configuration of a semiconductor device 200 according to Embodiment 2. In Fig. 5 carry the same components as those of the semiconductor device 100, which with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0040] The Fig. The semiconductor device 200 illustrated in Fig. 5 has a configuration in which a distance LA from the semiconductor element SE to one end face of the circuit board CM1 and a distance LB from the semiconductor element SE to another end face of the circuit board CM1 are not equal.

[0041] Herein, one end face of the circuit board CM1 is an end face EP1 (a first end face) parallel to a longitudinal direction of the source terminal ST and the drain terminal DT, and the other end face is an end face EP2 (a second end face) orthogonal to the end face EP1. Fig. In the example illustrated in Fig. 5, a case is shown in which the circuit board CM1 is rectangular in plan view, and the semiconductor element SE, which is square in plan view, is mounted at the center of the upper surface of the circuit board CM1, and the distance LA (a first distance) to the end face EP1 on a long side of the circuit board CM1 is shorter than the distance LB (a second distance) to the end face EP2 on one side of a short side of the circuit board CM1, so that an inequality LA < LB is satisfied. The high breakdown voltage diode HD is mounted on the circuit board CM1 at a short distance from the semiconductor element SE on one side of the end face EP1.

[0042] When the semiconductor element SE is energized, the temperature of the circuit board CM1 increases with the semiconductor element SE as the heat source; however, if the distance LA and the distance LB from the semiconductor element SE to the end surfaces of the circuit board CM1 are not equal, thermal propagation, i.e., temperature distribution, is uneven, and a portion or sub-region with a shorter distance has a temperature closer to the temperature of the semiconductor element SE.

[0043] Fig. 6 is a conceptual diagram illustrating a temperature distribution of the circuit board CM1 when the semiconductor element SE is energized and represents a magnitude of the temperature by means of a density of dot hatching. As in Fig. As illustrated in Figure 6, an elliptical temperature distribution is formed, with the temperature decreasing toward the outside, and the semiconductor element SE having the maximum temperature in the center. A major diameter of the ellipse is parallel to a short side of the circuit board CM1, and a high-temperature region extends to a portion near a portion where the high-breakdown-voltage diode HD is mounted.

[0044] The high breakdown voltage diode HD is thus arranged in a partial area with a shorter distance from the semiconductor element SE to the end face of the circuit board CM1, so that a thermal bonding between the semiconductor element SE and the high breakdown voltage diode HD is increased in order to reduce the effect of a temperature dependence of the MOS transistor Q1 ( Fig. 1) as a MOSFET, thereby improving the detection accuracy of the overcurrent detection circuit 90.

[0045] Since the drain terminal DT and a conductive material for bonding the drain terminal DT to the circuit board CM1 are arranged in a portion with a longer distance from the end face, arrangements of the drain terminal DT and the conductive material are limited if the high breakdown voltage diode HD is arranged in this portion, but the limitation of the arrangements of the drain terminal DT and the conductive material is eliminated by arranging the high breakdown voltage diode HD in the portion with the shorter distance from the end face to improve the freedom in designing the semiconductor device.

[0046] An example where the circuit board CM1 is rectangular in plan view was shown with reference to Fig. 5; however, if the circuit board CM1 is square in plan view, the temperature distribution of the circuit board CM1 is uneven if the semiconductor element SE is not arranged at the center and the pitch LA and the pitch LB are not equal, so that a detection accuracy of the overcurrent detection circuit 90 in this case can be improved by disposing the high breakdown voltage diode HD in a portion with a shorter pitch. <Ausführungsform 3>

[0047] Fig. 7 is a perspective view illustrating a configuration of a semiconductor device 300 according to Embodiment 3. In Fig. 7 carry the same components as those of the semiconductor device 100, which with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0048] The Fig. The semiconductor device 300 illustrated in Figure 7 includes two semiconductor elements SE arranged in parallel on the upper surface of the circuit board CM1. The source terminal ST is connected in parallel to each of the two semiconductor elements SE, the temperature sensor TS is mounted on each of the semiconductor elements SE, and the cathode electrode and the anode electrode, which are not illustrated and are arranged on the upper surface of the temperature sensor TS, are electrically connected via the wires WR to one end of the cathode terminal KT and one end of the anode terminal AT, respectively, as plate-like conductive materials.

[0049] A gate pad (not illustrated) on the upper surface of each of the semiconductor elements SE is electrically connected via the wire WR to one end of the gate terminal GT as the plate-like conductive material.

[0050] Two drain terminals DT for the two semiconductor elements SE are connected to the upper surface of the circuit board CM1.

[0051] The high-breakdown voltage diode HD is mounted between the two semiconductor elements SE arranged on the upper surface of the circuit board CM1. When the two semiconductor elements SE are energized, the temperature of the circuit board CM1 increases, using the two semiconductor elements SE as a heat source. In an area where the semiconductor elements SE are adjacent to each other, the temperature increases due to thermal interference.

[0052] Fig. Fig. 8 is a conceptual diagram illustrating a temperature distribution of the circuit board CM1 when the two semiconductor elements SE are energized, and represents a magnitude of the temperature by means of a density of dot hatching. As shown in Fig. As illustrated in Figure 8, in the region where the semiconductor elements SE are adjacent to each other, the temperature is higher than that in the other concentric region due to thermal interference. The high breakdown voltage diode HD is arranged in such a region where thermal interference is induced, so that a thermal connection between the semiconductor elements SE and the high breakdown voltage diode HD is increased to reduce the effect of the temperature dependence of the MOS transistor Q1 ( Fig. 1) than the MOSFET, thereby improving the detection accuracy of the overcurrent detection circuit 90. <Ausführungsform 4>

[0053] Fig. 9 is a perspective view illustrating a configuration of a semiconductor device 400 according to Embodiment 4. In Fig. 9 carry the same components as those of the semiconductor device 100, which with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0054] The Fig. The semiconductor device 400 illustrated in Figure 9 includes three semiconductor elements SE arranged in parallel on the upper surface of the circuit board CM1. The source terminal ST is connected in parallel to each of the three semiconductor elements SE, the temperature sensor TS is mounted on each of the semiconductor elements SE, and the cathode electrode and the anode electrode, not illustrated and arranged on the upper surface of the temperature sensor TS, are electrically connected via the wires WR to one end of the cathode terminal KT and one end of the anode terminal AT, respectively, as the plate-like conductive materials.

[0055] A gate pad (not illustrated) on the upper surface of each of the semiconductor elements SE is electrically connected via the wire WR to one end of the gate terminal GT as the plate-like conductive material.

[0056] Three drain terminals DT for the three semiconductor elements SE are connected to the upper surface of the circuit board CM1.

[0057] The high-breakdown voltage diode HD is mounted in a region between the semiconductor element SE in the center and the semiconductor element SE to the left of the semiconductor element SE in the center, at a position closer to the semiconductor element SE in the center. When the three semiconductor elements SE are energized, the temperature of the circuit board CM1 increases with the three semiconductor elements SE as a heat source, and in a region where the semiconductor elements SE are adjacent to each other, the temperature increases due to thermal interference.

[0058] Fig. 10 is a conceptual diagram illustrating a temperature distribution of the circuit board CM1 when the three semiconductor elements SE are energized, and represents a magnitude of the temperature by means of a density of dot hatching. As shown in Fig. As illustrated in Figure 10, in the region where the semiconductor elements SE are adjacent to each other, the temperature is higher than that in the other concentric region due to thermal interference.

[0059] Since the semiconductor element SE in the center has the highest temperature due to thermal interference, the high breakdown voltage diode HD is arranged closer to the semiconductor element SE in the center, so that a thermal connection between the semiconductor elements SE and the high breakdown voltage diode HD is increased to reduce the effect of the temperature dependence of the MOSFET transistor Q1 ( Fig. 1) as the MOSFET, thereby improving the detection accuracy of the overcurrent detection circuit 90. While an example in which the three semiconductor elements SE are arranged on the upper surface of the circuit board CM1 has been described in the present embodiment, the number of semiconductor elements SE is not limited to three, and this configuration is effective when an odd number of semiconductor elements SE, such as five to seven semiconductor elements SE, is arranged. <Ausführungsform 5>

[0060] Fig. 11 is a perspective view illustrating a configuration of a semiconductor device 500 according to Embodiment 5. In Fig. 11 carry the same components as those of the semiconductor device 100, which with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted. Fig. 12 shows an equivalent circuit diagram of the semiconductor device 500.

[0061] The configurations of the semiconductor devices 100 to 400 according to Embodiments 1 to 4, in each of which the high breakdown voltage diode HD is mounted on the circuit board CM1, have been described; however, if a plurality of high breakdown voltage diodes HD are arranged on the circuit board CM1, they cannot be electrically connected in series.

[0062] In the Fig. In the semiconductor device 500 illustrated in Figure 11, an insulating substrate IM having two conductive patterns CM10 is mounted on the circuit board CM1, and high-breakdown-voltage diodes HD are mounted on the respective conductive patterns CM10 so that their cathodes face the respective conductive patterns CM10. A single high-breakdown-voltage diode HD is mounted on a portion of the circuit board CM1 near the insulating substrate IM so that its cathode faces the circuit board CM1.

[0063] The three diodes are arranged in a row. The anode of one of the high-breakdown voltage HD diodes (the first diode) closest to the control terminal PVT is connected to one end of the control terminal PVT via a WR wire. One of the conductive patterns CM10, on which the nearest high-breakdown voltage HD diode is mounted, and the anode of the next high-breakdown voltage HD diode are electrically connected via a WR wire. One of the conductive patterns CM10, on which the next high-breakdown voltage HD diode is mounted, and the anode of one of the high-breakdown voltage HD diodes (the second diode) on the circuit board CM1 are electrically connected via a WR wire.

[0064] Such a configuration allows a series connection of the three diodes HD with high breakdown voltage, as in Fig. 12 and increases the effect of the temperature dependence of the MOS transistor Q1 ( Fig. 1) than the MOSFET to improve the detection accuracy of the overcurrent detection circuit 90.

[0065] The number of arranged high breakdown voltage diodes HD is not limited to three, and only two or more high breakdown voltage diodes HD can increase the effect of counteracting the temperature dependence of the MOS transistor Q1. <Ausführungsform 6>

[0066] Fig. 13 is a cross-sectional view illustrating a partial configuration of a semiconductor device 600 according to the present embodiment, and is a Fig. 4 in the embodiment 1 corresponding view. As in Fig. 13, the semiconductor device 600 has a configuration in which high breakdown voltage diodes HD1 and HD2 are stacked in this order on the circuit board CM1.

[0067] A cathode layer KD1 of the high breakdown voltage diode HD1 is connected to the circuit board CM1 through a conductive material CM2, an anode layer AD1 of the high breakdown voltage diode HD1 is connected to a cathode layer KD2 of the high breakdown voltage diode HD2 through a conductive material CM2, one end of a wire WR is connected to an anode layer AD2 of the high breakdown voltage diode HD2 by wire bonding, and the other end of the wire WR is connected to the control terminal PVT.

[0068] A plurality of high breakdown voltage diodes are stacked as described above so that the plurality of high breakdown voltage diodes can be connected in series with a simpler configuration to manufacture the semiconductor device with the increased effect of counteracting the temperature dependence of the MOS transistor Q1 at a lower cost. <Ausführungsform 7>

[0069] Fig. 14 is a perspective view illustrating a configuration of a semiconductor device 700 according to Embodiment 7. Fig. 15 is a line along the CC of Fig. 14 taken cross-sectional view. In Fig. 14 carry the same components as those of the semiconductor device 100, which with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0070] In the Fig. In the semiconductor device 700 illustrated in Figure 14, the high breakdown voltage diode HD is mounted on the upper surface of the semiconductor element SE. While a surface electrode serving as the source electrode of the MOS transistor Q1 is disposed on the upper surface of the semiconductor element SE, an electrode electrically separated from the surface electrode and having the same potential as the drain electrode of the MOS transistor Q1 is disposed on the upper surface of the semiconductor element SE, and the high breakdown voltage diode HD is mounted on the electrode.

[0071] By mounting the high breakdown voltage diode HD on the MOS transistor Q1 as the switching element, the high breakdown voltage diode HD is arranged in close proximity to the switching element as a heat source, so that a thermal connection between the semiconductor element SE and the high breakdown voltage diode HD can be further increased to further increase the effect of counteracting the temperature dependence of the MOS transistor Q1.

[0072] With reference to Fig. 15 describes a cross-sectional configuration of the high breakdown voltage diode HD. In the following description, N and P refer to conductivity types of a semiconductor, and in the present disclosure, the description is made based on the assumption that a first conductivity type is N-type and a second conductivity type is P-type; however, the first conductivity type may be P-type, and the second conductivity type may be N-type. In addition, N indicates + -type indicates that an impurity concentration is higher than that of the N-type. Similarly, P + -Type indicates that an impurity concentration is higher than that of the P-type.

[0073] As in Fig. 15, the semiconductor element SE of the semiconductor device 700 includes a back electrode 15 (first main electrode) functioning as a drain electrode, on the lower surface side of which a semiconductor layer 1 of N + -type and an N-type semiconductor layer 2 are arranged in this order on the back electrode 15, a plurality of P-type semiconductor layers 3 are selectively arranged in an upper layer portion of the semiconductor layer 2, and N-type semiconductor layers 4 are + -type semiconductor layers 1 and 2 are selectively arranged within the surfaces of the P-type semiconductor layers 3. The semiconductor layer 1 and the semiconductor layer 2 form a semiconductor substrate.

[0074] A semiconductor layer 5 of N +-type is selectively arranged in the upper layer portion of the semiconductor layer 2 separated from the semiconductor layers 4, and an insulating film 16 for element separation is arranged between the semiconductor layers 3 and the semiconductor layer 5.

[0075] A gate electrode 12 is arranged via a gate insulating film 11 above a portion between end edges of two opposite semiconductor layers 4 arranged in adjacent semiconductor layers 3.

[0076] An interlayer insulating film 13 is disposed to cover the gate insulating film 11 and the gate electrode 12, and a surface electrode 14 (second main electrode), which functions as the source electrode, is disposed to cover the interlayer insulating film 13. The surface electrode 14 is a film made of Al or an aluminum alloy such as AISi.

[0077] While the configuration of the MOS transistor Q1 as the MOSFET has been described above, the MOS transistor Q1 has a known transistor structure formed by known technology, so a description of the manufacturing process and the like will be omitted.

[0078] A surface electrode 21, which has the same thickness as the surface electrode 14 and is made of the same material, is arranged on a top surface of the semiconductor layer 5, and a cathode electrode 22 of the high breakdown voltage diode HD is connected to the surface electrode 21 via a conductive material CM4. An N-type cathode layer 23 and a P-type anode layer 24 are stacked in this order on the cathode electrode 22, an anode electrode 25 is arranged on the anode layer 24, the conductive material CM4 is arranged on the anode electrode 25, one end of a wire WR is connected to the conductive material CM4 by wire bonding, and the other end of the wire WR is connected to the control terminal PVT. The same material as the conductive material CM2 described above can be used as the conductive material CM4.

[0079] The back electrode 15, which acts as the drain electrode, is a film of aluminum (Al) or an aluminum alloy such as AlSi, which is deposited on the semiconductor layer 1 of the N + -type, and, if the semiconductor layer 5 of the N + -type is arranged in the upper layer portion of the N-type semiconductor layer 2, an N + / N / N + -stack structure is formed, and the semiconductor layer 1 of the N + -type and the semiconductor layer 5 of N + -type have essentially the same potential. The cathode electrode 22 of the high-breakdown-voltage diode HD is thus pseudo-connected to the drain electrode, so that a configuration in which the high-breakdown-voltage diode HD is mounted on the MOS transistor Q1 can be achieved. <Ausführungsform 8>

[0080] Fig. 16 is a circuit diagram showing configurations of a semiconductor device 800 according to an embodiment 8 of the present disclosure and the overcurrent detection circuit 90. In Fig. 16 carry the same components as those of the semiconductor device 100, which with reference to Fig. 1, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0081] The Fig. The semiconductor device 800 shown in Fig. 16 includes a multiplier circuit MP arranged between the cathode of the high breakdown voltage diode HD and the drain terminal DT of the MOS transistor Q1.

[0082] The multiplier circuit MP is a VBE-type multiplier circuit comprising an NPN-type transistor Q2 having a collector terminal CT connected to the cathode of the high breakdown voltage diode HD and an emitter terminal ET connected to the drain terminal DT of the MOS transistor Q1, a resistor R1 (first resistor) connected between a base terminal BT and the emitter terminal of the transistor Q2, and a resistor R2 (second resistor) connected between the base terminal BT and the collector terminal CT of the transistor Q2.

[0083] The multiplier circuit MP can amplify a forward voltage of a PN junction diode including a base and an emitter of the transistor Q2 using the resistors R1 and R2, and set the forward voltage to a voltage level determined by the resistance values ​​of the resistors R1 and R2.

[0084] That is, a collector-emitter voltage V CE of the transistor Q2 is given by an equation V CE = (1 + R2 / R1)·V BE where R1 is a resistance value of resistor R1, R2 is a resistance value of resistor R2 and V BE is a base-emitter voltage of transistor Q2. The collector-emitter voltage V CE of the transistor Q2 can thus be set to any desired value by setting or adjusting the resistance values ​​of the resistors R1 and R2.

[0085] The base-emitter voltage V BE has a negative temperature characteristic or a negative temperature curve like the forward voltage of the diode and can be amplified by resistance value ratios of the resistance values ​​R1 and R2 without forming a series connection of the diode.

[0086] Fig. 17 is a perspective view illustrating a configuration of the semiconductor device 800 according to Embodiment 8. In Fig. 17 carry the same components as those of the semiconductor device 100, which with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0087] In the Fig. In the semiconductor device illustrated in Figure 17, the multiplier circuit MP is mounted on the upper surface of the circuit board CM1 at a position remote from the semiconductor element SE, and the high-breakdown-voltage diode HD is mounted at one end of the control terminal PVT. The multiplier circuit MP and the high-breakdown-voltage diode HD are electrically connected via a wire WR. An upper surface and a lower surface of the multiplier circuit MP serve as collectors and emitters, respectively.

[0088] Fig. 18 is a line DD from Fig. 17 taken cross-sectional view. As in Fig. 18, the multiplier circuit MP has a back electrode 31 functioning as an emitter electrode on its lower surface side, and the back electrode 31 is connected to the circuit board CM1 via a conductive material CM2.

[0089] An N-type semiconductor layer 32 is arranged on the back electrode 31, a P-type semiconductor layer 33 is selectively arranged in an upper layer portion of the semiconductor layer 32, and an N-type semiconductor layer 34 is arranged on the back electrode 31. + -type is selectively arranged within a surface of the P-type semiconductor layer 33.

[0090] An interlayer insulating film 35 is disposed on the semiconductor layer 32, and an emitter electrode 36 extending through the interlayer insulating film 35 to the semiconductor layer 32, a base electrode 37 extending through the interlayer insulating film 35 to the semiconductor layer 33, and a collector electrode 38 extending through the interlayer insulating film 35 to the semiconductor layer 34 are disposed on the interlayer insulating film 33.

[0091] Resistor R1 is disposed on a portion of interlayer insulating film 35 between emitter electrode 36 and base electrode 37, and resistor R2 is disposed on a portion of interlayer insulating film 35 between collector electrode 38 and base electrode 37. Resistors R1 and R2 are formed, for example, from polysilicon layers containing semiconductor impurities, and the resistance values ​​can be adjusted by adjusting the amount of impurities. The resistance values ​​can also be adjusted by adjusting the thicknesses of resistors R1 and R2 using laser dicing technology and the like.

[0092] One end of a wire WR is connected to the collector electrode 38 by wire bonding, and the other end of the wire WR is connected to a surface electrode 44 of the high breakdown voltage diode HD mounted on the control terminal PVT. In the high breakdown voltage diode HD, the back electrode 41, which functions as an anode electrode, is connected to the control terminal PVT via a conductive material CM2, a P-type anode layer 42 and an N-type cathode layer 43 are stacked in this order on the back electrode 41, and the surface electrode 44, which functions as a cathode electrode, is arranged on the cathode layer 43.

[0093] The multiplier circuit MP with a negative temperature characteristic is arranged near the switching element, which is the heat source, in order to reduce the effect of the temperature dependence of the MOS transistor Q1 ( Fig. 16) than the MOSFET, with a simpler configuration, thereby improving the detection accuracy of the overcurrent detection circuit 90. <Ausführungsform 9>

[0094] Fig. 19 is a circuit diagram showing configurations of a semiconductor device 900 according to an embodiment 9 of the present disclosure and the overcurrent detection circuit 90. The circuit shown in Fig. The semiconductor device 900 shown in Figure 19 has a configuration in which the high breakdown voltage diode HD is integrated in the semiconductor element SE. Fig. 19 carry the same components as those of the semiconductor device 100, which with reference to Fig. 1, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0095] Fig. Fig. 20 is a perspective view illustrating the configuration of the semiconductor device 900 according to Embodiment 9. In Fig. 207, the same components as those of the semiconductor device 100 described with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted.

[0096] In the Fig. In the semiconductor device 900 illustrated in Figure 20, the high breakdown voltage diode HD is disposed near a region of the semiconductor element SE where the source terminal ST is connected, on a side opposite to a position where the temperature sensor TS is disposed, and is connected to one end of the control terminal PVT via a wire WR. Fig. 20, the semiconductor element SE and the high breakdown voltage diode HD are divided for simplicity.

[0097] Fig. 21 is a line along the EE from Fig. 20 taken cross-sectional view. As in Fig. As illustrated in Fig. 21, the semiconductor element SE includes the back electrode 15 which functions as the drain electrode, on the lower surface side of which are the semiconductor layer 1 of the N + -type and the N-type semiconductor layer 2 are arranged in this order on the back electrode 15, the plurality of P-type semiconductor layers 3 are selectively arranged in the upper layer portion of the semiconductor layer 2, and the N-type semiconductor layers 4 are + -type semiconductor layers 3 are selectively arranged within the surfaces of the P-type semiconductor layers 3. The semiconductor layer 1 and the semiconductor layer 2 form the semiconductor substrate.

[0098] A P-type semiconductor layer 7 is selectively disposed in the upper layer portion of the semiconductor layer 2, and the insulating film 16 for element separation is disposed between the semiconductor layers 3 and the semiconductor layer 7.

[0099] The gate electrode 12 is arranged over the gate insulating film 11 above the portion between the end edges of two opposite semiconductor layers 4 arranged in adjacent semiconductor layers 3.

[0100] The interlayer insulating film 13 is arranged to cover the gate insulating film 11 and the gate electrode 12, and the surface electrode 14, which functions as the source electrode, is arranged to cover the interlayer insulating film 13. The surface electrode 14 is a film made of Al or an aluminum alloy such as AlSi.

[0101] While the configuration of the MOS transistor Q1 as the MOSFET has been described above, the MOS transistor Q1 has a known transistor structure formed by a known technology, so a description of the manufacturing process and the like will be omitted.

[0102] The surface electrode 21, which has the same thickness as the surface electrode 14 and is made of the same material as the latter, is arranged on a top side of the semiconductor layer 7. The wire WR ( Fig. 20) is connected to the surface electrode 21 by wire bonding. The surface electrode 21 functions as the anode electrode, and the surface electrode 21, the semiconductor layer 7, the semiconductor layer 2, the semiconductor layer 1, and the back electrode 15 form the high breakdown voltage diode HD.

[0103] By integrating the MOS transistor Q1 and the high breakdown voltage diode HD in a common semiconductor substrate as in Fig. 21, the high breakdown voltage diode HD is arranged at a position in close proximity to the switching element as the heat source, so that thermal junction can be extremely increased. <Ausführungsform 10>

[0104] Fig. 22 is a perspective view illustrating a configuration of a semiconductor device 1000 according to Embodiment 10. In Fig. 22 carry the same components as those of the semiconductor device 100, which with reference to Fig. 2, the same reference numerals as those of the same components are given, and redundant description is omitted. Fig. 23 shows an equivalent circuit diagram of the semiconductor device 1000.

[0105] While configurations of the semiconductor device 100 to 900 according to Embodiments 1 to 9 in which the temperature sensor TS is mounted on the semiconductor element SE, respectively, have been shown, the temperature sensor TS in the embodiment shown in Fig. 22 is mounted on the high breakdown voltage diode HD.

[0106] The cathode electrode and the anode electrode, not shown, located on the upper surface of the temperature sensor TS are electrically connected via wires WR to one end of the cathode terminal KT and one end of the anode terminal AT, respectively. The high breakdown voltage diode HD is electrically connected via wire WR to one end of the control terminal PVT.

[0107] Fig. 24 is a line along the FF from Fig. 22 taken cross-sectional view. As in Fig. As illustrated in Fig. 24, the high breakdown voltage diode HD includes a back electrode 50 functioning as a cathode electrode on its lower surface side, an N-type semiconductor layer 51 and a P-type semiconductor layer 52 are disposed in this order on the back surface 50, a silicon oxide film 53 is selectively disposed in an upper layer portion of the semiconductor layer 52, and an N-type semiconductor layer 54 and an N-type semiconductor layer 55 are diode-connected to the silicon oxide film 53 to constitute the temperature sensor TS. The semiconductor layer 54 and the semiconductor layer 55 are formed by doping a polysilicon layer with N-type impurities and P-type impurities, respectively.

[0108] The semiconductor layer 54 and the semiconductor layer 55 are covered with an interlayer insulating film 56 made of boron phosphosilicate glass (BPSG), tetraethyl orthosilicate (TEOS), a low-temperature oxide (LTO), and the like. A cathode electrode 57 and an anode electrode 58 of the temperature sensor TS, which extend through the interlayer insulating film 56 to the semiconductor layer 54 and the semiconductor layer 55, respectively, are arranged on the interlayer insulating film 56. The respective wires WR ( Fig. 22) are connected by wire bonding to the cathode electrode 57 and the anode electrode 58. The temperature sensor TS on the semiconductor element SE of each of the semiconductor devices 100 to 900 according to Embodiments 1 to 9 has a similar configuration to the sensor TS in Fig. 28.

[0109] A surface electrode 59, which functions as an anode electrode of the high breakdown voltage diode HD, is arranged on the semiconductor layer 52 in a region where the silicon oxide film 53 is not arranged, and the wire WR ( Fig. 22) is connected to the surface electrode 59 by wire bonding.

[0110] By such a configuration, the temperature sensor TS is integrated into the diode HD with high breakdown voltage and the semiconductor element SE has a configuration in which only the MOS transistor Q1 and the diode D1 as in Fig. 23 are illustrated.

[0111] When the MOS transistor Q1 is formed from a wide-bandgap semiconductor such as silicon carbide (SiC) and gallium nitride (GaN), the chip size, that is, the size of a SiC substrate or a GaN substrate, can be reduced by disposing the temperature sensor TS on the high-breakdown voltage diode HD formed from a silicon semiconductor, thus reducing the cost of the semiconductor device. Forming a silicon semiconductor element and a wide-bandgap semiconductor element as separate chips can simplify the manufacturing process and reduce the cost of the semiconductor device.

[0112] Although the present disclosure has been described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous non-illustrated modifications may be devised without departing from the scope of the present disclosure.

[0113] Embodiments may be freely combined with each other as appropriate within the scope of the present disclosure and may be modified or omitted.

Claims

[1] A semiconductor device comprising: a first main terminal provided with a first potential; a second main terminal provided with a second potential lower than the first potential; a control terminal connected to an externally arranged overcurrent detection circuit; at least one semiconductor element including a MOS transistor connected between the first main terminal and the second main terminal; and at least one diode having a cathode electrically connected to the first main terminal and an anode electrically connected to the control terminal and protecting the overcurrent detection circuit, wherein the at least one semiconductor element is mounted on a printed circuit board and the at least one semiconductor element and the at least one diode are sealed with an insulating resin. [2] The semiconductor device according to claim 1, wherein the at least one diode is mounted on the circuit board. [3] A semiconductor device according to claim 2, wherein the at least one semiconductor element is mounted at a position on the circuit board at which a first distance from the at least one semiconductor element to a first end face of the circuit board and a second distance from the at least one semiconductor element to a second end face orthogonal to the first end face are different, the first distance is shorter than the second distance and the at least one diode is mounted on one side of the first end face on the circuit board. [4] A semiconductor device according to claim 1, wherein the at least one semiconductor element has two semiconductor elements, the two semiconductor elements are mounted on the circuit board in a row so that they are spaced apart from each other, and at least one diode is mounted between the two semiconductor elements. [5] A semiconductor device according to claim 1, wherein the at least one semiconductor element has an odd number of semiconductor elements, the odd number being three or more, the three or more semiconductor elements are mounted on the circuit board in a row so that they are spaced apart from each other, and the at least one diode is mounted between a semiconductor element in the center and another semiconductor element located outside the semiconductor element in the center so that it is closer to the semiconductor element in the center. [6] A semiconductor device according to claim 1, wherein the at least one diode comprises a plurality of diodes, the plurality of diodes are mounted in a row on respective conductor patterns of an insulating substrate arranged above the circuit board so that they are spaced apart from each other and are electrically connected in series, and of the plurality of diodes, an anode of a first diode at one end of the array is electrically connected to the control terminal and a cathode of a second diode at the other end of the array is electrically connected to the first main terminal. [7] A semiconductor device according to claim 1, wherein the at least one diode comprises a plurality of diodes and the plurality of diodes are stacked on the circuit board so that their cathodes are on one side of the circuit board, the plurality of diodes being electrically connected in series. [8] A semiconductor device according to claim 1, wherein which comprises at least one semiconductor element: a first main electrode opposite the circuit board and a second main electrode located on a side opposite the first main electrode; and a surface electrode adjacent to the second main electrode and electrically separated from the second main electrode, the surface electrode is electrically connected to the first main electrode via the interior of the at least one semiconductor element and the at least one diode is mounted on the surface electrode of the at least one semiconductor element such that the cathode is electrically connected to the surface electrode. [9] The semiconductor device according to claim 1, further comprising a multiplier circuit arranged between the cathode of the at least one diode and the first main terminal, wherein the multiplier circuit includes: a first transistor having a collector electrically connected to the cathode of the at least one diode and an emitter electrically connected to the first main terminal; a first resistor electrically connected between a base of the transistor and the emitter; and a second resistor electrically connected between the base and the collector. [10] A semiconductor device according to claim 1, wherein which comprises at least one semiconductor element: a first main electrode opposite the circuit board and a second main electrode located on a side opposite the first main electrode; and a surface electrode adjacent to the second main electrode and electrically separated from the second main electrode, and the at least one diode is arranged within the at least one semiconductor element such that the anode is connected to the surface electrode and the cathode is connected to the first main electrode. [11] The semiconductor device according to claim 1, further comprising a temperature sensor mounted on the at least one semiconductor element and detecting a temperature of the at least one semiconductor element, wherein the temperature detected by the temperature sensor is fed back to the overcurrent detection circuit. [12] The semiconductor device according to claim 1, further comprising a temperature sensor mounted on the at least one diode and detecting a temperature of the at least one semiconductor element, wherein the temperature detected by the temperature sensor is fed back to the overcurrent detection circuit. [13] The semiconductor device according to claim 1, wherein the overcurrent detection circuit detects a desaturation voltage of the MOS transistor to provide overcurrent protection to the MOS transistor.

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