Ceramic multilayer electronic component and manufacturing method of a ceramic multilayer electronic component

Abstract

A ceramic multilayer electronic component comprises a body 10 including a multilayer portion in which a plurality of dielectric layers 11 and a plurality of internal electrode layers 12 are stacked one on top of the other, each of the internal electrode layers 12 being arranged to be exposed from one of the two opposite end surfaces of the body 10, the body 10 having side edges 16 which are provided in a third direction orthogonal to a first direction in which the internal electrode layers 12 face each other and to a second direction in which the two end surfaces face each other, outside a capacitance portion 14 as a region in which the dielectric layers 11 and the internal electrode layers 12 face each other, and which vanadium concentration to ceramic as a main component is higher than the capacitance portion 14.

Description

[Technical field]

[0001] The present invention relates to a ceramic multilayer electronic component and a manufacturing method of a ceramic multilayer electronic component. [Technical background]

[0002] In various electronic devices, multilayer ceramic electronic components such as multilayer ceramic capacitors or the like are used for voltage stabilization during charging and discharging, noise suppression, etc. In high-performance multilayer ceramic electronic components, a different material than the dielectric material for the capacitor portion is increasingly used for side edges to match the sinterability of the capacitor portion with that of the side edges (see Patent Documents 1 and 2, for example). [Prior Art Documents][Patent Documents] [Patent Document 1] JP 2017-038036 A [Patent Document 2] JP 2014-143392 A [Summary of the invention][Problem to be solved by the invention]

[0003] In multilayer ceramic electronic components, the sintering state differs between the capacitance portion and the side edges due to the effect of diffusion and the effect of density differences from the metallic components in the internal electrode layer. Therefore, there is a risk of insufficient moisture resistance in the side edges due to insufficient densification at low firing temperatures when the same materials are used for the capacitance portion and the side edges.

[0004] As a measure to improve the lack of moisture resistance, it is conceivable to increase the liquid phase component, such as Si (silicon), in the side edges than in the capacitance section. However, this measure may lead to abnormal grain growth at the side edges, resulting in insufficient reliability.

[0005] The present invention is made in view of the above object, and its purpose is to provide a ceramic multilayer electronic component that can solve insufficient moisture resistance due to insufficient densification and insufficient reliability due to abnormal grain growth in side edges, and its manufacturing method. [Means of solving the task]

[0006] A ceramic multilayer electronic component according to the present invention comprises a body including a multilayer portion in which a plurality of dielectric layers and a plurality of internal electrode layers are stacked, each of the internal electrode layers being arranged to be exposed from one of two opposite end surfaces of the body, the body having side edges which are provided in a third direction orthogonal to a first direction in which the internal electrode layers face each other and to a second direction in which the two end surfaces face each other, outside a capacitance portion as a region in which the dielectric layers and the internal electrode layers face each other, and in which vanadium concentration to ceramic as a main component is higher than the capacitance portion.

[0007] In the ceramic multilayer electronic component set forth above, in the third direction, the side edges may have a first region located near the capacitance portion and a second region located far from the capacitance portion, and a vanadium concentration to ceramic as a main component in the second region may be lower than that in the first region.

[0008] In the ceramic multilayer electronic component set forth above, a vanadium concentration in the side edges to ceramic as a main component may be higher by 0.05 at.% or more than that in the capacitance portion.

[0009] In the ceramic multilayer electronic component described above, the capacitance section may contain vanadium.

[0010] In the ceramic multilayer electronic component set forth above, in the third direction, the capacitance portion may have a central region and an outer region located outside the central region, and a vanadium concentration to ceramic as a main component may be lower in the central region than that in the outer region.

[0011] In the ceramic multilayer electronic component set forth above, a vanadium concentration to ceramic as a main component in the outer region may be higher by 0.02 at.% or more than that in the central region.

[0012] In the ceramic multilayer electronic component set forth above, an average thickness of the dielectric layers in the first direction may be 0.8 µm or less.

[0013] In the ceramic multilayer electronic component set forth above, an average thickness of the internal electrode layers in the first direction may be 0.7 µm or less.

[0014] A manufacturing method of a ceramic multilayer electronic component according to the present invention includes a process of forming an internal electrode pattern on a ceramic green sheet, a process of forming a dielectric pattern in a vicinity of the internal electrode pattern whose vanadium concentration to ceramic as a main component is higher than that of the ceramic green sheet, a process of stacking the ceramic green sheets on which the internal electrode pattern and the dielectric pattern are formed to acquire a multilayer body, and a process of firing the multilayer body.

[0015] In the manufacturing method set forth above, a vanadium concentration to ceramic as a main component in the dielectric pattern may be higher by 0.1 at.% or more than that in the ceramic green sheet.

[0016] Another manufacturing method of a ceramic multilayer electronic component according to the present invention includes a process of forming an internal electrode pattern on a ceramic green sheet, a process of stacking the ceramic green sheets on which the internal electrode pattern is formed to acquire a multilayer body, a process of forming, in a vicinity of the internal electrode pattern, side edge portions whose vanadium concentration to ceramic as a main component is higher than that of the ceramic green sheet, and a process of firing the multilayer body on which the side edge portions are formed.

[0017] In the manufacturing method described above, a vanadium concentration to ceramic as a main component in the side edges may be 0.05 at.% or more higher than that in the ceramic green sheet. [Advantages of the invention]

[0018] According to the present invention, there can be provided a ceramic multilayer electronic component which can solve the lack of moisture resistance due to insufficient densification and insufficient reliability due to abnormal grain growth in side edges, and its manufacturing method. [Brief description of the drawings] [ Fig. 1] is a partial perspective sectional view of the multilayer ceramic capacitor. [ Fig. 2] is an AA sectional view according to Fig. 1. [ Fig. 3] is a BB sectional view according to Fig. 1. [ Fig.4] is a view showing an example of the first area and the second area in the page margin. [ Fig. 5] is a view showing an example of the indoor and outdoor areas in the capacity section. [ Fig. 6] is a view showing an example of the flow of the manufacturing process of a multilayer ceramic capacitor. [ Fig. 7] (a) and (b) are views showing examples of the formation process of the inner electrode. [ Fig. 8] is a view showing an example of the pressing process. [ Fig. 9] is a view showing an example of the side margin section. [ Fig. [Figure 10] is a view showing an example of the measurement results of LA-ICP-MS in the Y-axis direction. [Embodiment of the invention]

[0019] In the following, an embodiment is explained with reference to the drawings. (Embodiment)

[0020] Fig. 1 is a partially perspective sectional view of the multilayer ceramic capacitor 100 according to the embodiment. Fig. 2 is an AA sectional view according to Fig. 1. Fig. 3 is a BB sectional view according to Fig. 1. As in Fig.1 to 3, the multilayer ceramic capacitor 100 includes a body 10 having a substantially rectangular parallelepiped shape and external electrodes 20a, 20b provided on two opposite end surfaces of the body 10. Of four end surfaces of the body 10, other than the two end surfaces in question, the two surfaces other than the upper surface and lower surface in the multilayer direction are referred to as side surfaces. The external electrodes 20a, 20b extend onto the upper surface, lower surface, and the two side surfaces in the multilayer direction of the body 10. However, the external electrodes 20a, 20b are spaced apart from each other.

[0021] In Fig.1 to 3, the Z-axis direction (first direction) is a direction of the multilayer and a direction in which each internal electrode layer is opposed. The X-axis direction (second direction) is a longitudinal direction of the body 10 and a direction in which two end surfaces of the body 10 are opposed, and a direction in which the external electrode 20a and the external electrode 20b are opposed. The Y-axis direction (third direction) is a transverse direction of the internal electrode layer and a direction in which, among four side surfaces of the body 10, two side surfaces other than the two side surfaces are opposed. The X-axis direction, the Y-axis direction, and the Z-axis direction are orthogonal to each other.

[0022] The body 10 has the dielectric layer 11, which contains ceramic materials functioning as a dielectric, and an internal electrode layer 12, which are alternately layered one above the other. The edges of each internal electrode layer 12 are alternately exposed at the end face of the body 10 where the external electrode 20a is provided and at the end face where the external electrode 20b is provided. Thus, each internal electrode layer 12 is alternately conductively connected to the external electrode 20a or to the external electrode 20b. Thus, the multilayer ceramic capacitor 100 has a plurality of dielectric layers 11 layered over the internal electrode layer 12.Furthermore, in the multilayer body with the dielectric layer 11 and the internal electrode layer 12, the internal electrode layer 12 is arranged on the outermost layer in the direction of the multilayer, and the upper surface and lower surface of the multilayer body in question are covered with the cover layer 13. In the cover layer 13, the ceramic materials are the main component. For example, it is irrelevant whether the composition of the cover layer 13 is identical to the composition of the dielectric layer 11 or not. If the internal electrode layer 12 is exposed on two different surfaces and conductively connected to two different external electrodes, it is not limited to the embodiments according to . Fig. 1 to 3 limited.

[0023] The size of the multilayer ceramic capacitor 100 is, for example, length 0.25 mm, width 0.125 mm, height 0.125 mm, or length 0.4 mm, width 0.2 mm, height 0.2 mm, or length 0.6 mm, width 0.3 mm, height 0.3 mm, or length 1.0 mm, width 0.5 mm, height 0.5 mm, or length 3.2 mm, width 1.6 mm, height 1.6 mm, or length 4.5 mm, width 3.2 mm, height 2.5 mm, and it is not limited to these sizes.

[0024] The main component of the internal electrode layer 12 is a base metal such as nickel (Ni), copper (Cu), tin (Sn), etc. A noble metal such as platinum (Pt), palladium (Pd), silver (Ag), gold (Au), or an alloy containing these noble metals can be used as the internal electrode layer 12. The average thickness of the internal electrode layers 12 in the Z-axis direction is, for example, 0.35 µm or more, 0.70 µm or less, or 0.65 µm or less. The thicknesses of the internal electrode layers 12 can be measured by observing the cross section of the multilayer ceramic capacitor 100 with a scanning electron microscope (SEM) and measuring the thicknesses of each of 10 points on 10 different internal electrode layers 12 to derive the average value over all measurement points.

[0025] For the dielectric layer 11, ceramic material with perovskite structure is provided as the main phase, which can be described, for example, by the general formula ABO3 In addition, the perovskite structure in question contains ABO 3-α which deviates from the stoichiometric composition. For example, at least one material of barium titanate (BaTiO 3 ), calcium zirconate (CaZrO 3 ), calcium titanate (CaTiO 3 ), strontium titanate (SrTiO 3 ), magnesium titanate (MgTiO 3 ), Ba forming perovskite structure 1-x-y Ca x Sr y Ti 1-z Zr z O 3 (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1) or the like can be selected and used. 1-x-y Ca x Sr y Ti 1-z Zr z O 3consists of barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, calcium barium zirconate titanate, etc. For example, the dielectric layer 11 contains ceramic as a main component of 90 at.% or more. The thickness of the dielectric layer 11 is, for example, 0.40 µm or more, 0.80 µm or less, and 0.75 µm or less. The thicknesses of the dielectric layers 11 can be measured by observing the cross section of the multilayer ceramic capacitor 100 with an SEM (Scanning Electron Microscope) and measuring the thicknesses of each of 10 points on 10 different dielectric layers 11 to derive the average value over all measurement points.

[0026] An additive may be included in the dielectric layer 11. The additives of the dielectric layer 11 include zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), oxides of rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glass containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0027] As in Fig.2, the region where the internal electrode layers 12 connected to the external electrodes 20a and the internal electrode layers 12 connected to the external electrodes 20b are opposite each other is a region where the electrical capacitance is generated in the multilayer ceramic capacitor 100. In this case, the region where the relevant electrical capacitance is generated is referred to as the capacitance section 14. That is, the capacitance section 14 is a region where the adjacent internal electrode layers 12 connected to the different external electrodes are opposite each other.

[0028] The region where the internal electrode layers 12 connected to the external electrodes 20a do not oppose each other via the internal electrode layers 12 connected to the external electrodes 20b is referred to as an end edge 15. Furthermore, the region where the internal electrode layers 12 connected to the external electrodes 20b do not oppose each other via the internal electrode layers 12 connected to the external electrodes 20a is also an end edge 15. That is, the end edge 15 is a region where the internal electrode layers 12 connected to the same external electrodes do not oppose each other via the internal electrode layers 12 connected to different external electrodes. The end edge 15 is a region where no electric capacitance is generated.

[0029] As in Fig.3, in the body 10, the side edges 16 are the regions provided to cover the edges on the sides of the two side surfaces of the dielectric layer 11 and the internal electrode layer 12 (edges in the Y-axis direction). That is, the side edges 16 are regions provided in the Y-axis direction, on the outer sides of the capacitance portion 14. The side edges 16 are also regions where no electrical capacitance is generated.

[0030] The ceramic materials are the main component of the side edges 16. The ceramic as the main component of the side edges 16 can have the same composition as the ceramic as the main component of the dielectric layer 11 in the capacitance section 14 or a different composition. The side edges 16 can be formed by firing to sinter the ceramic powder. The dielectric layer 11 can also be formed by firing to sinter the ceramic powder. During this firing, the capacitance section 14 is susceptible to the diffusion of the metallic components into the internal electrode layer 12. Furthermore, density differences can occur between the capacitance section 14 and the side edges 16 because the capacitance section 14 encompasses the internal electrode layer 12.As a result, there is a risk of insufficient moisture resistance in the side edges 16 due to insufficient densification at low firing temperatures if the same dielectric materials are used for the capacitance section 14 and the side edges 16.

[0031] For example, it is conceivable that the concentration of the liquid phase component such as Si in the dielectric layer 11 in the capacitance portion 14 is higher than that in the side edges 16. In this case, many liquid phases may be formed in the side edges 16 during firing to promote the sintering of the side edges 16. However, in this case, abnormal grain growth may occur at the side edges 16, resulting in insufficient reliability.

[0032] Here, the multilayer ceramic capacitor 100 according to the present embodiment has the structure in which the lack of moisture resistance due to the insufficient densification and the insufficient reliability due to the abnormal grain growth in side edges 16 are solved.

[0033] Specifically, V (vanadium) is added to enhance sinterability in the side edges 16. This promotes sintering of the side edges 16 without requiring more liquid phase components to generate multiple liquid phases during firing. Regarding the present embodiment, a vanadium concentration to ceramics as a main component in the side edges 16 is higher than that in the dielectric layer 11 in the capacitance portion 14. The vanadium concentration to ceramics as a main component is an atomic concentration (at.%) of vanadium when the amount of B-site elements in the perovskite structure is 100 at.%. When the main component is barium titanate, it is an atomic concentration (at.%) of vanadium when the amount of Ti is 100 at.%. According to this embodiment, it is possible to promote the sintering of the side edges 16 while suppressing the sintering of the dielectric layer 11 in the capacitance portion 14.This can solve the lack of moisture resistance due to insufficient compaction in the side edges 16. Furthermore, the lack of reliability due to abnormal grain growth can be solved by not using many or even no liquid phase components.

[0034] In order to fully promote the sintering of the side edges 16, it is preferable to set a lower limit for the difference between the vanadium concentration to ceramic as the main component in the side edges 16 and the vanadium concentration to ceramic as the main component in the dielectric layer 11 in the capacitance portion 14. For example, the vanadium concentration to ceramic as the main component in the entire side edges 16 is preferably 0.05 at.% or more higher, more preferably 0.1 at.% or more higher, and even more preferably 0.2 at.% or more higher than the vanadium concentration to ceramic as the main component in the entire dielectric layer 11 in the capacitance portion 14.

[0035] On the other hand, in consideration of interdiffusion, it is preferable to set an upper limit for the difference between the vanadium concentration to ceramic as the main component in the side edges 16 and the vanadium concentration to ceramic as the main component in the dielectric layer 11 in the capacitance portion 14. For example, the difference between the vanadium concentration to ceramic as the main component in the entire side edges 16 and the vanadium concentration to ceramic as the main component in the entire dielectric layer 11 in the capacitance portion 14 is preferably 1.0 at.% or less, more preferably 0.5 at.% or less, and even more preferably 0.3 at.% or less.

[0036] In order to fully promote the sintering of the side edges 16, it is preferable to set a lower limit for the vanadium concentration to ceramics as the main component in the side edges 16. For example, the vanadium concentration to ceramics as the main component in the entire side edges 16 is preferably 0.05 at.% or more, more preferably 0.1 at.% or more, and even more preferably 0.15 at.% or more.

[0037] On the other hand, in consideration of interdiffusion, it is preferable to set an upper limit for the vanadium concentration to ceramics as the main component in the side edges 16. For example, the vanadium concentration to ceramics as the main component in the entire side edges 16 is preferably 1.0 at.% or less, more preferably 0.5 at.% or less, and even more preferably 0.3 at.% or less.

[0038] From the viewpoint of suppressing sintering in the capacitance portion 14, it is preferable to set an upper limit on the vanadium concentration to ceramic as a main component in the dielectric layer 11 in the capacitance portion 14. For example, the vanadium concentration to ceramic as a main component in the entire dielectric layer 11 in the capacitance portion 14 is preferably 1.0 at.% or less, and more preferably 0.5 at.% or less, and even more preferably 0.3 at.% or less.

[0039] In the side edges 16, in the region close to the capacitance section 14, sintering progresses slightly due to the diffusion of the metallic components from the internal electrode layer 12. Here, in the side edges 16, the vanadium concentration to ceramic as the main component in the region close to the capacitance section 14 in the Y-axis direction is preferably lower than the vanadium concentration to ceramic as the main component in the region far from the capacitance section 14. For example, as shown in Fig.4, the side edges 16 in the Y-axis direction have the first region 161, which is close to the capacitance section 14, and the second region 162, which is far from the capacitance section 14. In this case, the vanadium concentration to ceramic as the main component in the first region 161 is preferably lower than the vanadium concentration to ceramic as the main component in the second region 162. In this embodiment, the sintered state in the side edges 16 can be homogenized to densify the entire side edges 16.

[0040] Otherwise, in the side edges 16, the vanadium concentration to ceramic as the main component preferably increases stepwise (gradually) in the Y-axis direction from the side of the capacity section 14 outward. In this embodiment, the sintered state in the side edges 16 can be further homogenized to further densify the entire side edges 16. In this case, the term "stepwise increase" includes both a continuous increase (monotonic increase) and a decrease as a whole through repeated increases and decreases when the vanadium concentration to ceramic as the main component is measured at multiple sample points from the side of the capacity section 14 outward along the Y-axis direction.

[0041] In the capacitance section 14, sintering proceeds more easily in the central region than in the outer region due to reasons such as the diffusion of the internal electrode materials. In the capacitance section 14, the vanadium concentration relative to the ceramic as the main component in the central region is preferably lower than the vanadium concentration relative to the ceramic as the main component in the outer region. For example, as shown in Fig. 5, the capacitance section 14 in the Y-axis direction has the central region 141 and the outer region 142, which lies outside the central region 141. In this case, the vanadium concentration relative to the ceramic as the main component in the central region 141 is preferably lower than the vanadium concentration relative to the ceramic as the main component in the outer region 142.

[0042] For example, in the capacity section 14, in the range from the center to the end in the Y-axis direction, the area halfway from the center is referred to as the central area 141, and the remaining area is referred to as the outer area 142. In this case, the vanadium concentration to ceramics as the main component in the outer area 142 is preferably 0.02 at.% or more higher, more preferably 0.05 at.% or more higher, and even more preferably 0.08 at.% or more higher than the vanadium concentration to ceramics as the main component in the central area 141.

[0043] From the viewpoint of suppressing abnormal grain growth, it is preferable to set an upper limit on the total concentration of (silicon + boron) to ceramic as the main component in the side edges 16. For example, the total concentration of (silicon + boron) to ceramic as the main component in the side edges 16 is preferably 2.5 at.% or less, and more preferably 2.0 at.% or less.

[0044] The manufacturing process of the multilayer ceramic capacitor 100 is explained below. Fig. 6 is a view showing an example of the flow of the manufacturing method of a multilayer ceramic capacitor 100. (Manufacturing process of raw material powder)

[0045] First, dielectric materials are prepared to form the dielectric layer 11. The A-site elements and B-site elements contained in the dielectric layer 11 are mostly in the form of a sintered body made of ABO 3-particles contained in the dielectric layer 11. For example, barium titanate is a tetragonal compound with a perovskite structure that has a high dielectric constant. This barium titanate can generally be obtained by synthesizing barium titanate through the reaction of titanium raw materials such as titanium dioxide and barium raw materials such as barium carbonate. As a method for synthesizing the ceramic as the main component of the dielectric layer 11, various methods are known, such as the solid-phase method, the sol-gel method, and the hydrothermal method, etc. With respect to the present embodiment, any of these methods can be adopted.

[0046] The specified additives are appropriately added to the purchased ceramic powder. These additives include zirconium, hafnium, magnesium, manganese, molybdenum, vanadium, chromium, oxides of rare earth elements (yttrium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, and ytterbium), oxides containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon, or glass containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0047] For example, ceramic material is prepared by wet-mixing ceramic raw material powder with a compound containing additives, drying, and grinding. For example, the ceramic material obtained as described above can be crushed if necessary to adjust the particle size or combined with a classification process to adjust the particle size. Dielectric materials are obtained through the processes described above.

[0048] Next, dielectric pattern materials for forming the side edges 16 are prepared. Dielectric pattern materials contain ceramic powder as the main component of the side edges 16. For example, the ceramic powder as the main component can be used as the ceramic powder. The specified additives are preferably added. At least the vanadium concentration relative to the ceramic as the main component in the dielectric pattern materials is higher than the vanadium concentration relative to the ceramic as the main component in the dielectric materials. (coating process)

[0049] Next, the obtained raw material powder is wet-mixed with a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer. Using the obtained slurry, the ceramic green sheet 51 is coated onto the substrate by, for example, the die coating method or the doctor blade method, and then dried. The substrate is, for example, a polyethylene terephthalate (PET) film. The view showing an example of the coating process is omitted. (Formation process of the inner electrode)

[0050] Next, as in Fig.As shown in Figure 7 (a) by way of example, the internal electrode pattern 52 for the internal electrode layer is formed by printing a metallic conductive paste for forming the internal electrode, which contains an organic binder, onto the surface of the ceramic green sheet 51 by screen printing, engraving, etc. In addition to nickel, ceramic particles are added to the metallic conductive paste as a co-material. The main component of the ceramic particles is not particularly limited, but is preferably the same as the ceramic as the main component of the dielectric layer 11.

[0051] Next, an ethylcellulose-based binder, etc., and an organic solvent such as terpineol are added to the dielectric pattern materials obtained from the raw material powder and kneaded in a rolling mill to obtain the dielectric pattern paste for the backside pattern layer. As shown in Fig.As shown in Fig. 7 (a) by way of example, a dielectric pattern 53 is arranged on the ceramic green sheet 51 by printing the dielectric pattern paste on the peripheral portion where the internal electrode pattern 52 is not printed, to fill the step difference with the internal electrode pattern 52. The ceramic green sheet 51 on which the internal electrode pattern 52 and the dielectric pattern 53 are printed is referred to as a multilayer unit.

[0052] Then, as in Fig.7 (b) by way of example, the multilayer units are stacked such that the internal electrode layer 12 and the dielectric layer 11 alternate, and the internal electrode layer 12 is alternately drawn out into a pair of external electrodes 20a, 20b having different polarities by alternately exposing the edges of the two end surfaces of the dielectric layer 11 in the longitudinal direction. For example, the multilayer number of the internal electrode pattern 52 is set to 100 to 500. (compression process)

[0053] As in Fig. 8, only the predetermined number (e.g. 2 to 10 layers) of the cover films 54 are layered and pressed onto the top and bottom sides of the multilayer body in which the multilayer units are layered. (Firing process)

[0054] After the ceramic multilayer body obtained in this way has been heated in a N 2atmosphere, the metallic paste is applied by dipping, which will be the base layer of the external electrodes 20a, 20b, to heat the ceramic multilayer body in a reducing atmosphere with an oxygen partial pressure of 10 -12 MPa up to 10 -9 MPa and 1160°C to 1280°C (e.g. 1180°C or more, 1230°C or less) for 5 minutes to 10 hours. (reoxidation process)

[0055] In order to return the oxygen to the barium titanate as the partially reduced main phase of the dielectric layer 11 fired in a reducing atmosphere to such an extent that the internal electrode layer 12 is not oxidized, a heat treatment at about 1000°C in a gas mixture of N 2 and steam or in air at 500°C to 700°C. This process is called the reoxidation process. (plating process)

[0056] Subsequently, a metallic coating comprising copper, nickel, tin, etc. is applied to the base layers of the outer electrodes 20a, 20b by a plating process. The multilayer ceramic capacitor 100 is completed by the processes described above.

[0057] By the manufacturing method according to the present embodiment, the vanadium concentration to ceramic as the main component in the dielectric pattern 53 is higher than the vanadium concentration to ceramic as the main component in the ceramic green sheet 51. This makes it possible to promote the sintering of the side edges 16 while suppressing the sintering of the dielectric layer 11 in the capacitance portion 14. As a result, the lack of moisture resistance due to insufficient densification in the side edges 16 can be solved. Furthermore, the insufficient reliability due to abnormal grain growth can be solved by not using many or even no liquid phase components.

[0058] In view of fully promoting the sintering of the side edges 16, it is preferable to set a lower limit for the difference between the vanadium concentration to ceramic as the main component in the dielectric pattern 53 and the vanadium concentration to ceramic as the main component in the ceramic green sheet 51. For example, it is preferable to increase a vanadium concentration in the dielectric pattern 53 to ceramic as the main component by 0.1 at.% or more than that in the ceramic green sheet 51.

[0059] The side edge section can be glued or applied to the sides of the above-mentioned multi-layer section. In detail, as in Fig.9, the multilayer portion is obtained by alternately stacking the ceramic green sheet 51 and the internal electrode pattern 52 having the same width as the respective ceramic green sheet 51. Next, the sheets formed with the dielectric pattern paste can be bonded to the side surfaces of the multilayer portion as side edge portions 55. In this case, too, the vanadium concentration to ceramic as the main component in the side edge portion 55 is higher than the vanadium concentration to ceramic as the main component in the ceramic green sheet 51. This makes it possible to promote the sintering of the side edges 16 while suppressing the sintering of the dielectric layer 11 in the capacitance portion 14. As a result, the lack of moisture resistance due to insufficient densification in the side edges 16 can be solved.In addition, the insufficient reliability due to abnormal grain growth can be solved by not using many or no liquid phase components.

[0060] In order to fully promote the sintering of the side edges 16, it is preferable to set a lower limit for the difference between the vanadium concentration to ceramic as the main component in the side edge portion 55 and the vanadium concentration to ceramic as the main component in the ceramic green sheet 51. For example, it is preferable to increase the vanadium concentration to ceramic as the main component in the side edge portion 55 by 0.05 at.% or more than that in the ceramic green sheet 51.

[0061] In each of the above embodiments, the multilayer ceramic capacitor is described as an example of multilayer ceramic electronic components, but they are not limited to this. For example, other multilayer ceramic electronic components such as varistors and thermistors may also be used. [Examples of implementation]

[0062] In the following, the multilayer ceramic capacitors according to the embodiment were manufactured and examined for their properties.

[0063] Slurries of BaTiO 3as the main component is mixed and coated to obtain ceramic green sheet. After printing the internal electrode pattern on each ceramic green sheet, a dielectric pattern was printed around the internal electrode pattern. Nickel powder was used for the internal electrode pattern. The vanadium concentration relative to the ceramic as the main component in the dielectric pattern was higher than the vanadium concentration relative to the ceramic as the main component in the ceramic green sheet.

[0064] After layering, the individual ceramic green sheets were cut, polished, and debonded. Conductive paste for the outer electrode was applied to the two end faces, fired, and reoxidized. Following these processes, the multilayer ceramic capacitors were fabricated in 1005 molds (length 1.0 mm, width 0.5 mm, height 0.5 mm), in which 500 layers of the inner electrode layers were stacked on top of each other.

[0065] The vanadium concentration in the ceramic green film was 0.1 at.% to BaTiO 3 The vanadium concentration in the dielectric sample was 0.2 at.% to BaTiO 3 .

[0066] Fig. Figure 10 shows an example of the measurement results of LA (laser ablation)-ICP (inductively coupled plasma)-MS (mass spectrometry) in the Y-axis direction. The horizontal axis shows the distance (µm) from the surface of the side edge 16 in the Y-axis direction. Therefore, 0 µm represents a surface area of ​​the side edge 16. The vertical axis on the left shows the atomic ratio (at.%) of vanadium when titanium is 100 at.%. The vertical axis on the right shows the cumulative count of nickel (m / z = 58).

[0067] As in Fig.As shown in Figure 10 by way of example, at intervals greater than 40 µm, the cumulative count of nickel is approximately constant. This is because the internal electrode layer 12 is present at intervals greater than 40 µm. The cumulative count of nickel gradually decreases from approximately 460 µm. This is because there is an interface between the capacitance portion 14 and the side edge 16 at approximately 460 µm. For example, the point at which the cumulative count of nickel begins to decrease can be defined as the interface between the capacitance portion 14 and the side edge 16.

[0068] As in Fig. 10, it can be seen that the vanadium concentration in the side edge 16 is higher than in the capacity section 14. (Comparison example 1)

[0069] In Comparative Example 1, the vanadium concentration in the ceramic green sheet was set equal to the vanadium concentration in the dielectric sample. Both the vanadium concentration in the ceramic green sheet and the vanadium concentration in the dielectric sample were set to 0.1 at.%. The other conditions are as described in the example. (Comparison example 2)

[0070] In Comparative Example 2, the vanadium concentration in the ceramic green sheet was set equal to the vanadium concentration in the dielectric pattern. Both the vanadium concentration in the ceramic green sheet and the vanadium concentration in the dielectric pattern were set to 0.1 at.%. The silicon concentration of the ceramic as the main component in the dielectric pattern was increased compared to the silicon concentration of the ceramic as the main component in the ceramic green sheet. The other conditions are as described in the example. (High temperature stress test)

[0071] A high-temperature stress test was conducted on the multilayer ceramic capacitors according to the embodiment and Comparative Examples 1 and 2. During the high-temperature stress test, a voltage of 6 V was applied for 500 hours at a temperature of 85°C. Subsequently, failure was determined when the IR (insulation resistance) deteriorated by one order of magnitude from the initial IR or a short circuit occurred. The number of samples was set to 800 for each of the embodiment and Comparative Examples 1 and 2. The ratio of the number of failed samples to the 800 samples was measured as the failure rate. (Moisture resistance test)

[0072] A humidity resistance test was conducted on the multilayer ceramic capacitors according to the embodiment and Comparative Examples 1 and 2. During the humidity resistance test, a voltage of 4 V was applied for 500 hours at a temperature of 40°C and a relative humidity of 95%. Subsequently, failure was determined when the IR (insulation resistance) deteriorated by one order of magnitude from the initial IR or a short circuit occurred. The number of samples was set to 400 for each of the embodiment and Comparative Examples 1 and 2. The ratio of the number of failed samples to the 400 samples was measured as the failure rate.

[0073] The results are shown in Table 1. As shown in Table 1, no failures occurred in the example in either the high-temperature stress test or the moisture resistance test. This is suspected to be due to the compaction of the side edges, as the vanadium concentration in the side edges was higher than the vanadium concentration in the dielectric layer of the capacitance section. [Table 1] Failure rate in high-temperature stress test Failure rate in moisture resistance test Example 0 / 800 0 / 400 Comparison example 1 0 / 800 3 / 400 Comparison example 2 4 / 800 0 / 400

[0074] In comparison, in Comparative Example 1, the failure rate in the moisture resistance test increased. This is presumed to be due to the incomplete densification of the side edges because the vanadium concentration in the side edges was the same as the vanadium concentration in the dielectric layer of the capacitance section. In Comparative Example 2, the failure rate in the moisture resistance test was lower, but the failure rate in the high-temperature stress test was higher. This is presumed to be due to the fact that a large amount of side edge liquid phase components was generated during firing, leading to abnormal grain growth, although the densification of the side edges could be promoted by making the vanadium concentration in the side edges equal to the vanadium concentration in the dielectric layer of the capacitance section and also adding a large amount of liquid phase components to the side edges.

[0075] As mentioned above, the embodiment according to the present invention has been explained in detail, but the present invention is not limited to the corresponding specific embodiment, but various variants and modifications are possible within the scope of the ideas of the present invention contained in the claims. [List of reference symbols] 10 bodies 11 dielectric layer 12 Internal electrode layer 13 Top layer 14 Capacity section 15 End edge 16 Page margin 20a, 20b outer electrode 51 Ceramic green foil 52 internal electrode patterns 53 dielectric samples 54 Cover film 55 Margin section 100 multilayer ceramic capacitor 141 Central Area 142 Outdoor area 161 first area 162 second area QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] JP 2017-038036 A

[0002] JP 2014-143392 A

[0002]

Claims

[1] A ceramic multilayer electronic component comprising a body including a multilayer portion in which a plurality of dielectric layers and a plurality of internal electrode layers are stacked, wherein each of the internal electrode layers is arranged to be exposed from one of the two opposite end surfaces of the body, and wherein the body has side edges which are provided in a third direction orthogonal to a first direction in which the internal electrode layers face each other and to a second direction in which the two end surfaces face each other, outside a capacitance portion as a region in which the dielectric layers and the internal electrode layers face each other, and which vanadium concentration to ceramic as a main component is higher than that in the capacitance portion. [2] The ceramic multilayer electronic component according to claim 1, wherein in the third direction, the side edges have a first region located near the capacitance portion and a second region located far from the capacitance portion, and a vanadium concentration to ceramic as a main component in the second region is lower than that in the first region. [3] The ceramic multilayer electronic component according to claim 1 or 2, wherein a vanadium concentration in the side edges to ceramic as a main component is higher by 0.05 at.% or more than that in the capacitance portion. [4] A ceramic multilayer electronic component according to claim 1 or 2, wherein the capacitance portion contains vanadium. [5] A ceramic multilayer electronic component according to claim 4, wherein in the third direction, the capacitance portion has a central region and an outer region located outside the central region, wherein a vanadium concentration to ceramic as a main component in the central region is lower than that in the outer region. [6] A ceramic multilayer electronic component according to claim 5, wherein a vanadium concentration to ceramic as a main component in the outer region is higher by 0.02 at.% or more than that in the central region. [7] The ceramic multilayer electronic component according to claim 1 or 2, wherein an average thickness of the dielectric layers in the first direction is 0.8 µm or less. [8] The ceramic multilayer electronic component according to claim 1 or 2, wherein an average thickness of the internal electrode layers in the first direction is 0.7 µm or less. [9] Manufacturing method of a ceramic multilayer electronic component comprising a process in which an internal electrode pattern is formed on a ceramic green sheet, a process in which a dielectric pattern is formed in a vicinity of the internal electrode pattern, the vanadium concentration of which to ceramic as the main component is higher than that of the ceramic green sheet, a process in which the ceramic green sheets on which the internal electrode pattern and the dielectric pattern are formed are layered to acquire a multilayer body, and a process in which the multilayer body is fired. [10] A manufacturing method of a ceramic multilayer electronic component according to claim 9, wherein a vanadium concentration to ceramic as a main component in the dielectric pattern is higher by 0.1 at.% or more than that in the ceramic green sheet. [11] Manufacturing method of a ceramic multilayer electronic component comprising a process in which an internal electrode pattern is formed on a ceramic green sheet, a process in which the ceramic green sheets on which the internal electrode pattern is formed are layered to acquire a multi-layer body, a process in which side edge portions are formed in a vicinity of the internal electrode pattern, the vanadium concentration of which to ceramic as the main component is higher than that of the ceramic green sheet, and a process in which the multilayer body on which the side edge portions are formed is fired. [12] The manufacturing method of a ceramic multilayer electronic component according to claim 11, wherein a vanadium concentration to ceramic as a main component in the side edge portion is higher by 0.05 at.% or more than that in the ceramic green sheet.

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