POWER CONVERSION DEVICE AND METHOD FOR CONTROLLING A POWER CONVERSION DEVICE

Abstract

A power conversion device is provided, featuring a bias-magnetism-suppressing capacitor and capable of both high efficiency and miniaturization / weight reduction. This power conversion device converts a first DC voltage, supplied by a DC power supply, into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit. The power conversion device comprises a first capacitor located between the bridge circuit and the transformer; a second capacitor connected in parallel or in series with the first capacitor; a first semiconductor switch connected in parallel or in series with the first capacitor; and a circuit-based voltage control unit that sets the phase shift of the elements forming the bridge circuit.

Description

Technical field

[0001] The present invention relates to the configuration of a power conversion device and its control, and in particular to a technique that is effectively applied to an isolated DC / DC converter in which a plurality of power conversion circuits are integrated using a transformer. State of the art

[0002] As a variation on in-vehicle power conversion devices, an isolated DC / DC converter was developed, integrating a DC / DC converter for a low-voltage storage battery (LVBAT) and a DC / AC converter for a 100V AC outlet (V2L) using a transformer. In this way, a power conversion device can achieve both high efficiency and miniaturization / weight reduction by integrating multiple power conversion circuits via a single transformer.

[0003] Since an isolated DC / DC converter, which integrates a variety of power conversion circuits, also has a wider input voltage range, the number of turns on the primary side of the transformer must be designed such that the output voltage specification is met even if the input voltage is reduced (generally by increasing the number of turns). Conversely, if a rated voltage is applied, the primary-side current and the secondary-side voltage increase, making it difficult to improve efficiency.

[0004] Meanwhile, a converter that operates on a circuit with two or more branches with a phase shift between the branches is generally referred to as a "phase shift converter".

[0005] In the prior art of this technical field, for example, a technique such as that described in PTL 1 exists. PTL 1 discloses a "primary-side phase-shift system DC-DC converter with a full-bridge inverter that converts a DC voltage into a high-frequency voltage, and a rectifier circuit that rectifies its output." (paragraph

[0001] of PTL 1) References Patent literature

[0006] PTL 1: JP 6033649 B2 Summary of the invention: Technical problem

[0007] The phase shift converter described above, which is capable of extending the output voltage range with a bias-magnetism suppressing capacitor, can extend the output voltage range by switching the capacitor to increase the number of turns on the primary side.

[0008] However, a conventional phase shift converter generally uses two semiconductor devices as a bidirectional switch for capacitor switching, which leads to a large loss problem.

[0009] Furthermore, in PTL 1, at the time of a light load, where a small amount of electromagnetic energy is accumulated in the inductor contained in the circuit, the switch Q5 is switched off for capacitance switching in order to connect the first and second capacitors in series between the output terminals of the inverter and to reduce the combined electrostatic capacitance of both capacitors so that both capacitors can be fully charged and discharged, with a small amount of electromagnetic energy accumulating in the circuit to achieve a smooth switching of each switching element of the inverter.

[0010] On the other hand, at the time of a heavy load, when a large amount of electromagnetic energy is accumulated in the inductor contained in the circuit, the switch Q5 is opened for capacitance switching in order to connect the first capacitor or the second capacitor alone in parallel with a switching element on any arm of the reference phase branch or any switching element on the control phase branch, so that the electrostatic capacitance of the capacitors is increased to achieve smooth switching of each switching element of the inverter. (Paragraph

[0051] of PTL 1)

[0011] In the PTL 1, the switching circuit contains two capacitors (capacitors C5 and C6) and a switch Q5 for capacitance switching, but these must necessarily be used as a bidirectional switch if semiconductor components are to be used.

[0012] Furthermore, the PTL 1 does not take into account that the output voltage range is extended with a bias magnetism suppressing capacitor as described above.

[0013] Therefore, it is an object of the present invention to provide a power conversion device which has a bias magnetism suppressing capacitor and is capable of enabling both high efficiency and miniaturization / weight reduction, as well as a method for controlling the same. Solution to the problem

[0014] To solve the above problems, the present invention provides a power conversion device that converts a first DC voltage supplied by a DC power supply into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit, wherein the power conversion device comprises: a first capacitor provided between the bridge circuit and the transformer; a second capacitor provided in parallel to or in series with the first capacitor; a first semiconductor switch provided in parallel to or in series with the first capacitor; and a circuit-based voltage control unit that sets a phase shift amount of elements forming the bridge circuit.

[0015] Furthermore, the present invention provides a method for controlling the above power conversion device, wherein, when the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off and the second DC voltage is controlled by switching the bridge circuit, and when the first DC voltage is equal to or greater than a predetermined value, the first semiconductor switch is turned on and a range of the second DC voltage is extended by switching the bridge circuit. Advantageous effects of the invention

[0016] According to the present invention, it is possible to realize a power conversion device that has a bias magnetism suppressing capacitor and is capable of enabling both high efficiency and miniaturization / weight reduction, as well as a method for controlling the same.

[0017] Problems, configurations and effects that differ from those described above are further clarified by the following description of embodiments. Brief description of the drawings [ Fig. 1] Fig. Figure 1 is a circuit diagram illustrating the schematic configuration of a power conversion device according to Example 1 of the present invention. [ Fig. 2] Fig. Figure 2 is a diagram showing a modification of a capacitor circuit 103. Fig. 1 illustrates. [ Fig. 3] Fig. Figure 3 is a flowchart that describes a method for controlling the power conversion device of Fig. 1 shows. [ Fig. 4] Fig. Figure 4 is a diagram illustrating waveforms at the time of capacitor switching control. [ Fig. 5] Fig. Figure 5 is a diagram illustrating waveforms when a semiconductor switch S101 in a parallel system is in an OFF state in a power conversion device according to Example 2 of the present invention. [ Fig. 6A] Fig. 6A is a diagram illustrating operation when the capacitor circuit is switched from OFF to ON. [ Fig. 6B] Fig. Figure 6B is a diagram illustrating operation when the capacitor circuit is switched from OFF to ON. [ Fig. 6C] Fig. 6C is a diagram illustrating operation when the capacitor circuit is switched from OFF to ON. [ Fig. 7] Fig. Figure 7 is a diagram illustrating waveforms when a switch S101 in a serial system is in an OFF state in a power conversion device according to Example 3 of the present invention. [ Fig. 8A] Fig. 8A is a diagram illustrating operation when the capacitor circuit is switched from OFF to ON. [ Fig. 8B] Fig. Figure 8B is a diagram illustrating operation when the capacitor circuit is switched from OFF to ON. [ Fig. 9] Fig. Figure 9 is a diagram illustrating waveforms when a switch S101 in a parallel system is in an OFF state in a power conversion device according to Example 4 of the present invention. [ Fig. 10] Fig. Figure 10 is a diagram illustrating a waveform when the peak value of VC1 is temporarily increased by decreasing the switching frequency. [ Fig. 11] Fig. Figure 11 is a flowchart showing a method for controlling a power conversion device according to Example 5 of the present invention. [ Fig. 12] Fig. Figure 12 is a diagram illustrating waveforms at the time of capacitor switching control. [ Fig. 13] Fig. Figure 13 is a diagram illustrating the characteristics of a power conversion device according to Example 6 of the present invention when the capacitance is continuously switched according to the duty cycle of the switching of the semiconductor switch S101 of the capacitor circuit. [ Fig. 14] Fig. Figure 14 is a diagram illustrating a capacitor circuit of a power conversion device according to Example 7 of the present invention. [ Fig. 15] Fig. Figure 15 is a diagram illustrating a capacitor circuit of a power conversion device according to Example 8 of the present invention. [ Fig. 16] Fig. Figure 16 is a diagram illustrating a capacitor circuit of a power conversion device according to Example 9 of the present invention. [ Fig. 17] Fig. Figure 17 is a diagram illustrating a waveform at the time of capacitor switching control of a power conversion device according to Example 10 of the present invention. [ Fig. 18] Fig. Figure 18 is a circuit diagram illustrating the schematic configuration of a conventional phase shift converter. [ Fig. 19] Fig. Figure 19 is a diagram illustrating the effect that a bias magnetism suppressing capacitor has on the output voltage. Description of the embodiments

[0018] Examples of the present invention are described below with reference to the drawings. Identical configurations in the drawings are identified by the same reference numerals, and detailed descriptions of overlapping components have been omitted. Example 1

[0019] With reference to Fig. 1 to Fig. 4, Fig. 18 and Fig. 19 describes the power conversion device according to Example 1 of the present invention and the method for controlling it. Fig. 18 and Fig. Figure 19 shows diagrams illustrating the schematic configuration of a conventional phase shift converter ( Fig. 18) to facilitate understanding of the present invention and to illustrate an influence that a bias-magnetism-suppressing capacitor has on the output voltage ( Fig. 19) .

[0020] Fig. Figure 1 is also a circuit diagram illustrating the schematic configuration of the power conversion device according to the example. Furthermore, it states... Fig. 2 a diagram that shows a modification of a capacitor circuit 103 of Fig. 1 illustrates.

[0021] As in Fig. As illustrated in Figure 1, the power conversion device of the example is a power conversion device to which a capacitor-switched parallel system is applied. The power conversion device of the example is an isolated DC / DC converter and is not limited to a phase-shift converter, so it could also be configured as an LLC converter or the like. Reference numeral 101 denotes a primary-side circuit of a phase-shift converter comprising a capacitor C1, semiconductor switches S1 to S4, a capacitor circuit 103, and an inductor L1.

[0022] The capacitor circuit 103 further comprises capacitors C101 and C102 as well as a semiconductor switch S101. Capacitor C102 is connected in parallel to capacitor C101, and semiconductor switch S101 is connected in parallel to capacitor C101 and in series with capacitor C102.

[0023] Fig. Figure 1 illustrates, as an example of the semiconductor switch S101, an example of a MOSFET to which a diode D101 is connected in antiparallel.

[0024] Reference numeral 102 here denotes a secondary-side circuit comprising an inductor L2, a capacitor C3, and diodes D1 and D2. This secondary-side circuit is not limited to a center-tapped configuration and can also be a full-bridge configuration or similar. Reference numeral Tr1 further denotes a transformer.

[0025] The capacitor switching system can in particular be a series system, as is the case in Fig. 2 is illustrated. In the example of Fig. In capacitor circuit 103, capacitor C2 is connected in series with capacitor C1, and semiconductor switch S1 is connected in series with capacitor C1 and in parallel with capacitor C2. Semiconductor switch S1 is specifically a semiconductor device, such as a MOSFET, to which diode D1 is connected in antiparallel.

[0026] In this case, the conventional phase shift converter, which is in Fig. Figure 18 illustrates how a capacitor C3 is added to suppress transformer bias magnetism. As shown in Fig. As illustrated in Figure 19, the output voltage range can be extended by changing the capacitance. Therefore, the capacitor circuit and the method for controlling it are described in Figure 19. Fig. 1 to Fig. Four illustrated examples are suggested.

[0027] Fig. Figure 3 is a flowchart that describes a method for controlling the power conversion device of Fig. 1. shows.

[0028] As in Fig. As illustrated in Figure 3, the semiconductor switch S101 in the capacitor circuit 103 is switched according to the input voltage.

[0029] When the operation of the power conversion device is started, the primary-side circuit 101 and the secondary-side circuit 102 are first activated in step S1.

[0030] Then, in step S2, an input voltage V1 or an output voltage V2 is detected.

[0031] Next, in step S3, the input voltage V1 is compared with a predetermined threshold (reference value) Vth1. If the input voltage V1 is equal to or higher than the threshold Vth1 (Yes), the process proceeds to step S4.

[0032] If, however, the input voltage V1 is lower than the threshold Vth1 (No), the process proceeds to step S5.

[0033] In step S4, the semiconductor switch S101 is then switched on, and the process proceeds to step S7. Meanwhile, in step S5, the input voltage V1 is compared with a predetermined threshold (reference value) Vth2.

[0034] If the input voltage V1 in step S5 is equal to or lower than the threshold value Vth2 (Yes), the process proceeds to step S6. If, however, the input voltage V1 is higher than the threshold value Vth2 (No), the process proceeds to step S7.

[0035] In step S6, the semiconductor switch S101 is then switched off, and the process proceeds to step S7.

[0036] Then, in step S7, the difference ΔV2 between the measured value of the output voltage V2 and its target value Vref2 is calculated, and it is determined whether ΔV2 is 0 or less.

[0037] If ΔV2 is 0 or less (Yes), the process proceeds to step S8. If ΔV2 is greater than 0 (No), the process proceeds to step S9.

[0038] In step S8, the phase shift θ1 of the primary-side circuit 101 is decreased, causing the process to then proceed to step S10, and the activation of the primary-side circuit 101 and the secondary-side circuit 102 is stopped. Meanwhile, in step S9, the phase shift θ1 of the primary-side circuit 101 is increased, causing the process to then proceed to step S10, and the activation of the primary-side circuit 101 and the secondary-side circuit 102 is also stopped.

[0039] Fig. Figure 4 illustrates waveforms at the time of capacitor switching control.

[0040] When the input voltage V1 is equal to or higher than the threshold value Vth1, the semiconductor switch S101 is turned on, and capacitors C101 and C102 are connected in parallel (capacitance is increased) to decrease the output voltage V2. Conversely, when the input voltage V1 is lower than the threshold value Vth1, the semiconductor switch S101 is turned off, and only capacitor C101 is connected (capacitance is decreased) to increase the output voltage V2. After the capacitor circuit 103 has been driven, the output voltage V2 is further controlled using the phase shift θ1 of the phase shift converter. (The description of the phase shift converter's control is omitted here.)

[0041] The in Fig. The illustrated series system can also be controlled in the same way as described above.

[0042] As described above, the power conversion device of the example converts a first DC voltage V1, supplied by a DC power supply, into a second DC voltage V2 via a bridge circuit (primary-side circuit 101), a transformer Tr1, and a rectifier circuit (secondary-side circuit 102), and comprises a first capacitor C101 provided between the bridge circuit and the transformer Tr1; a second capacitor C102 provided in parallel to or in series with the first capacitor C101; a first semiconductor switch S101 provided in parallel to or in series with the first capacitor C101; and a circuit-based voltage control unit that sets a phase shift amount of elements (semiconductor switches S1 to S4) that form the bridge circuit.

[0043] The second capacitor C102 is connected in parallel to the first capacitor C101, and the first semiconductor switch S101 is connected in parallel to the first capacitor C101 and in series with the second capacitor C102.

[0044] Optionally, the second capacitor C102 can also be connected in series with the first capacitor C101, and the first semiconductor switch S101 can be connected in series with the first capacitor C101 and in parallel with the second capacitor C102.

[0045] In the power conversion device of the example, when the first DC voltage V1 is lower than a predetermined value Vth1, the first semiconductor switch S101 is switched off, and the second DC voltage V2 is controlled by switching the bridge circuit, wherein when the first DC voltage V1 is equal to or greater than the predetermined value Vth1, the first semiconductor switch S101 is switched on, and the range of the second DC voltage V2 is extended by switching the bridge circuit.

[0046] As shown in the example, since an LC resonance occurs due to the capacitor, the leakage inductance, and the transformer's excitation inductance, the gain can be varied by adjusting the capacitance. If the input voltage V1 decreases, the output voltage V2 can be increased accordingly by increasing the gain. Therefore, the output voltage range can be extended by controlling the gain.

[0047] This example involves an isolated DC / DC converter equipped separately with an output voltage control unit (not shown). If the input voltage V1 falls below a certain threshold Vth1, the output voltage V2 is increased, thus extending the control range (output voltage range) of the output voltage control unit.

[0048] In the isolated DC / DC converter (phase-shift converter and LLC converter) described above, it has already been confirmed that the output voltage fluctuates depending on the capacitance of the capacitor on the primary side. Therefore, the switch (semiconductor switch S101) and the two capacitors C101 and C102 are provided to reduce the capacitance when the input voltage V1 is reduced, thus extending the output voltage range with a simple circuit configuration. Example 2

[0049] With reference to Fig. 5 to Fig. Section 6C describes the power conversion device according to Example 2 of the present invention and the method for controlling it. The circuit configuration of the power conversion device of the example is similar to that of Example 1 ( Fig. 1).

[0050] Fig. Figure 5 is a diagram illustrating waveforms when a semiconductor switch S101 in a parallel system is in an OFF state in the power conversion device of the example.

[0051] In the OFF state of the semiconductor switch S101, only the capacitor C101 is switched, whereby the capacitor C101 is subjected to an AC voltage and accordingly a charging / discharging current flows.

[0052] On the other hand, due to the OFF state of the semiconductor switch S101, a charging current flows through the path passing through the body diode D1, and the capacitor C102 cannot be discharged. Therefore, the voltage VC2 of capacitor C102 is clamped to the peak value of the voltage VC1 of capacitor C101, after which no charging current flows, thus establishing a stable state.

[0053] Fig. 6A to Fig. Figures 6C each illustrate operation when the capacitor circuit 103 is switched from OFF to ON.

[0054] As in Fig. As illustrated in 6A, at the time VC1 = VC2 no current flows between C1 and C2, even if the semiconductor switch S1, whose voltage is 0, is switched on.

[0055] On the other hand, as in Fig. 6B and Fig. Figure 6C illustrates that if there is a potential difference between VC1 and VC2, a short-circuit current will occur between C1 and C2 when the semiconductor switch S1, which is subjected to a voltage, is switched on.

[0056] Since the short-circuit current causes an increase in loss and a failure of the circuit, it is therefore necessary to switch on the switch at the time VC1 = VC2. Therefore, if the semiconductor switch S101 is switched on at the time indicated by the black circle in Fig. When 5 is displayed, a switching operation can be performed without an overcurrent flowing.

[0057] As described above, in the power conversion device of the present example, the first semiconductor switch S101 is switched on when the first capacitor C101 has a maximum voltage.

[0058] In the configuration where the second capacitor C102 is connected in parallel, the voltage across the second capacitor C102 is equal to the maximum voltage of the first capacitor C101 when the semiconductor switch S101 is in the OFF state. Therefore, the switch turns on when the voltage VC1 of the first capacitor C101 equals the voltage VC2 of the second capacitor C102, that is, when the voltage VC1 of the first capacitor C101 is at its maximum.

[0059] However, if the semiconductor switch S101 is switched from OFF to ON while a voltage is applied, an overcurrent occurs, leading to circuit failure. Therefore, switching at the aforementioned time, when no voltage is applied to the semiconductor switch S101, is required. Furthermore, in a sensorless configuration, this timing can be achieved by synchronizing it with the control of the primary-side circuit without sensing the capacitor voltage. Example 3

[0060] With reference to Fig. 7 to Fig. Section 8B describes the power conversion device according to Example 3 of the present invention and the method for controlling it. The circuit configuration of the power conversion device of the example is similar to that of Example 1 ( Fig. 1 and Fig. 2).

[0061] Fig. Figure 7 is a diagram illustrating waveforms when a switch S101 in a serial system is in an OFF state in the power conversion device of the example.

[0062] In the OFF state of the semiconductor switch S101, capacitors C101 and C102 are connected in series, thus applying a voltage to both capacitors. However, since the body diode D101 is connected in parallel to capacitor C102, the voltage VC2 of capacitor C102 is not subjected to a negative voltage (voltage from the anode of body diode D101 to its cathode). Therefore, an AC voltage is applied when VC1 ≤ 0 and VC2 ≥ 0.

[0063] Fig. 8A and Fig. Figures 8B also illustrate an operation in which the capacitor circuit 103 is switched from OFF to ON.

[0064] As in Fig. As illustrated in 8A, at time VC2 = 0, no current flows between C2 and S1, even if the semiconductor switch S1, whose voltage is 0, is turned on. On the other hand, as shown in Fig. Figure 8B illustrates that when VC2 is subjected to a voltage, a short-circuit current will occur between C2 and S1 when the semiconductor switch S1, which is also subjected to a voltage, is switched on. Since this short-circuit current causes an increase in losses and a failure of the circuit, it is therefore necessary to switch the switch on at the time VC1 = VC2. Therefore, if the semiconductor switch S101 is switched on at the time indicated by the black circle in Figure 8B, the short-circuit current will increase the loss and cause the circuit to fail. Fig. When 7 is displayed, a switchover can be performed without an overcurrent flowing. Example 4

[0065] With reference to Fig. 9 and Fig. Section 10 describes the power conversion device according to Example 4 of the present invention and the method for controlling it. The circuit configuration of the power conversion device of the example is similar to that of Example 1 ( Fig. 1).

[0066] Fig. Figure 9 is a diagram illustrating waveforms when a switch S101 in a parallel system is in an OFF state in the power conversion device of the example.

[0067] If the load and the input / output voltage fluctuate during the control of the parallel system in the OFF state, as in Fig. As illustrated in Figure 5, the peak value of the voltage VC1 across capacitor C101 also fluctuates. When the peak value of VC1 increases, capacitor C102 recharges, resulting in the same state as in Figure 5. Fig. 5 is restored. However, if the peak value of VC1 decreases, the in Fig. The waveform shown in Figure 9 is obtained because capacitor C102 cannot discharge. In this state, since there is no point at which VC1 = VC2 is satisfied, an overcurrent occurs, regardless of when the switch is turned on.

[0068] Therefore, a control method for solving the above problem is proposed. Here, the on-time of the semiconductor switches S1 to S4 of the primary-side circuit 101 is controlled by Fig. 1 is extended to temporarily increase the peak value of VC1. In particular, the switching frequency can be reduced, the duty cycle increased, and similar measures can be taken for this purpose.

[0069] Fig. Figure 10 illustrates a waveform when the peak value of VC1 is temporarily increased by decreasing the switching frequency. When the peak value is increased, the switch can be turned on at the time VC1 = VC2.

[0070] As described above, in the power conversion device of the present example, when the peak value of the voltage VC1 of the first capacitor C101 becomes less than the voltage VC2 of the second capacitor C102, the turn-on time of the bridge circuit is extended to increase the voltage VC1 of the first capacitor C101, and the first semiconductor switch S101 is turned on in a state where the voltage VC1 of the first capacitor C101 is equal to the voltage VC2 of the second capacitor C102.

[0071] Furthermore, the peak voltage VC1 of the first capacitor C101 fluctuates due to variations in the input / output voltage and the load. When the peak voltage VC1 of the first capacitor C101 increases, the voltage VC2 of the second capacitor C102 also increases, which is not a problem. However, when the peak voltage VC1 of the first capacitor C101 decreases, the voltage VC2 of the second capacitor C102 cannot discharge, so there is no point at which the voltage VC1 of the first capacitor C101 and the voltage VC2 of the second capacitor C102 intersect. In this state, an overcurrent occurs because a potential difference is created between the capacitors, regardless of when a switching operation takes place.

[0072] A control method for increasing the peak value of the voltage VC1 across the first capacitor C101 is proposed as a solution. This control method utilizes the fact that the waveform of the voltage VC1 across the first capacitor C101 fluctuates depending on the switching of the bridge circuit on the primary side. The on-time is extended to increase the peak value of the voltage VC1 across the first capacitor C101. In particular, the frequency can be reduced or the duty cycle increased as methods for extending the on-time.

[0073] Furthermore, the peak value of the voltage VC1 of the first capacitor C101 can be reduced due to fluctuations in the input / output voltage and the load. At this point (range of f = 100 kHz in Fig. 10) There is no point at which the voltage VC1 of the first capacitor C101 and the voltage VC2 of the second capacitor C102 intersect, causing an overcurrent, regardless of when a switchover occurs. Therefore, as the peak value of the voltage VC1 of the first capacitor C101 decreases, the peak value of the voltage VC1 of the first capacitor C101 is increased by the on-time of the bridge circuit on the primary side (by decreasing the frequency or by increasing the duty cycle) (the range of f = 80 kHz (ON) in Fig. 10); and a switch from the OFF state to the ON state is performed at the time when the peak value of the voltage VC1 of the first capacitor C101 equals the voltage VC2 of the second capacitor C102, so that the occurrence of the overcurrent can be prevented (the range of f = 100 kHz (OFF) in Fig. 10). Example 5

[0074] With reference to Fig. 11 and Fig. Section 12 describes the power conversion device according to Example 5 of the present invention and the method for controlling it. The circuit configuration of the power conversion device of the example is similar to that of Example 1 ( Fig. 1).

[0075] Fig. Figure 11 is a flowchart showing a procedure for controlling the power conversion device of the example.

[0076] Since steps S1 to S3 are the same as steps S1 to S3 of the flowchart from Example 1 ( Fig. 3), their description will be omitted below.

[0077] If the input voltage V1 in step S3 is equal to or higher than the threshold value Vth1 (Yes), the process proceeds to step S4. If, however, the input voltage V1 is lower than the threshold value Vth1 (No), the process proceeds to step S7.

[0078] In step S4, it is determined whether the semiconductor switch S101 is in the OFF state. If OFF (Yes), the process then proceeds to step S5, in which the semiconductor switch S101 is switched from OFF to ON. If ON (No), the process also proceeds to step S11.

[0079] Subsequently, in step S6, the phase shift amount θ1 of the primary-side circuit 101 is reduced, causing the process to proceed to step S11.

[0080] Meanwhile, in step S7, the input voltage V1 is compared with a predetermined threshold (reference value) Vth2.

[0081] If the input voltage V1 is equal to or lower than the threshold value Vth2 (Yes), the process proceeds to step S8. If, however, the input voltage V1 is higher than the threshold value Vth2 (No), the process proceeds to step S11.

[0082] In step S8, it is determined whether the semiconductor switch S101 is in the ON state. If ON (Yes), the process proceeds to step S9, and in step S9, the semiconductor switch S101 is switched from ON to OFF. If OFF (No), the process proceeds to step S11.

[0083] Subsequently, in step S10, the phase shift amount θ1 of the primary-side circuit 101 is increased, which causes the process to move to step S11.

[0084] Since steps S11 to S14 are the same as steps S7 to S10 of the flowchart from Example 1 ( Fig. 3), their description will be omitted below.

[0085] In the example as it is in Fig. As illustrated in Figure 11, a control is provided to adjust the phase shift amount θ1 when the semiconductor switch S101 is switched, in comparison to the flowchart of Example 1 ( Fig. 3) added.

[0086] When the semiconductor switch S101 is switched from OFF to ON, the output voltage (gain) decreases, thereby reducing the phase shift θ1 and increasing the output voltage V2. Conversely, when the semiconductor switch S101 is switched from ON to OFF, the output voltage (gain) increases, thereby increasing the phase shift θ1 and decreasing the output voltage V2.

[0087] Fig. Figure 12 illustrates waveforms during the control operation of Fig. 11.

[0088] Without feedforward control, the gain changes at the moment the capacitor switches, resulting in a large voltage fluctuation. However, when feedforward control is added, a correction is made by converter voltage control, depending on the gain fluctuation at the time of capacitor switching, thus suppressing the voltage fluctuation.

[0089] As described above, in the power conversion device of the example, when the first semiconductor switch S101 is turned on / off, the output voltage control system of the bridge circuit is feedforward controlled to suppress voltage fluctuations.

[0090] Since the gain fluctuates due to the capacitor switching, a sudden change in the output voltage V2 is also expected. In response, output voltage control is implemented using the bridge circuit on the primary side to maintain the target value. However, the conventional feedback control begins to react to the sudden change in output voltage, making it difficult to suppress the output voltage fluctuation.

[0091] Therefore, a correction is made to the output voltage control system of the bridge circuit on the primary side, depending on the magnitude of the gain fluctuation. For a phase-shift converter, this correction can be achieved by reducing the phase shift magnitude as a control parameter, depending on the increase in gain due to capacitor switching. If the correction is incorporated into the switching control flow as feedforward control, a corresponding suppression of the load fluctuation at the time of capacitor switching can be expected compared to conventional feedback control. Example 6

[0092] With reference to Fig. Section 13 describes the power conversion device according to Example 6 of the present invention and the method for controlling it. The circuit configuration of the power conversion device of the example is similar to that of Example 1 ( Fig. 1).

[0093] Fig. Figure 13 is a diagram illustrating the characteristics of the power conversion device of the example when the capacitance is continuously switched according to the duty cycle of the switching of the semiconductor switch S101 of the capacitor circuit.

[0094] When the semiconductor switch S101 of the capacitor circuit 103 is switched, the capacitance can also be continuously switched according to the duty cycle of the switching, as shown in Fig. 13 is illustrated.

[0095] Therefore, in the power conversion device of the example, the duty cycle is adjusted by switching the first semiconductor switch S101 in order to continuously switch the gain.

[0096] Therefore, the above control allows the capacity to be continuously adjusted between the binary values ​​of the simple switching control.

[0097] If the duty cycle is adjusted to the capacity C1 at duty cycle = 0% (solid OFF) and the capacity C2 at duty cycle = 100% (solid ON), the period of operation as C1 and the period of operation as C2 can also be adjusted so that the capacity is adjusted arbitrarily (between the binary values).

[0098] The switch is adjusted accordingly to adapt the duty cycle so that the capacitance can be continuously switched. Therefore, the output voltage (gain) can be finely regulated.

[0099] On the other hand, there is a switching loss at the changeover switch, which limits the potential increase in loss and the choice of components. Therefore, its proper use is required depending on the application. Example 7

[0100] With reference to Fig. 14 describes the power conversion device according to Example 7 of the present invention and the method for controlling it.

[0101] Fig. Figure 14 is a diagram illustrating the capacitor circuit of the example power conversion device and illustrates a circuit configuration (modification) where the capacitor circuit is 103. Fig. 1 with the capacitor circuit of Fig. 2 is combined.

[0102] As in Fig. As illustrated in Figure 14, the capacitor circuit of the example comprises: a third capacitor C3, which is different from the first capacitor C1 and the second capacitor C2; and a second semiconductor switch S2, which is different from the first semiconductor switch S1, wherein the third capacitor C3 is connected in series with each of the first capacitor C1 and the second capacitor C2 and in parallel with the second semiconductor switch S2.

[0103] If a series-connected capacitor circuit and a parallel-connected capacitor circuit are combined as in the example, the capacitor (gain) can be switched to three or more values. Example 8

[0104] With reference to Fig. 15 describes the power conversion device according to Example 8 of the present invention and the method for controlling it.

[0105] Fig. Figure 15 is a diagram illustrating the capacitor circuit of the example power conversion device and illustrates a circuit configuration (modification) in which a variety of the capacitor circuits 103 of Fig. 1 is combined.

[0106] As in Fig. As illustrated in Figure 15, the capacitor circuit of the example comprises: a third capacitor C3, which is different from the first capacitor C1 and the second capacitor C2; and a second semiconductor switch S2, which is different from the first semiconductor switch S1, wherein the third capacitor C3 is connected in parallel to each of the first capacitor C1 and the second capacitor C2 and is connected in series with the second semiconductor switch S2.

[0107] If capacitor circuits are combined in multiple stages, as in the example, the capacitor (gain) can be switched to three or more values. Example 9

[0108] With reference to Fig. 16 describes the power conversion device according to Example 9 of the present invention and the method for controlling it.

[0109] Fig. Figure 16 is a diagram illustrating the capacitor circuit of the example power conversion device and demonstrates a circuit configuration (modification) in which a variety of the capacitor circuits of Fig. 2 in a row is combined.

[0110] When a large number of capacitor circuits are combined in series, as in the example, the capacitor (gain) can also be switched to three or more values. Example 10

[0111] With reference to Fig. 17 describes the power conversion device according to Example 10 of the present invention and the method for controlling it.

[0112] Fig. Figure 17 is a diagram illustrating a waveform at the time of capacitor switching control of the power conversion device of the example.

[0113] As in Fig. As illustrated in Figure 17, in the power conversion device of the example, control is carried out with reference to the output voltage V2.

[0114] If the second DC voltage (output voltage V2) is lower than a predetermined value, a control operation is performed to increase the second DC voltage (output voltage V2).

[0115] With reference to the output voltage V2, the same effect as in example 1 can also be obtained for the fluctuation of the output voltage and the load fluctuation.

[0116] It should be noted that the present invention is not limited to the examples described above and may include various modifications. For example, the examples described above have only been described in such detail to facilitate understanding of the present invention, and the present invention is not necessarily limited to those embodiments that have all the described configurations. Furthermore, a portion of the configurations of a particular example may be replaced by the configuration of another example, and the configuration of another example may be added to the configuration of a particular example. Additionally, a portion of the configurations of each example may be subject to the addition, deletion, and replacement of other configurations. Reference symbol list 101 Primary-side circuit (of the phase shift converter) 102 secondary-side circuit 103 Capacitor circuit C1, C2, C3, C101, C102 capacitor D1, D2, D101 Diode L1, L2 Inductor S1 to S4, S101 semiconductor switch Tr1 Transformer V1 Input voltage V2 output voltage QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 6033649 B2

[0006]

Claims

[1] A power conversion device which converts a first DC voltage supplied by a DC power supply into a second DC voltage via a bridge circuit, a transformer and a rectifier circuit, the power conversion device comprising: a first capacitor that is provided between the bridge circuit and the transformer; a second capacitor, which is provided in parallel or in series with the first capacitor; a first semiconductor switch arranged in parallel or in series with the first capacitor; and a circuit-based voltage control unit that sets a phase shift amount of elements forming the bridge circuit. [2] The power conversion device according to claim 1, wherein the second capacitor is connected in parallel to the first capacitor, and the first semiconductor switch is connected in parallel to the first capacitor and in series with the second capacitor. [3] The power conversion device according to claim 1, wherein the second capacitor is connected in series with the first capacitor, and the first semiconductor switch is connected in series with the first capacitor and in parallel with the second capacitor. [4] The power conversion device according to claim 2 or 3, wherein If the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off and the second DC voltage is controlled by switching the bridge circuit, and When the first DC voltage is equal to or greater than a predetermined value, the first semiconductor switch is turned on and a range of the second DC voltage is extended by switching the bridge circuit. [5] The power conversion device according to claim 2, wherein the first semiconductor switch is turned on when the first capacitor has a maximum voltage. [6] The power conversion device according to claim 3, wherein the first semiconductor switch is turned on when the second capacitor has a voltage of 0 V. [7] The power conversion device according to claim 5 or 6, wherein when a peak value of a voltage of the first capacitor becomes less than a voltage of the second capacitor, a turn-on time of the bridge circuit is extended to increase the voltage of the first capacitor, and the first semiconductor switch is turned on in a state in which the voltage of the first capacitor is equal to the voltage of the second capacitor. [8] The power conversion device according to claim 4, wherein when the first semiconductor switch is turned on / off, an output voltage control system of the bridge circuit is feedforward controlled to suppress voltage fluctuations. [9] The power conversion device according to claim 4, wherein a duty cycle is adjusted by switching the first semiconductor switch to continuously switch an amplification. [10] The power conversion device according to claim 1, comprising: a third capacitor, which differs from the first and second capacitors; and a second semiconductor switch that differs from the first semiconductor switch, wherein the third capacitor is connected in series with each of the first and second capacitors and is connected in parallel with the second semiconductor switch. [11] The power conversion device according to claim 1, comprising: a third capacitor, which differs from the first and second capacitors; and a second semiconductor switch that differs from the first semiconductor switch, wherein the third capacitor is connected in parallel to each of the first and second capacitors and is connected in series with the second semiconductor switch. [12] The power conversion device according to claim 4, wherein if the second DC voltage is lower than a predetermined value, the second DC voltage is increased. [13] A method for controlling the power conversion device according to claim 1, wherein If the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off and the second DC voltage is controlled by switching the bridge circuit, and When the first DC voltage is equal to or greater than a predetermined value, the first semiconductor switch is turned on and a range of the second DC voltage is extended by switching the bridge circuit.

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