Semiconductor device and semiconductor module containing it

Abstract

Semiconductor module comprising: a carrier; an end connection surface on the carrier; a conductive adhesive element; and a semiconductor device arranged on the carrier; the semiconductor device comprising: a semiconductor stack; an electrode structure formed on and electrically connected to the semiconductor stack, comprising a pad electrode structure and a contacting electrode structure formed on the pad electrode structure; and a first insulating structure formed between the pad electrode structure and the contacting electrode structure; wherein the electrode structure comprises a set of slots extending in the pad electrode structure and in the contacting electrode structure; wherein the contacting electrode structure is connected to the end pad by the conductive adhesive element, and wherein the conductive adhesive element is filled in the slot set.

Description

BACKGROUNDTechnical FieldThe present application relates to a semiconductor device having an electrode structure with a slot set, and a semiconductor module including the same.Description of Related ArtA semiconductor device includes compound semiconductors composed of group III-V elements such as gallium phosphide (GaP), gallium arsenide (GaAs), gallium nitride (GaN), and aluminum nitride (AlN). The semiconductor device may be an optoelectronic semiconductor device such as a light emitting diode (LED), laser, a light detector, a solar cell, power devices, or acoustic wave devices. Light emitting diodes of a semiconductor optoelectronic device have characteristics of low power consumption, low heat generation, long lifetime, compact size, high response speed, and stable emission wavelength. Light emitting diodes are thus widely used in household appliances, control lights and optoelectronic products.A conventional light emitting diode includes a substrate, an n-type semiconductor layer, an active layer and a p-type semiconductor layer formed on the substrate, and a p-type electrode and an n-type electrode formed on the p-type and n-type semiconductor layers, respectively. When a light emitting diode is conductive across the electrode and operates according to a specific forward voltage, holes from the p-type semiconductor layer and electrons from the n-type semiconductor layer combine in the active layer to emit light.SUMMARYA semiconductor module comprising: a substrate; an end pad on the substrate; a conductive adhesion member; and a semiconductor device disposed on the substrate; wherein the semiconductor device comprises: a semiconductor stack; an electrode structure formed on and electrically connected to the semiconductor stack, comprising a pad electrode structure and a bonding electrode structure formed on the pad electrode structure; and a first insulating structure formed between the pad electrode structure and the bonding electrode structure; wherein the electrode structure comprises a slot set extending in the pad electrode structure and in the bonding electrode structure; wherein the bonding electrode structure is connected to the end pad through the conductive adhesion member, and wherein the conductive adhesion member is filled in the slot set.A semiconductor device includes: a semiconductor stack including a first semiconductor layer, an active region, and a second semiconductor layer; an electrode structure formed on and electrically connected to the semiconductor stack, including a pad electrode structure and a pad electrode structure formed on the pad electrode structure; and a first insulating structure formed on the pad electrode structure; wherein the electrode structure includes a first slot set, the first slot set including a first slot in the pad electrode structure and a second slot in the pad electrode structure, the second slot overlapping and corresponding to the first slot in a plan view.BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1A is a plan view of a light emitting device 1 according to an embodiment of the present application. FIG. 1B is a cross-sectional view taken along line A-A' in FIG. 1A. FIG. 1C is a cross-sectional view taken along line B-B' in FIG. 1A. FIG. 1D shows a simplified plan view of the light-emitting device 1 shown in FIG. 1A. FIG. 2A is a plan view of a light emitting device 2 according to another embodiment of the present application. FIG. 2B is a cross-sectional view taken along line A-A' in FIG. 2A. FIG. 2C is a cross-sectional view taken along line B-B' in FIG. 2A. FIG. 2D is a cross-sectional view taken along line C-C' in FIG. 2A. FIG. 3A is a plan view of a light emitting device 3 according to another embodiment of the present application. FIG. 3B is a cross-sectional view taken along line A-A' in FIG. 3A. FIG. 3C is a cross-sectional view taken along line B-B' in FIG. 3A. FIG. 4A is a plan view of a light emitting device 4 according to another embodiment of the present application. FIG. 4B is a cross-sectional view taken along line A-A' in FIG. 4A. FIG. 4C shows a simplified plan view of the light-emitting device 4. FIGS. 5A-5D show schematic plan views of the pad electrode structure and the pad electrode structure according to changed embodiments of the present application. FIG. 6 shows a schematic cross-sectional view of a light-emitting module according to an embodiment of the present application.DETAILED DESCRIPTIONIn order to make the description of the present application more detailed and complete, reference is made to the description of the following embodiments and in cooperation with the relevant illustrations. However, the examples shown below are used to illustrate the light emitting device of the present application, and the present application is not limited to the following embodiments. In addition, the dimensions, materials, shapes, relative arrangements, etc. of the elements described in the embodiments in this application text are not limited to the description, and the scope of the present application is not limited to these, but is merely a description. In addition, the size or positional relationship of the elements shown in each figure is exaggerated for convenience of description. Moreover, in the following description, elements having the same or similar spirits are shown with the same designations and reference numerals to omit detailed descriptions as appropriate.According to some embodiments of the present application, a semiconductor device and a semiconductor module are provided. According to some embodiments, the semiconductor device may be an optoelectronic semiconductor device such as a light emitting diode (LEDs), a laser, a light detector, a solar cell, or a power device. The main structure of a semiconductor device includes a buffer layer and a device structure formed on the buffer layer. Depending on the device functions, different device structures may be formed. For example, the device structure of a light emitting device may be a semiconductor stack including a p-type semiconductor layer, an n-type semiconductor layer, and an active region. The active region may emit light in different wavelength bands according to the material composition. Hereinafter, a plurality of embodiments are provided as relevant descriptions of the semiconductor device and the semiconductor module, and it is to be understood that each semiconductor device according to these embodiments is for illustrative purposes only and is not intended to limit the present disclosure.FIGS. 1A, 1B, and 1C illustrate an embodiment adopting a light emitting device 1 as the semiconductor device according to some embodiments. FIG. 1A is a plan view of the light emitting device 1 according to the embodiment of the present application. FIG. 1B is a cross-sectional view taken along line A-A' in FIG. 1A. FIG. 1C is a cross-sectional view taken along a line B-B' in FIG. 1A.As shown in FIGS. 1A and 1B, the light emitting device 1 includes a substrate 10 and a semiconductor stack 12 formed on an upper surface 10 aof the substrate 10, the semiconductor stack 12 including a plurality of units, e.g., a first unit C 1 and a second unit C 2, separated from each other by a trench 36. Each of the units C 1 and C 2 of the semiconductor stack 12 includes a first semiconductor layer 121 formed on the substrate 10, and a semiconductor mesa including an active region 123 and a second semiconductor layer 122 formed on the first semiconductor layer 121. The semiconductor stack 12 includes recesses exposing a top surface 121 aof the first semiconductor layer 121. The top surface 121 ais not covered by the semiconductor mesa. According to an embodiment, the recesses are arranged in a peripheral region and / or in a central region of the semiconductor stack 12 in plan view. The recess arranged along the peripheral region surrounds the semiconductor mesa. The recesses arranged in the peripheral region and in the central region may be connected or insulated. However, the present embodiment is not limited thereto.The substrate 10 may be a growth substrate. The substrate 10 contains GaAs or GaP for growing an AlGaInP-based semiconductor thereon. The substrate 10 includes Al2O3, GaN, SiC, Si or AlN for growing an InGaN-based or AlGaN-based semiconductor thereon. According to an embodiment, the substrate 10 may be a patterned substrate; i.e., the substrate 10 includes patterned structures (not shown) on the top surface 10 a. According to an embodiment, the light generated by the semiconductor stack 12 is refracted, reflected or scattered by the patterned structures, thereby increasing the brightness of the light emitting device. In addition, the patterned structures reduce or suppress the dislocation caused by lattice mismatch between the substrate 10 and the semiconductor stack 12, thereby improving the epitaxial quality of the semiconductor stack 12.According to an embodiment of the present application, the semiconductor stack 12 is formed on the substrate 10 by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hybrid gas phase epitaxy (HVPE), or ion implantation such as sputtering or evaporation.According to an embodiment, the semiconductor stack 12 further includes a buffer structure (not shown) between the first semiconductor layer 121 and the substrate 10. The buffer structure 120 reduces lattice mismatch and suppresses dislocation to improve epitaxial quality. The material of the buffer structure contains GaN, AlGaN or AlN. According to an embodiment, the buffer structure includes multiple sub-layers (not shown), wherein the sub-layers include the same materials or different materials. According to an embodiment, the buffer structure includes two sub-layers formed by different methods. For example, a first sublayer of the buffer structure is grown by sputtering and a second sublayer of the buffer structure is grown by MOCVD. According to another embodiment, the buffer structure further includes a third sublayer. The third sublayer is grown by MOCVD, wherein the growth temperature of the second sublayer is different from the growth temperature of the third sublayer. According to an embodiment, the first, the second and the third sub-layers comprise the same material as AlN. According to an embodiment, the first semiconductor layer 121 and the second semiconductor layer 122 are e.g. cladding layers or confinement layers. The first semiconductor layer 121 and the second semiconductor layer 122 have different conductivity types, different electrical properties, different polarities or different dopants for providing electrons or holes. For example, the first semiconductor layer 121 is composed of an n-type semiconductor, and the second semiconductor layer 122 is composed of a p-type semiconductor. The active region 123 is formed between the first semiconductor layer 121 and the second semiconductor layer 122. When driven by a current, electrons and holes are combined in the active region 123 to convert electric energy into optical energy for illumination. The wavelength of the light generated by the light emitting device 1 or by the semiconductor stack 12 may be adjusted by changing the physical properties and the chemical composition of one or more layers in the semiconductor stack 12.The material of the semiconductor stack 12 includes a III-V compound semiconductor such as AlxInyGa(1-x-y)N (i.e., AlInGaN base) or AlxInyGa(1-x-y)P (i.e., AlInGaP base), where 0≤x, y≤1; x+y≤1. When the material of the semiconductor stack 12 includes an AlInGaP-based material, the semiconductor stack 12 emits red light having a wavelength between 610 nm and 650 nm or yellow light having a wavelength between 550 nm and 570 nm. When the material of the semiconductor stack 12 includes an AlInGaN-based material, the semiconductor stack 12 emits blue light or deep blue light having a wavelength between 400 nm and 490 nm, green light having a wavelength between 490 nm and 550 nm, or UV light having a wavelength between 250 nm and 400 nm. The active region 123 may be a single heterostructure (SH), a double heterostructure (DH), a double-sided double heterostructure (DDH), or a multiple quantum well (MQW) structure. The material of the active region 123 may be an i-, a p- or an n-type semiconductor.On the upper surface 121 aof the first semiconductor layer 121, a first contact structure 20 is formed in the recess, being electrically connected to the first semiconductor layer 121. According to an embodiment shown in FIG. 1A, the first contact structure 20 includes a first contact part 201 formed on the first semiconductor layer 121 of the first unit C 1 and first finger parts 202 formed on the first semiconductor layer 121 of the second unit C 2. According to another embodiment, the first contact structure 20 includes the first contact part 201 and the first finger part 202 extending from the first contact part 201. A transparent conductive layer 18 and a second contact structure 30 are formed on and electrically connected to the second semiconductor layer 122. According to an embodiment shown in FIG. 1A, the second contact structure 30 includes a second contact part 301 and second finger parts 302 extending from the second contact part 301 formed on the second unit C 2 and other second finger parts 302 formed on the first unit C 1. Connecting structures 60 are arranged separately between the first and second units C 1 and C 2. The two ends of a connection structure 60 are connected to the second finger part 302 on the first unit C 1 and to the first finger part 202 on the second unit C 2, respectively, so that the units C 1 and C 2 are electrically connected in series and form a light emitting arrangement. According to the present application, the number of units of the semiconductor stack 12 and the number of the connection patterns 60 are not limited thereto. The light emitting device 1 may include more than two units, and more than two joints 60 or a single joint structure 60 may be formed between two adjacent units. According to another embodiment, the plurality of units of the semiconductor stack 12 may be electrically connected in parallel.The transparent conductive layer 18 may distribute current and provide a good electrical contact, such as an ohmic contact, with the second semiconductor layer 122. The transparent conductive layer 18 is transparent to the light emitted from the active region 123. For example, the transparent conductive layer 18 has a transmittance of more than 80% for the light emitted from the active region 123. The material of the transparent conductive layer 18 may be a metal or a transparent conductive material. The metal material includes Au, NiAu, etc. The transparent conductive material includes graphene, ITO, AZO, GZO, ZnO, IZO, and other materials. The materials of the first contact structure 20, the second contact structure 30, and the interconnect structure 60 include a metal such as Cr, Ti, W, Au, Al, Rh, In, Sn, Ni, Pt, Ag, V, and other metals, a layer stack, or an alloy of the above materials. The first contact structure 20, the second contact structure 30, and the interconnect structure 60 may be formed in the same process or in different processes. The first contact structure 20, the second contact structure 30, and the interconnect structure 60 may include the same metal stacks or different metal stacks.A current blocking structure 23 is formed in the trench 36 among the interconnection structures 60, more specifically, the current blocking structure 23 covers the upper surface 10 aof the substrate 10 in the trench 36 and the opposite sidewalls of the units C 1 and C 2 in the vicinity of the trench 36, and further extends to the units C 1 and C 2 of the semiconductor stack 12. According to an embodiment shown in FIGS. 1A and 1B, portions of the current blocking structure 23 are formed under the transparent conductive layer 18 and the second finger portions 302. The portions of the current blocking structure 23 are arranged along the second finger portions 302 and may block the current from being injected directly into the semiconductor stack 12 just under the second contact structures 30, thereby increasing the lateral current distribution. The material of the current blocking structure 23 includes insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, niobium oxide, hafnium oxide, titanium oxide, magnesium fluoride, aluminum oxide, and the like. The current blocking structure 23 may be a single layer or a multilayer stack. According to an embodiment (not shown), the current blocking structure 23 includes a plurality of first insulating layers having a first refractive index and a plurality of second insulating layers having a second refractive index, which are alternately stacked, wherein the first refractive index and the second refractive index are different. According to another embodiment (not shown), the current blocking structure 23 for current distribution may be further formed below the second contact structure 30 on the second unit C 2 and / or below the first finger part 202 on the second unit C 2. According to another embodiment, the current blocking structure 23 may include a plurality of separate current blocking units (not shown) arranged under and corresponding to the first contact structure 20 or the second contact structure 30 or the connection structure 60. According to another embodiment (not shown), the current blocking structure 23 includes two separate current blocking units, each arranged below the two connection structures 60.A first isolation structure 50 covers the first unit C 1, the second unit C 2, and the trench 36, and includes openings 501 and 502 exposing the first contact structure 20 and the second contact structure 30, respectively. More specifically, the opening 501 exposes the first contact part 201 and the opening 502 exposes the second contact part 301. The first insulating structure 50 may be a single layer or a multilayer stack. The material of the first insulating structure 50 includes insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, niobium oxide, hafnium oxide, titanium oxide, magnesium fluoride, aluminum oxide, and the like. According to an embodiment (not shown), the first isolation structure 50 includes a plurality of first sub-layers having a first refractive index and a plurality of second sub-layers having a second refractive index, which are alternately stacked, wherein the first refractive index and the second refractive index are different. The first insulating structure 50 may reflect light in a specific wavelength range and / or in a specific incident angle range, i.e., the first insulating structure 50 may be a reflective structure. For example, the first insulating structure 50 has a reflectance of more than 60% of the dominant wavelength and / or the peak wavelength of the light emitting device 1. According to an embodiment, the first isolation structure 50 includes a distributed Bragg reflector.According to another embodiment, the first insulating structure 50 further includes additional layers besides the first sub-layers and the second sub-layers. For example, the first insulating structure 50 further includes a bottom layer (not shown). The bottom layer is formed on the semiconductor stack 12 first, and then the first sub-layers and the second sub-layers are formed on the bottom layer. According to an embodiment, the bottom layer contains insulating material and its thickness is greater than those of the first sub-layer and the second sub-layer. According to an embodiment, the bottom layer may be formed by a same process as that for forming the first sublayer and the second switching layer. For example, the bottom layer, the first sub-layers, and the second sub-layers are formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD). For example, the bottom layer, the first sub-layers, and the second sub-layers are formed by PVD such as evaporation, sputtering, or a combination thereof to obtain a smoother surface of the first insulating layer 50. According to another embodiment, the bottom layer may be formed by a process different from that for forming the first sublayer and the second sublayer. For example, the bottom layer is formed by CVD such as plasma enhanced chemical vapor deposition (PECVD). The first sub-layers and the second sub-layers are formed by PVD such as evaporation or sputtering. According to an embodiment, the bottom layer may protect the light emitting device or the semiconductor stack. For example, the bottom layer prevents moisture from entering the light emitting device.According to another embodiment, the first insulating structure 50 further includes a top layer (not shown). In other words, first, the first sub-layers and the second sub-layers are formed on the semiconductor stack 12, and then the uppermost layer is formed. The thickness of the uppermost layer is greater than the thicknesses of the first sublayer and the second sublayer. According to an embodiment, the top layer may be formed by a process different from that for forming the first sublayer and the second sublayer. For example, the top layer is formed by CVD such as PECVD. The first sub-layers and the second sub-layers are formed by sputtering or evaporation. According to an embodiment, the top layer may improve the robustness of the first isolation structure 50. For example, when the first insulating structure 50 is subjected to an external force, the uppermost layer may prevent the first insulating structure 50 from being broken and damaged due to the external force.According to another embodiment, the first insulating structure 50 further includes a dense layer (not shown). According to an embodiment, the dense layer may be formed by atomic layer deposition (ALD). The dense layer may be formed on the transparent conductive layer 18 and on the semiconductor stack 12 to directly cover the semiconductor stack 12. According to an embodiment, the dense layer may be adaptively formed on the semiconductor stack 12. Due to the property of good step coverage of the dense layer, the dense layer may protect the semiconductor stack 12, such as prevent moisture from entering the semiconductor stack 12. According to an embodiment in which the dense layer directly covers the semiconductor stack 12 and is between the semiconductor stack 12 and the plurality of first sub-layers and the second sub-layers, the dense layer may increase the adhesion strength between the first insulating structure 50 and the semiconductor stack 12, thereby improving the reliability of the light emitting device. According to another embodiment, the dense layer may be formed on top of the first insulating structure 50. According to an embodiment, the dense layer may reduce or prevent diffusion of metal elements from the following pad electrode formed thereon into the semiconductor stack 12 through defects of the first isolation structure 50. In addition, the dense layer can increase the adhesion strength between the first insulating pattern 50 and the following pad electrode. The material of the dense layer includes silicon oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, yttrium oxide, lanthanum oxide, silicon nitride, aluminum nitride, or silicon oxynitride. The dense layer has a thickness between 50 Å and 2000 Å, between 100 Å and 1500 Å, according to one embodiment.On the semiconductor stack 12, an electrode structure including a pad electrode structure and a bonding electrode structure formed thereon is formed. The land electrode structure includes a first land electrode 20A and a second land electrode 30A. The bonding electrode pattern includes a first bonding electrode 29 and a second bonding electrode 39. more specifically, the first pad electrode 20A and the first bonding electrode 29 form a first electrode pattern such as an n-electrode pattern, and the second pad electrode 30A and the second bonding electrode 39 form a second electrode pattern such as a p-electrode pattern. The first electrode structure and the second electrode structure may provide a current path for an external power device to supply power to the semiconductor device 12. The first pad electrode 20A is filled in the opening 501 and thereby connected to the first contact structure 20. The second pad electrode 30A is filled in the opening 502 and thereby connected to the second contact structure 30. In this way, the first land electrode 20A and the second land electrode 30A are electrically connected to the first semiconductor layer 121 and the second semiconductor layer 122, respectively. A second insulating structure 40 covers the first and second units C 1 and C 2, the land electrode structures 20A and 30A, and the trench 36. The first bonding electrode 29 is filled in the first opening 401, and thereby connected to the first pad electrode 20A. The second bonding electrode 39 is filled in the second opening 402, and thereby connected to the second pad electrode 30A. The first opening 401 has a similar shape to the first pad electrode 20A and / or the first pad electrode 29. The second opening 402 has a similar shape to the second pad electrode 30A and / or the second pad electrode 39.Between the terminal pad electrode structure and the contacting electrode structure, parts of the second insulating structure 40 are arranged. According to the embodiment shown in FIG. 1A, a maximum width of the first opening 401 is smaller than the maximum widths of the first bonding electrode 29 and the first pad electrode 20A. A maximum width of the second opening 402 is smaller than the maximum widths of the second bonding electrode 39 and the second pad electrode 30A. The side surfaces of the land electrode patterns 20A and 30A may be covered and protected by the second insulating pattern 40.The second insulating structure 40 includes an insulating material and may be a single layer or a multilayer stack. According to an embodiment, the second insulating structure 40, like the first insulating structure 50, may include one or more insulating pairs. Each of the insulating pairs includes a plurality of sub-layers having different refractive indices. According to another embodiment, the second isolation structure 40 includes a distributed Bragg reflector or a bottom layer or a top layer or a dense layer similar to those of the first isolation structure 50 described above. For the details of the second insulating film structure 40, the description of the first insulating film structure 50 may be referred to and not repeated again. The material of the pad electrode structure and the material of the pad electrode structure include a metal such as Cr, Ti, W, Au, Al, In, Sn, Ni, Pt, Ag, or an alloy or a layer stack of the above materials. According to an embodiment, the pad electrode structure includes a reflective metal such as Al, Ag, or Rh. The reflective metal pad electrode structure and the first insulating structure 50 form an omnidirectional reflector (ODR). According to one embodiment, a thickness of the pad electrode structure is in the range of 1 to 15 μm and a thickness of the contacting electrode structure is in the range of 1 to 15 μm. According to one embodiment, the thickness of the contacting electrode structure is greater than that of the contact pad electrode structure. A total thickness of the pad electrode structure and the bonding electrode structure stacked thereon is in the range of 2 to 30 μm. According to another embodiment, the total thickness of the pad electrode structure and the contacting electrode structure is in the range of 5 to 30 μm.According to one embodiment, the pad electrode structure and the contacting electrode structure have similar shapes just on the pad electrode structure in a plan view. The first opening 401 and the first electrode structure have similar shapes. The second opening 402 and the second electrode structure have similar shapes. For example, as shown in FIG. 1A, the shape of the first pad electrode 20A (or the second pad electrode 30A) is an enlargement of the shapes of the first pad electrode 29 (or the second pad electrode 39) and the first opening 401 (or the second opening 402). However, the present embodiment is not limited thereto. The shapes of the first opening 401 and the second opening 402 may be different from those of the first electrode structure and the second electrode structure, respectively.In plan view, the electrode structure includes a slot set. More specifically, as shown in FIG. 1A, the first electrode structure includes a first slot set S 1 having a first slot S 11 in the first pad electrode 20A and having a second slot S 12 in the first pad electrode 29. the second electrode structure includes a second slot set S 2 having a third slot S 21 in the second pad electrode 30A and a fourth slot S 22 in the second pad electrode 39. for brevity of description, the details of the slot set and the electrode structure are described by taking the first slot S 11, the second slot S 12, the first slot set S 1, and the first electrode structure (20A and 29) as an example. Those skilled in the art can understand the details of the second slot set S 2, the third slot S 21, the fourth slot S 22, and the second electrode structure ( 30A and 39) by the following disclosures.As shown in FIGS. 1A and 1C, the first slit S 11 passes through the first pad electrode 20A in the Z direction, and the second slit S 12 passes through the first pad electrode 29 in the Z direction. In other words, the depth of the first slot S 11 is equal to the thickness of the first pad electrode 20A and the depth of the second slot S 12 is equal to the thickness of the first pad electrode 29. According to another embodiment (not shown), the first slot S 11 does not completely cross the first pad electrode 20A and the second slot S 12 completely cross the first pad electrode 29 in the Z direction, so that the depth of the first slot S 11 is smaller than the thickness of the first pad electrode 20A. The second slot S 12 overlaps and corresponds to the first slot S 11. The second slit S 12 and the first slit S 11 extend along the same direction in the XY plane. The widths or the lengths of the first slot S 11 and the second slot S 12 are the same as or different from each other. According to an embodiment, the portion of the second slot S 12 overlapped with the first slot S 11 has a length of more than 50% of the total length of the second slot S 12. According to an embodiment, the center lines of the first slot S 11 and the second slot S 12 are substantially aligned in plan view.The first slot S 11 has a width smaller than the width of the second slot S 12, wherein the width of the first slot S 11 is in the range of 3 to 30 μm, and the width of the second slot S 12 is in the range of 8 to 40 μm. According to an embodiment, the recess and the first contact structure 20 are located in a region outside the first slot set S 1 and / or the second slot set S 2, as shown in the top view. Both the recess and the first contact structure 20 do not overlap the first slot set S 1 and / or the second slot set S 2. The width of the first slot S 11 is smaller than a width W of the recess. According to an embodiment, the first slot set S 1 and the second slot set S 2 extend in a parallel direction in plan view. For example, as shown in FIG. 1A, the first slot set S 1 and the second slot set S 2 extend along the X direction. According to another embodiment, the first slot set S 1 and the second slot set S 2 extend in different directions. For example, the first slot set S 1 runs along the X direction and the second slot set S 2 runs along the Y direction. However, the first slot set S 1 and the second slot set S 2 may extend along any directions in the XY plane, and the first slot set S 1 and the second slot set S 2 may extend straight or have curvatures. According to an embodiment shown in FIG. 1A, the first electrode structure ( 20A and 29) and the second electrode structure ( 30A and 39) are spaced apart from each other by a clearance in the X direction. The first slot set S 1 and the second slot set S 2 extend from the sides of the first electrode structure and the second electrode structure, respectively, that are adjacent to the gap along the X direction. The amount of the first slot set S 1 and the amount of the second slot set S 2 may be more than one, and the two amounts may be the same or different from each other.As shown in FIG. 1A, the first slit set S 1 according to an embodiment does not pass through the first electrode pattern in the XY plane. In other words, as shown in FIG. 1A, the first electrode structure ( 20A and 29) includes one part on one side of the first slot set S 1 and the other part on the other side of the first slot set S 1, the two parts on the left side of the first electrode structure being connected to each other. FIGS. 5A-5D show schematic plan views of the first pad electrode 20A and the first contact electrode 29 according to modified embodiments of the present application. According to another embodiment shown in FIG. 5A, the first slit set S 1 may pass through the first electrode pattern ( 20A and 29) in the XY plane. That is, in the plan view, the first slot S 11 passes through the first land electrode 20A and the second slot S 12 passes through the first bonding electrode 29. According to still another embodiment shown in FIG. 5B, the first slit S 11 does not pass through the first land electrode 20A and the second slit S 12 passes through the first contacting electrode 29. According to still another embodiment shown in FIG. 5C, the first slit S 11 passes through the first pad electrode 20A and the second slit S 12 does not pass through the first pad electrode 29. The first bonding electrode 29 is disposed on the plurality of divided parts and covers a portion of the first slit S 11. According to yet another embodiment shown in FIG. 5D, the first slot S 11 and / or the second slot S 12 may be composed of a plurality of discrete slots.FIG. 1D is a simplified plan view of the light emitting device 1, showing only the substrate 10, the semiconductor stack 12, the recesses, the first contacting electrode 29 and the second contacting electrode 39. The second slot S 12 is enclosed by a pseudo edge (E 1) which originates from an outline of the first contact electrode 29 and thereby has a first surface area A 1. An area of the first contacting electrode 29 and the first area A1form a total area AT1, wherein A1 / AT1is in the range of 5-30%. In the same way, the fourth slot S 22 is enclosed by a second pseudo-edge (E 2) which originates from an outline of the second contact electrode 39 and thereby has a second area A 2. An area of the second contacting electrode 39 and the second area A 2 form a total area AT 2, wherein A 2 / AT 2 is in the range of 5-30%. The first area A 1 and the second area A 2 may be the same or different. The relationship may also be applied in the bonding electrode pattern 29 and 39 of any of the embodiments of the present application.If the details of each element of the light emitting device according to any embodiment of the present application such as material and thickness are not specifically described in the following descriptions and have the same designation and reference sign as those of the light emitting device 1, the description of the light emitting device 1 may be referred to for the details and will not be repeated. FIG. 2A is a plan view of a light emitting device 2 according to another embodiment of the present application. FIG. 2B is a cross-sectional view taken along line A-A in FIG. 2A. FIG. 2C is a cross-sectional view taken along a line B-B' in FIG. 2A. FIG. 2D is a cross-sectional view taken along a line C-C' in FIG. 2A.Differences between the light-emitting device 2 and the light-emitting device 1 will be described below. As shown in FIG. 2A, the first slot set S 1 is parallel to the X direction, and the second slot sets S 2 are parallel to the Y direction. The second insulating layer structure 40 of the light emitting device 2 includes a first portion 420 having the first opening 401 and a second portion 430 having the second opening 402. The first portion 420 and the second portion 430 are separated from each other in plan view and do not overlap. The first portion 420 is formed between the first pad electrode 20A and the first pad electrode 29, and the second portion 430 is formed between the second pad electrode 30A and the second pad electrode 39. The first bonding electrode 29 is filled in the first opening 401 and connected to the first land electrode 20A. The second bonding electrode 39 is filled in the second opening 402 and connected to the second pad electrode 30A. According to an embodiment, the first portion 420 of the second insulation structure 40 has a similar shape as the first pad electrode 20A and the first contacting electrode 29. More specifically, the shape of an outer contour of the first portion 420 is an enlargement of the shapes of the first pad electrode 20A and the first pad electrode 29. In the same manner, the second portion 430 of the second insulating pattern 40 has a similar shape to the second pad electrode 30A and the second pad electrode 39. The side surfaces of the second pad electrode 30A may be covered and protected by the second portion 430.The first portion 420 includes a fifth slot S 13 that overlaps the first slot set S 1, such as the first slot S 11 and the second slot S 12. The fifth slot S 13 is arranged corresponding to the first slot S 11 and / or the second slot S 12. Specifically, as shown in FIGS. 2A and 2D, the first slot S 11, the second slot S 12, and the fifth slot S 13 overlap and correspond to each other. Similar to the first portion 420, the second portion 430 includes two second slots S 23 each overlapping the second slot set S 2. The sixth slot S 23 is arranged corresponding to the third slot S 21 and / or the fourth slot S 22. For brevity of description, the details of the slots of the first portion 420 and the second portion 430 are described by taking the fifth slot S 13 as an example. Those skilled in the art will understand the details of the sixth slot S 23 through the following disclosures. The fifth slot S 13 and the first slot set S 1 extend along the same direction in the XY plane. The width or length of the fifth slot S 13 may be the same as or different from those of the first slot S 11 and the second slot S 12. According to an embodiment, the center lines of the first slot S 1, the second slot S 12, and the fifth slot S 13 are substantially aligned in plan view.The fifth slot S 13 has a width in the Y direction and a length in the X direction that are smaller than those of the first slot S 11 and that of the second slot S 12, and the sixth slot S 23 has a width in the X direction and a length in the Y direction that are smaller than those of the third slot S 21 and the fourth slot S 22. It should be understood that the widths and lengths of the fifth slot S 13 and the sixth slot S 23 are not limited to this example. According to an embodiment, the widths of the fifth slot S 13 and the sixth slot S 23 are in the range of 3 to 30 μm. According to an embodiment, the total stack thickness T of the pad electrode structure, the second insulating structure, and the contacting electrode structure is in the range of 2 to 30 μm. According to another embodiment, the total stack thickness T of the pad electrode structure, the second insulating structure, and the bonding electrode structure is in the range of 5 to 30 μm.FIG. 3A is a plan view of a light emitting device 3 according to another embodiment of the present application. FIG. 3B is a cross-sectional view taken along line A-A' in FIG. 3A. FIG. 3C is a cross-sectional view taken along a line B-B' in FIG. 3A. Differences between the light-emitting device 3 and the light-emitting device 2 will be described below. As shown in FIG. 3A, the second insulating structure 40 of the light emitting device 3 does not include the first opening 401 and the second opening 402. Portions of the first land electrode 20A and the second land electrode 30A are not covered by the first portion 420 and the second portion 430 of the second insulating structure 40, respectively. For example, as shown in FIG. 3A, the fifth slot S 13 has a length in the X direction longer than that of the first slot S 11 such that a part of the first pad electrode 20A is not covered by the first portion 420 of the second insulating structure 40 and exposed by the fifth slot S 13. Moreover, according to the embodiment, two corners of the first land electrode 20A are not covered by the first portion 420. The first bonding electrode 29 is formed on the first portion 420 and connected to the exposed parts of the first pad electrode 20A. The more exposed parts the pad electrode structure has, the larger the contact area between the pad electrode structure and the pad electrode structure, thereby improving the electrical property of the light emitting device. However, the positions of the exposed portions of the first land electrode 20A are not limited thereto. In accordance with various shapes of the first portion 420, the exposed parts of the first pad electrode 20A may be disposed on other regions. The first contact-making electrode 29 has a larger surface area than the first connection surface electrode 20A. Thus, the first bonding electrode 29 covers the side surfaces of the exposed parts of the first pad electrode 20A. A metal element such as A1 or Ag in the first pad electrode 20A may be protected by the first pad electrode 29 and prevented from migrating or being corroded. The second land electrode 30A, the second land electrode 39, the sixth slot S 23, and the second portion 430 are similarly arranged. The details of the second land electrode 30A, the second bonding electrode 39, the first slot S 23, and the second portion 430 may be referred to in the above descriptions, and will not be repeated.Various changes and combinations may be made to the light emitting devices according to the embodiments of the present application. For example, the first or second portion of the second insulating structure 40 includes the opening and the slot shown in FIG. 2A, exposing the pad electrode shown in FIG. 3A thereunder. For example, the light emitting device includes the first electrode structure and the first portion 420 of the light emitting device 2, and the second electrode structure and the second portion 430 of the light emitting device 3. According to yet another embodiment, the first contact structure 20 may be omitted such that the first pad electrode 20A contacts the first semiconductor layer 121 in the recesses, and / or the second contact structure 30 may be omitted such that the second pad electrode 30A contacts the transparent conductive layer 18 or the second semiconductor layer 122.According to an embodiment, instead of multiple separate units, the semiconductor stack 12 includes a single unit without the interconnect structure 60, and the first electrode structure and the second electrode structure are formed on the semiconductor layers having different conductivity types in the single unit. FIG. 4A is a plan view of a light emitting device 4 according to another embodiment of the present application. FIG. 4B is a cross-sectional view taken along line A-A' in FIG. 4A. FIG. 4C shows a simplified plan view of the light emitting device 4, which only shows the substrate 10, the semiconductor stack 12, the recesses, the first pad electrode 20A, the second pad electrode 30A, the first contacting electrode 29 and the second contacting electrode 39. Differences between the light emitting device 4 and the above-mentioned light emitting devices will be described below.The semiconductor stack 12 of the light emitting device 4 includes a single unit. The first electrode pattern ( 20A and 29) and the second electrode pattern ( 30A and 39) are formed on the single unit. A plurality of the recesses are formed in the semiconductor stack 12. As shown in FIGS. 4A and 4C, a portion of the plurality of recesses in a central region of the semiconductor stack 12 are arranged surrounded by the semiconductor mesa, and the other portion of the plurality of recesses is arranged in the peripheral region of the semiconductor stack 12. The second pad electrode 30A is disposed on a region of the semiconductor stack 12 without the first contact structure 20 thereon to electrically connect the second contact structure 30 for current distribution. The first land electrode 20A and the second land electrode 30A are insulated from each other by a clearance G. In plan view, the contours of the first land electrode 20A and the second land electrode 30A arranged around two sides of the gap G may be complementary or complementary. According to an embodiment, a total area of the first pad electrode 20A and the second pad electrode 30A is in the range of 20-90% of the area of the semiconductor stack 12. The second opening 402 and the second bonding electrode 39 have similar shapes.In the plan view of FIG. 4C, the first electrode structure ( 20A and 29) includes the first slot sets S1and S1', and the second electrode structure ( 30A and 39) includes the second slot sets S2and S2'. As shown in FIG. 4C, according to an embodiment, the first electrode structure ( 20A and 29) includes two first slot sets S1that are located near the peripheral region of the semiconductor stack 12 and four first slot sets S1' that are located in the central region of the semiconductor stack 12. The second electrode structure ( 30A and 39) includes four second slot sets S2 located near the peripheral region of the semiconductor stack 12 and two second slot sets S2' located in the central region of the semiconductor stack 12. Because of the configuration of the first slot sets S1' of the first electrode structure and the second slot sets S2' of the second electrode structure, the outline of the first pad electrode 20A and the outline of the second pad electrode 30A do not match, e.g., the first pad electrode 20A does not extend into the second slot sets S2' of the second electrode structure, so that the outlines of the first pad electrode 20A and the second pad electrode 30A are not fully complementary but are complementary. According to another embodiment (not shown), all first slot sets S 1, S 1' and all second slot sets S 2, S 2' are located near the two sides of the gap G, wherein the contours of the first pad electrode 20A and the second pad electrode 30A adjacent to the gap G are complementary. According to another embodiment (not shown), all slot sets may be located near the periphery region of the semiconductor stack 12 and the outlines of the first pad electrode 20A and the second pad electrode 30A adjacent to the gap G may be complementary.According to an embodiment, a width of the first slot 11 of the first slot set S1' and / or the third slot 21 of the second slot set S2' may be the same as a width of the gap G. According to another embodiment, the plurality of the first slot etch S 1 have the same or different widths and / or the plurality of the second slot set S 2 have the same or different widths.Various changes and combinations may be made to the light emitting device 4 according to the embodiments of the present application. For example, as in the above-mentioned embodiments, the first pad electrode 20A has a similar shape to the first pad electrode 29, and the second pad electrode 30A has a similar shape to the second pad electrode 39. The contours of the pad electrodes 20A and 30A are not complementary. According to another embodiment, the first contact structure 20 or the second contact structure 30 for current distribution may further include a finger part extending from the contact part 201 or 301. According to yet another embodiment, the first contact structure 20 may be omitted such that the first pad electrode 20A contacts the first semiconductor layer 121 in the recesses, and / or the second contact structure 30 may be omitted such that the second pad electrode 30A contacts the transparent conductive layer 18 or the second semiconductor layer 122.FIG. 6 shows a cross-sectional view of a semiconductor module 100 according to an embodiment of the present application. The semiconductor module 100 includes a carrier 101 and the semiconductor devices according to any embodiments of the present application fixed to the carrier 101. To show the slot set of the electrode structure in the semiconductor module 100, the light emitting device 4 is taken as an example applied to the semiconductor module 100, and the cross-sectional view shown in FIG. 6 passes through the line R-R' of the light emitting device 4. The semiconductor module 100 may be a light emitting module. Also, it is noted that the details of the elements of the light emitting device 4 are omitted to make FIG. 6 clear.As shown in FIG. 6, the carrier 101 is provided with end pads 8 aand 8 b. According to an embodiment, the carrier 101 includes a printed circuit board. The first bonding electrode pad 29 and the second bonding electrode pad 39 of the light emitting devices according to any embodiments of the present application are connected by a flip-chip type conductive adhesive member 80 and attached to the end pads 8 aand 8 b. In this way, most of the light emitted by the semiconductor stack 12 is coupled out through the back surface and / or through the side surfaces of the substrate 10. According to another embodiment (not shown), in the light emitting device according to any embodiments of the present application, the substrate 10 is absent and light is coupled out through the side of the semiconductor stack 12 opposite the electrode structures. According to one embodiment, the conductive adhesive member 80 includes a base body in which conductive particles are dispersed. The conductive adhesive member 80 may be formed of, for example, thermosetting resin or ultraviolet curing resin. Without limitation, the conductive adhesive member 80 includes an anisotropic conductive adhesive and an isotropic conductive adhesive such as silver paste. In the above-mentioned descriptions, the width of the slot of the pad electrode pattern is in the range of 3 to 30 μm, and the width of the slot of the pad electrode pattern is in the range of 8 to 40 μm. In this manner, the conductive adhesive member 80 is not only disposed between the outer surfaces of the bonding electrode structure, but also filled in the slit sets S 1 and S 2. Thus, the light emitting device may be fixed to the carrier 101 through the conductive adhesive member 80. In addition, the slot sets S 1 and S 2 accommodate the overflowed conductive adhesive 80 if the conductive adhesive 80 overflows during the flip-chip contacting process, which reduces the risk of an electrical short between the two pad electrode structures. According to an embodiment, more surface areas of the side surfaces SS of the slot set may increase the contact area between the electrode structure and the conductive adhesion member 80, thereby improving adhesion between the light emitting device and the carrier 101.According to an embodiment, the light emitting module 100 may further include an encapsulant (not shown) formed on the carrier 101 and covering the light emitting device. The encapsulant includes a transparent material such as silicone, epoxy, acrylic, or a combination thereof. According to another embodiment (not shown), the light emitting module 100 includes the carrier 101 and a plurality of light emitting assemblies attached to the carrier 101, wherein the light emitting device according to any of the embodiments is encapsulated in the light emitting assembly and flip-chip mounted to the carrier 101. The light emitting assembly (not shown) includes leads and a body having a cavity. The light emitting device according to any embodiments of the present application is inserted into the cavity, and the first bonding electrode pad 29 and the second bonding electrode pad 39 of the light emitting device are connected by the conductive adhesive member 80 and attached to the leads. The conductive adhesive member 80 may be filled in the slot sets S 1 and S 2 so that the light emitting device may be attached to the leads in the package. Further, the light emitting assembly may include an encapsulant filled in the cavity and covering the light emitting device.It will be apparent to those skilled in the art that various changes and variations can be made to the devices according to the present disclosure without departing from the scope of the disclosure. In view of the foregoing, the present disclosure is intended to include modifications and variations of this disclosure so long as they are within the scope of the following claims and their equivalents.

Claims

A semiconductor module comprising: a substrate; an end pad on the substrate; a conductive adhesion member; and a semiconductor device disposed on the substrate; wherein the semiconductor device comprises: a semiconductor stack; an electrode structure formed on and electrically connected to the semiconductor stack, comprising a pad electrode structure and a bonding electrode structure formed on the pad electrode structure; and a first insulating structure formed between the pad electrode structure and the bonding electrode structure; wherein the electrode structure comprises a slot set extending in the pad electrode structure and in the bonding electrode structure; wherein the bonding electrode structure is connected to the end pad through the conductive adhesion member, and wherein the conductive adhesion member is filled in the slot set.The semiconductor module according to claim 1, wherein the slot set includes a first slot in the pad electrode structure and a second slot in the pad electrode structure, and the second slot overlaps and corresponds to the first slot in a plan view.The semiconductor module according to claim 2, wherein a width of the second slot is in the range of 8 to 40 μm and / or a total thickness of the pad electrode structure and the contacting electrode structure is in the range of 2 to 30 μm.The semiconductor module according to claim 2 or 3, wherein the second slot is enclosed in plan view by a pseudo-edge, which starts from an outline of the contacting electrode structure and thereby has a first surface area A1, wherein a surface area of the contacting electrode structure and the first surface area form a total surface area AT, wherein A1 / AT is in the range of 5-30%.The semiconductor module according to any one of the preceding claims, wherein the semiconductor device further comprises a contact structure formed between the semiconductor stack and the first insulating structure.The semiconductor module of claim 5, wherein the semiconductor device further comprises a second isolation structure formed on the semiconductor stack including an opening exposing the contact structure.The semiconductor module of claim 6, wherein the pad electrode structure is formed on the second insulating structure, filled in the opening, and connected to the contact structure.The semiconductor module according to any one of the preceding claims, wherein the semiconductor stack comprises: a first semiconductor layer; an active region a second semiconductor layer; and a recess exposing an upper surface of the first semiconductor layer; wherein the pad electrode structure is electrically connected to the first semiconductor layer through the recess.The semiconductor module according to claim 8, wherein the slot set comprises a first slot in the land electrode structure in a plan view, and wherein the first slot has a width smaller than the recess.The semiconductor module according to any one of the preceding claims, wherein the first insulating structure comprises a first opening exposing the electrode structure, and the bonding electrode structure is filled in the first opening and connected to the pad electrode structure.The semiconductor module according to any one of the preceding claims, wherein: the pad electrode structure comprises a first pad electrode electrically connected to the first semiconductor layer and a second pad electrode electrically connected to the second semiconductor layer, and the pad electrode structure comprises a first pad electrode electrically connected to the first pad electrode and a second pad electrode electrically connected to the second pad electrode.The semiconductor module according to claim 11, wherein the first insulating structure includes a first portion and a second portion separated from each other, the first portion and the second portion have no overlap in a plan view, the first portion is formed between the first pad electrode and the first pad electrode, and the second portion is formed between the second pad electrode and the second pad electrode.The semiconductor module according to claim 12, wherein each of the first portion and the second portion includes a third slot, and the third slot overlaps and corresponds to the first slot in the first portion or the second portion in plan view.The semiconductor module according to any one of the preceding claims, wherein: the pad electrode structure comprises a first pad electrode and a second pad electrode; and the pad electrode structure comprises a first pad electrode electrically connected to the first pad electrode and a second pad electrode electrically connected to the second pad electrode; wherein the slot set comprises a first slot set formed in the first pad electrode and in the first pad electrode and a second slot set formed in the second pad electrode and in the second pad electrode.The semiconductor module according to claim 14, wherein, in a plan view, the first slot set extends in a first direction and the second slot set extends in a second direction different from the first direction.The semiconductor module according to claim 2 or 9, wherein the first insulating structure is filled in the first slot.A semiconductor device, comprising: a semiconductor stack comprising a first semiconductor layer, an active region, and a second semiconductor layer; an electrode structure formed on and electrically connected to the semiconductor stack, comprising a pad electrode structure and a pad electrode structure formed on the pad electrode structure; and a first insulating structure formed on the pad electrode structure; wherein the electrode structure comprises a first slot set, wherein the first slot set comprises a first slot in the pad electrode structure and a second slot in the pad electrode structure, and wherein the second slot overlaps and corresponds to the first slot in a plan view.The semiconductor of claim 2 or 17, wherein a portion of the second slot that overlaps the first slot comprises a length greater than 50% of an overall length of the second slot in plan view.The semiconductor device according to claim 17, wherein: the pad electrode structure includes a first pad electrode electrically connected to the first semiconductor layer and a second pad electrode electrically connected to the second semiconductor layer, and the pad electrode structure includes a first pad electrode electrically connected to the first pad electrode and a second pad electrode electrically connected to the second pad electrode; wherein the first insulating structure includes a first portion and a second portion separated from each other, the first portion and the second portion have no overlap in plan view, the first portion is formed between the first pad electrode and the first pad electrode, and the second portion is formed between the second pad electrode and the second pad electrode.The semiconductor device according to claim 19, wherein each of the first portion and the second portion includes a third slit, and the third slit overlaps and corresponds to the first slit in the first portion or the second portion in plan view.

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