METHOD FOR MANUFACTURING A CHIP MODULE

DE502014016955D1Active Publication Date: 2025-09-25PAC TECH PACKAGING TECH
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Patent Information

Application Number
DE502014016955
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2013-12-27
Filing Date
2014-11-25
Publication Date
2025-09-25
Estimated Expiration
2034-11-25

AI Technical Summary

Technical Problem

Existing methods for producing chip modules require pre-manufactured chip carriers with contact conductor arrangements, leading to complex and costly production processes, especially for high-volume industrial applications.

Method used

The method involves fixing a chip with its connection surfaces on a carrier substrate and subsequently forming the contact conductor arrangement by structuring a contact material layer on the substrate, eliminating the need for pre-manufactured chip carriers and allowing simultaneous formation of the contact conductor arrangement during chip module production.

Benefits of technology

This approach simplifies and cost-effectively enables high-volume production of chip modules by integrating the contact conductor arrangement directly into the manufacturing process, reducing the need for additional rewiring and enabling a thin, flexible design.

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Description

[0001] The present invention relates to a method for producing a chip module with a carrier substrate and at least one chip arranged on the carrier substrate and a contact conductor arrangement for connecting chip connection surfaces to connection contacts arranged on a contact side of the chip module, in which the chip is fixed with its front side provided with the chip connection surfaces on the carrier substrate and subsequently the formation of the contact conductor arrangement takes place by structuring a contact material layer of the carrier substrate.

[0002] Chip modules, often referred to in technical terminology as "chip packages," generally comprise a carrier substrate provided with a contact conductor arrangement and a chip protected within a chip housing, which is contacted to the contact conductor arrangement via its chip connection pads. The contact conductor arrangement essentially serves the purpose of forming an arrangement of connection contacts suitable for external contacting of the chip module. The connection contacts are spaced further apart than the chip connection pads and have larger contact areas to simplify external contacting of the chip module. A chip module with a molded semiconductor chip, which enables external contacting of two opposing chip surfaces, is proposed in US 2009 / 0261468 A1.US 2009 / 0194882 A1 and US 2012 / 0273960 and US 2011 / 291252 also describe semiconductor modules comprising chips with contact surfaces on a front and a back.

[0003] In particular, the contact conductor arrangement can be used to adapt to the connection contact arrangements of other chip modules or circuit boards, so that the chip module can be contacted with the other chip module or circuit board without additional rewiring effort. The contact conductor arrangement can therefore also be considered an integrated "rewiring" of the chip module, which eliminates the need for external rewiring between chip modules that are to be contacted. The special layout or the special distribution of the external connection contacts that individualizes the chip module is also often referred to as the so-called "footprint."

[0004] Known methods for producing a chip module provide, for example, that a substrate made of a dielectric material is used as the chip carrier, which is provided with a contact conductor arrangement for forming the "internal rewiring", wherein after the contact conductor arrangement has been produced, the chip is contacted on the chip carrier and then a chip housing accommodating the chip is formed on the chip carrier by enclosing the chip in a so-called "mold", which is applied to the chip in a liquid state and, after curing, forms the intended protective housing for the chip.

[0005] The present invention is based on the object of proposing a method which significantly simplifies the production of a chip module and in particular enables industrial production of chip modules in high quantities at low cost.

[0006] To achieve this object, the inventive method has the features of independent claim 1. Further embodiments are defined by dependent claims 2-10. In the method according to the invention, the chip, with its front side provided with chip connection areas, is fixed to a contact material layer of a carrier substrate. After fixing for positioning the chip on the carrier substrate, the contact conductor arrangement is formed by structuring the contact material of the carrier substrate. This eliminates the need to provide chip carriers that are already provided with a contact conductor arrangement. Rather, the formation of the contact conductor arrangement with a footprint that individualizes the chip module can take place together with the manufacture of the chip module.

[0007] In contrast to the known method discussed above, in the method according to the invention for producing a chip module, the chip is arranged on the carrier substrate before the contact conductor arrangement is formed. Furthermore, the contact conductor arrangement is formed by structuring the carrier substrate formed from the contact material.

[0008] Advantageous embodiments of the invention are the subject of the dependent claims.

[0009] The chip is preferably fixed to the carrier substrate by placing the chip with its front side, which is provided with chip connection pads, on an adhesive coating of the contact material layer of the carrier substrate. Due to the adhesive coating of the carrier substrate, it is possible, for example, to dispense with the need for recesses in the carrier substrate or the like that define the position of the chip on the carrier substrate. This allows the carrier substrate to be designed with flat surfaces in a particularly simple manner.

[0010] It is particularly advantageous if the carrier substrate is formed from a contact material foil, which allows for a particularly thin design of the carrier substrate formed from the contact material. Furthermore, the contact material foil can be provided as a continuous material for forming the carrier substrate, which facilitates automated inline production of the chip module in large quantities, since the contact material foil can simultaneously be used as an endless conveyor for a timed advance movement in the chip module manufacturing process.

[0011] It is particularly advantageous if a contact material foil is used for the carrier substrate which is already provided with an adhesive coating, so that the application of an adhesive coating in a separate process step prior to the placement of the chip on the carrier substrate is not necessary.

[0012] For example, the connecting contacts can be formed by using a solder material as the contact material, which is applied into the contact recesses. Such application of solder material can be achieved, for example, by means of a process in which molten solder deposits are projected onto the chip connection surfaces accessible via the contact recesses.

[0013] Another option for introducing contact material into the contact recesses is to apply the contact material using a deposition process. In principle, both a galvanic deposition process and an electroless deposition process are possible, in which the contact material is preferably deposited by autocatalytic deposition, for example, by deposition of nickel and / or gold. To improve the adhesion between the autocatalytically deposited metals and the chip connection surfaces, electrolytic deposition of zincate or palladium can advantageously be performed to "seed" the chip connection surfaces.

[0014] It is also conceivable that, as an alternative to contacting the chip connection surfaces with the carrier substrate by forming contact recesses in the contact material layer by structuring the contact material layer and filling the contact recesses with contact material before forming the contact conductor arrangement, contacting the chip connection surfaces with the contact material layer can also be carried out independently of the structuring of the contact material layer.

[0015] To contact the chip connection pads with the contact material layer, the chip connection pads provided with contact bumps are preferably brought into contact with the contact material layer, and the chip connection pads are subsequently connected to the contact material layer by melting the contact bumps. Fixing the chip to the carrier substrate can also occur simultaneously with the formation of the connecting contact to the contact material layer.

[0016] It is particularly advantageous if the melting of the contact elevations is carried out by means of a laser exposure to the chip or the contact material layer.

[0017] In particular, when the enveloping material is placed on the chip as an enveloping material layer in such a way that the chip is arranged in a sandwich-like manner between the enveloping material layer and the carrier substrate, and the enveloping material layer is subsequently connected to the carrier substrate in a lamination process to form a laminate structure comprising the carrier substrate, the enveloping material layer forms a support device that stiffens the carrier substrate, so that even when the carrier substrate is formed as a film material, the carrier substrate can be processed to structure the contact material layer without the flexibility of the carrier substrate making the processing more difficult.

[0018] For contacting the back of the chip, it is particularly advantageous if the back of the chip is first exposed by exposing the encapsulating material to laser radiation and then a contact material is deposited on the back of the chip to create a contact between the back of the chip and the back of the chip contact layer.

[0019] In the following, various variants of the production of a chip module are explained with reference to the drawing.

[0020] They show: Fig. 1 to 13 the manufacture of a chip module according to a first embodiment of the method in successive method steps, which falls under the appended claims; Fig. 14 to 21 the production of a chip module according to a variant of the method in various successive method steps, wherein the variant does not fall under the appended claims; Figs. 22 and 23the formation of a connecting contact between chips and a carrier substrate via contact elevations, which falls within the scope of the appended claims; Fig. 24 the laminate structure of a chip module before structuring the contact material layer; Fig. 25 the structuring of the contact material layer to form the chip module; Fig. 26 the laminate structure of a chip module before structuring the contact material layer, which does not fall under the appended claims; Fig. 27 the structuring of the contact material layer to form the chip module, which does not fall under the appended claims.

[0021] Fig. 1As a starting point for implementing the method, it shows the provision of a carrier substrate 30 with a metallic foil formed from a contact material 31, which in the present case is designed as a copper foil. The carrier substrate 30 is provided with an adhesive coating 32, which can be designed, for example, as a thermally activatable epoxy resin. However, it is also conceivable for the coating to be designed as an adhesive layer that is independent of activation and can be provided with peel-off paper or the like for handling or providing the carrier foil, so that the carrier foil can also be kept ready in roll form, i.e., rolled up, for example.

[0022] How Fig. 2shows, at the beginning of the method, an arrangement of at least one chip, in the present case several chips 33, which are arranged with their chip connection surfaces 34 facing downwards on the carrier substrate 30, wherein the adhesive coating 32 fixes the chips 33 on the carrier substrate 30.

[0023] Subsequently, an enveloping material layer 35, preferably consisting of a material mixture comprising essentially an epoxy resin, is arranged on the chips 33 in such a way that the chips 33 are now sandwiched between the carrier substrate 30 and the enveloping material layer 35. In the subsequent lamination step, the enveloping material layer 35 is brought into contact with the carrier substrate 30 under the simultaneous influence of pressure and temperature, wherein the material of the enveloping material layer 35 is displaced by the chips 33, with the result that, as in Fig. 3As shown, after completion of the lamination step, the chips 33 are embedded in the enveloping material layer 35, such that, in particular, chip backsides 36 of the chips 33 are covered by the material of the enveloping material layer 35. The composition of the material of the enveloping material layer 35 is selected such that the thermal expansion coefficient of the enveloping material is as close as possible to the thermal expansion coefficient of the contact material 31 of the carrier substrate 30.For example, this can be achieved by adding a sufficient amount of silicon oxide as a filler to the epoxy base of the encapsulating material, whereby, for example, a thermal expansion coefficient in the range of 7 to 8 K-1 can be achieved, which is not so far removed from the thermal expansion coefficient of copper, which is preferably an essential component of the contact material 31 and which has a thermal expansion coefficient of approximately 16 K-1, that delamination between the encapsulating material layer 35 and the carrier substrate 30 would have to be expected after curing of the encapsulating material layer 35. Rather, the flexibility of the encapsulating material 35, which remains even after curing, is sufficient to compensate for the difference in the expansion coefficient.

[0024] By fixing the chips 33 during the lamination process, which in the present case is achieved by the adhesive coating 32, a change in the position of the chips 33 on the carrier substrate 30 is prevented during the curing of the enveloping material 35.

[0025] How Fig. 4 As shown, after the material of the enveloping material layer 35 has hardened, contact recesses 38 are formed in the enveloping material layer 35 from a top side 37 of the enveloping material layer 35, which expose the contact material 31 of the carrier substrate 30 to form an inner contact surface 39. Preferably, the contact recesses 38 can be formed by exposing the top side 37 of the enveloping material layer 35 to laser radiation.

[0026] Then, as in Fig. 5shown, the filling of the contact recesses 38 with a contact material 40, which can, for example, be deposited autocatalytically onto the contact surfaces 39, wherein preferably before the contact material 40 is deposited onto the contact surfaces 39, the contact surfaces 39 can be nucleated with, for example, zincate or palladium in order to improve the adhesion between the contact material 40 deposited onto the contact surface 39 and the contact surface 39. As the contact material 40, a material composition corresponding to the contact material 31 and comprising at least predominantly copper is preferably selected.

[0027] Then, as in Fig. 6As shown, a material-removing machining of the enveloping material layer 35 is carried out, with the result that in the enveloping material surface 41 produced thereby, both the surfaces of the contact material columns 42 formed by the contact material 40 in the contact recesses 38 and the chip backsides 36 are arranged flush in the enveloping material surface 41. At the same time, a thinning of the chips 33, i.e. a reduction in the height of the chips 33, can take place.

[0028] In a subsequent process step, preferably after prior formation of a Fig. 7 shown base metallization 44 on the cladding material surface 41, the formation of a Fig. 8The contact material layer 43 shown is deposited on the enveloping material layer 35, wherein copper or a copper alloy is preferably selected as the contact material for the contact material layer 43. The intermediate metallization 44 can be formed, for example, by depositing the material of the base metallization 44 onto the enveloping material surface 41, for example, by sputtering a titanium / copper alloy. The contact material layer 43 can then be applied to the base metallization 44 by deposition, wherein the deposition can be carried out either galvanically or autocatalytically.

[0029] To train a Fig. 9In the chip-back contact conductor arrangement 51 shown, a lithographic structuring of the contact material layer 43 applied to the enveloping material layer 35 is preferably carried out such that the chip-back contact conductor arrangement 51 in the present case has two contact conductors 52, 53, which each connect a chip back 36 to a contact column 42.

[0030] To form a structure created by structuring the carrier substrate 30 and in Fig. 12 The contact conductor arrangement 45 shown is now carried out, as can be seen from the sequence of Fig. 10 and 11As is clear, the carrier substrate 30 is first processed in a first lithographic process step, so that, on the one hand, contact conductors 46, 47, 48 and, on the other hand, contact recesses 49 are formed in the carrier substrate 30. Preferably, in addition to the lithography process, following the removal of the contact material 31 of the carrier substrate 30 to form the contact recesses 49, the chip connection surfaces 34 are also subjected to laser treatment in order to clean their surface, i.e., in particular, to remove any remaining residues of the adhesive coating 32.The formation of connecting contacts 68, which connect the contact conductors 46, 47, 48 to the chip connection surfaces 34, is then preferably carried out by autocatalytic deposition of a contact material 50, which preferably consists of copper or a copper alloy and which is further preferably deposited electrolessly onto the chip connection surfaces 34 previously nucleated with zincate or palladium.

[0031] Based on the Fig. 11 The contact conductors 46, 47, 48 shown in the drawing and formed in the first lithographic process step are used to complete the Fig. 12 shown contact conductor arrangement 45 and thus the formation of a contact conductor arrangement based on the Fig. 1The chip module 72 produced from the carrier substrate 30 shown in FIG. 1 is then lithographically processed in a second step, in which connection contacts 69, 70, and 71 are formed from the contact conductors 46 and 48. The connection contacts 69 enable contacting of the chip rear sides 36 via the contact columns 42 and the contact conductors 52 and 53, respectively, and the connection contacts 70, 71 enable contacting of the chip connection surfaces 34.

[0032] As a summary of the Figs. 12 and 13 shows, both a connection contact side 56 and a rear side 57 of the chip module 72 are then provided with a passivation 58, 59 preferably formed from an epoxy resin, wherein contact recesses 60 are formed in the passivation 58 of the external contact side 56, which expose contact surfaces 61, so that solder bumps 62 can be applied to the contact surfaces 61, which contact points enable a possible external contacting of the chip module 72.

[0033] In the sequence of Fig. 14 to 21 A variant of the procedure is shown, in which starting from the Fig. 3 shown process stage, i.e. following the positioning and fixing of the chips 33 with their contact sides provided with the chip connection surfaces 34 on the carrier substrate 30, the upper side 37 of the enveloping material layer 35 is provided with the contact material layer 43, without previously, as in Fig. 6 shown, a material-removing machining of the enveloping material surface 41 has taken place.

[0034] As in Fig. 15 shown, then takes place in a first step to form a Fig. 19 illustrated chip backside contact conductor arrangement 62, preferably by using a lithographic process, the formation of a contact structure 63 on the enveloping material layer 35 and then, as in Fig. 16shown, the formation of contact recesses 64 in the enveloping material layer 35, which expose the contact material 31 of the carrier substrate 30 in the region of contact surfaces 39, so that, as in Fig. 17 presented, and as already referring to the Fig. 4 and 5 described, contact columns 42 can be formed in the enveloping material layer 35.

[0035] After the Fig. 18illustrated exposure of the chip backsides 36, for example by applying laser radiation to the top side 37 of the enveloping material layer 35, contact recesses 64 and contact surfaces 65 of the contact columns 42 formed on the chip backsides 36 in the enveloping material layer 35 are provided, preferably by electroless deposition of copper or a copper alloy, with a contact material 66, which in conjunction with the contact structure 63 previously formed by structuring the contact material layer 43 forms contact conductors 67, which each connect a chip backside 36 to a contact column 42, as in Fig. 19 shown.

[0036] To form the contact conductor arrangement 45 from the carrier substrate 30, as already mentioned with reference to the Fig. 10 to 12 described, the structuring of the carrier substrate 30, so that the Fig. 20 shown chip module 73 is formed.

[0037] As a summary of the Figs. 20 and 21 shows, subsequently both the connection contact side 56 and a rear side 57 of the chip module 73 are provided with a passivation 58, 59 preferably formed from an epoxy resin, wherein contact recesses 60 are formed in the passivation 58 of the external contact side 56, which expose contact surfaces 61, so that solder bumps 62 can be applied to the contact surfaces 61, which enable contact points for any external contacting of the chip module 73.

[0038] In the Figs. 22 and 23 is an alternative to the Fig. 10 and 11 The contacting of the chip connection surfaces 34 with the carrier substrate 30 by forming contact recesses 49 in the contact material layer 31 by structuring the contact material layer 31 and subsequently filling the contact recesses 49 with contact material 50 is shown. For this purpose, before the formation of the Figs. 25 and 27The contact conductor arrangement 45 shown provides contact between the chip connection surfaces 34 and a contact material layer 80 of a carrier substrate 81 which is provided with an electrically non-conductive adhesive layer 82.

[0039] In the Figs. 22 and 23 In the illustrated embodiment, in preparation for contacting the chip connection surfaces 34 with the contact material layer 80, the chip connection surfaces 34 are provided with contact elevations 83, which are brought into contact with the contact material layer 80 and subsequently connected to the contact material layer 80 by melting. In the illustrated embodiment, the chips 33 are fixed to the carrier substrate 81 by means of the adhesive application 82 before the connection is made.

[0040] To melt the contact elevations 83, the contact material layer 80 or the chips 33 are exposed to laser radiation from their rear side.

[0041] After production of the Fig. 23 The connection of the chips 33 to the carrier substrate 81 shown in FIG. 1 is carried out as already described with reference to the Fig. 3 to 9 concerning the manufacture of the chip module 72 and the Fig. 14 to 19 concerning the production of the chip module 73, so that a Fig. 24 or Fig. 26 illustrated laminate structure 84 or 85 is produced on the basis of the carrier substrate 81.

[0042] On the basis of the laminate structure 84 or 85, which until then still has a non-structured contact material layer 80 of the carrier substrate 81, a Figs. 25 and 27 illustrated structuring of the contact material layer 80 for forming the contact conductor arrangement 45, such that contact recesses 86, 87, 88 are formed in the contact material layer 80 for defining the connection contacts 69, 70, 71, preferably by a photolithographic process or laser ablation.

[0043] The chip modules 89, 90 produced in this way can then be used as in the Fig. 13 and 21 The chip modules 72, 73 shown are provided on both the connection contact side 56 and their rear side 57 with a passivation 58, 59 preferably formed from an epoxy resin, wherein contact recesses 60 are formed in the passivation 58 of the external contact side 56, which expose contact surfaces 61, so that solder bumps 62 can be applied to the contact surfaces 61, which contact points enable a possible external contacting of the chip modules 89, 90.

Claims

1. A method for producing a chip module (72, 89) having a carrier substrate (30, 81) and at least one chip (33) arranged on the carrier substrate, as well as a contact conductor arrangement (45) for connecting chip terminal faces (34) with terminal contacts (69, 70, 71) arranged on a contact side (56) of the chip module, in which method the chip (33) is secured on the carrier substrate (30, 81) with its front side provided with the chip terminal faces (34), wherein before the forming of the contact conductor arrangement (45) for forming a cladding material layer (35) encasing the chip (33), a cladding material is applied onto the carrier substrate (30, 81), the cladding material layer (35) is provided with at least one contact recess (38), starting from its upper side (37), said contact recess exposing the contact material (40) for forming a contact surface (39) on a contact material layer (31) of the carrier substrate (30), the contact recess (38) is backfilled with contact material (40) for forming a contact column (42), and the cladding material layer (35) is treated by material abrasion, starting from its upper side (37), for exposing a rear side (36) of the chip, in such a way that the rear side of the chip and the contact column (42) are aligned flush in a cladding material surface (41) produced by said treatment, subsequently a base metallization (44) is applied to the cladding material surface (41) and to the rear side (36) of the chip and to the contact column (42), a contact material layer (43) being applied to said base metallization (44), characterized in that subsequently the contact material layer (43) is structured for forming a contact conductor arrangement (51) on the rear side of the chip, in such a way that the rear side (36) of the chip is connected with the contact conductor arrangement (45) located on the front side of the chip module (33) in an electrically conductive manner via the contact column (42), and in that, after the securing of the chip (33) with its front side provided with the chip terminal faces (34) on the carrier substrate (30, 81), the forming of the contact conductor arrangement (45) is effected by means of structuring the contact material layer (31, 80) of the carrier substrate, contact recesses (49) being formed by means of the structuring of the contact material layer (31) of the carrier substrate (30) in superposition with the chip terminal faces (34), said contact recesses being backfilled with contact material (50) for contacting the chip terminal faces with the contact conductor arrangement (45).

2. The method according to claim 1, wherein the securing of the chip (33) on the carrier substrate (30) is effected by means of an adhesive coating (32) of the contact material layer (31) of the carrier substrate.

3. The method according to claim 2, wherein the carrier substrate is formed from a contact material foil provided with the adhesive coating (32).

4. The method according to any one of claims 1 to 3, wherein a solder material is used as contact material (40, 50).

5. The method according to claim 4, wherein the contact material (40, 50) is introduced into the contact recesses (38, 49) by means of a deposition process.

6. The method according to any one of the preceding claims, wherein before the forming of the contact conductor arrangement (45) a contacting of the chip terminal faces (34) with the contact material layer (80) is effected.

7. The method according to claim 6, wherein for contacting the chip terminal faces (34) with the contact material layer (80), the chip terminal faces provided with contact elevations (83) are brought into abutment with the contact material layer (80), and subsequently the connecting of the chip terminal faces with the contact material layer is effected by fusing of the contact elevations.

8. The method according to claim 7, wherein the fusing of the contact elevations (83) is effected by means of an application of laser radiation to the chip (33) or to the contact material layer (80).

9. The method according to any one of the preceding claims, wherein the cladding material is placed on the chip (33) as a cladding material layer (35), in such a way that the chip is sandwiched between the cladding material layer and the carrier substrate, and the cladding material layer is subsequently connected to the carrier substrate in a lamination process for forming a laminate structure comprising the carrier substrate (30, 81).

10. The method according to any one of the preceding claims, wherein the contact material layer (43) is applied by deposition.