Programmable signal processing unit and method for operating a programmable signal processing unit

DE502021006011D1Active Publication Date: 2024-12-19SEW EURODRIVE GMBH & CO KG
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Patent Information

Application Number
DE502021006011
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-08-28
Filing Date
2021-07-13
Publication Date
2024-12-19
Estimated Expiration
2041-07-13

AI Technical Summary

Technical Problem

Current programmable signal processing units, such as FPGAs, face challenges in algorithm development and debugging due to limited resources and bit resolution, requiring extensive time for recompilation and test bench writing, with hard-wired signals needing redefinition for each change, leading to significant resource consumption and time inefficiencies.

Method used

A programmable signal processing unit with a test output unit and output multiplexer allows data from each module to be fed to a digital computer for separate analysis, enabling direct comparison with simulated data, avoiding repeated recompilation and allowing diagnostic capabilities and data logger functionality, along with input multiplexers for flexible test data supply and control.

Benefits of technology

This solution accelerates algorithm development, reduces recompilation needs, and provides diagnostic capabilities during service or updates, enabling efficient debugging and expansion of modules with quick interface standardization.

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Description

[0001] The invention relates to a programmable signal processing unit, comprising a sensor input unit for acquiring sensor signals and outputting sensor data, a plurality of modules for processing data, and an output unit for acquiring processed data and outputting output signals. The sensor data can be fed to a first module, and data processed by a last module can be fed to the output unit. The invention also relates to a method for operating a programmable signal processing unit.

[0002] Programmable signal processing units, also known as FPGAs (Field Programmable Gate Arrays), are used, for example, to evaluate radar signals from radar sensors. The sensor input unit is connected to a radar sensor, which feeds sensor signals to the sensor input unit. The output unit is connected, for example, to a process controller for controlling a technical process, to which the output signals are output. Within a signal processing unit, data is processed in modules according to predefined algorithms.

[0003] To develop algorithms in an FPGA for applications such as radar signal processing, software environments are used on a PC to simulate the mathematical calculations for the algorithms with test signals or to test them with recorded sensor data. The algorithms are then implemented on an FPGA-based real-time system. Due to limited resources or limited bit resolution, the algorithms must be adapted in the FPGA.

[0004] Development environments for simulation and debugging are available for such systems. For simulation, test benches must be written in advance, which is time-consuming. For debugging, the signals to be examined must be defined in advance, which leads to additional resource consumption due to the hardwiring in the FPGA. Any changes to these signals or the test environment require recompiling the project, which is a significant time-consuming process for large projects.

[0005] From DE 10 2016 224 253 A1 a method for monitoring a sensor system of a vehicle and a sensor system are known.

[0006] From DE 10 2016 223 581 A1 a device and a method for checking the functionality of a sensor are known.

[0007] A driver assistance system test interface for automated driving sensors is known from DE 10 2019 106 632 A1.

[0008] From DE 103 38 922 A1 an electrical diagnostic circuit and a method for testing and / or diagnosing an integrated circuit are known.

[0009] DE 10 2014 114 877 A1 discloses a device for providing an output parameter. The device comprises an output parameter generator circuit, an output interface circuit, and a test circuit.

[0010] From DE 10 2019 202 472 A1 a method and a system for performing the verification of measurements by a sensor in quasi-real time are known.

[0011] From US 2019 / 0392702 A1 an integrated circuit for a sensor is known which comprises two processing channels.

[0012] A sensor system with a multiplexer is known from the document "FPGA-based interrogation controller with optimized pipeline architecture for very large-scale fiber-optic interferometric sensor arrays", OPTICS AND LASERS IN ENGINEERING, Vol. 121, 1 October 2019 (2019-10-01), pages 389-396, XP055851026, ISSN: 0143-8166, DOI: 10.1016 / j.optlaseng.2019.04.026.

[0013] The invention is based on the object of developing a programmable signal processing unit and a method for operating a programmable signal processing unit.

[0014] This object is achieved by a programmable signal processing unit having the features specified in claim 1. Advantageous embodiments and further developments are the subject of the dependent claims. This object is also achieved by a method for operating a programmable signal processing unit having the features specified in claim 8. Advantageous embodiments and further developments are the subject of the dependent claims.

[0015] A programmable signal processing unit according to the invention comprises a sensor input unit for acquiring sensor signals and for outputting sensor data, a plurality of modules for processing data, and an output unit for acquiring processed data and for outputting output signals. The sensor data can be fed to a first module, and data processed by a last module can be fed to the output unit. The programmable signal processing unit also comprises a test output unit for outputting test output signals and an output multiplexer. The output multiplexer is connected to the plurality of modules and to the test output unit in such a way that data processed by the modules can be fed to the output multiplexer, and data output by the output multiplexer can be fed to the test output unit.

[0016] The data processed by each module, as well as the sensor data, can be fed to a digital computer connected to the test output unit. This allows for separate analysis of each individual module for debugging purposes, particularly during service. A direct comparison of previously simulated data with data processed by the modules is also possible. This significantly accelerates the development of algorithms in the modules of the programmable signal processing unit. Repeated recompilation during debugging and the writing of test benches are avoided. Furthermore, diagnostic capabilities during operation for service or update needs, as well as data logging functionality, are provided.

[0017] According to a preferred embodiment of the invention, the data processed by a preceding module can be fed to a subsequent module. The individual modules are thus connected in series.

[0018] According to an advantageous embodiment of the invention, the output multiplexer is connected to the sensor input unit in such a way that the sensor data can be fed to the output multiplexer. Thus, the sensor data supplied by a sensor connected to the sensor input unit can also be analyzed for debugging purposes.

[0019] According to an advantageous development of the invention, the programmable signal processing unit comprises a test input unit for acquiring test signals and for outputting test data and a plurality of input multiplexers, wherein a first input multiplexer is connected to the first module, to the test input unit and to the sensor input unit in such a way that the first module can optionally be supplied with the sensor data or the test data, and wherein subsequent input multiplexers are connected to the modules and to the test input unit in such a way that each subsequent module can optionally be supplied with the data processed by a preceding module or the test data.

[0020] A digital computer connected to the test input unit can thus optionally supply any test data to any module. This allows each module to be tested using any test data. Each module is designed according to the same communication protocol, so the input multiplexer interfaces are always the same. This allows for rapid expansion to accommodate additional modules.

[0021] According to an advantageous embodiment of the invention, a final input multiplexer is connected to the last module, to the test input unit, and to the output unit in such a way that the output unit can be supplied with either the data processed by the last module or the test data. This also allows any test data to be supplied to a process controller connected to the output unit.

[0022] According to an advantageous development of the invention, the programmable signal processing unit comprises a test control unit for acquiring control signals and outputting control data, and a control multiplexer. The control multiplexer is connected to the input multiplexers and to the test control unit in such a way that the input multiplexers can be controlled depending on the control data. A digital computer connected to the test control unit can thus select, via the control multiplexer, the location—i.e., which of the modules—at which the test data is inserted.

[0023] According to an advantageous embodiment of the invention, the test control unit is connected to the output multiplexer in such a way that the output multiplexer can be controlled depending on the control data. A digital computer connected to the test control unit can thus select which data is fed to the test output unit.

[0024] A method according to the invention for operating a programmable signal processing unit according to the invention is characterized in that sensor signals are acquired by the sensor input unit and sensor data are output; data are processed by the plurality of modules; and output signals are output by the output unit. Data processed by the modules are fed to the output multiplexer; data output by the output multiplexer is fed to the test output unit; and test output signals are output by the test output unit.

[0025] According to an advantageous development of the invention, the sensor data are also fed to the output multiplexer.

[0026] According to an advantageous embodiment of the invention, test signals are acquired and test data are output by a test input unit, wherein the first module is selectively supplied with the sensor data or the test data via a first input multiplexer; and each subsequent module is selectively supplied with the data processed by a preceding module or the test data via a subsequent input multiplexer.

[0027] According to an advantageous development of the invention, the output unit is supplied with either the data processed by the last module or the test data via a final input multiplexer.

[0028] The invention is not limited to the combination of features in the claims. Further possible combinations of claims and / or individual claim features and / or features of the description and / or the figures will become apparent to those skilled in the art, particularly from the problem and / or the problem posed by comparison with the prior art.

[0029] The invention will now be explained in more detail with reference to the accompanying drawings. The invention is not limited to the exemplary embodiments shown in the drawings. The drawings only represent the subject matter of the invention schematically. They show: Figure 1: a schematic representation of a system with a programmable signal processing unit

[0030] Figure 1shows a schematic representation of a system with a programmable signal processing unit 10. The programmable signal processing unit 10 is designed as an FPGA (Field Programmable Gate Array). The programmable signal processing unit 10 is connected to a sensor 12, a process controller 16, and a digital computer 14. The digital computer 14 is used here to test the programmable signal processing unit 10.

[0031] The sensor 12 is a radar sensor in the present case and delivers radar signals in the form of sensor signals 61. These are, in particular, low-frequency radar signals that are downconverted to a baseband. The process controller 16 serves to control a technical process. The sensor 12, the programmable signal processing unit 10, and the process controller 16 are used, for example, in an autonomously driving vehicle. The sensor 12 detects objects, in particular obstacles, using radar and delivers radar signals in the form of sensor signals 61 to the programmable signal processing unit 10. The programmable signal processing unit 10 calculates, among other things, distances to detected obstacles and delivers these in the form of output signals 63 to the process controller 16. The process controller 16 controls driving maneuvers of the autonomously driving vehicle and, in particular, prevents collisions with detected obstacles.

[0032] The programmable signal processing unit 10 comprises a sensor input unit 21. The sensor input unit 21 is connected to the sensor 12 and serves to acquire the sensor signals 61 supplied by the sensor 12. The sensor input unit 21 outputs digital sensor data 71. The sensor data 71 contains the sensor signals 61. The programmable signal processing unit 10 also comprises a plurality of modules 40, 41, 42 for processing data. The digital sensor data 71 output by the sensor input unit 21 can be fed to a first module 41.

[0033] Modules 40, 41, 42 are programmed according to predefined algorithms and, in particular, perform logical operations when processing the data. The data 70 processed by a preceding module 40, 41 can be fed to a subsequent module 40, 42. The modules 40, 41, 42 are thus arranged serially with respect to a data flow.

[0034] The programmable signal processing unit 10 also includes an output unit 23 for acquiring processed data 70. The data 70 processed by a final module 42 can be fed to the output unit 23. The output unit 23 outputs the output signals 63 to the process controller 16.

[0035] The programmable signal processing unit 10 comprises an output multiplexer 31. The output multiplexer 31 is connected to the modules 40, 41, 42 such that the data 70 processed by the modules 40, 41, 42 can be fed to the output multiplexer 31. The output multiplexer 31 is also connected to the sensor input unit 21 such that the sensor data 71 can be fed to the output multiplexer 31.

[0036] The programmable signal processing unit 10 also includes a test output unit 25. The output multiplexer 31 is connected to the test output unit 25 such that data 75 output by the output multiplexer 31 can be fed to the test output unit 25. Depending on the control of the output multiplexer 31, the data 75 output by the output multiplexer 31 is the data 70 processed by one of the modules 40, 41, 42 or the sensor data 71. The test output unit 25 can thus optionally be fed with either the data 70 processed by one of the modules 40, 41, 42 or the sensor data 71.

[0037] The test output unit 25 is connected to the digital computer 14 and outputs test output signals 65 to the digital computer 14. The test output signals 65 contain the data 75 output by the output multiplexer 31. The test output signals 65 optionally contain the data 70 processed by one of the modules 40, 41, 42 or the sensor data 71. The data 70 processed by each of the modules 40, 41, 42 as well as the sensor data 71 can thus be supplied to the digital computer 14.

[0038] The programmable signal processing unit 10 also includes a test input unit 27. The test input unit 27 is connected to the digital computer 14 and serves to acquire test signals 67. The test input unit 27 outputs digital test data 77. The test data 77 contains the test signals 67.

[0039] The programmable signal processing unit 10 comprises a plurality of input multiplexers 50, 51, 52, 53. A first input multiplexer 51 is connected to the first module 41, to the test input unit 27 and to the sensor input unit 21 in such a way that, depending on the control of the first input multiplexer 51, the sensor data 71 or the test data 77 can be supplied to the first module 41.

[0040] Subsequent input multiplexers 50, 52 are connected to the modules 40, 41, 42 and to the test input unit 27 such that, depending on the control of the respective input multiplexer 50, 52, each subsequent module 40, 42 can be supplied with either the data 70 processed by a preceding module 40, 41 or the test data 77. In particular, a final input multiplexer 52 is connected to the last module 42, to the test input unit 27, and to a preceding module 40 such that, depending on the control of the final input multiplexer 52, the last module 40 can be supplied with either the data 70 processed by the preceding module 40 or the test data 77.

[0041] The programmable signal processing unit 10 also includes a final input multiplexer 53 connected to the output unit 23. Data 73 output from the final input multiplexer 53 is fed to the output unit 23. The output signals 63 contain the data 73 output to the final input multiplexer 53. The output unit 23 is connected to the process controller 16 and outputs the output signals 63 to the process controller 16.

[0042] The final input multiplexer 53 is connected to the last module 42, to the test input unit 27, and to the output unit 23 such that, depending on the control of the final input multiplexer 53, the output unit 23 can be supplied with either the data 70 processed by the last module 42 or the test data 77. The output signals 63 thus contain either the data 70 processed by the last module 42 or the test data 77.

[0043] The programmable signal processing unit 10 includes a test control unit 29. The test control unit 29 is connected to the digital computer 14 and serves to acquire control signals 69. The test control unit 29 outputs digital control data 79. The control data 79 contains the control signals 69.

[0044] The programmable signal processing unit 10 includes a control multiplexer 33. The control multiplexer 33 is connected to the input multiplexers 50, 51, 52, 53 and to the test control unit 29. Depending on the control data 79, the input multiplexers 50, 51, 52, 53 can be controlled via the control multiplexer 33. The test control unit 29 is also connected to the output multiplexer 31. Depending on the control data 79, the output multiplexer 31 can also be controlled.

[0045] The data 70 processed by each of the modules 40, 41, 42, as well as the sensor data 71, can be selectively fed to the digital computer 14 via the test output unit 25. This enables a separate testing of each individual module 40, 41, 42. Furthermore, any test data 77 from the digital computer 14 can be fed to each of the modules 40, 41, 42 and the output unit 23 via the test input unit 27. This allows any desired states to be simulated for testing each individual module 40, 41, 42. List of reference symbols

[0046] 10Signal processing unit 12Sensor 14Digital computer 16Process controller 21Sensor input unit 23Output unit 25Test output unit 27Test input unit 29Test control unit 31Output multiplexer 33Control multiplexer 40Module 41First module 42Last module 50Input multiplexer 51First input multiplexer 52Last input multiplexer 53Final input multiplexer 61Sensor signals 63Output signals 65Test output signals 67Test signals 69Control signals 70Processed data 71Sensor data 73Data output from the final input multiplexer 75Data output from the output multiplexer 77Test data 79Control data

Claims

1. Programmable signal processing unit (10) comprising a sensor input unit (21) for capturing sensor signals (61) and outputting sensor data (71), a plurality of modules (40, 41, 42) for processing data and an output unit (23) for capturing processed data (70) and outputting output signals (63), the sensor data (71) being able to be supplied to a first module (41), and data (70) processed by a last module (42) being able to be supplied to the output unit (23), characterised in that the programmable signal processing unit (10) comprises a test output unit (25) for outputting test output signals (65), and an output multiplexer (31), the output multiplexer (31) being connected to the plurality of modules (40, 41, 42) and to the test output unit (25) such that data (70) processed by the modules (40, 41, 42) can be supplied to the output multiplexer (31) and such that data (75) output by the output multiplexer (31) can be supplied to the test output unit (25).

2. Programmable signal processing unit (10) according to at least one of the preceding claims, characterised in that the data (70) processed by a preceding module (40, 41) can be supplied in each case to a subsequent module (40, 42).

3. Programmable signal processing unit (10) according to at least one of the preceding claims, characterised in that the output multiplexer (31) is connected to the sensor input unit (21) such that the sensor data (71) can be supplied to the output multiplexer (31).

4. Programmable signal processing unit (10) according to at least one of the preceding claims, characterised in that the programmable signal processing unit (10) comprises a test input unit (27) for capturing test signals (67) and outputting test data (77), and a plurality of input multiplexers (50, 51, 52, 53), a first input multiplexer (51) being connected to the first module (41), to the test input unit (27) and to the sensor input unit (21) such that either the sensor data (71) or the test data (77) can be supplied to the first module (41), and subsequent input multiplexers (50, 52) being connected to the modules (40, 41, 42) and to the test input unit (27) such that either the data (70) processed by a preceding module (40, 41) or the test data (77) can be supplied to each subsequent module (40, 42).

5. Programmable signal processing unit (10) according to claim 4, characterised in that a final input multiplexer (53) is connected to the last module (42), to the test input unit (27) and to the output unit (23) such that either the data (70) processed by the last module (42) or the test data (77) can be supplied to the output unit (23).

6. Programmable signal processing unit (10) according to any of claims 4 to 5, characterised in that the programmable signal processing unit (10) comprises a test control unit (29) for capturing control signals (69) and outputting control data (79), and a control multiplexer (33), the control multiplexer (33) being connected to the input multiplexers (50, 51, 52, 53) and to the test control unit (29) such that the input multiplexers (50, 51, 52, 53) can be activated on the basis of the control data (79).

7. Programmable signal processing unit (10) according to claim 6, characterised in that the test control unit (29) is connected to the output multiplexer (31) such that the output multiplexer (31) can be activated on the basis of the control data (79).

8. Method for operating a programmable signal processing unit (10) according to at least one of the preceding claims, characterised in that sensor signals (61) are captured by the sensor input unit (21) and sensor data (71) are output; data are processed by the plurality of modules (40, 41, 42); output signals (63) are output by the output unit (23); data (70) processed by the modules (40, 41, 42) being supplied to the output multiplexer (31); data (75) output by the output multiplexer (31) being supplied to the test output unit (25); and test output signals (65) being output by the test output unit (25).

9. Method according to claim 8, characterised in that the sensor data (71) are supplied to the output multiplexer (31).

10. Method according to any of claims 8 to 9, characterised in that test signals (67) are captured by a test input unit (27) and test data (77) are output; either the sensor data (71) or the test data (77) being supplied to the first module (41) by means of a first input multiplexer (51); and either the data (70) processed by a preceding module (40, 41) or the test data (77) being supplied to each subsequent module (40, 42) by means of a subsequent input multiplexer (50, 52).

11. Method according to any of claims 8 to 9, characterised in that either the data (70) processed by the last module (42) or the test data (77) are supplied to the output unit (23) by means of a final input multiplexer (53).