Method for regulating the power input of an electrical device

Description

TECHNICAL FIELD

[0001] The present invention relates to a method for regulating a power supply to an electrical load. In particular, the invention relates to a method for adjusting a number N of current pulses supplying the electrical load so as to vary the power actually delivered to said device. PRIOR ART

[0002] The methods for regulating the power supply of electrical loads, known from the state of the art, generally implement power variators or dimmers ("Dimmer" according to English terminology) operating according to phase angle control as described for example in document WO 2013 / 072793 A1.

[0003] These dimmers act as controlled switches, which, for each half-period of the alternating supply current, allow the passage of said current for a duration which is a function of the power to be delivered to the electrical load.

[0004] There figure 1 illustrates an example of phase angle control, known as "forward phase control". This downward phase control is generally implemented with a dimmer equipped with a Triac which becomes conductive under the effect of a control signal and blocks at each alternation of the current passing through it.

[0005] In particular, the control signal, for each half-period of a supply current (curve A), can cause the Triac to switch from a non-conducting state to a conducting state with a delay angle α so as to allow only a fraction (curve B) of the supply current to pass into the electrical load.

[0006] This control mode is particularly suitable for regulating the power supply of an electrical load, such as an incandescent light bulb, behaving like a resistor. In such a case, the delay angle α can take any value between 0° and 180°, and in particular allow almost complete extinction of an incandescent light bulb for values ​​of delay angles α close to 180°.

[0007] However, this control method is not satisfactory when the electrical load is of low power and is not equivalent to a resistance, such as an LED or fluorescent bulb.

[0008] Indeed, as illustrated in the figure 2, a phase shift β, between the voltage (curve C) at the terminals of an LED or fluorescent lamp and the current (curve D) passing through it, can be observed, de facto limiting the range of admissible delay angles to the range of angles between 0° and (180° - β).

[0009] Thus, as soon as low illumination is required, the LED or fluorescent lamp is only powered by a fine pulse (curve E) at each half period of the supply current (the delay angle α=α max is close to 180°-β) which causes flashing and / or buzzing of said lamp.

[0010] To overcome this problem, another phase angle control mode called "rising phase" ("Reverse Phase Control" in English terminology) has been proposed.

[0011] Such a mode is generally implemented with a dimmer provided with a MOS type transistor which controls the transition from a blocked state to an on state as soon as the supply current passes through zero and according to an angle duration α ( figure 3 ).

[0012] However, this mode of control is not satisfactory either.

[0013] Indeed, the control of the MOS type transistor requires a significant current to operate compared to the consumption of an LED or fluorescent bulb which can disrupt the operation of the latter, and if necessary prevent its almost complete extinction even for a low angle delay α.

[0014] Alternatively, regulation of the power supply of an LED or fluorescent bulb by a "Pulse Width Modulation" ("PWM" or "Pulse Width Modulation" according to Anglo-Saxon terminology) control has also been considered.

[0015] However, this alternative does not allow for the imposition of zero illumination from the LED or fluorescent bulb and is therefore not satisfactory.

[0016] Documents WO 2013 / 072793, US 2010 / 270982, and US 2014 / 320005 disclose dimming devices whose operation does not solve the above-mentioned problems.

[0017] An aim of the present invention is therefore to propose a method for regulating the supply power of an electrical load which can exhibit behavior other than that of a resistor.

[0018] Another aim of the present invention is also to propose a method for regulating the power supply of a low power electrical load, in particular a power less than a few Watts, for example less than 10 Watts.

[0019] Another aim of the present invention is to propose a method for regulating the power supply of an electrical load allowing almost complete, or even complete, switching off of said device.

[0020] Another aim of the present invention is to propose a method for regulating the power supply of an electrical load using a dimmer that consumes little, or even no, power. STATEMENT OF THE INVENTION

[0021] The invention is defined by the independent claims and relates to a method for regulating the power of an electrical load supplied by an alternating current source of period T, the load being connected in series with a power dimmer generating, for each half-period T / 2 of the alternating current, a number N of current pulses intended to supply said load, the method comprising adjusting the number N as a function of the power to be delivered to the electrical load.

[0022] According to one mode of implementation, since the power to be delivered to the electrical load is zero, the number N of current pulses is also zero for each half-period T / 2 of the alternating current.

[0023] According to one embodiment, the duration of each current pulse is less than 5 thousandths of the period T, advantageously between 25 ten thousandths and 5 thousandths of the period T.

[0024] According to one mode of implementation, the N current pulses, for each half period T / 2, have a substantially equal duration.

[0025] According to one embodiment, for each half-period T / 2, the N pulses are centered relative to said half-period T / 2 and, advantageously, equidistant from each other.

[0026] According to one method of implementation, the electrical load comprises either an electric heating system, an electric motor, or an LED or fluorescent bulb, in particular with a power of less than 10 Watts.

[0027] The term "fluorescent lamp" also means a compact fluorescent lamp (CFL) or more simply a compact fluorescent lamp. A fluorescent lamp may, within the meaning of the present invention, be a low-energy lamp, and in particular have a power of less than 10 watts.

[0028] According to the invention, the power dimmer comprises: a pulse generator provided with two primary terminals called, respectively, first primary terminal and second primary terminal forming the terminals of the power gradator, and two secondary terminals, called, respectively, first secondary terminal and second secondary terminal; a first NPN type Darlington transistor, connected to the first secondary terminal by its base and to the first primary terminal by its emitter; a second PNP type Darlington transistor, connected to the second secondary terminal by its base and to the first primary terminal by its emitter.

[0029] According to the invention, the generator GI comprises between the first primary terminal and the second primary terminal, and in order, a first capacitor and a potentiometer, the generator also comprises a DIAC of starting voltage Va connected along one of its terminals, called the control terminal, to a first node common to the first capacitor and the potentiometer, a second capacitor and a third capacitor are interposed between the other terminal of the DIAC, called the output terminal, and, respectively, the first secondary terminal and the second secondary terminal.

[0030] According to one embodiment, the generator is provided with a second resistor and a third resistor each connecting the first primary terminal to the output terminal.

[0031] According to one embodiment, the generator comprises a first diode and a second diode interposed between the first primary terminal and, respectively, the first secondary terminal and the second secondary terminal.

[0032] According to one embodiment, the power grading device comprises a switching aid stage connected to the collector of the first Darlington transistor by a first input terminal and to the collector of the second Darlington transistor by a second input terminal, the switching aid stage also comprises two output terminals called, respectively, first output terminal and second output terminal both connected to the second primary terminal.

[0033] According to one embodiment, the switching assistance stage comprises, on the one hand, between its first input terminal and its first output terminal, a third and a fourth diodes connected in series according to opposite polarities and, on the other hand, between its second input terminal and its second output terminal, a fifth and a sixth diodes also connected in series according to opposite polarities.

[0034] According to one embodiment, the common terminal of the third and fourth diodes is connected to the first output terminal by a first branch comprising, in series, a first inductance and a fourth resistor, and the common terminal of the fifth and sixth diodes is connected to the second output terminal by a second branch comprising, in series, a second inductance and a fifth resistor.

[0035] According to one embodiment, the common terminals of the third and fourth diodes on the one hand, and of the fifth and sixth diodes on the other hand are connected by an inductance.

[0036] According to one embodiment, the method comprises implementing a filter which comprises two input terminals and connected, respectively, to the first primary terminal and to the second primary terminal, and two output terminals and connected in series with the electrical load.

[0037] According to one embodiment, the filter is provided with two inductors and a fourth capacitor C4, the two inductors connecting, respectively, input X2 to output Y2, and input X1 to output Y1, while the fourth capacitor connects outputs Y1 and Y2. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Other characteristics and advantages will appear in the following description of a method for regulating the power of an electrical load according to the invention, given as non-limiting examples, with reference to the appended drawings in which: there figure 1 is a graphical representation of a control according to an angle delay α in the falling phase implemented with an incandescent bulb, known from the state of the art; figure 2 is a graphical representation of a control according to an angle delay α in the falling phase implemented with an LED or fluorescent bulb, known from the state of the art; the figure 3 is a graphical representation of a control according to an angle delay α in rising phase implemented with an incandescent bulb, known from the state of the art; Figures 4a to 4dare graphical representations of an alternating supply voltage (curve F, voltage represented by the vertical axis) as a function of time (horizontal axis), in each of these figures are also represented current pulses Ci (symbolized by vertical bars) the number of which is adjusted as a function of a power to be delivered to the electrical load according to the present invention; Figure 5 is a schematic representation of the power supply of the electrical load capable of being implemented for the execution of the method according to the present invention; the Figures 6a And 6b are schematic representations, respectively, of a first variant ( Figure 6a ) and a second variant ( Figure 6b ) of a power dimmer suitable for implementing the method according to the present invention; the Figures 7a to 7c are graphical representations of the implementation of the power dimmer of the Figure 6awith an LED bulb, in particular, in each of these figures, the top curve represents the time evolution of the voltage across the terminals of the first capacitor C1 while the bottom curve represents the conduction of the Darlington transistors TD1 and TD2. DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS

[0039] The present invention proposes a method for regulating the power of an electrical load, and in particular an LED or fluorescent bulb or even a low-power incandescent bulb (less than 10 Watts).

[0040] The method according to the present invention proposes to regulate the power actually transmitted to the electrical load by controlling a number N of current pulses passing through said load. The method according to the present invention thus makes it possible to regulate the operation of the electrical load, and in the case of LED or fluorescent bulbs, to achieve their total extinction.

[0041] To figures 5 ,6a And 6b , we can see an electrical load 1 connected in series with a power dimmer 2 suitable for implementing the method according to the present invention. The assembly formed by the device 1 and the power dimmer 2 is powered, via a source (symbolized by “L” and “N”), by an alternating current of period T.

[0042] The power dimmer 2, within the meaning of the present invention, may be an electronic switch, for example controlled, authorizing or not the supply of current to the electrical load 1. The electronic switch may comprise a transistor, for example a MOS transistor, a bipolar transistor, an IGBT (“Insulated Gate Bipolar Transistor”), a thyristor.

[0043] In particular, the power dimmer 2 can be on according to time lapses, called pulse times Ti, so as to supply current to the electrical load 1, and not on the rest of the time.

[0044] In other words, the power dimmer 2, during a pulse time Ti, allows the generation of a current pulse Ci intended to circulate in the electrical load1.

[0045] The method for regulating the power of the electrical load 1 therefore comprises, for each half-period T / 2 of the alternating current, the generation of a number N of current pulses Ci intended to supply the electrical load 1. It is understood that each current pulse Ci has a duration equal to the pulse time Ti.

[0046] The pulse time Ti is advantageously less than 5 thousandths of the period T, even more advantageously the pulse time Ti is between 25 ten thousandths and 5 thousandths of the period T.

[0047] In other words, for a current frequency of 50 Hz, the pulse time Ti is advantageously less than 10 µs (µs = micro second), even more advantageously between 2.5 µs and 10 µs.

[0048] Particularly advantageously, the method according to the present invention comprises adjusting the number N as a function of the power to be delivered to the electrical load 1.

[0049] For example, the Figures 4a to 4d illustrate the implementation of the method according to the invention. In particular, the Figures 4a and 4d are graphical representations of the supply voltage provided by the source (curve F) as a function of time, superimposed with the current pulses Ci. The number N of current pulses increases from the Figure 4a to the figure 4d , and thus makes it possible to increase the power actually supplying the electrical load 1.

[0050] The method according to the present invention advantageously makes it possible to use the entirety of each of the half periods of the supply current. In other words, all phase shift angles are achievable (even in the case of a significant phase shift between the voltage and the current at the terminals of the electrical load).

[0051] The power supply control of the electrical load is also linear.

[0052] The method according to the present invention is therefore advantageously implemented to vary the light intensity of a bulb, in particular a low-power LED or fluorescent bulb (for example less than 10 Watts). It makes it possible, in particular, to envisage an almost complete extinction of these bulbs by adjusting the number N of pulses to a low value, for example N = 1. A pulse value N = 0 allows a complete extinction of the bulb.

[0053] There Figure 5schematically represents the principle of powering the electrical load by a dimmer 2. According to this principle, the dimmer 2 and the electrical load 1 are connected in series. Furthermore, the dimmer comprises a power supply 2a and a control 2b. This arrangement makes it possible to obtain an almost complete, or even complete, extinction of said device since the current flowing in the power supply 2a also flows in the control 2b.

[0054] The method according to the present invention can be implemented by the power dimmer 2 shown in Figures 6a And 6b .

[0055] The power dimmer 2 includes in particular: a pulse generator GI provided with two primary terminals called, respectively, first primary terminal BP1 and second primary terminal BP2 forming the terminals of the power gradator, and two secondary terminals, called, respectively, first secondary terminal BS1 and second secondary terminal BS2; a first Darlington transistor TD1, for example of the NPN type, connected to the first secondary terminal BS1 by its base and to the first primary terminal BP1 by its emitter; a second Darlington transistor TD2, for example of the PNP type, connected to the second secondary terminal BS2 by its base and to the first primary terminal BP1 by its emitter.

[0056] A "Darlington transistor" means an arrangement of two bipolar transistors, possibly of the same type, called, respectively, the control transistor and the output transistor. In this arrangement, the collectors are common and correspond to the collector of the Darlington, the emitter of the control transistor is connected to the base of the output transistor, the base of the control transistor and the emitter of the output transistor correspond respectively to the base and the emitter of the Darlington.

[0057] The generator GI comprises between the first primary terminal BP1 and the second primary terminal BP2, and in order, a first capacitor C1 and a potentiometer R1 of variable resistance. In other words, the first capacitor C1 and the potentiometer R1 are connected in series according to a first common node N1.

[0058] The GI generator also includes a DIAC DI1 (“Diode for Alternating Current” in English terminology) with a starting voltage Va connected along one of its terminals, called the control terminal BD1, to the first node N1.

[0059] By "DIAC" we mean two triple PNPN junctions mounted head to tail.

[0060] A second capacitor C2 and a third capacitor C3 are interposed between the other terminal of DIAC DI1, called output terminal BD2, and, respectively, the first secondary terminal BS1 and the second secondary terminal BS2. The second capacitor C2 and the third capacitor C3 make it possible to set the control pulse duration, respectively, of the first Darlington transistor TD1 and the second Darlington transistor TD2.

[0061] In operation, and considering a positive alternation of the voltage delivered by the source, a voltage Ve applied between the first primary terminal BP1 and the second primary terminal BP2, causes a charging and discharging phase of the first capacitor C1 which is a function of the resistance of the potentiometer R1.

[0062] When the first capacitor C1 is charged, the voltage at the first node increases until it reaches the trigger voltage Va. The DIAC DI1 then starts conducting, thus allowing the first capacitor C1 to discharge, via the DIAC DI1, into the second capacitor C2 and then into the first Darlington transistor TD1 in the form of a current pulse supplying the electrical load 1. More precisely, the second capacitor C2 sets the duration of the control pulse of the first Darlington transistor TD1.

[0063] The discharge of the first capacitor C1, which lasts only a very short time corresponding to the pulse time Ti, is accompanied by a decrease in the voltage at the first node N1, and thus causes the DIAC DI1 to block.

[0064] This phenomenon of charging and discharging the first capacitor C1 can occur several times during the same voltage alternation depending on the electrical resistance imposed by the potentiometer R1. In other words, it is possible to adjust the number N of pulses by adjusting the electrical resistance of the potentiometer R1.

[0065] The same reasoning applies for a negative alternation of the voltage imposed by the source. In this case, the discharge of the first capacitor C1 takes place in the third capacitor C3 then in the second Darlington transistor TD2. More precisely, the second capacitor C3 fixes the duration of the control pulse of the second Darlington transistor TD2.

[0066] The Power Dimmer 2, presented at the Figures 6a And 6b , may have other components. In particular, it may be provided with a second resistor R2 and a third resistor R3 each connecting the first primary terminal BP1 to the output terminal BD2 of the DIAC DI1.

[0067] A first diode D1 and a second diode D2 may also be interposed between the first primary terminal BP1 and, respectively, the first secondary terminal BS1 and the second secondary terminal BS2.

[0068] Finally, the power dimmer 2 may comprise a switching aid stage RE1 connected to the collector of the first Darlington transistor TD1 by a first input terminal BE'1 and to the collector of the second Darlington transistor TD2 by a second input terminal BE'2.

[0069] The switching aid stage RE1 also comprises two output terminals called, respectively, first output terminal BS'1 and second output terminal BS'2 both connected to the second primary terminal BP2.

[0070] The switching assistance stage RE1 may comprise, on the one hand, between its first input terminal BE'1 and its first output terminal BS'1, a third diode D3 and a fourth diode D4 mounted according to opposite polarities and, on the other hand, between its second input terminal BE'2 and its second output terminal BS'2, a fifth diode D5 and a sixth diode D6 also mounted according to opposite polarities. The first diode D3 and the fifth diode D5 are so-called "freewheel" diodes making it possible to circulate the current stored in at least one inductance when the transistors TD1 and TD2 are open or not conducting.

[0071] According to a first variant represented in the Figure 6a, the common terminal of the third and fourth diodes D3 and D4 can be connected to the first output terminal BS'1 by a first branch comprising, in series, a first inductance L1' and a fourth resistor R4 (R4 symbolizes an electrical control load capable of providing an electrical power supply). Equivalently, the common terminal of the fifth and sixth diodes D5 and D6 can be connected to the second output terminal BS'2 by a second branch comprising, in series, a second inductance L2' and a fifth resistor R5 (R5 symbolizes an electrical control load capable of providing an electrical power supply).

[0072] In operation, the voltages U1 and U2 generated at the terminals of the fourth resistor R4 and fifth resistor R5, during the charging / discharging phases of the second capacitor C2, can be used to power electronics, for example a human-machine interface. This operation is a “chopper” type operation. The first and second inductors L1 and L2 are inductors for storing energy during the conduction phase of the transistors TD1 and TD2 and for restoring energy to the loads R4 and R5 during the “freewheel” phase via the “freewheel” diodes D3 and D5.

[0073] If these two voltages U1 and U2 are not used, the energy associated with them can be reinjected at the level of the second primary terminal BP2.

[0074] According to a second variant represented in the Figure 6b, the common terminals of the third and fourth diodes D3 and D4 on the one hand, and of the fifth and sixth diodes D5 and D6 on the other hand are connected by an inductance L1.

[0075] In operation, for example during a positive alternation of the source voltage, when the first Darlington transistor TD1 conducts, the inductance L1 charges through the fourth and fifth diodes D4, D5 as well as the first Darlington transistor TD1. As soon as the conduction in the first Darlington transistor stops, the current stored in the inductance L1 flows freewheeling in the third and fifth diodes D3 and D5.

[0076] During a negative alternation of the source voltage, the inductance L1 charges through the third and sixth diodes D3, D6 as well as the second Darlington transistor TD2. As soon as the conduction in the second Darlington transistor TD2 stops, the current stored in the inductance L1 flows in freewheel in the third and fifth diodes D3 and D5. The first diode D3 and the fifth diode D5 are so-called "freewheel" diodes allowing the current stored in the inductance L1 to flow when the transistors TD1 and TD2 are open or not conducting.

[0077] Whatever the variant considered, the switching assistance stage, when one or other of the first and second Darlington transistors is turned on, makes it possible to regulate the current in said Darlington transistors. In particular, the switching assistance stage (in particular the inductance(s)), when a Darlington transistor is turned on, makes it possible to limit the establishment of the current and thus reduce the switching losses. This limitation on the establishment of the current is also less “polluting” from an electromagnetic point of view, and in particular to limit the establishment of the current

[0078] An EMC filter can also be considered to suppress disturbances that may be injected into the network.

[0079] The EMC filter is interposed between the power dimmer 2 and the source. In particular, the EMC filter comprises two input terminals X1 and X2 connected, respectively, to the first primary terminal BP1 and to the second primary terminal BP2, and two output terminals Y1 and Y2 connected in series with the electrical load 1.

[0080] The EMC filter can be provided with two inductors L3 and L4 and a fourth capacitor C4. In particular, the two inductors L3 and L4 connect, respectively, input X2 to output Y2, and input X1 to output Y1, while the fourth capacitor connects outputs Y1 and Y2.

[0081] The power dimmer 2 shown in the Figure 6a has been implemented for the regulation of the power of an LED bulb.

[0082] THE Figures 7a to 7care graphical representations of this regulation. In particular, in each of these figures, the top curve represents the temporal evolution of the voltage across the terminals of the first capacitor C1 while the bottom curve represents the conduction of the Darlington transistors TD1 and TD2.

[0083] In these figures, charges and discharges of the first capacitor C1 appear (identified by the sudden voltage drops). Their number (number N) is a function of the resistance R1 of the potentiometer. More precisely, the lower R1, the higher the number N. These sudden voltage drops are accompanied by the conduction of one or the other of the Darlington transistor, depending on the positive or negative alternation of the source voltage.

[0084] So, adjusting potentiometer R1 to a high resistance value provides dim illumination of the LED bulb ( Figure 7a). On the other hand, a high resistance value R1 imposes a large number of current pulses on the LED bulb, so that the latter provides strong lighting ( Figure 7c ). There Figure 7b illustrates an intermediate situation where the lighting provided by the LED bulb is of medium intensity.

[0085] The method according to the present invention therefore makes it possible to regulate the power supply of an electrical load, and in particular of a bulb exhibiting behavior other than that of a resistor.

[0086] Furthermore, this same process also makes it possible to consider an almost complete, or even complete, extinction of a low-power electrical load, and in particular of a power lower than a few Watts, for example lower than 10 Watts.

[0087] Finally the power dimmer shown in Figures 6a And 6benabling the method according to the present invention to be implemented consumes little or no power.

Claims

1. A method for regulating power of an electrical load (1) supplied with an alternating current source of period T, the load being connected in series with a power dimmer (2) generating, for each half period T / 2 of the alternating current, a number N of current pulses for supplying said load, the method comprising adjusting the number N as a function of the power to be delivered to the electrical load (1).

2. The method according to claim 1, wherein once the power to be delivered to the electrical load (1) is zero, the number N of current pulses is also zero for each half-period T / 2 of the alternating current.

3. The method according to claim 1 or 2, wherein the duration of each current pulse is less than 5 thousandths of the period T, advantageously between 25 ten thousandths and 5 thousandths of the period T.

4. The method according to one of claims 1 to 3, wherein the N current pulses, for each half period T / 2, have a substantially equal duration.

5. The method according to one of claims 1 to 4, wherein, for each half period T / 2, the N pulses are centred with respect to said half period T / 2 and, advantageously equidistant from each other.

6. The method according to one of claims 1 to 5, wherein the electrical load (1) comprises either an electrical heating system, an electric motor, or an LED or fluorescent bulb, especially with a power of less than 10 Watt.

7. The method according to one of claims 1 to 6, wherein the power dimmer (2) comprises: - a pulse generator (GI) provided with two primary terminals, respectively called the first primary terminal (BP1) and the second primary terminal (BP2) forming the terminals of the power dimmer (2), and two secondary terminals, respectively called the first secondary terminal (BS1) and the second secondary terminal (BS2); - a first Darlington transistor (TD1) of the NPN type, connected to the first secondary terminal (BS1) by its base and to the first primary terminal (BP1) by its emitter; - a second Darlington transistor (TD2) of the PNP type, connected to the second secondary terminal (BS2) by its base and to the first primary terminal (BP1) by its emitter.

8. A power dimmer (2) which, when connected in series between an electrical load (1) and an alternating current source of period T, is, for each half current period T / 2 of the alternating current, to generate a number N of current pulses for supplying said load, the dimmer comprising: - a pulse generator (GI) provided with two primary terminals, respectively called the first primary terminal (BP1) and the second primary terminal (BP2) forming the terminals of the power dimmer (2), and two secondary terminals, respectively called the first secondary terminal (BS1) and the second secondary terminal (BS2), said generator (GI) comprising between the first primary terminal (BP1) and the second primary terminal (BP2), and in order, a first capacitor (C1) and a potentiometer (R1), the generator (GI) also comprises a DIAC (DI1) of an initiation voltage Va connected at one of its terminals, so-called control terminal (BD1), to a first node (N1) common to the first capacitor (C1) and to the potentiometer (R1) for adjusting the number N, a second capacitor (C2) and a third capacitor (C3) are interposed between the other terminal of the DIAC DI1, called the output terminal (BD2), and, respectively, the first secondary terminal (BS1) and the second secondary terminal (BS2); - a first Darlington transistor (TD1) of the NPN type, connected to the first secondary terminal (BS1) by its base and to the first primary terminal (BP1) by its emitter; - a second Darlington transistor (TD2) of the PNP type, connected to the second secondary terminal (BS2) by its base and to the first primary terminal (BP1) by its emitter.

9. The dimmer according to claim 8, wherein the generator (GI) is provided with a second resistor (R2) and a third resistor (R3) each connecting the first primary terminal (BP1) to the output terminal (BD2).

10. The dimmer according to claim 8 or 9, wherein the generator (GI) comprises a first diode (D1) and a second diode (D2) interposed between the first primary terminal (BP1) and, respectively, the first secondary terminal (BS1) and the second secondary terminal (BS2).

11. The dimmer according to one of claims 8 to 10, wherein the power dimmer (2) comprises a switching aid stage (RE1) connected to the collector of the first Darlington transistor (TD1) by a first input terminal (BE'1) and to the collector of the second Darlington transistor (TD2) by a second input terminal (BE'2), the switching aid stage (RE1) also comprises two output terminals, respectively called the first output terminal (BS'1) and the second output terminal (BS'2) both connected to the second primary terminal (BP'2).

12. The dimmer according to claim 11, wherein the switching aid stage (RE1) comprises, on the one hand, between its first input terminal (BE'1) and its first output terminal (BS'1), a third and a fourth diodes (D3) and (D4) connected in series with opposite polarities and, on the other hand, between its second input terminal (BE'2) and its second output terminal (BS'2), a fifth and a sixth diodes (D5) and (D6) also connected in series with opposite polarities.

13. The dimmer according to claim 12, wherein the common terminal of the third and fourth diodes (D3) and (D4) is connected to the first output terminal (BS'1) by a first branch comprising, in series, a first inductor (L1') and a fourth resistor (R4), and the common terminal of the fifth and sixth diodes (D5) and (D6) is connected to the second output terminal (BS'2) by a second branch comprising, in series, a second inductor (L2') and a fifth resistor (R5).

14. The dimmer according to claim 12, wherein the common terminals of the third and fourth diodes (D3) and (D4) on the one hand, and of the fifth and sixth diodes (D5) and (D6) on the other hand are connected by an inductor (L1).

15. The dimmer according to one of claims 8 to 14, wherein the method comprises implementing a filter (EMC) which comprises two input terminals (X1) and (X2) connected, respectively, to the first primary terminal (BP1) and to the second primary terminal (BP2), and two output terminals (Y1) and (Y2) connected in series with the electrical load (1).

16. The dimmer according to claim 15, wherein the filter (EMC) is provided with two inductors (L3) and (L4) and a fourth capacitor (C4), the two inductors (L3) and (L4), connecting, respectively, the input (X2) to the output (Y2), and the input (X1) to the output (Y1), while the fourth capacitor (C4) connects the outputs (Y1) and (Y2).