Semiconductor module arrangement comprising at least one semiconductor element
Patent Information
- Application Number
- EP2024704346
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-02-07
- Filing Date
- 2024-02-05
- Publication Date
- 2025-09-10
AI Technical Summary
The recyclability of semiconductor arrangements is hindered by the difficulty in removing soft casting materials, which are commonly used for protection but are energy-intensive and challenging to disassemble during recycling processes.
The semiconductor element is placed in direct contact with an electrically insulating coolant flow, such as an inert liquid, within a closed housing, allowing for improved heat dissipation and simplifying disassembly by replacing the soft casting with a fluid that can be easily removed, thereby enhancing recyclability and service life.
This approach improves heat dissipation, extends the service life of semiconductor arrangements, and facilitates easier recycling and repair by using an electrically insulating coolant that minimizes hot spots and allows for higher power densities, while reducing material and energy consumption in manufacturing.
Smart Images

Figure EP2024052706_15082024_PF_FP
Abstract
Description
[0001] Description
[0002] Semiconductor module arrangement with at least one semiconductor element
[0003] The invention relates to a semiconductor arrangement, in particular a power semiconductor arrangement for a power converter, with at least one semiconductor element, wherein the at least one semiconductor element is arranged in a closed housing.
[0004] Furthermore, the invention relates to a power converter with at least one such semiconductor arrangement.
[0005] Furthermore, the invention relates to a method for producing a semiconductor arrangement, in particular a power semiconductor arrangement for a power converter, with at least one semiconductor element, wherein the at least one semiconductor element is arranged in a closed housing.
[0006] Furthermore, the invention relates to the use of a coolant flow of an electrically insulating cooling liquid, in particular inert liquid, for cooling a semiconductor element in a closed housing.
[0007] Furthermore, the invention relates to a computer program product which is designed as a digital twin of such a semiconductor device.
[0008] Such semiconductor devices are used, for example, in a power converter. A power converter can be, for example, a rectifier, an inverter, a converter, or a DC-DC converter. Such semiconductor devices typically comprise a housing in which at least one semiconductor element is arranged. Such a semiconductor element can be, among other things, a transistor. A soft potting compound, in particular a silicone potting compound, is typically provided within the housing to protect the at least one semiconductor element.
[0009] The published patent application WO 2022 / 033745 A1 describes a power module with at least one power unit, which comprises at least one power semiconductor and a substrate, wherein the at least one power unit is at least partially enclosed by a housing. The housing is filled with a soft encapsulation, in particular with a silicone encapsulation.
[0010] Environmental aspects are also becoming increasingly important in electronics development. In particular, improved recyclability is becoming a focus. Recyclability and repair costs are improved, for example, by eliminating the need for material-to-material connections, which can be created through soldering, sintering, or welding.
[0011] The published patent application EP 3 926 670 A1 describes a power semiconductor module with at least one power semiconductor element. In order to reduce the required installation space of the power semiconductor module and increase its service life, it is proposed that the at least one power semiconductor element be electrically insulating and thermally conductively connected to a cooling element via a dielectric material layer, wherein the dielectric material layer rests flatly on a surface of the cooling element and is force-fittingly connected to the cooling element by means of a first force acting orthogonally to the surface of the cooling element.
[0012] Publication WO 2018 / 046165 A1 describes a power module with a semiconductor component to be contacted on the top and bottom sides, wherein the semiconductor component is electrically contacted on the top side by a leadframe matrix using contact pressure. Soft encapsulation is very difficult to remove, for example during recycling processes. Against this background, it is an object of the present invention to improve the recyclability of a semiconductor device.
[0013] This object is achieved according to the invention by a semiconductor device of the type mentioned at the outset in that the semiconductor element is in direct contact with a coolant flow of an electrically insulating cooling liquid, in particular an inert liquid.
[0014] Furthermore, the object is achieved according to the invention by a power converter with at least one such semiconductor arrangement.
[0015] Moreover, the object is achieved according to the invention by methods of the type mentioned at the outset in that the semiconductor element is brought into direct contact with a coolant flow of an electrically insulating cooling liquid, in particular an inert liquid.
[0016] Furthermore, the object is achieved according to the invention by using a coolant flow of an electrically insulating cooling liquid, in particular an inert liquid, for cooling a semiconductor element in a closed housing, wherein the coolant flow is in direct contact with the at least one semiconductor element.
[0017] Furthermore, the object is achieved according to the invention by a computer program product which is designed as a digital twin of such a semiconductor arrangement and which is used in simulating the operating behavior of a correspondingly designed semiconductor arrangement.
[0018] The advantages and preferred embodiments listed below with regard to the semiconductor device can be applied analogously to the power converter, the method, the use and the computer program product. The invention is based on the idea of improving the recyclability of a semiconductor device by replacing a commonly used soft potting compound with an electrically insulating cooling liquid. A closed housing of the semiconductor device, in which at least one semiconductor element is arranged, is at least partially filled with the electrically insulating cooling liquid in such a way that the semiconductor element is in direct contact with a coolant flow of the electrically insulating cooling liquid. For example, the semiconductor element is designed as a vertical transistor, in particular as an IGBT or vertical SiC MOSFET.The housing is, for example, made at least partially from a plastic and can be fluid-tight in order to minimize loss of the electrically insulating coolant. The coolant flow of the electrically insulating coolant achieves improved heat dissipation of the at least one semiconductor element. In particular, the semiconductor element is at least partially surrounded by the coolant flow. The at least one semiconductor element can be wetted by the coolant. The electrically insulating coolant of the coolant flow is, in particular, designed as an inert liquid which, for example, has a dielectric strength of at least 10 kV / mm, in particular 20 kV / mm. Galden® HS 240, 3M™ Novec™ or 3M™ Fluorinert™ are among those that can be used as electrically insulating coolants.Simple disassembly for repair, refurbishment or recycling is made possible by at least partially filling the housing with the electrically insulating coolant, wherein the coolant flow, in particular due to the direct contact with the at least one semiconductor element, ensures improved heat dissipation, which, among other things, has a positive effect on the service life of the semiconductor arrangement and enables higher power densities. Furthermore, materials and energy-intensive manufacturing processes are saved. In particular, the operating behavior of the semiconductor arrangement, which can be significantly influenced by the coolant flow, can be checked for plausibility by comparing it with a correspondingly designed simulated semiconductor arrangement. Furthermore, a recycling process for the semiconductor arrangement can be simulated and, for example, optimized with regard to a disassembly sequence.The computer program product, which is designed as a so-called digital twin, allows modeling of at least the semiconductor device in a simulation environment. This makes it easy to provide a sufficiently realistic process image. Such a digital twin is described, for example, in the publication US 2017 / 286572 A1, the disclosure content of which is incorporated herein by reference.
[0019] US 2017 / 286572 A1 is incorporated by reference into the present application. The computer program product can be monolithic, i.e. can be executed entirely on a hardware platform. Alternatively, the computer program product can be modular and comprise a plurality of subprograms which can be executed on separate hardware platforms and interact via a communicative data connection. Such a communicative data connection can be a network connection, an internet connection and / or a mobile radio connection. Furthermore, using such a digital twin, the operation taking into account the coolant flow or the recycling of the semiconductor arrangement or even a power converter which comprises at least one such semiconductor arrangement can be tested and / or optimized simply and cost-effectively by means of simulation.
[0020] The computer program product can comprise a physics module in which the semiconductor arrangement is at least partially represented. For this purpose, the semiconductor arrangement can be simulated, for example, in terms of its structure and mode of operation, for example as a digital image that is part of the computer program product. The physics module is designed to simulate the electrical, thermal and / or fluid-mechanical behavior of the semiconductor arrangement or of the cooling liquid therein under adjustable operating conditions. The adjustable operating conditions include, for example, an operating parameter that defines a switching behavior of the at least one semiconductor switch, an inlet temperature of the cooling liquid, a specific heat capacity of the cooling liquid, a flow velocity of the cooling liquid and / or a heat release distribution on a surface of the at least one semiconductor element.The computer program product can have a data interface via which corresponding data can be specified via a user input, a data connection to a real semiconductor arrangement and / or other simulation-oriented computer program products. The computer program product can also have a data interface for outputting simulation results to a user and / or other simulation-oriented computer program products. The simulation results can include a temperature distribution on a surface of the at least one semiconductor element and / or an outlet temperature of the cooling liquid. A defective semiconductor element can be detected, for example, by means of the computer program product.Because in the underlying, i.e. simulated, semiconductor arrangement, hot spots on at least one semiconductor element are minimized, these hot spots can be neglected in the claimed computer program product. Calculating such hot spots requires increased computing effort in solutions according to the prior art. The claimed computer program product can be designed in such a way that a heat dissipation behavior of the at least one semiconductor element can be simulated as essentially uniform heat dissipation across its surface. As a result, the thermal behavior of the at least one semiconductor element can be simulated quickly and realistically with reduced computing power. The claimed computer program product is essentially suitable for real-time monitoring of the underlying semiconductor arrangement.As a result, the underlying semiconductor arrangement can be thermally monitored with increased precision, which in turn allows longer operation with rapid load changes of increased amplitude. Overall, the underlying semiconductor arrangement is designed to be simulation-friendly and its technical potential can therefore be exploited more effectively. The computer program product can comprise program code that is stored in a non-volatile memory and can be executed by a computer. A further embodiment provides that the semiconductor element is non-positively connected to a carrier element, in particular by means of a first press contact. Such a press contact can be designed, among other things, as a busbar. Alternatively, a spring, a screw and / or a bracket can be used for the non-positive connection of the semiconductor element.Such a force-fitting connection of the semiconductor element is detachable and easy to remove when dismantling for repair, refurbishment or recycling, especially in combination with the filling with the electrically insulating cooling liquid.
[0021] A further embodiment provides that the carrier element is made of a metallic material, wherein the semiconductor element is electrically insulatingly connected to the carrier element via a dielectric material layer. The carrier element can contain, among other things, copper, aluminum, or one of their alloys. The dielectric material layer can contain, among other things, aluminum oxide, aluminum nitride, or an organic, electrically insulating and thermally conductive material in order to electrically insulatingly and thermally conductively connect the semiconductor element to the carrier element. In this way, the semiconductor element can also be cooled via the carrier element.
[0022] A further embodiment provides that the carrier element comprises at least one channel through which the coolant flow runs. For example, the channel through which the electrically insulating cooling liquid flows is designed in a meandering shape, so that the heat generated during operation of the semiconductor element is efficiently dissipated on both sides by the coolant flow.
[0023] In a further embodiment of the claimed semiconductor arrangement, the at least one semiconductor element can be wetted by the coolant. In particular, the at least one semiconductor element can be at least partially surrounded by the coolant flow. Such direct contact, in particular when the coolant flow is present, ensures increased heat dissipation. The cooling liquid is thereby thermally utilized more effectively. In particular, this minimizes localized warm spots on the at least one semiconductor element. Such localized warm spots on the at least one semiconductor element can occur, for example, with high electrical loads, in particular rapid load changes with increased amplitude. The corresponding localized warm spots can be decisive for the thermal design of the semiconductor arrangement.Because at least one semiconductor element is wetted by the cooling liquid, the technical potential of the semiconductor device can be exploited to a greater extent.
[0024] A further embodiment provides that the semiconductor arrangement comprises a second guide device configured to guide the coolant flow passing through the at least one channel of the carrier element over the semiconductor element. Such a guide device can be designed, among other things, as a guide plate and serves to bring the coolant flow into targeted and uniform contact with the semiconductor elements.
[0025] A further embodiment provides that, on a side of the carrier element facing away from the semiconductor element, another semiconductor element is non-positively connected to the carrier element, in particular by means of a first press contact. Such a bilateral arrangement of the semiconductor elements leads to a higher integration and power density of the arrangement. Furthermore, a bilateral non-positive connection of the semiconductor elements to the carrier element is easy to remove, which further simplifies disassembly for repair, refurbishment, or recycling.
[0026] Another embodiment provides for the electrically insulating cooling liquid to be designed as a phase-change coolant. For example, inert liquids such as 3M™ Novec™ are available with different boiling points. The boiling point can thus be configured so that the inert liquid functions as an evaporative coolant or phase-change coolant, for example, to absorb heat peaks. Phase-change cooling enables higher heat transfer coefficients, particularly compared to purely sensible cooling.
[0027] A further embodiment provides that a condensation device for condensing an evaporated coolant is arranged in the closed housing. The condensation device can comprise, among other things, a heat exchanger. Such an arrangement enables condensation in the presence of inert gases, in particular air, at near ambient pressure, by avoiding the inhibiting effect of inert gases through mixing.
[0028] A further embodiment provides for a sensor to be arranged in the region of the semiconductor element, wherein the coolant flow is controlled based on sensor data determined with the aid of the sensor. The sensor can comprise, among other things, a temperature sensor, a voltage sensor, and / or a current sensor. Such control of the coolant flow makes it possible, for example, to keep the temperature of the semiconductor element within a predetermined temperature range. The invention is described and explained in more detail below with reference to the exemplary embodiments illustrated in the figures.
[0029] It shows :
[0030] FIG 1 is a schematic sectional view of a first embodiment of a semiconductor device,
[0031] FIG 2 shows a schematic sectional view of a second embodiment of a semiconductor device,
[0032] FIG 3 is a schematic representation of a third embodiment of a semiconductor device,
[0033] FIG 4 is a schematic representation of a fourth embodiment of a semiconductor device,
[0034] FIG 5 is a schematic diagram of a power converter.
[0035] The exemplary embodiments explained below are preferred embodiments of the invention. In the exemplary embodiments, the described components of the embodiments each represent individual features of the invention that are to be considered independently of one another. These also further develop the invention independently of one another and are thus to be regarded as components of the invention, either individually or in a combination other than that shown. Furthermore, the described embodiments can also be supplemented by further features of the invention already described.
[0036] The same reference symbols have the same meaning in the different figures.
[0037] FIG 1 shows a schematic sectional view of a first embodiment of a semiconductor arrangement 2 with a semiconductor element 4, which is arranged in a closed housing 6. For example, the semiconductor element 4 is designed as a vertical transistor, in particular as an IGBT or vertical SiC MOSFET. The semiconductor element 4 has a first power contact 8, in particular a collector contact C, and on an opposite side a second power contact 10, in particular an emitter contact E, and a control contact 12, in particular a gate contact G.
[0038] The housing 6 is made, for example, from a plastic. Furthermore, a support element 14, which is designed as a metallic heat sink, is arranged in the housing 6. The heat sink is made, for example, from copper, aluminum or one of their alloys. A dielectric material layer 16, which in particular contains aluminum oxide, aluminum nitride or an organic electrically insulating and thermally conductive material, and a metallization 18, which contains, for example, copper, gold, molybdenum, silver or one of their alloys, are arranged on the heat sink. The metallization 18 has a flat surface 20, which defines an xy plane and a z axis perpendicular to the surface 20. The dielectric material layer 16 can be pressed or adhesively bonded to the heat sink.Alternatively, a substrate, particularly a DGB (Direct Copper Bonded) substrate, can be arranged on the heat sink. The substrate can be bonded to the heat sink, for example, by soldering.
[0039] The semiconductor element 4 is non-positively connected to the carrier element 14 by means of a first press contact 22 via the dielectric material layer 16. The dielectric material layer 16 creates an electrically insulating and thermally conductive connection between the semiconductor element 4 and the carrier element 14. A force F acting orthogonally to the surface 20 is transmitted via the first press contact 22, by means of which force F the semiconductor element 4 is fixedly fixed to the carrier element 14. A metallic contacting element 24 is connected to the second power contact 10 of the semiconductor element 4 and acts as a buffer layer, which distributes the force F from the press contact 22, so that pressure peaks are prevented from being introduced into the sensitive semiconductor element 4.The metallic contacting element 24 can be designed, among other things, as a metal plate containing copper and / or molybdenum and have a thickness in the range of 25 pm to 250 pm. The metallic contacting element 24 is connected to the semiconductor element 4 in a material-locking manner via a sintered layer 26, but can also be connected by soldering. Alternatively, the metallic contacting element 40 can be sprayed on using a thermal spraying process, in particular in the form of copper and / or molybdenum particles.
[0040] In addition to the mechanical fixing, the electrical contacting of the second power contact 10 of the semiconductor element 4 is effected by means of the first press contact 22. A plurality of first press contacts 22 (e.g. 2x2, 2x3, 3x3, 3x4 or 4x4), arranged in particular equidistantly in a square or rectangular manner on the metallic contacting element 24, leads to improved mechanical fixing of the semiconductor element 4, more homogeneous pressure distribution and low-resistance electrical contacting. A second press contact 28 and a third press contact 30 are force-fittingly connected to the surface 20 of the metallization 18 for electrically contacting the first power contact 8 and the control contact 12, respectively, the control contact 12 being connected to the metallization 18 via at least one wiring means 32.The at least one wiring means 32 is designed, for example, as a bonding wire or bonding strip, which is welded in particular by ultrasonic wire bonding. The carrier element 14 is pressed against the inner wall 34 of the housing 6 via the press contacts 22, 28, 30. In addition, the carrier element 14 can be connected to the inner wall 34 of the housing 6 in a materially bonded manner, e.g. by means of adhesion. The press contacts 22, 28, 30 are designed as busbars, which are also called busbars. For example, the busbars are made of copper or a copper alloy. Additionally or alternatively, the press contacts 22, 28, 30 can have a spring, a screw or a bracket. The busbars are led out of the housing 6 via sealing elements 36, so that the housing 6 is sealed in a watertight, in particular fluid-tight manner.
[0041] An electrically insulating cooling liquid 40 is supplied via an inlet 38, wherein a coolant flow 42 is generated and the housing 6 is filled, in particular completely, with the electrically insulating cooling liquid 40. The coolant flow 42 is guided via a first guide device 44, which is connected, for example, to the housing 6 and / or the support element 14, through at least one channel 46 which is arranged to run through the support element 14. The first guide device 44 can, for example, comprise guide plates and / or a pipe. The channel 46 can, among other things, run in a meandering shape through the support element 14.The coolant flow 42 emerging from the channel 46 of the carrier element 14 is deflected via a second guide device 48, which is designed, for example, as a guide plate, so that the electrically insulating coolant 40 flows over the semiconductor element 4, so that the semiconductor element 4 is in direct contact with the coolant flow 42. For example, the semiconductor element 4 is essentially cuboid-shaped, with at least five of the six side surfaces of the cuboid-shaped semiconductor element 4 being in contact with the electrically insulating coolant 40. Furthermore, the four side surfaces of the cuboid-shaped semiconductor element 4, which are arranged running perpendicular to the xy plane, are completely contacted with the electrically insulating coolant 40.The cooling liquid 40, which is heated by the waste heat generated during operation of the semiconductor element 4, is discharged via an outlet 50, cooled outside the housing 6 and fed back in via the inlet 38. The electrically insulating cooling liquid 40 is designed as an inert liquid which has a high dielectric strength of at least 10 kV / m, in particular 20 kV / m. Galden® HS 240, 3M™ Novec™ or 3M™ Fluorinert™, among others, can be used as the electrically insulating cooling liquid 40. The electrically insulating cooling liquid 40 replaces a conventionally used potting compound in the semiconductor arrangement 2, which is made, for example, from a silicone insulation material that is difficult to remove. The electrically insulating cooling liquid 40 can be removed from the housing 6 very easily, so that the components in the housing 6 are freely accessible for recycling and repair processes.The coolant flow 42, which is in direct contact with the semiconductor element 4, achieves improved heat dissipation during operation of the semiconductor device 2. Such immersion cooling allows the semiconductor device 2 to be easily and at least largely reversibly disassembled, particularly for recycling and repair processes.
[0042] A sensor 52, which may include, among other things, a temperature sensor, a voltage sensor, and / or a current sensor, is arranged in the region of the semiconductor element 4. The coolant flow 42 is controlled with the aid of sensor data determined by the sensor 52, for example, to maintain a temperature of the semiconductor element 4 within a predetermined temperature range.
[0043] FIG 2 shows a schematic sectional view of a second embodiment of a semiconductor arrangement 2. On a side of the carrier element 14, which is arranged essentially centrally in the housing 6 in the z-direction and is facing away from the semiconductor element 4, a further semiconductor element 54 is force-fittingly connected to the carrier element 14. The semiconductor elements 4, 54 are thus arranged on both sides of the carrier element 14, which is held essentially centrally in the housing 6 by the press contacts 22, 28, 30. The semiconductor arrangement 2 is arranged essentially axially symmetrically to a central axis 56.The electrically insulating cooling liquid 40 of the coolant flow 42 is guided essentially symmetrically over the semiconductor elements 4, 54 and through the channels 46 of the carrier element 14, which are arranged axially symmetrically around the central axis 56, so that the semiconductor elements 4, 54 in direct contact with the coolant flow 42 are evenly cooled. As in FIG. 1, the arrangement can have guide devices such as baffles in order to bring the coolant flow 42 into targeted and even contact with the semiconductor elements 4, 54. The further embodiment of the semiconductor arrangement 2 in FIG. 2 corresponds to the embodiment in FIG. 1.
[0044] FIG 3 shows a schematic representation of a third embodiment of a semiconductor arrangement 2, wherein at least a portion of the electrically insulating cooling liquid 40 evaporates upon direct contact with the semiconductor element 4. The cooling liquid 40 is an inert liquid, such as 3M™ Novec™, whose boiling point is configured such that it functions as an evaporative coolant or phase change coolant. For example, the boiling point is 61, 76 or 91 °C. By means of such phase change cooling, heat peaks, for example, can be cushioned. The evaporated coolant 60 is condensed via a condensation device 58, in particular a heat exchanger, and fed back into the circuit as condensed coolant 62.The coolant flow 42 of the coolant 40, heated but not evaporated by the waste heat generated during operation of the semiconductor element 4, is guided to a common outlet 50 via a third guide device 64. Alternatively, the housing can have a separate outlet for the condensed coolant 62. The further embodiment of the semiconductor device 2 in FIG. 3 corresponds to the embodiment in FIG. 1.
[0045] FIG 4 shows a schematic representation of a fourth embodiment of a semiconductor arrangement 2, wherein the housing 6 is closed via a connection to the carrier element 14, in particular in a fluid-tight manner. A fluid-tight, in particular adhesive, connection of the housing 6 to the carrier element 14 is produced via at least one sealing element 36. The sealing element 36 can, for example, have a sealing adhesive. Alternatively, the sealing element 36 can comprise a circumferential sealing strip, wherein the housing 6 is pressed onto the heat sink via the sealing strip and is thus closed in a fluid-tight manner. For example, screws or clamps can permanently and detachably connect the housing 6 to the heat sink. The carrier element 14 is designed, for example, as a heat sink made of copper, aluminum or one of their alloys.The heat sink has fins 65 through which the heat generated during operation of the semiconductor element 4 can be additionally dissipated into the surrounding air. The coolant flow 42 within the housing 6 runs essentially in the x-direction. The further design of the semiconductor device 2 in FIG. 4 corresponds to the design in FIG. 1.
[0046] FIG. 5 shows a schematic representation of a power converter 66, which comprises a semiconductor device 2 and a cooling device 68. The coolant flow 42 discharged from the outlet 50 of the semiconductor device 2 is cooled by the cooling device 68, which comprises, for example, a heat exchanger, and fed back in via the inlet 38. The power converter 66 can comprise more than one semiconductor device 2, which forms a cooling circuit with at least one cooling device 68.
[0047] In summary, the invention relates to a semiconductor arrangement 2, in particular a power semiconductor arrangement for a power converter 66, having at least one semiconductor element 4, wherein the at least one semiconductor element 4 is arranged in a closed housing 6. In order to improve the recyclability of the semiconductor arrangement 2, it is proposed that the semiconductor element 4 be in direct contact with a coolant flow 42 of an electrically insulating cooling liquid 40, in particular an inert liquid.
Claims
Patent claims 1. Semiconductor arrangement (2), in particular a power semiconductor arrangement for a power converter (66), with at least one semiconductor element (4), wherein the at least one semiconductor element (4) is arranged in a closed housing (6), characterized in that the semiconductor element (4) is in direct contact with a coolant flow (42) of an electrically insulating cooling liquid (40), in particular an inert liquid, and the at least one semiconductor element (4) is non-positively connected to a carrier element (14) which comprises at least one channel (46) through which the coolant flow (42) runs, wherein the at least one semiconductor element (4) is wetted by the cooling liquid (40).
2. Semiconductor arrangement (2) according to claim 1, wherein the semiconductor element (4) is force-fittingly connected to the carrier element (14) by means of a first press contact (22).
3. Semiconductor arrangement (2) according to claim 2, wherein the carrier element (14) is made of a metallic material and wherein the semiconductor element (4) is electrically insulatingly connected to the carrier element (14) via a dielectric material layer (16).
4. Semiconductor arrangement (2) according to one of claims 1 to 3, wherein the at least one channel (46) opens into the closed housing (6).
5. Semiconductor device (2) according to one of claims 2 to 4, comprising a second guide device (48) which is configured to guide the coolant flow (42) running through the at least one channel (46) of the carrier element (14) over the semiconductor element (4).
6. Semiconductor arrangement (2) according to one of claims 2 to 5, wherein on a side of the carrier element (14) facing away from the semiconductor element (4), a further semiconductor element (54) is non-positively connected to the carrier element (14), in particular by means of a first press contact (22).
7. Semiconductor arrangement (2) according to one of the preceding claims, wherein the electrically insulating cooling liquid (40) is designed as a phase change coolant.
8. Semiconductor arrangement (2) according to claim 7, wherein a condensation device (58) for condensing an evaporated coolant (60) is arranged in the closed housing (6).
9. Power converter (66) with at least one semiconductor device (2) according to one of the preceding claims.
10. Method for cooling a semiconductor element (4) in a semiconductor arrangement (2), in particular a power semiconductor arrangement for a power converter (66), with at least one semiconductor element (4), wherein the at least one semiconductor element (4) is arranged in a closed housing (6), characterized in that the semiconductor element (4) is in direct contact with a coolant flow (42) of an electrically insulating Cooling liquid (40), in particular inert liquid, is brought.
11. The method according to claim 10, wherein the semiconductor element (4) is force-fittingly connected to a carrier element (14) by means of a first press contact (22).
12. The method according to claim 11, wherein the coolant flow (42) is directed through at least one channel (46) of the carrier element (14).
13. The method according to claim 12, wherein the coolant flow (42) guided through the at least one channel (46) of the carrier element (14) is guided over the semiconductor element (4) by means of a second guide device (48).
14. Method according to one of claims 10 to 13, wherein on a side of the carrier element (14) facing away from the semiconductor element (4), a further semiconductor element (54) is non-positively connected to the carrier element (14), in particular by means of a first press contact (22), wherein the coolant flow (42) is guided, in particular symmetrically, over the semiconductor elements (4, 54).
15. Method according to one of claims 10 to 14, wherein phase change cooling is carried out by means of the electrically insulating cooling liquid (40).
16. Method according to one of claims 10 to 15, wherein a sensor (52) is arranged in the region of the semiconductor element (4), wherein the coolant flow (42) is controlled based on sensor data which is determined with the aid of the sensor (52).
17. Method according to one of claims 10 to 16, characterized in that the semiconductor arrangement (2) is designed according to one of claims 1 to 9.
18. Use of a coolant flow (42) of an electrically insulating cooling liquid (40), in particular an inert liquid, for cooling a semiconductor element (4) in a closed housing (6), wherein the coolant flow (42) is in direct contact with the at least one semiconductor element (4).
19. Use according to claim 18, characterized in that the semiconductor element (4) and the closed housing (6) are combined to form a semiconductor arrangement (2) according to one of claims 1 to 9 belong.
20. A computer program product which is designed as a digital twin of a semiconductor device (2) according to one of claims 1 to 9 and which is used in simulating the operating behavior of a correspondingly designed semiconductor device (2).