Memory selection element

Abstract

Memory Selection Element This description concerns a selection element (50) comprising, in a first portion (110), a stack (110) of amorphous layers, the thickness of each layer of the stack being less than or equal to 20 nm. Figure for the abbreviation: Fig. 1

Description

Title of the invention: Memory selection element technical field

[0001] The present invention relates generally to the selection elements of a memory and more particularly to the selection elements based on phase change materials. Previous technique

[0002] Phase-change materials are chalcogenide-based materials whose resistance can change when heated, for example, by specific electrical pulses applied between two electrodes. A transition occurs between a crystalline, ordered phase with low resistance and thermodynamic stability, and an amorphous, disordered phase with high resistance and thermodynamic instability. Since the electrical resistance of an amorphous material is significantly greater than the electrical resistance of a crystalline material, this phenomenon is often used in phase-change memories to define two memory states, for example, 0 and 1, differentiated by the resistance measured across the phase-change material.Other components, however, can be manufactured using phase-change materials, for example selection elements, also known as ovonic threshold switches or OTS (Ovonic Threshold Switch).

[0003] The alloys used to form these components are often in stoichiometric proportions. However, alloys with non-stoichiometric proportions may be preferred to alloys with stoichiometric proportions because they may have desirable characteristics, for example, a higher crystallization temperature. However, the manufacture of selection elements comprising such alloys presents several drawbacks. In particular, phase separation and / or the potential crystallization of such alloys can lead to a degradation of the functionality of the selection element. Summary of the invention

[0004] An embodiment overcomes all or part of the drawbacks of the known selection elements.

[0005] One embodiment provides a selection element comprising, in a first portion, a stack of amorphous layers, the thickness of each layer of the stack being less than or equal to 20 nm.

[0006] According to one embodiment, at least one of the layers of the stack comprises an element of group 16.

[0007] According to one embodiment, the stack comprises at least one set of first layers and one set of second layers, the first and second layers being made of different materials.

[0008] According to one embodiment, the first layers are made of an alloy comprising an element from group 15 and an element from group 16, and in which the second layers are made of: - an element from group 14 alone or doped, for example doped with nitrogen, oxygen or carbon; or - an alloy comprising an element from group 14 and an element from group 16.

[0009] According to one embodiment, the stacking comprises an alternation of first and second layers.

[0010] According to one embodiment, the first layers are made of a germanium-based alloy doped with nitrogen, and the second layers are made of an antimony and selenium alloy.

[0011] According to one embodiment, the material of each layer of the stack has stoichiometric proportions.

[0012] According to one embodiment, the element comprises a second portion passing through at least some layers of the stack, made of an alloy of at least a part of the components of the layers of the stack.

[0013] According to one embodiment, the element comprises an electrode in contact with the second portion.

[0014] According to one embodiment, layers of a set of layers of the stack are doped.

[0015] According to one embodiment, the layers of the layer set are doped with one or more dopants from nitrogen, carbon and silicon.

[0016] Another embodiment provides for a memory device comprising a memory element arranged electrically in series with a selection element defined previously.

[0017] Another embodiment provides for a method of manufacturing a selection element comprising the formation of a stack of amorphous layers, the thickness of each layer being less than or equal to 20 nm.

[0018] According to one embodiment, the method includes a step in which a current pulse is sent through the stack of layers, so as to form a portion comprising an alloy of at least some of the components of the layers of the stack.

[0019] According to one embodiment, the process includes a manufacturing step of a lower electrode and the manufacturing of an upper electrode.

[0020] According to one embodiment, the proportions of the material in the second portion are not stoichiometric.

[0021] According to one embodiment, the first and second portions are separated by a skin made of a material from one of the layers of the stack.

[0022] According to one embodiment, the material of the second portion is a phase change material.

[0023] According to one embodiment, the doping of the layers of the layer set is gradual. Brief description of the drawings

[0024] These features and advantages, as well as others, will be described in detail in the following description, of particular embodiments given by way of non-limiting example and in relation to the figures, among which:

[0025] [Fig-1] [Fig.1] is a schematic and partial cross-sectional view of a mode of selection of a selection element;

[0026] [Fig.2] [Fig.2] is a schematic and partial cross-sectional view of a mode of memory cell conversion;

[0027] [Fig.3] [Fig.3] illustrates the operation of the selection element of [Fig.1];

[0028] [Fig.4] [Fig.4] is a diagram representing the connections between components present in different states of several examples of selection element realization modes;

[0029] [Fig. 5] [Fig. 5] illustrates examples of comparisons of bond numbers of the [Fig.4];

[0030] [Fig.6] [Fig.6] schematically and partially represents a structure obtained at the end of a step in the manufacturing of the memory element of [Fig.2];

[0031] [Fig.7] [Fig.7] schematically and partially represents a structure obtained following another manufacturing step of the memory cell of [Fig.2];

[0032] [Fig.8] [Fig.8] represents voltage variations over the lifetime of several methods of implementing a selection element;

[0033] [Fig.9] [Fig.9] is a schematic and partial cross-sectional view of another mode of production of a selection element at the end of a manufacturing step; and

[0034] [Fig. 10] the [Fig. 10] represents another embodiment of a selection element. Description of the implementation methods

[0035] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0036] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0037] Unless otherwise specified, when referring to two elements connected between them, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or linked via one or more other elements.

[0038] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0039] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0040] The [Fig. 1] is a schematic and partial cross-sectional view of an embodiment of a selection element 50.

[0041] The selection element 50 comprises a first electrode 52, or lower electrode. In the example of [Fig. 1], the electrode 52 is a conductive layer. In this example, the electrode 52 is in contact with a conductive via 104. The via 104 connects the electrode to a potential application node. The conductive via 104 is surrounded by an insulating layer 106. The thickness of the layer 106 is such that the upper face, or end, of the via 104 is coplanar with the upper face of the insulating layer 106. The conductive layer constituting the electrode 52 rests on the upper face of the via and on the upper face of the insulating layer 106.

[0042] The selection element 50 comprises a region 108. The region 108 comprises a first portion 110. After an initialization, or "firing," step, which will be described in more detail later, the region 108 further comprises a second portion 112. Before the "firing" step is performed, for example before the first use of the element, the region 108 comprises only the first portion 110.

[0043] The first portion 110 comprises a stack of layers, preferably all of amorphous materials. Region 108 is located on electrode 52. Thus, the lower layer of the stack 110 covers electrode 52. The layers of the stack are preferably made of chemical elements, or alloys of chemical elements, from groups 14, 15 or 16 of the periodic table of elements, according to the classification of the International Union of Pure and Applied Chemistry (IUPAC).

[0044] Group 14 comprises carbon (C), silicon (Si), germanium (Ge), tin (Sn), lead (Pb), and flerovium (Fl). Group 15 comprises nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), and moscovium (Mc). Group 16 comprises oxygen (O), sulfur (S), selenium (Se), tellurium (Te), polonium (Po), and livermorium (Lv).

[0045] Each layer of the stack 110 is made of a material preferably having pro stoichiometric or substantially stoichiometric portions. Preferably, at least some layers of the 110 stack, preferably all layers of the 110 stack, comprise: - an alloy comprising an element from group 15 and an element from group 16; or - an element from group 14 alone or doped, for example doped with nitrogen, oxygen or carbon; or - an alloy comprising an element from group 14 and an element from group 16.

[0046] The alloys of the layers of the stack 110 are, for example, materials chosen from the following list: GeSe2, GeSe, As2Te3, Sb2Se3, As2Se3, N-doped or undoped Ge, GeS2, GeS, Sb2S3, As2S3. The alloys of the layers of the stack 110 can, for example, be doped, for example with nitrogen, oxygen or carbon.

[0047] The stack 110 comprises, for example, an alternation of first and second layers, the first and second layers being made of different materials. Preferably, the stack comprises only the first and second layers. Preferably, the first layers are, for example, made of an alloy comprising an element from group 15 and an element from group 16. The second layers are preferably made of an alloy comprising an element from group 14 and an element from group 16, or of an element from group 14 alone or doped, for example doped with nitrogen, oxygen, or carbon.

[0048] The first layers are preferably made of an antimony-selenium (SbSe) alloy, and the second layers are preferably made of a germanium-nitrogen material, for example nitrogen-doped germanium (GeN). For example, the second layers are made of a material that is not a phase-change material.

[0049] Each of the layers of the stack 110 has a thickness less than or equal to approximately 20 nm, for example less than or equal to 5 nm. For example, each layer of the stack has a thickness greater than 1 nm.

[0050] For example, the thicknesses of the first layers, denoted A, and of the second layers, denoted B, can be determined within the range mentioned above by solving the following equations:

[0051] [Math.l] t=(n a ^ + n b %)

[0052] [Math.2]

[0053] [Math.3]

[0054] where T is the total thickness of the stack 110, tA is the thickness of a layer A, tB is the thickness of a layer B, NA is the number of layers A, NB is the number of layers B (e.g., equal to the number of layers A), PA is the volume proportion (in %) of the material of layers A in the whole stack, PB is the volume proportion (in %) of the material of layers B in the whole stack.

[0055] More generally, the stack comprises at least two sets of layers, each set including layers made of a material different from the materials of the layers in the other sets. Preferably, all the layers in a given set are made of the same material. The layers in a given set may have different doping levels. Preferably, all the layers in a given set are doped with the same dopants. However, according to one embodiment, some layers in a given set may, for example, be doped with different dopants.

[0056] The first and second portions 110 and 112 can be separated by a skin 114 made of one of the chemical elements of the stack 110. Preferably, the skin 114 is made of a single material. The skin extends over the height of at least two layers of the stack 110. The skin 114 is, for example, entirely made of an alloy constituting one of the layers. For example, if the stack 110 comprises layers of GeN and SbSe, the skin 114 can be made of germanium.

[0057] The second portion 112, resulting from the fusion of layers of the stack 110 as will be described later, is in contact with the upper face of the layer 106 and the upper face of the electrode 52.

[0058] In the example of [Fig. 1], the second portion extends over the entire height of the stack. More generally, the second portion passes through at least some layers of the stack 110. Preferably, the second portion passes through at least two layers of the stack.

[0059] The second portion 112 is made of an alloy of at least some of the chemical elements and / or alloys of chemical elements of the layers of the stack 110. Preferably, the second portion is made of a single homogeneous material. Preferably, the material forming the second portion comprises all the chemical elements constituting the layers of the stack. The second portion 112 is made of a phase-change material. Preferably, the second portion is, for example, made of a material that is amorphous during its use. The second portion 112 is, for example, made of a material having non-stoichiometric proportions. The second portion 112 is, for example, made of an alloy of germanium, selenium, antimony, and nitrogen (GeSeSbN).

[0060] A conductive layer 109 rests on the region 108. The conductive layer 109 forms a second electrode of the selection element, or upper electrode. Preferably, the second portion extends from one electrode to the other.

[0061] During operation of the selection element, a voltage is applied between electrodes 52 and 109. If the applied voltage is greater than a threshold voltage, the selection element behaves similarly to a closed switch.

[0062] Experiments have shown that, from a macroscopic point of view, i.e. considering the whole stack as a single element, the stack of layers has an electrical behavior similar to a solid block in an alloy comprising all the chemical elements of the layers of the stack.

[0063] However, the components of a solid block of an alloy that do not have stoichiometric proportions tend to recompose into stoichiometric elements, particularly when subjected to the relatively high temperatures of manufacturing processes. This is the phenomenon of phase separation and the potential subsequent crystallization of these phases. This recomposition leads to variability between otherwise substantially identical selection elements. The described embodiments, which already include layers having stoichiometric proportions, are less prone to such recomposition.

[0064] Similar results are observed for stacks comprising layers of materials previously mentioned.

[0065] Such results cannot be observed for layer stacks with thicknesses greater than 20 nm. Indeed, at the interfaces between two layers, the chemical elements of the two layers form connections, possibly alloys, in the same way as if the different chemical elements were combined in a solid block. The thicknesses considered for the layers of the stacks in the described embodiments allow a sufficient portion of each layer to be subject to this phenomenon so that, from a macroscopic point of view, the stack behaves essentially like a solid block.

[0066] Figure 2 represents an embodiment of a memory cell 200 comprising a selection element 100. The memory cell 200 further comprises a storage element 202. In the example of Figure 2, the storage element is a phase-change storage element. The storage element 202 therefore comprises a layer, or a stack of layers, 204, made of a phase-change material.

[0067] The memory cell 200 comprises a first electrode 102, or lower electrode. In the example of [Fig. 2], the electrode 102 is located on the conductive via 104. The electrode 102 is, for example, a resistive element. The electrode 102 has, for example, an L-shaped cross-section, the horizontal part of which is in contact with the via conductor 104. The electrode 102 and the via conductor 104 are surrounded by the insulating layer 106. The thickness of the layer 106 is such that the upper face or end of the vertical part of the electrode 102 is coplanar with the upper face of the insulating layer 106.

[0068] The memory element 202 rests on the upper face of the insulating layer 106 and on the upper face of the vertical part of the electrode 102. The electrode 102 can thus heat the material of the memory element so as to change its phase, and thus program the memory cell.

[0069] The selection element 100 is preferably located on the storage element 202. Alternatively, the position of the storage element and the position of the selection element may be reversed. Thus, the selection element may be located in contact with the electrode 102 and be covered by the storage element.

[0070] The selection element 100 comprises, like the selection element 50 of [Fig.1], the region 108. The region 108 comprises, as before, the portion 110, the portion 112 and the skin 114.

[0071] The selection element 100 is, for example, separated from the storage element 202 by an interface layer 206. The interface layer is preferably a conductive layer, for example, a metallic layer. The interface layer 206 is, for example, an electrode connected to a voltage application node. The interface layer covers, for example, the upper face of the storage element and is, for example, covered by the selection element. The interface layer ensures that changes in the composition of the storage element or the selection element do not affect the other element. For example, the interface layer ensures that the crystallization of the storage element does not cause, even partially, the crystallization of the selection element.

[0072] During the operation of the memory cell, a voltage is applied between electrodes 102 and 109. If the applied voltage exceeds a threshold voltage, the selection element behaves similarly to a closed switch. A current can therefore flow through the storage element and the selection element, so as to program or read the memory cell.

[0073] Figure 3 illustrates the operation of the selection element 50 of Figure 1; the operation of the selection element 100 of Figure 2 is identical. Figure 3 represents the characteristic of the selection element 50, that is, the current I flowing through the selection element as a function of the voltage V across the selection element, i.e., between electrodes 52 and 109.

[0074] The selection element takes a first state in which the current I flowing through the selection element is low and, for example, substantially constant. The current in the first state is, for example, substantially equal to 0. The resistivity of the stack is The high voltage, similar to that of the second portion, prevents current from flowing from one electrode to the other, for example, to a component connected in series with the selection element, such as a memory chip. This state is represented by curve portion 115. This first state is associated with low voltage values ​​V, that is, values ​​lower than V2.

[0075] When the selection element is in the first state and the voltage V reaches the value V2, the selection element enters a second state, represented by a portion of curve 117, after a short passage in a first intermediate state represented by a portion of curve 119. The first intermediate state corresponds to a current jump, that is to say that the gradient of the portion of curve 119 is high.

[0076] When the selection element enters the second state, the current I is equal to a current value II. Furthermore, the current I is, for example, a linear function of the voltage V. Thus, in the second state, the current increases as the voltage increases. In this state, the resistivity of the second portion 112 is reduced, allowing current to flow from one electrode to the other, for example, to a component connected in series with the selection element, such as a memory chip.

[0077] To exit the second state and return to the first state, the voltage is decreased until it reaches a value VI, for example, lower than the voltage V2, corresponding to a current value of 12. When the voltage V1 is reached, the selection element enters a second intermediate state represented by a portion of curve 121 and then returns to the first state. The second intermediate state corresponds to another current jump, i.e., the gradient of the portion of curve 121 is steep.

[0078] The behavior of the selection element is similar to the behavior of a switch. Indeed, the selection element comprises two main states, a first state (open switch) in which no current flows through the selection element or in which only a small noise current flows through the selection element, and a second state (closed switch) in which a current flows.

[0079] Preferably, region 108 is not subjected, during its operation as a selection element, to sufficiently high stresses to cause crystallization of the region. Thus, in the second state, the second portion is preferably in a state that is at least partially amorphous, and preferably entirely amorphous.

[0080] Figure 4 is a graph representing the bonds present between components in selection elements such as that of Figure 1. More specifically, Figure 3 represents the absorption spectrum (NA) as a function of wavelength (L(cm⁻¹)) for several selection elements during the deposition (AS DEP) of the selection element layers and after heating the selection elements to 400 °C.

[0081] The absorption spectrum corresponds to the spectrum obtained (in cm1) by Fourier transform infrared spectroscopy. The higher the absorbance value at a given wavelength, the greater the number of bonds corresponding to that wavelength.

[0082] Curves 124a and 124b correspond to a selection element in which the first and second portions 110 and 112 are replaced by a massive block ("bulk") of the material forming the second portion 112, respectively during the deposition (AS DEP) of the layers of the stack 110 and for heating the selection element to 400 °C.

[0083] Curves 126a and 126b correspond, respectively during the deposition (AS DEP) of the layers of the stack 110 and during the heating of the selection elements at 400 °C, to a selection element in which the first layers are made of SbSe and the second layers are made of GeN. In this example, each first layer of the stack 110 has a thickness approximately equal to 6 nm, and each second layer has a thickness approximately equal to 1 nm.

[0084] Curves 128a and 128b correspond, respectively during the deposition (AS DEP) of the layers of the stack 110 and during the heating of the selection elements at 400 °C, to a selection element in which the first layers are made of SbSe and the second layers are made of GeN. In this example, each first layer of the stack 110 has a thickness approximately equal to 5 nm, and each second layer has a thickness approximately equal to 1.5 nm.

[0085] Curves 130a and 130b correspond, respectively during the deposition (AS DEP) of the layers of the stack 110 and during the heating of the selection elements at 400 °C, to a selection element in which the first layers are made of SbSe and the second layers are made of GeN. In this example, each first layer of the stack 110 has a thickness approximately equal to 6 nm, and each second layer has a thickness approximately equal to 2 nm.

[0086] Curves 124, 126, 128 and 130 have been normalized with respect to the number of Sb-Se bonds in one of the curves.

[0087] During deposition, curves 126a, 128a, and 130a each show the presence, by means of a peak at the corresponding wavelength, of SbSe and GeN bonds. These bonds are the bonds in the corresponding SbSe and GeN layers. Curves 126, 128, and 130 also show a peak at the wavelength corresponding to Ge-Se bonds. The Ge-Se bonds are formed at the interfaces between the GeN and SbSe layers. Indeed, as mentioned previously, for layers with a thickness of less than 20 nm, the chemical elements of the two layers form bonds, possibly alloys, at the layer interfaces, in the same way as if the different chemical elements were combined in a solid block.

[0088] Curve 124a exhibits peaks at the wavelengths corresponding to Sb-Se, Ge-Se and Ge-N bonds, like curves 126a, 128a, and 130a. However, the peak corresponding to Ge-N bonds in curve 124a is substantially twice as large as the peak corresponding to Sb-Se bonds.

[0089] When the selection elements are heated to 400°C, curves 124b, 126b, 128b, and 130b always include peaks at the Sb-Se, Ge-Se and Ge-N bond levels.

[0090] The presence of Ge-Se bonds results in high resistivity of the stack 110 in the first state. This ensures a first state with behavior similar to that of an open switch. Thus, the presence of Ge-Se bonds increases the resistivity of the stack 110. However, the presence of Ge-Se bonds can also lead to an increase in the threshold value (V2 in [Fig. 2]).

[0091] The presence of antimony (Sb) reduces the yield stress compared to an element comprising a bulk GeSe block in place of region 108. This reduction in yield stress is caused at least partially by the formation of Se-Sb bonds. However, the presence of antimony (Sb) can lead to destabilization of the material in the second portion. Thus, the presence of antimony (Sb) can, for example, increase the risk of crystallization of part of the stack, particularly the SeSb layers, during the fabrication steps of the device comprising the selection element.

[0092] The presence of nitrogen (N) helps to stabilize the behavior of the stacking and allows, for example, to delay crystallization.

[0093] More generally, the different components can be replaced by components from the same groups, as previously described, in order to obtain similar behaviors.

[0094] Figure 5 illustrates examples of bond number comparisons in Figure 4. In particular, Figure 5 represents, on the one hand, the ratio of the number of Ge-Se bonds to the number of Sb-Se bonds, and on the other hand, the number of Ge-Se bonds to the number of Ge-N bonds, during deposition and when the selection elements are heated to 400°C. The ratios are obtained for cases where the layers of the stack 110 have a thickness substantially equal to that described for curves 130 (ML-A), for curves 128 (ML-B) and for curves 126 (ML-C) in Figure 3.

[0095] It is observed that increasing the thickness of the layers leads to a decrease in the number of Ge-Se bonds, relative to the number of Sb-Se bonds and relative to the number of Ge-N bonds. Indeed, as the thickness increases, the proportion of interfaces between the layers, where the Ge-Se bonds form, decreases relative to the volume of the layers, where the Sb-Se and Ge-N bonds are located.

[0096] From a thickness value, for example above 20 nm, the quantity of bonds formed at the interfaces is too small for the macroscopic behavior of the 110 stack to correspond to the behavior of a massive block, as described in relation to [Fig.3].

[0097] Figure 6 schematically and partially represents a structure obtained after the fabrication of the memory cell of Figure 2. Figure 7 schematically and partially represents a structure obtained after the initialization or "firing" of the memory cell of Figure 2. The structure of [Fig.6] is obtained after steps including: - the formation of the insulating layer 106; - the formation of the via conductor 104; - the formation of electrode 102; - the formation of the memory element 202, including for example the formation of the phase-change layer or stack of layers 204; - the formation of the interface layer 206; - the formation of the 110 stack on the upper face of the insulating layer 106 and on the upper face of the vertical part of the resistive element 102. The stack 110 may comprise any number of layers, each layer having a thickness less than or equal to 20 nm, for example less than or equal to 5 nm; and - the formation of the conductive layer 109, covering the upper layer of the stack 110.

[0098] The layers of the stack are for example formed one by one by physical vapor deposition (PVD).

[0099] The structure of [Fig. 7] is obtained by passing a high current pulse between electrodes 102 and 109, which causes an increase in the temperature of region 108. The temperature of electrode 102 then becomes sufficient for the stack 110 to undergo an initialization stage, also called "firing," during which the second portion 112 is formed from the heated parts of the stack layers. The skin 114 can form at this stage.

[0100] The manufacturing process of the selection element of [Fig.1] is easily deducible from the process described above.

[0101] Figure 8 shows voltage (V) dispersions over the lifetime of several embodiments of the selection element. More specifically, Figure 8 shows the dispersions of the firing voltage (Vfire), the threshold voltage after 10,000 cycles (V*4), and the threshold voltage after 100,000,000 cycles (Vths). These voltages are shown for cases where the layers of the stack 110 have a thickness substantially equal to that described for curves 130 (ML-A), for curves 128 (ML-B), and for curves 126 (ML-C) in [Fig. 4], and for the case where the stack is replaced by a solid block (SSGN). By dispersion, we mean the range of values ​​that can be taken by the associated voltage. This dispersion is obtained, for example, by measuring said voltage for a large number of selection elements formed in the same way. By a cycle, we mean the energizing of the selection element so as to transition to the second state and then back to the first state.

[0102] The "firing" voltage corresponds to the voltage used to form the second portion in the stack 110. The threshold voltage corresponds to the voltage at which the selection element changes from the first state to the second state (V2 in [Fig.3]), i.e. the minimum voltage that must be applied to the selection element for it to behave similarly to a closed switch.

[0103] It is observed that the dispersion of the firing stress is low in all cases. Furthermore, it is observed that the firing stress is greater when the stack is replaced by a layer of solid material than in other cases. Moreover, the thicker the layers of the stack, the lower the firing stress.

[0104] Furthermore, it is observed that the dispersions of the threshold voltages Vth4 and Vths are much lower in cases involving a 110 stack, compared to the case where the stack is replaced by a solid block. Moreover, the thicker the layers of the stack, the lower the threshold voltage.

[0105] Figure 9 represents an embodiment of a selection element 300. The selection element comprises, as described in relation to Figure 2, the insulating layer 106, the conductive via 104, and the first electrode 102. The selection element comprises, as in Figure 1, the region 108, i.e., the first and second portions 110 and 112 as well as the skin 114. In this embodiment, the region 108 rests on the layer 106 and on the electrode 102, for example, on the upper face of the vertical portion of the electrode 102. More precisely, the electrode 102 is in contact with the second portion 112.

[0106] The [Fig. 10] is a schematic and partial cross-sectional view of another embodiment of a selection element.

[0107] More specifically, [Fig. 10] represents a structure at the same manufacturing stage as the structure of [Fig. 6], during the manufacture of a selection element. The structure of [Fig. 10] therefore includes all the elements of [Fig. 6], with the exception of the memory element 202 and the interface layer 206. In this example, the lower electrode is electrode 102, which has an L-shape. However, electrode 102 could be replaced by electrode 52 of [Fig. 1].

[0108] The stacking 110 of the embodiment of [Fig. 10] comprises layers 120 and 122. Layers 120 (hatched layers) are doped, and layers 122 are undoped. The doping of layers 120 is preferably carried out layer by layer during stack formation. This allows for precise control of the doping within the stack.

[0109] The 120 layers are for example doped with one or more dopants from nitrogen, carbon and silicon.

[0110] Layers 120 are, for example, layers of nitrogen-doped germanium, and layers 122 are, for example, an antimony-selenium alloy. In this example, the layers 120 are doped in substantially the same way.

[0111] As an alternative, the stack may comprise several sets of layers made of different materials, each set being doped or undoped. For example, the upper part of the stack 110 may be doped with carbon, so as to reduce the risk of interdiffusion between the material of layer 109 and the material of the upper layer of the stack 110, and the lower part may be doped with nitrogen so as to increase the crystallization temperature.

[0112] Such layer-by-layer doping has the advantage of allowing the interaction of the dopants with some elements of the stack but not with all, while maintaining a stack whose macroscopic behavior is uniform.

[0113] By way of alternative, the stack may comprise at least one set of layers whose doping is gradual. For example, the doping may increase between the layer of said set closest to the lowest layer of the stack and the layer of said set closest to the highest layer of the stack. For example, the doping of a set of layers may not be linear. Thus, over the height of the stack, the doping of this set of layers may increase and then decrease, or vice versa.

[0114] Such gradual doping has the advantage of allowing, for example, the modulation of the resistivity of the phase change material over its height.

[0115] More generally, a selection element such as that described herein can be used in a type of memory other than a phase-change memory as described. Furthermore, the selection element can be located differently relative to the storage element. For example, a selection element such as that described can be located at the end of each row or column of a memory cell matrix.

[0116] One advantage of the embodiments described is that the types of doping described in relation to [Fig.4] cannot be obtained by co-spraying with a standard deposition technique or by ion implantation.

[0117] One advantage of the embodiments described is that the manufacturing process This does not introduce variability between different memory elements formed simultaneously. Therefore, the memory elements of the same memory device can be in the same state at initialization, which allows for increased memory efficiency.

[0118] Another advantage of the described embodiments is that the amorphous layers of the first portion 110 form a thermal insulator. Indeed, chemical elements in their amorphous state conduct heat less well than in their crystalline state. This thus prevents the propagation of heat from one element to a neighboring element.

[0119] Another advantage is that the firing voltage is lower than that of a selection element comprising a solid block. The manufacture of selection elements as described is therefore less energy-intensive, particularly in devices comprising several dozen or even several thousand selection elements.

[0120] Another advantage is that the threshold voltage from which the selection element changes from the first state to the second state has a lower dispersion than in the case of a selection element comprising a solid block.

[0121] Another advantage is that it is possible to configure, and optimize, electrical characteristics of the selection element, using the physical characteristics of the layer stacking, for example the number of layers, the thicknesses of the layers, the materials of the layers, their doping, etc.

[0122] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to those skilled in the art. In particular, although the lower electrode is described in some embodiments as having an L-shaped cross-section, it is understood that the electrode may have another shape. For example, the electrode may be a conductive layer in contact with the lower layer of the stack 110.

[0123] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Selection element (50, 100, 300) comprising, in a first portion (110), a stack (110) of amorphous layers, the thickness of each layer of the stack being less than or equal to 20 nm, at least one of the layers of the stack (110) comprising an element of group 16.

2. Element according to claim 1, wherein the stacking (110) comprises at least one set of first layers and one set of second layers, the first and second layers being made of different materials.

3. An element according to claim 2, wherein the first layers are made of an alloy comprising an element of group 15 and an element of group 16, and wherein the second layers are made of: - an element of group 14 alone or doped, for example doped with nitrogen, oxygen or carbon; or - an alloy comprising an element of group 14 and an element of group 16.

4. Element according to claim 2 or 3, wherein the stacking (110) comprises an alternation of first and second layers.

5. An element according to any one of claims 2 to 4, wherein the first layers are made of a nitrogen-doped germanium alloy, and the second layers are made of an antimony-selenium alloy.

6. Element according to any one of claims 1 to 5, wherein the material of each layer of the stack (110) has stoichiometric proportions.

7. An element according to any one of claims 1 to 6, comprising a second portion (112) passing through at least some layers of the stack (110), made of an alloy of at least some of the components of the layers of the stack (110).

8. Element according to claim 7, comprising an electrode (52, 102) in contact with the second portion (112).

9. Element according to any one of claims 1 to 8, wherein layers (120) of a set of layers of the stack (110) are doped.

10. An element according to claim 9, wherein the layers of the layer set (120) are doped with one or more dopants from nitrogen, carbon and silicon.

11. Memory device (200) comprising a memory element (202) electrically arranged in series with a selection element defined according to any one of claims 1 to 10.

12. Method of manufacturing a selection element (100) comprising the formation of a stack (110) of amorphous layers, the thickness of each layer being less than or equal to 20 nm, at least one of the layers of the stack (110) comprising an element of group 16.

13. A method according to claim 12, comprising a step in which a current pulse is sent through the stack (110) of layers, so as to form a portion comprising an alloy of at least some of the components of the layers of the stack (110).

14. A method according to claim 12 or 13, comprising a step of manufacturing a lower electrode (52, 102) and manufacturing an upper electrode (109).

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