A method for manufacturing a piezoelectric structure for a radio frequency device and which can be used for transferring a piezoelectric layer, and a method for transferring such a piezoelectric layer.

Abstract

A method for manufacturing a piezoelectric structure (10) for a radio frequency device, said method being characterized in that it comprises supplying a piezoelectric material substrate (20), supplying a support substrate (100), supplying a dielectric bonding layer (1001) onto the piezoelectric material substrate (20), an assembly step (1') of the piezoelectric material substrate (20) onto the support substrate (100) via the dielectric bonding layer (1001), and a thinning step (2') to form the piezoelectric structure (10) consisting of a layer of piezoelectric material (200) bonded to a support substrate (100) via the dielectric bonding layer (1001). Figure 1

Description

Title of the invention: Method for manufacturing a piezoelectric structure for a radio frequency device and suitable for transferring a piezoelectric layer, and method for transferring such a piezoelectric layer FIELD OF INVENTION

[0001] The present invention relates to a method for manufacturing a piezoelectric structure for a radio frequency device and which can be used for the transfer of a piezoelectric layer, and a method for transferring such a piezoelectric layer. STATE OF THE ART

[0002] It is known to manufacture a radio frequency (RF) device, such as a resonator or filter, on a substrate comprising successively, from its base to its surface, a support substrate, generally in a material such as silicon or sapphire, an intermediate bonding layer and a piezoelectric layer.

[0003] Surface Acoustic Wave (SAW) filters typically comprise a piezoelectric layer and two electrodes in the form of two interlocking metal combs deposited on the surface of said piezoelectric layer. Depending on the SAW filter's operation, the thickness of the piezoelectric layer can range from a few tens of nanometers to several tens of micrometers. For the latter, there are parasitic propagation modes that extend through the thickness of the piezoelectric layer and are susceptible to reflection at the interface with the underlying substrate. This phenomenon is called "rattle." To avoid these parasitic modes, it is known to make the surface of the piezoelectric layer at the interface with the intermediate bonding layer sufficiently rough to allow reflection of the parasitic waves in all directions.Given the considered operating wavelength of the resonator, the roughness of the rough surface of the piezoelectric layer is very high, on the order of the same magnitude as the operating wavelength (a few pm).

[0004] The piezoelectric layer is typically obtained by transferring a thick substrate of a piezoelectric material (for example, obtained by cutting an ingot) onto a support substrate. The support substrate is, for example, a silicon substrate.

[0005] The transfer of the piezoelectric layer involves bonding the thick piezoelectric substrate to the support substrate, followed by thinning the thick piezoelectric substrate, so as to leave on the support substrate only a thin piezoelectric layer, of the thickness desired for the manufacture of the RF device.

[0006] For good adhesion of the piezoelectric substrate to the support substrate, a layer of oxide (for example a silicon oxide SiO2) is generally deposited on each of the two substrates, and the said substrates are glued by means of said oxide layers.

[0007] On the one hand, the piezoelectric material and the substrate support material have very different coefficients of thermal expansion, the implementation of such annealing causes significant deformation of the assembly.

[0008] On the other hand, the deposition of an oxide layer on the thick piezoelectric substrate causes a significant curvature ("bow" according to Anglo-Saxon terminology) of said piezoelectric substrate, which is not very compatible with the subsequent steps of the process, which are adapted to flat substrates.

[0009] Finally, as mentioned above, the heterostructure cannot be subjected to consolidation annealing due to the differences in coefficients of thermal expansion between the thick piezoelectric substrate and the handling substrate. However, without consolidation annealing, the bonding energy of the oxide layers of the two substrates remains very low, resulting in insufficient mechanical strength of the donor pseudo-substrate. Consequently, failure at the bonding interface can occur during the thinning step of the thick piezoelectric substrate.

[0010] To ensure good adhesion between the thick piezoelectric substrate and the support substrate, particularly in the case where the thick piezoelectric substrate has significant roughness, the current process requires a large number of steps such as the deposition of several layers of oxide followed by chemical mechanical polishing (CMP) of said layers of oxide, said layers of oxide being deposited alternately on both faces of the thick piezoelectric substrate in order to avoid a significant bow making bonding impossible. DESCRIPTION OF THE INVENTION

[0011] The present invention aims to overcome these limitations of the prior art by proposing a method for manufacturing a piezoelectric structure for a radio frequency device, which can also be used for transferring a piezoelectric layer, and a method for transferring such a piezoelectric layer.

[0012] The invention relates to a method for manufacturing a piezoelectric structure for a radio frequency device, said method being characterized in that it comprises providing a piezoelectric material substrate, providing a support substrate, providing a dielectric bonding layer on the piezoelectric material substrate, a step of assembling the piezoelectric material substrate onto the support substrate via the dielectric bonding layer, and a thinning step to form the piezoelectric structure consisting of a layer of piezoelectric material assembled to a support substrate via the dielectric bonding layer.

[0013] In embodiments the dielectric bonding layer comprises a silicon oxide layer deposited on the piezoelectric material substrate by plasma-assisted chemical vapor deposition.

[0014] In embodiments the assembly step includes molecular bonding between the dielectric bonding layer and the support substrate.

[0015] In embodiments the piezoelectric material substrate has a rough surface adapted to reflect a radio frequency wave.

[0016] In embodiments the thickness of the dielectric bonding layer is between 200 nm and 500 nm.

[0017] In embodiments the support substrate further includes a trapping layer intended to be assembled to the dielectric bonding layer.

[0018] In some embodiments the trapping layer is polycrystalline silicon.

[0019] In some embodiments, the trapping layer is obtained by implantation heavy species such as argon.

[0020] In embodiments the thinning step (2') includes etching and / or mechano-chemical polishing.

[0021] The invention also relates to a method for transferring a piezoelectric layer onto a final substrate, comprising the provision of a piezoelectric structure obtained by implementing the manufacturing process according to any one of the preceding claims, the formation of a weakening zone in the layer of piezoelectric material so as to delimit the piezoelectric layer to be transferred, the provision of the final substrate, an assembly step by gluing the layer of piezoelectric material onto the final substrate, a detachment step comprising the fracturing and separation of the piezoelectric structure along the weakening zone.

[0022] In embodiments the formation of the embrittlement zone is carried out by implantation of atomic species in the layer of piezoelectric material.

[0023] In embodiments the final substrate and the support substrate have identical coefficients of expansion. DESCRIPTION OF THE FIGURES

[0024] Other features and advantages of the invention will be better understood upon reading the detailed description that follows, with reference to the accompanying drawings in which:

[0025] [Fig.1] Fig.1 illustrates a manufacturing process according to an embodiment of the invention and a substrate according to this embodiment of the invention;

[0026] [Fig.2] Fig.2 illustrates a transfer process according to one embodiment of the invention;

[0027] To improve the readability of the figures, the different layers are not necessarily represented to scale. DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0028] Figure 1 illustrates a support substrate 100, preferably of silicon material, onto which a layer of piezoelectric material 200 is transferred, preferably a single-crystal piezoelectric material, more particularly lithium tantalate or lithium niobate. Other materials for the piezoelectric material layer 200 may be considered. The active layer 200 to be transferred may also comprise a ferroelectric material, for example LiTaO3, LiNbO3, LiA1O3, BaTiO3, PbZrTiO3, KNbO3, BaZrO3, CaTiO3, PbTiO3, or KTaO3.

[0029] The donor substrate comprising this active layer may be in the form of a circular wafer of standardized dimensions, for example, 150 mm or 200 mm in diameter. However, the invention is in no way limited to these dimensions or this shape. The donor substrate may have been taken from an ingot of ferroelectric material, this taking having been carried out in such a way that the donor substrate has a predetermined crystal orientation, or the donor substrate may comprise a layer of ferroelectric material bonded to a support substrate. The crystalline orientation of the active layer of ferroelectric material to be transferred is chosen according to the intended application. For example, with LiTaO3, an orientation between 30° and 60°XY, or between 40° and 50°XY, is commonly chosen, particularly when the thin film's properties are to be exploited to form a SAW filter. For LiNbO3, an orientation around 128°XY is commonly chosen. However, the invention is not limited to any particular crystalline orientation.

[0030] Regardless of the crystalline orientation of the ferroelectric material of the donor substrate, the process includes, for example, the introduction of hydrogen and / or helium species (ions and / or atoms) into this donor substrate. This introduction may, for example, correspond to hydrogen implantation, that is, ion bombardment of the flat face of the donor substrate with hydrogen. In a manner known per se, the implanted ions aim to form a weakening plane delimiting a first layer of ferroelectric material to be transferred, located on the face side, and another part forming the remainder of the substrate. The nature and dose of the implanted species, the type of implanted ions, and the implantation energy are chosen according to the thickness of the layer to be transferred and the physicochemical properties of the donor substrate.In the case of a LiTaO3 donor substrate, it will be possible to choose to implant a dose of hydrogen between 1xlO16 and 5xlO17 at / cm2 with an energy between 30 and 300 keV to delimit a first layer of the order of 10 to 2000 nm.

[0031] The silicon support substrate 100 can also be replaced by a support substrate 100 made of sapphire, polycrystalline aluminum nitride (AIN), glass, or any other material having a coefficient of thermal expansion lower than or opposite to the coefficient of thermal expansion of the piezoelectric material of the piezoelectric material layer 200 (in the present invention, we are interested in the coefficient of thermal expansion in a plane parallel to the main surface of the substrates). Thus, the support substrate 100 acts as a stiffener that limits the expansion of the piezoelectric structure 10 during temperature variations to which it is subjected, thereby reducing the thermal frequency coefficient of the piezoelectric material layer 200, that is, the extent to which the frequency of a wave propagating in the piezoelectric material layer 200 varies with temperature.Silicon is particularly preferred because it allows for the addition of features enabling electrical insulation for RF applications resulting from the addition of a trapping layer on the surface.

[0032] The use of silicon has the advantage of expanding the application range of piezoelectric material films not only to large-scale equipment such as 300 mm but also to the microelectronics industry, for which the requirements in terms of acceptance on the production line of exotic materials other than silicon, particularly lithium tantalate or lithium niobate, are high. It is thus also possible to consider integrating components obtained or fabricated in the ferroelectric or piezoelectric material layer, such as SAW and / or BAW filters, with components obtained or formed in the silicon substrate, such as transistors, power amplifiers, or network switches, thereby reducing losses in the interconnections between different types of components and making such a system integrating several components more compact.

[0033] Figure 1 schematically represents the assembly step 1' of a piezoelectric material substrate 20 onto the support substrate 100, preferably made of silicon. The assembly step 1' of the piezoelectric material substrate 20 onto the support substrate 100, preferably made of silicon, is preferably carried out by a molecular adhesion step. This molecular adhesion step includes a bonding step, preferably at room temperature, and may be followed by a consolidation annealing of the bonded interface.

[0034] The formation of a dielectric adhesive layer 1001 on the face of the piezoelectric material substrate 20, intended to be assembled onto the support substrate 100, is also schematically represented. Non-limitingly, such a dielectric adhesive layer 1001 can be deposited on only one face of the piezoelectric material substrate 20. This deposition could thus be carried out at a temperature in less than or equal to 300 °C. Generally, the deposition temperature of the dielectric bonding layer 1001 is chosen such that the bow deformation induced by the difference in coefficient of thermal expansion between the piezoelectric material substrate 20 and the dielectric bonding layer 1001 remains compatible with a molecular bonding step, with the entire piezoelectric material substrate 20 and the dielectric bonding layer 1001 exhibiting a curvature less than or equal to 100 pm. The thickness of the dielectric bonding layer 1001 must be taken into account. Over the considered thickness range of 200 nm to 500 nm, a deposition temperature less than or equal to 300 °C shows good results.It was observed that not only does the curvature (80 to 90 pm for a 500 nm thickness of the dielectric bonding layer 1001) remain below the threshold value compatible with molecular bonding (approximately 100 pm), but also that the nature of the dielectric bonding layer 1001 is such that the bonding energy obtained between the dielectric bonding layer 1001 and the support substrate 100 is enhanced. Another embodiment may involve depositing dielectric bonding layers on both faces of the piezoelectric material substrate, either simultaneously or successively, such that the bow of the entire assembly of the two dielectric bonding layers with the piezoelectric material substrate 20 remains compatible with molecular bonding as mentioned above.It was surprisingly observed that the bonding energies are higher when molecular bonding occurs directly between the dielectric bonding layer 1001 and the support substrate 100, without the presence of a dielectric bonding layer on this support substrate 100, as is known from the prior art. The bonding energies can thus reach high values ​​exceeding IJ / m². These energies are sufficiently high to allow for stable mechanical strength during subsequent steps such as thinning or consolidation annealing.

[0035] The molecular adhesion step is preferably carried out at room temperature, approximately 20 °C. However, it is possible to perform this direct hot bonding at a temperature between 20 °C and 50 °C. Furthermore, the bonding step is advantageously carried out at low pressure, i.e., at a pressure less than or equal to 5 mTorr (1 Torr is exactly 101325 / 760 pascals, or approximately 133.322 Pa), which allows for the desorption of water from the surfaces forming the bonding interface. Performing the bonding step under vacuum further improves water desorption at the bonding interface.

[0036] In an advantageous embodiment, the piezoelectric material substrate 20 has a rough surface adapted to reflect a radio frequency wave. In this text, "rough surface" means a surface whose roughness is of of the same order of magnitude as the wavelength of the RF waves intended to propagate through the piezoelectric layer of the resonator or filter, so as to allow the reflection of parasitic waves in all directions so that they no longer contribute to the output signal of the resonator or filter in question. In the context of the present invention, the roughness of such a surface is between 1.0 and 1.8 pm measured peak-to-valley. To compensate for this roughness, the dielectric bonding layer 1001 has a thickness greater than the roughness; flatness is achieved by a chemical and / or mechanical etching step.

[0037] Preferably, the dielectric bonding layer 1001 comprises a silicon oxide layer deposited on the piezoelectric material substrate 20, preferably by plasma-assisted chemical vapor deposition.

[0038] According to another embodiment, the dielectric bonding layer 1001 is a silicon oxide layer, or a silicon nitride layer, or a layer comprising a combination of silicon nitride and silicon oxide, or a superposition of at least one oxide layer and one silicon nitride layer, preferably obtained by plasma-assisted chemical vapor deposition.

[0039] In an advantageous embodiment, a consolidation annealing of the bonding interface is performed to strengthen the mechanical strength of the piezoelectric structure. The consolidation annealing is normally carried out at temperatures less than or equal to 300 °C, for a duration ranging from a few minutes to several hours. In the case where the dielectric bonding layer 1001 is formed by low-temperature deposition, this annealing is carried out at a temperature lower than the deposition temperature of said dielectric bonding layer 1001, thus increasing the bonding energy without causing defects at the bonding interface due to the presence of any impurities (such as hydrogen) and their outgassing and migration towards this interface during such annealing.

[0040] As schematically represented in [Fig. 1], a thinning step 2' of the piezoelectric material substrate 20 follows after it has been assembled onto the support substrate 100. [Fig. 1] schematically represents the thinning step 2', which can be implemented, for example, by chemical and / or mechanical etching (polishing, grinding, milling, etc.). This allows the piezoelectric material layer 200 to be obtained. The thinning step can also consist of applying the SmartCut™ method. This method is schematically illustrated in Figure 2 and consists of creating a weakened zone in the layer to be transferred so as to delimit the layer to be transferred from the remaining layer of the substrate chosen for the transfer, providing a receiving substrate onto which the layer to be transferred is transferred, and an assembly step of the layer to be transferred onto the receiving substrate. Generally, the bonding process involves molecular bonding, followed by a detachment step that includes fracturing and separation along the weakened zone, thus forming a heterostructure comprising the layer to be transferred to the receiving substrate. The thinning step is generally carried out at a temperature below 300 °C, more specifically at room temperature. In the case where the dielectric bonding layer 1001 is formed by low-temperature deposition, the thinning step is generally carried out at a temperature lower than the deposition temperature of said dielectric bonding layer 1001. This avoids the presence of defects at the bonding interface mentioned above, which can be caused by the presence of impurities (such as hydrogen) and their outgassing and migration towards this interface during such a thinning step.

[0041] Figure 2 schematically represents an embodiment of a method for transferring a piezoelectric layer 200' onto a final substrate 300', comprising supplying a piezoelectric structure 10 (obtained according to the method schematically represented in Figure 1), noting that the invention is not limited to this embodiment), forming a weakening zone 0" in the piezoelectric material layer 200 so as to delimit the piezoelectric layer 200' to be transferred from the remaining layer 201 of the piezoelectric material layer 200, supplying the final substrate 300', a step of assembling the piezoelectric material layer 200 onto the final substrate 300', and a detachment step 2" which comprises fracturing and separating the piezoelectric structure 10' along the weakening zone, thus forming the heterostructure 30' including the piezoelectric layer 200' on the final substrate 300'.The detachment step is preferably carried out at a temperature below 300 °C or, in the case where the dielectric bonding layer 1001 is formed by low-temperature deposition, at a temperature lower than or equal to the deposition temperature of the dielectric bonding layer 1001, preferably at a temperature lower than or equal to 300 °C.

[0042] The assembly step 1” of the piezoelectric structure 10 onto the final substrate 300', preferably made of silicon material, is preferably carried out by a molecular adhesion step. This molecular adhesion step includes a bonding step, preferably at room temperature, and may be followed by a consolidation annealing of the bond interface.

[0043] For the transfer process schematically represented in [Fig. 2], the formation of the embrittlement zone 0” is carried out by implanting atomic species into the piezoelectric material layer 200. Generally, the implantation step 0” is performed with hydrogen ions. An interesting alternative, well known to those skilled in the art, consists of replacing all or part of the hydrogen ions with helium ions.

[0044] For a layer of lithium tantalate piezoelectric material 200, a hydrogen implantation dose will typically be between 6 x 10¹⁶ cm² and 1 x 10¹⁷ cm². The implantation energy will typically be between 50 and 170 keV. Thus, detachment typically occurs at temperatures between 150 and 300 °C. This results in piezoelectric layer thicknesses 200' on the order of 10 nm to 500 nm.

[0045] The final substrate 300' and the support substrate 100 may advantageously have an identical, or at least very similar, coefficient of thermal expansion, which allows for better mechanical strength and less deformation during bond interface consolidation annealing. The two substrates may be of identical composition, substantially made of silicon except for the dielectric bonding layers or any trapping layer that may be present. These latter layers are not thick enough to significantly influence the benefit of the "sandwich" structure having a final substrate 300' and a support substrate 100 of the same material.

[0046] Immediately after the detachment operation, additional technological steps are advantageously added in order to either strengthen the bonding interface, restore a good surface roughness, or repair any defects generated during the implantation step (or to prepare the surface for further process steps such as electrode formation for a SAW-type device, for example). These steps include, for example, polishing, chemical etching (wet or dry), annealing, and chemical cleaning. They can be used alone or in combination, as determined by those skilled in the art.

[0047] In advantageous embodiments, the support substrate 100 and / or the final substrate 300' may be a silicon substrate having an electrical resistivity greater than 1 kΩ·cm. This support substrate 100 and / or final substrate 300' may also include a charge-trapping layer disposed on the surface of this silicon substrate for assembly. The trapping layer may comprise undoped polycrystalline silicon. Under certain circumstances, and in particular when the trapping layer has a sufficient thickness, for example greater than 30 µm, the silicon base substrate may have a standard resistivity, less than 1 kΩ·cm. Generally, it is a non-crystalline layer exhibiting structural defects such as dislocations, grain boundaries, amorphous zones, gaps, inclusions, pores, etc.These structural defects create traps for charges that may circulate within the material, for example, at incomplete or dangling chemical bonds. This prevents conduction in the trapping layer, which consequently exhibits high resistivity. Advantageously, and for ease of implementation, this trapping layer is formed from a layer of polycrystalline silicon. Its thickness, particularly when formed on a silicon substrate... Electrically resistive, the thickness can range from 0.3 µm to 3 µm. However, other thicknesses, both smaller and larger than this range, are perfectly feasible, depending on the required RF performance level. To preserve the polycrystalline quality of this layer during heat treatments that the support substrate 100 or the final substrate 300' may undergo, an amorphous layer, such as silicon dioxide, can be advantageously applied to the substrate before the charge trapping layer is depositioned. Alternatively, the trapping layer can be formed by implanting a heavy species, such as argon, into a surface layer of the substrate to create the structural defects that constitute the electrical traps. This layer can also be formed by porosification of a surface layer of the substrate.

Claims

Demands

1. A method for manufacturing a piezoelectric structure (10) for a radio frequency device, said method being characterized in that it comprises providing a piezoelectric material substrate (20), providing a support substrate (100), providing a dielectric bonding layer (1001) on the piezoelectric material substrate (20), an assembly step (1') of the piezoelectric material substrate (20) onto the support substrate (100) via the dielectric bonding layer (1001), a thinning step (2') to form the piezoelectric structure (10) consisting of a layer of piezoelectric material (200) assembled to a support substrate (100) via the dielectric bonding layer (1001), and wherein the thickness of the dielectric bonding layer (1001) is between 200 nm and 500 nm.

2. A method according to the preceding claim in which the dielectric bonding layer (1001) comprises a silicon oxide layer deposited on the piezoelectric material substrate (20) by plasma-assisted chemical vapor deposition.

3. A method according to any one of the preceding claims, wherein the assembly step (1') comprises molecular bonding between the dielectric bonding layer (1001) and the support substrate (100).

4. A method according to any one of the preceding claims, wherein the piezoelectric material substrate (20) has a rough surface adapted to reflect a radio frequency wave.

5. A method according to any one of the preceding claims, wherein the support substrate (100) further comprises a trapping layer intended to be assembled to the dielectric bonding layer (1001).

6. A method according to the preceding claim, wherein the trapping layer is polycrystalline silicon.

7. A method according to claim 5, wherein the trapping layer is obtained by implanting heavy species such as argon.

8. A method according to any one of the preceding claims, wherein the thinning step (2') comprises a mechano-chemical etching and / or polishing.

9. A method for transferring a piezoelectric layer (200') onto a final substrate (300'), comprising supplying a piezoelectric structure (10) obtained by implementing the manufacturing process according to any one of the preceding claims, the formation of a weakening zone (0”) in the piezoelectric material layer (200) so as to delimit the piezoelectric layer (200') to be transferred, the supply of the final substrate (300'), an assembly step (1”) by bonding the piezoelectric material layer (200) onto the final substrate (300'), a detachment step (2”) comprising the fracturing and separation of the piezoelectric structure (10) along the weakening zone.

10. A method according to the preceding claim, wherein the formation of the embrittlement zone is carried out by implanting atomic species in the layer of piezoelectric material (200).

11. A method according to any one of claims 9 or 10, wherein the final substrate (300') and the support substrate (100) have identical coefficients of expansion.

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