Structure and method for testing and transferring an optoelectronic device

Abstract

Title: Structure and method for testing and transferring an electronic device The subject of the invention is a structure (2) for testing and transferring contact pads (223) comprising a test part (21), and a contact part (22), the test part (21) comprising at least one network of electrical interconnections (211, 213), the contact part (22) comprising at least one contact pad (223) at a contact face (200), said at least one contact pad being intended to be brought into contact with at least one contact zone (123) at a connection face (100) of an electronic device (1), the structure being characterized in that the contact part (22) further comprises at least one electrically conductive sacrificial portion (225) electrically connecting the at least one contact pad (223) to the network of electrical interconnections (211, 213).The invention also relates to a testing and transfer method implementing such a structure (2). Figure for the abstract: Fig. 2.

Description

Title of the invention: Structure and method for testing and transferring an optoelectronic device Technical field

[0001] The present invention relates to the field of technologies for microelectronics and optoelectronics in particular. It finds a particularly advantageous application in the testing and manufacturing of microelectronic or optoelectronic systems by mass transfer of unit devices, for example GaN-based light-emitting diodes. STATE OF THE ART

[0002] A self-emissive display screen is an example of a known optoelectronic system. Such a screen comprises a plurality of pixels emitting their own light. Each pixel is thus typically formed by one or more LEDs or micro-LEDs. Each LED is a unitary optoelectronic device.

[0003] These unitary optoelectronic devices are typically formed collectively on a donor substrate, then individualized - that is to say separated from each other - before being transferred to a receiving substrate. The transfer can be carried out collectively, or according to a so-called "pick and place" principle according to the usual Anglo-Saxon terminology.

[0004] However, it happens that certain unitary optoelectronic devices do not exhibit optimal performance. For example, defects appearing during the manufacture of these devices can render certain devices non-functional. To avoid transferring these non-functional devices during the collective transfer or “pick and place” transfer steps, prior detection of non-functional devices is desirable. Such a prior detection step makes it possible to limit subsequent repair costs during the manufacture of the optoelectronic system. This detection and sorting strategy is conventionally called “Known Good Die” or “KGD”.

[0005] Since unitary devices are generally individualized, it is difficult to detect abnormal devices easily. This detection involves in particular powering and / or sending an electrical test signal to each device individually, and studying its behavior when it is powered / tested.

[0006] Document WO2021094177 discloses a solution consisting of forming a common test contact for all the unit devices, at the beginning of the manufacturing process of said devices. In this solution, the testing of the devices is carried out very early in the manufacturing process. This prevents the detection of problems occurring later during manufacturing. Successfully tested devices may not ultimately be functional upon transfer to the receiving substrate. Furthermore, this solution requires additional steps to form the test contact. These steps must also be developed specifically for each pixel design.

[0007] Another known solution is to perform a capacitive test of the individual optoelectronic devices. Here again, it is difficult to accurately and individually detect defective devices.

[0008] The present invention aims to at least partially overcome the drawbacks of the solutions mentioned above.

[0009] In particular, an object of the present invention is to provide a test and transfer structure for individually testing an electronic device from among a plurality of unitary electronic devices. Another object of the present invention is to provide a method for testing and transferring electronic devices.

[0010] Other objects, features and advantages of the present invention will become apparent upon examination of the following description and the accompanying drawings. It is understood that other advantages may be incorporated. In particular, certain features and advantages of the testing and / or transfer method may apply mutatis mutandis to the testing and / or transfer structure or system, and vice versa. SUMMARY

[0011] To achieve the above-mentioned objectives, one aspect relates to a contact pad testing and transfer structure intended to test at least one electronic device and to transfer at least one contact pad onto said at least one electronic device.

[0012] Advantageously, the structure comprises a test part, and a contact part. The test part comprises at least one network of electrical interconnections.

[0013] The contact portion comprises at least one contact pad at a contact face, said at least one contact pad being intended to be brought into contact with at least one contact zone at a connection face of the electronic device.

[0014] Advantageously, the contact part further comprises at least one electrically conductive sacrificial portion, electrically connecting the at least one contact pad to the electrical interconnection network of the test part.

[0015] The sacrificial portion is typically configured so as to release the at least one contact pad after it has been brought into contact with the at least one contact area of ​​the electronic device. This sacrificial portion makes it possible to create an electrical connection between the electrical interconnection network of the test part and the at least one contact pad intended to come into contact with the electronic device. Thus, the test and transfer structure typically makes it possible to carry out an electrical test of an electronic device, by bringing the at least one contact pad into contact with the contact area of ​​said electronic device, then to carry out a transfer of this contact pad onto said electronic device, for example by removing the electrically conductive sacrificial portion selectively from the contact pad.

[0016] Such a structure advantageously makes it possible to carry out two technological operations, namely the electrical test of an electronic device and the transfer of a contact pad onto an electronic device, efficiently. These two technological operations can be dissociated. The test and transfer structure can thus be used solely to carry out an electrical test of an electronic device or to carry out only a contact pad transfer onto an electronic device, or to carry out an electrical test and a contact pad transfer onto an electronic device.

[0017] Such a test and transfer structure can therefore be advantageously used in a versatile manner for the testing and / or transfer of contact pads.

[0018] The electrical test of the electronic device can furthermore be carried out prior to the transfer of this electronic device onto a receiving substrate, at the end of the manufacturing process of this electronic device on the donor substrate. Thus, the ability to detect defects occurring late during the manufacturing of the electronic devices is significantly improved.

[0019] The at least one contact pad integrated into the test and transfer structure is furthermore easily transferable to the electronic device. This simplifies the design of the electronic devices. Advantageously, the test and transfer structure provides at least one contact pad for each electronic device to be tested. This makes it possible to test the electronic devices individually.

[0020] Another aspect relates to a system comprising such a test and transfer structure comprising a plurality of contact pads, the system further comprising a plurality of electronic devices each having a connection face and each comprising at least one contact area. The contact pads of the test and transfer structure are advantageously configured to be assembled to the contact areas of the electronic devices.

[0021] In this system, the test and transfer structure makes it possible to individually test each of the devices and / or to collectively transfer contact pads to the electronic devices.

[0022] Another aspect relates to a method for testing and transferring at least one contact pad, intended to test at least one electronic device, and to transfer at least one contact pad from a test and transfer structure as described above, on said at least one electronic device.

[0023] Advantageously, the method comprises at least the following steps: - providing at least one electronic device, said at least one electronic device having a connection face comprising at least one contact zone, - aligning the at least one contact pad of the test structure with the at least one contact area of ​​the electronic device, - assemble the test structure to the electronic device, - removing the at least one electrically conductive sacrificial portion, selectively from the at least one contact pad, - detach the test structure from the electronic device, leaving at least one contact pad on the at least one contact area of ​​the electronic device.

[0024] Thus, the method advantageously makes it possible to transfer at least one contact pad onto at least one contact area of ​​an electronic device. Preferably, the method further comprises, after assembling the test structure to the at least one electronic device, and before removing the at least one electrically conductive sacrificial portion, a step of testing the electronic device taken from an electrical test or an operational test, said test step being carried out via the test portion of the test and transfer structure.

[0025] The electronic devices may comprise at least one light-emitting diode (LED). The electronic devices may also comprise at least one electronic control circuit dedicated to driving said light-emitting diode. The electronic devices therefore form “smart” LEDs, according to the usual Anglo-Saxon terminology. BRIEF DESCRIPTION OF THE FIGURES

[0026] The aims, objects, as well as the characteristics and advantages of the invention will emerge more clearly from the detailed description of embodiments thereof which are illustrated by the following accompanying drawings in which:

[0027] [Fig.l] [Fig.l] schematically illustrates an optoelectronic device of the smart LED type.

[0028] [Fig.2][Fig.3][Fig.4][Fig.5][Fig.6] Figures 2 to 6 schematically illustrate steps of a testing and transfer method according to an embodiment of the present invention.

[0029] [Fig.7][Fig.8][Fig.9][Fig.lO][Fig.ll][Fig.l2] Figures 7 to 12 schematically illustrate steps of manufacturing a test and transfer structure according to an embodiment of the present invention.

[0030] The drawings are given as examples and are not limiting of the invention. They constitute schematic representations of principle intended to facilitate the understanding of the invention and are not necessarily to the scale of practical applications. In particular, the dimensions of the different parts of the test and transfer structures and of the LEDs are not necessarily representative of reality. DETAILED DESCRIPTION

[0031] Before beginning a detailed review of embodiments of the invention, it is recalled that the invention according to its first aspect notably comprises the following optional characteristics which can be used in association or alternatively:

[0032] According to one example, the contact portion comprises a bonding layer at the contact face, at the edge of the at least one contact pad, such that the contact face is formed by a surface of the contact pad and a surface of the bonding layer. This makes it possible to improve the contacting of the test and transfer structure with the electronic device. The electronic device can thus be assembled to the test and transfer structure by adhesion at the surface of the bonding layer. Independently or in combination, the contact pad of the test and transfer structure can be assembled to the contact area of ​​the electronic device. The bonding is preferably carried out by direct bonding, for example according to plasma-assisted hydrophilic bonding, or according to ultra-high vacuum bonding of the SAB type, for "Surface Activated Bonding", or even by thermocompression.

[0033] According to one example, the at least one contact pad comprises a first layer based on a material taken from Au, Sn, SnAg or SnAgCu, preferably an interlayer of Ni, and a second layer of Cu stacked in a z direction perpendicular to the contact face, the second layer of Cu being located on the side of the contact face, and the first layer being located on the opposite side, facing the test part. The stack of metal layers of the contact is thus typically reversed compared to that of a standard contact. This makes it possible to then form a contact having a stack of standard metal layers, after transfer of said contact to the electronic device.

[0034] According to one example, the electrically conductive sacrificial portion borders the at least one contact pad on a side opposite the contact face and partly on lateral flanks of the at least one contact pad. This makes it possible to minimize the electrical resistance between the sacrificial portion and the contact pad. This also makes it possible, after removal of the sacrificial portion, to expose a major portion of the contact pad.

[0035] According to one example, the electrically conductive sacrificial portion is made of n++-doped polycrystalline silicon. This material has good electrical conductivity. It can also be easily etched, for example by a dry etching process using XeF2 base.

[0036] According to one example, the contact portion comprises at least a first electrically conductive sacrificial portion and a second electrically conductive sacrificial portion, and at least one isolation trench based on dielectric material configured to isolate said first and second electrically conductive sacrificial portions from each other. The test and transfer structure thus makes it possible to independently contact two electronic devices or two distinct contact areas of the same electronic device.

[0037] According to one example, the test part comprises an integrated electronic circuit connected to the electrical interconnection network and configured to communicate with the electronic device. The test part thus makes it possible to carry out more complex test sequences than a simple electrical continuity test. Functional tests of the device are thus possible.

[0038] According to one example, the electronic devices are light-emitting diodes or light-emitting diodes each comprising integrated control electronics.

[0039] According to one example, the electrically conductive sacrificial portion is based on polySi nl—l- and the removal is carried out by an etching solution based on XeF2. Such an etching solution may advantageously be selective with respect to the metals forming the contact pad and / or the dielectric material forming the insulation trench. Thus, only the sacrificial portion is removed during the removal step.

[0040] According to one example, the at least one electronic device comprises a first electronic device and a second electronic device secured to each other and comprising connection faces in the same plane, the method further comprising, after assembly of the test structure to said first and second electronic devices, and before removal of the at least one electrically conductive sacrificial portion, an individualization step configured to separate the first and second electronic devices by a separation trench opening into the at least one electrically conductive sacrificial portion. The separation trench makes it possible to individualize the electronic devices from each other. The separation trench also makes it possible to facilitate access to the sacrificial portions, typically during removal of said sacrificial portions.

[0041] According to one example, the contact portion of the test structure comprises at least one first electrically conductive sacrificial portion and a second electrically conductive sacrificial portion, and at least one isolation trench based on dielectric material configured to isolate said first and second electrically conductive sacrificial portions from each other, said at least one isolation trench holding the at least one electronic device on the test structure after removal of said first and second electrically conductive sacrificial portions. The isolation trench not only makes it possible to electrically isolate the sacrificial portions from each other, but also to form a structural element for supporting the device when the sacrificial portions are removed.

[0042] According to one example, the detachment of the at least one electronic device is carried out by fixing a pad on a face of the at least one electronic device opposite the connection face, and by exerting mechanical traction so as to break said at least one isolation trench. The isolation trench(es) form a support for the device which can be easily broken by exerting mechanical traction on the device. The disassembly of the device and the test part of the test and transfer structure is facilitated.

[0043] According to one example, the method further comprises, if the at least one electronic device is identified as being defective after the testing step, a step of eliminating this defective device, for example by crushing after removal of the at least one electrically conductive sacrificial portion.

[0044] Unless incompatibility exists, technical features described in detail for a given embodiment may be combined with the technical features described in the context of other embodiments described by way of example and not limitation, so as to form another embodiment which is not necessarily illustrated or described. Such an embodiment is obviously not excluded from the invention.

[0045] In the present invention, the method is partly dedicated to the testing of electronic devices. The term "electronic device" means a microelectronic or optoelectronic device. According to a particular application, the method makes it possible to test light-emitting diodes (LEDs), in particular unitary LEDs isolated from each other, and in particular smart LEDs. A smart LED typically comprises at least one emissive part based on LEDs or pLEDs, and a part for driving the emissive part, such as integrated driving electronics.

[0046] The LEDs or unitary microelectronic or optoelectronic devices typically have dimensions, in projection in a base plane xy, between 5 pm X 5 pm and 100 pm X 100 pm.

[0047] The invention can be implemented more broadly for various microelectronic and optoelectronic devices, or even for MEMS electromechanical devices or microsystems. The invention can, for example, be implemented in the context of laser or photovoltaic devices.

[0048] Unless explicitly stated, it is specified that, in the context of the present invention, the relative arrangement of a third layer interposed between a first layer and a second layer does not necessarily mean that the layers are in direct contact with each other, but means that the third layer is either directly in contact with the first and second layers, or separated from them by at least one other layer or at least one other element.

[0049] Thus, the terms and phrases “take support” and “cover” or “cover” do not necessarily mean “in contact with”.

[0050] The steps of the method as claimed are understood in the broad sense and may optionally be carried out in several sub-steps.

[0051] In this patent application, the terms "light-emitting diode", "LED" or simply "diode" are used synonymously. An "LED" may also be understood to mean a "micro-LED" or a smart LED, as the case may be.

[0052] A portion or element described as “sacrificial” means that this element is intended to be “sacrificed”, that is to say removed during a subsequent step of the process.

[0053] A substrate, a layer, a device, “based” on a material M, is understood to mean a substrate, a layer, a device comprising this material M only or this material M and possibly other materials, for example alloying elements, impurities or doping elements. Thus, a GaN-based diode typically comprises GaN and AlGaN or InGaN alloys.

[0054] A reference frame, preferably orthonormal, comprising the axes x, y, z is shown in certain appended figures. This reference frame is applicable by extension to the other figures in the same sheet of figures.

[0055] In the present patent application, we will preferably speak of thickness for a layer and of height for a structure or a device. The thickness is taken along a direction normal to the main extension plane of the layer, and the height is taken perpendicular to the base plane xy. Thus, a layer typically has a thickness along z, when it extends mainly along an xy plane, and a projecting element, for example an isolation trench, has a height along z. The relative terms “on”, “under”, “underlying” preferably refer to positions taken along the z direction.

[0056] Dimensional values ​​are understood to be within manufacturing and measurement tolerances.

[0057] The terms “substantially”, “approximately”, “of the order of” mean, when they relate to a value, “within 10%” of this value or, when they relate to an angular orientation, “within 10°” of this orientation. Thus, a direction substantially normal to a plane means a direction having an angle of 90+10° relative to the plane.

[0058] An object of the invention is to test, via a test and transfer structure, the operation of an optoelectronic device. An object of the invention is also to transfer, via a test and transfer structure, an electrical contact pad onto an optoelectronic device.

[0059] [Fig.l] illustrates an optoelectronic device 1 of the smart LED type. This device 1 thus typically comprises at least one emissive part 11 based on LED or pLED, and a control part 12 of the emissive part IL

[0060] The emissive part 11 comprises in particular an active region 110 configured to emit light according to a main wavelength, for example in blue. The active region 110 is preferably based on GaN. This active region 110 may be associated with a metallization level 111 comprising contacts 112 insulated from each other by a dielectric material, for example a silicon oxide.

[0061] The driving part 12 is typically configured to drive the emissive part 11. It may thus comprise driving electronics 122, typically comprising transistors based on CMOS technology, for example in the form of pIC integrated microcircuits. The driving part 12 may also comprise contacts 121 provided to electrically connect this driving part 12 to the emissive part 11, via the contacts 112, 121. The driving electronics 122 is typically carried by a semiconductor substrate which may be thinned, after connection of the driving part 12 to the emissive part 11, as illustrated in [Fig.2].

[0062] The device 1 may also comprise, at the level of the control part 12, on a side opposite the emissive part 11, contact zones 123 insulated from each other by a dielectric layer 124. These contact zones 123 make it possible to electrically connect the control part 12 to other elements, for example to test or control elements. The contact zones 123 and the dielectric layer 124 here form a connection face 100.

[0063] According to an example not illustrated, the optoelectronic device 1 comprises only an emissive part 11, without a control part 12. This is for example the case of a simple LED, without integrated electronics. In this case, the connection face 100 can be formed by the contacts 112 and the dielectric material of the metallization level 111.

[0064] The connection face 100 is here intended to come into contact with a contact face 200 of a test and transfer structure 2.

[0065] As illustrated in [Fig.2], the test and transfer structure 2 typically comprises a test portion 21 and a contact portion 22.

[0066] The test part 21 comprises at least one network of electrical interconnections 211, 213 configured to transmit an electrical test signal towards the contact part 22. In the example illustrated in [Fig. 2], this network of electrical interconnections 211, 213 is connected to test electronics 212 typically comprising transistors based on CMOS technology, for example in the form of pIC integrated microcircuits. The test electronics 212 are thus interposed between electrical interconnections 211 and electrical interconnections 213 in contact with the contact part 22. The electrical interconnections 211 and / or 213 are typically formed within a support 210, for example made of a semiconductor material such as silicon, carrying the test electronics 212. The test electronics 212 can be configured to communicate with an optoelectronic device 1 of the smart LED type, for example using a dedicated communication protocol. This test electronics 212 is however optional. The interconnections 211, 213 can be directly connected to the contact part 22, without interposing test electronics 212. The interconnections 211 typically open at a rear face 201 of the test part 21, so as to allow electrical access at this rear face 201. The interconnections 211 can be insulated from each other by a dielectric layer 215, partly forming the rear face 201. The interconnections 213 can be insulated from each other by a dielectric layer 214, partly forming an interface with the contact part 22.

[0067] The contact part 22 comprises at least one sacrificial portion 225 made of an electrically conductive material, and at least one contact pad 223. In the example illustrated in [Fig. 2], the contact part 22 comprises two sacrificial portions 225 and two contact pads 223. Each sacrificial portion 225 ensures electrical continuity between a contact pad 223 and an interconnection 213 of the test part 21. The electrical test signals delivered by the test part 21, for example from the test electronics 212, thus reach the contact pads 223. The sacrificial portions 225 are preferably based on n++-doped polycrystalline silicon, denoted polySi n++. Alternatively, they may be based on a conductive adhesive. In the illustrated example, the sacrificial portions 225 are isolated from each other by means of an isolation trench 226.This isolation trench 226 can rest on the dielectric layer 214 of the test part 21. It is typically based on silicon oxide SiO2. The contact pads 223 open onto a contact face 200. In the example illustrated, a dielectric layer 224, also called a bonding layer, further insulates the sacrificial portions 225 from each other and the contact pads 223 from each other. The contact face 200 is here partly formed by the contact pads 223 and partly formed by the dielectric layer 224. The dielectric layer 224 is intended to come into contact with the dielectric layer 124 to form an assembly by molecular bonding. The contact pads 223 are intended to come into contact with the contact zones 123 to ensure the electrical test of the device 1. These contact pads 223 are also intended to remain on said device 1, typically after an electrical test of this device 1 has been carried out.They can be assembled to the contact zones 123 by direct bonding, for example by thermocompression or by SAB bonding. As detailed below, the sacrificial portions 225 make it possible in particular to more easily release the contact pads 223 with a view to their transfer to the device 1.

[0068] [Fig. 3] illustrates a test and transfer structure 2 assembled with two devices 1 each comprising an active region 110, a metallization level 111, a control electronics 122 and two contact zones 123. The test and transfer structure 2 here comprises interconnections 211, 213, a test electronics 212, four sacrificial portions 225 and four contact pads 223. The contact pads 223 are here assembled with the four contact zones 123 of the devices 1. Isolation trenches 226 separate the contact pads 223 from each other. A test step can be carried out at this stage, after assembly of the test and transfer structure 2 with the devices 1. This test step aims to determine which devices 1 are functional and which devices 1 are defective. Alternatively or in combination, the testing step may be carried out after individualization of the devices 1.A mapping of the defective devices 1 can thus advantageously be obtained, before or after individualization of the devices 1.

[0069] [Fig. 4] illustrates an individualization step configured to separate the devices 1 from each other by a separation trench 30. In this example, the optoelectronic devices 1 each comprise three active regions 110B, 110R, 110G, intended to typically form three sub-pixels of a display screen. The separation trench 30 can be carried out in a known manner by anisotropic ion etching, or by sawing for example. The formation of the separation trench 30 is preferably configured so that the bottom 31 of the trench 30 reaches sacrificial portions 225. The separation trench 30 typically allows access to the sacrificial portions 225. This subsequently makes it easier to remove the sacrificial portions 225.

[0070] [Fig. 5] illustrates a step of removing the sacrificial portions 225. This step makes it possible to partially release the contact pads 223. The latter are thus no longer directly in contact with the test part 21. They are attached to the contact zones 123 of the devices 1. This removal step can be done by selective etching of the material of the sacrificial portions 225 with respect to the surrounding materials. According to one example, the sacrificial portions 225 are based on polySi n++ and the removal is done by dry etching based on XeF2. Such etching has good selectivity with respect to the silicon oxide of the insulation trenches 226 and the dielectric layers 124, 224, 214 and with respect to the metallic materials of the contact pads 223. According to a possibility not illustrated, the edges of the control electronics 122 exposed to this dry etching are protected by a protective layer based on SiO2.

[0071] After etching, cavities 32 are then formed around the contact pads 223. The optoelectronic devices remain attached to the test part 21 via the isolation trenches 226. A “pick and place” type method then makes it possible to easily detach these devices 1 from the test part 21.

[0072] As illustrated in [Fig.6], a transfer device 40 can be fixed to the upper face 101 of the devices. Mechanical traction, for example along z, can then be carried out on the device 1 so as to break the insulation trench(es) 226. The device 1 is then detached from the test part 21. This test part 21, which can comprise expensive test electronics, can advantageously be reused for subsequent electrical tests.

[0073] The transfer device 40 can be controlled to pick up only the functional devices, leaving the defective devices on the test part 21, which are then eliminated.

[0074] According to one possibility, the defective devices are eliminated before transferring the functional devices, for example by mechanically crushing them. The crushing of the defective devices can be done by one or more needles controlled by actuators, and positioned above the defective devices according to the mapping obtained in the test step. The needles typically have an end whose dimensions are smaller than those of the defective device to be crushed. This end is not necessarily pointed. The crushing can be done by pressing the end of the needles on the defective devices, so as to break the insulation trench(es) 226. A step of suctioning the crushed defective devices can be provided, before removing the functional devices.

[0075] The transfer of functional devices can then be carried out collectively.

[0076] Figures 7 to 12 illustrate an embodiment of a test structure and transfer as described in the previous examples.

[0077] As illustrated in [Fig.7], the test part 21 may be in the form of a semiconductor substrate 210 carrying test electronics 212, typically based on CMOS technology. Electrical interconnections 211, 213 may be connected to the test electronics 212. These interconnections 211, 213 may pass right through the test part 21, for example emerging at the front 200' and rear 201 faces of the test part 21. The interconnections 211 are in particular intended to be connected by an external test module. According to a possibility not illustrated, the test part 21 has a diameter or a dimension in the xy plane larger than all of the optoelectronic devices to be tested, and the interconnections are partly located on the edges of the test part 21. In particular, the interconnections 211 can be arranged on the front face 200' on the edges of the test part 21.This makes it easier to connect to an external test module. Dielectric layers 214, 215 are typically formed respectively at the front 200' and rear 201 faces around the interconnections 213, 211. This makes it possible in particular to isolate the test electronics 212 from external disturbances and / or short circuits.

[0078] [Fig. 8] illustrates the formation of electrically conductive sacrificial portions 225. A deposition of a layer of polySi n++ is typically carried out on the front face 200' of the test part 21. Trenches are then etched along z in this layer of polySi n++, then filled with a dielectric material, in order to form the isolation trenches 226. The isolation trenches 226 typically have continuity with the dielectric layer 214. A well is thus partly formed by the isolation trenches 226, the dielectric layer 214 and the interconnection 213 around each sacrificial portion 225.

[0079] [Fig.9] illustrates the formation of cavities 230 intended to accommodate the pads of contact 223. Each sacrificial portion 225 is thus etched to a depth h23 and a width L23. The sacrificial portions 225 are then each similar to a box whose bottom has a height h25, and whose sides have a width L25. The dimension h23 can be between 500 nm and 20 pm. The dimension L23 can be between 5 pm and 50 pm. The dimension h25 can be between 500 nm and 5 pm. The dimension L25 can be between 200 nm and 20 pm.

[0080] [Fig. 10] illustrates the formation of the contact pads 223, 223a within the cavities 230. The filling of the cavities 230 typically comprises first the formation of a layer of gold Au, then the formation of a layer of nickel Ni on this layer of Au, then the formation of a layer of copper Cu on this layer of Ni. The order of formation of the metal layers of the contact is here reversed compared to a method of forming a standard metal contact. This then makes it possible to transfer this metal contact directly onto an optoelectronic device, without prior turning.

[0081] Typically, a thin gold deposit, for example of the order of a few tens to a few hundred nanometers, is first made on the bottom 231 of the cavities. This gold deposition can be done by chemical vapor deposition (CVD) or by physical vapor deposition (PVD), so as to obtain a gold seed of good crystalline quality. The cavity can then be filled from this Au seed by electrochemical deposition (ECD) so as to obtain greater thicknesses of metal layers.

[0082] After filling, chemical-mechanical polishing (CMP) is typically carried out so as to obtain a flat surface 200. A contact part 22 is thus formed on the test part 21.

[0083] Optionally, as illustrated in [Fig. 1 1], a dielectric layer 224 is formed at the face 200. This dielectric layer 224 is then opened by etching at the contact pads 223a, as illustrated in [Fig. 12]. The dielectric layer 224 is intended to partly form a bonding layer compatible with the bonding process envisaged. The openings of this bonding layer may be more numerous than the contact pads 223a, in particular depending on the bonding process and / or the size of the contact pads 223a. A metal refill 223b is then carried out at the contacts 223a, for example by depositing a copper seed followed by electrochemical deposition. The contacts 223a and the metal refills 223b form the contact pads 223. The surfaces 200a of the dielectric layer portions 224 form, with the surfaces 200b of the contact pads 223, the contact face 200 of the test and transfer structure 2. Direct or SAB bonding can advantageously be carried out via the surfaces 200a. Direct or thermocompression bonding can advantageously be carried out via the surfaces 200b.

[0084] As illustrated by the preceding examples, the test and transfer structure and method according to the invention therefore advantageously make it possible to test unitary optoelectronic devices and / or to transfer contact pads onto these unitary optoelectronic devices.

[0085] The invention is however not limited to the embodiments previously described.

[0086] In particular, the number, shape and arrangement of the interconnections, pads and contact areas can be adapted according to the optoelectronic devices to be tested.

Claims

Claims

1. Structure (2) for testing and transferring contact pads (223) intended to test at least one electronic device (1) and to transfer at least one contact pad (223) onto said at least one electronic device (1), said structure (2) comprising a test part (21), and a contact part (22), the test part (21) comprising at least one network of electrical interconnections (211, 213), the contact part (22) comprising at least one contact pad (223) at a contact face (200), said at least one contact pad being intended to be brought into contact with at least one contact zone (123) at a connection face (100) of the electronic device (1), the structure being characterized in that the contact part (22) further comprises at least one electrically conductive sacrificial portion (225) electrically connecting the at least one contact pad (223) to the network electrical interconnections (211, 213),and in that the contact portion (22) comprises a bonding layer (224) at the contact face (200), at the edge of the at least one contact pad (223, 223b), such that the contact face (200) is formed by a surface (200b) of the contact pad (223, 223b) and a surface (200a) of the bonding layer (224).,

2. Structure according to the preceding claim in which the at least one contact pad (223) comprises a first layer based on a material taken from Au, Sn, SnAg or SnAgCu, preferably an intercalary layer of Ni, and a second layer of Cu stacked in a direction (z) perpendicular to the contact face (200), the second layer of Cu being located on the side of the contact face (200), and the first layer being located on the opposite side, facing the test part (21).

3. Structure according to any one of the preceding claims in which the electrically conductive sacrificial portion (225) borders the at least one contact pad (223) on a side (231) opposite the contact face (200) and partly on lateral flanks (232) of the at least one contact pad (223).

4. Structure according to any one of the preceding claims in which the electrically conductive sacrificial portion (225) is made of n++ doped polycrystalline silicon.

5. A structure according to any preceding claim in wherein the contact portion (22) comprises at least a first electrically conductive sacrificial portion (225) and a second electrically conductive sacrificial portion (225), and at least one insulation trench (226) based on dielectric material configured to insulate said first and second electrically conductive sacrificial portions (225) from each other.

6. Structure according to any one of the preceding claims in which the test part (21) comprises an integrated electronic circuit (212) connected to the electrical interconnection network (211, 213) and configured to communicate with the electronic device (1).

7. System comprising a structure (2) for testing and transferring at least one contact pad (223) according to any one of the preceding claims, and a plurality of electronic devices (1) each having a connection face (100) and each comprising at least one contact zone (123), said structure (2) comprising a plurality of contact pads (223), said contact pads (223) being configured to be assembled to the contact zones (123) of the electronic devices (1).

8. System according to the preceding claim in which the electronic devices are light-emitting diodes or light-emitting diodes each comprising integrated control electronics.

9. A method for testing and transferring at least one contact pad, intended to test at least one electronic device, and to transfer at least one contact pad from a test and transfer structure (2) according to any one of claims 1 to 6, onto said at least one electronic device, the contact part (22) of the test structure comprising at least one first electrically conductive sacrificial portion (225) and a second electrically conductive sacrificial portion (225), and at least one isolation trench (226) based on dielectric material configured to isolate said first and second electrically conductive sacrificial portions (225) from each other, said method comprising at least the following steps: • providing the at least one electronic device (1), said at least one electronic device having a connection face (100) comprising at least one contact area (123), • aligning the at least one contact pad (223) of the test structure (2) with the at least one contact area (123) of the electronic device, • assembling the test structure (2) to the electronic device (1), • removing said first and second electrically conductive sacrificial portions (225), selectively from the at least one contact pad (223), said at least one isolation trench holding the at least one electronic device on the test structure after removal of said first and second electrically conductive sacrificial portions (225), • separating the test structure from the electronic device, leaving the at least one contact pad (223) on the at least one contact area (123) of the electronic device, said separating of the electronic device being carried out by fixing a pad on a face (101) of the electronic device opposite the connection face (100),by exerting mechanical traction so as to break said at least one insulation trench (226).,

10. Method according to the preceding claim further comprising, after assembly of the test structure to the at least one electronic device, and before removal of the at least one electrically conductive sacrificial portion (225), a step of testing the electronic device taken from an electrical test or an operational test, said test step being carried out via the test part (21) of the structure (2).

11. Method according to any one of claims 9 to 10 in which the electrically conductive sacrificial portion (225) is based on polySi n++ and the removal is carried out by an etching solution based on XeF2.

12. Method according to any one of claims 9 to 11 in which the at least one electronic device comprises a first electronic device and a second electronic device secured to each other and comprising connection faces (100) in the same plane, said method further comprising, after assembly of the test structure to said first and second electronic devices, and before removal of the at least one electrically sacrificial portion (225) conductive, an individualization step configured to separate the first and second electronic devices by a separation trench opening into the at least one electrically conductive sacrificial portion (225).

13. Method according to any one of claims 10 to 12, further comprising, if the at least one electronic device is identified as being defective after the testing step, a step of eliminating this defective device, for example by crushing after removal of the at least one electrically conductive sacrificial portion (225).

Images