Construction of an insulating trench
A multi-step process addresses voids in insulating trenches by using mechanical polishing, engraving stop layers, and waterproof materials to seal and ensure the integrity of insulating trenches in electronic devices.
Patent Information
- Application Number
- FR2022012257
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-11-24
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2042-11-24
AI Technical Summary
Existing manufacturing processes for insulating trenches in electronic devices often result in void cavities, leading to sealing issues and compromising the integrity of the insulating trenches.
A multi-step process involving mechanical polishing, deposition of an engraving stop layer, additional insulating material, and anisotropic engraving, followed by the application of a waterproof material to fill and seal any voids in the trench.
The process effectively seals voids in insulating trenches, ensuring they are waterproof and enhancing the reliability of electronic devices such as capacitors and image sensors.
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Abstract
Description
Title of the invention: Manufacture of an insulating trench Technical field
[0001] The present description relates generally to electronic and microelectronic devices and components. The present description relates, more particularly, to the manufacture of these electronic devices and components, and more precisely, to the production of electrical isolation and / or optical isolation trenches. Prior art
[0002] Manufacturing techniques for electronic and microelectronic devices and components are constantly evolving. It is common to use insulating trenches to electrically and / or optically isolate a component from one or more other neighboring components, or even to electrically and / or optically isolate several parts of the same electrical component.
[0003] It would be desirable to be able to improve, at least in part, certain aspects of the manufacture of insulating trenches. Summary of the invention
[0004] There is a need for waterproof insulating trenches.
[0005] There is a need for methods of manufacturing waterproof insulating trenches. water.
[0006] One embodiment overcomes all or part of the drawbacks of known manufacturing methods for insulating trenches.
[0007] One embodiment provides a method of manufacturing an insulating trench in a substrate, for an electronic device, comprising the following successive steps: (a) filling a trench formed in said substrate with a first insulating material; (b) depositing a first etch stop layer on said first material; (c) depositing a second layer of a second insulating material on said first etch stop layer; (d) etch to the etch stop layer; and (e) depositing a third layer of a third waterproof material.
[0008] According to one embodiment, the third material is waterproof.
[0009] According to one embodiment, the method further comprises, between step (a) and (b), a step (f) of polishing the surface of said substrate.
[0010] According to one embodiment, step (f) implements a chemical-mechanical polishing process.
[0011] According to one embodiment, the method further comprises, between step (f) and (b), a wet etching step (g).
[0012] According to one embodiment, during step (g), the wet etching uses a hydrofluoric acid solution.
[0013] According to one embodiment, step (d) is an anisotropic etching step.
[0014] According to one embodiment, the first etch stop layer is a layer aluminum oxide or aluminum nitride.
[0015] According to one embodiment, the first etch stop layer has a thickness of between 5 and 20 nm.
[0016] According to one embodiment, the second layer has a thickness greater than or equal to half a diameter of a still empty part of said trench after step (a) of filling.
[0017] According to one embodiment, the second insulating material is silicon oxide.
[0018] According to one embodiment, the third waterproof material is oxide of aluminum.
[0019] According to one embodiment, the third layer of the third waterproof material has a thickness of between 5 and 20 nm.
[0020] Another embodiment provides a method of manufacturing a capacitor using the method described above.
[0021] Another embodiment provides a sealed insulating trench, for an electronic device, comprising an insulating trench having a central cavity filled by a stack successively comprising: - a first etching stop layer; - a second layer of a second insulating material; and - a third layer in a third waterproof material.
[0022] Another embodiment provides a sealed capacitor comprising an insulating trench described previously.
[0023] Another embodiment provides an image sensor comprising an insulating trench described previously.
[0024] Another embodiment provides an image sensor comprising a capacitor described previously. Brief description of the drawings
[0025] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:
[0026] [Fig.l] represents, very schematically, a sectional view of an insulating trench;
[0027] [Fig.2], very schematically, a sectional view of an insulating trench used to form a capacitor;
[0028] [Fig. 3] represents five sectional views illustrating a mode of implementation of a method of manufacturing an insulating trench; and
[0029] [Fig.4] represents a sectional view of an embodiment of an image sensor. Description of the embodiments
[0030] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.
[0031] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the possible uses of insulating trenches obtained by the embodiments described below are not detailed, the usual uses in electronic devices being compatible.
[0032] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.
[0033] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.
[0034] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.
[0035] [Fig.l] is a sectional view showing an insulating trench 100.
[0036] The insulating trench 100 is formed in a substrate 101 from a trench 102 filled with an insulating material 103. The trench 102 extends from the surface of the substrate 101. According to one example, the substrate may be a semiconductor substrate, for example a substrate comprising silicon. The trench 102 may have a width of between 200 and 400 nm, for example of the order of 300 nm, and may have a depth of between 3 and 10 pm, for example of the order of 6 pm. According to one example, the insulating material 103 is silicon oxide (SiO2).
[0037] To manufacture the insulating trench 100, the trench 102 is formed in the substrate 101, for example using an etching process. The trench 101 is then filled with the insulating material 103 using a step of depositing a layer of said insulating material, generally, a conformal deposition step.
[0038] A problem that regularly occurs is that a central portion of the trench may not be filled during this deposition step, and the insulating trench 100 may have, at the end of its manufacturing process, an empty cavity 104, or empty portion 104, positioned at the center of the insulating trench. The presence of such a cavity may cause sealing problems at the insulating trench.
[0039] According to one example, an insulating trench of the type of trench 100 can be used to delimit the periphery of a simple electronic device, such as a transistor, or a more complex electronic device, such as a pixel. According to another example, an insulating trench of this type can be used within an electrical device itself.
[0040] [Fig.2] is a sectional view showing a capacitor 200.
[0041] The capacitor 200 has common elements with the insulating trench 100 described in relation to [Fig. 1]. These common elements are not described again in detail, and only the differences between the capacitor 200 and the insulating trench 100 are highlighted below.
[0042] The capacitor 200 is formed like the insulating trench, and further has two electrically conductive electrodes 201 placed on either side of the trench 103. The electrodes 201 are generally formed against the walls of a trench formed in a substrate, then the remainder of the trench is filled with an insulating material, in the same way that the trench 101 is filled with the material 103. According to one example, the electrodes 201 are electrically insulated from the substrate 101 by an electrically insulating layer 202.
[0043] The problem explained in relation to [Fig. 1] may well occur during the manufacture of the capacitor 200. Indeed, a central part of the trench 101 may not be filled during this deposition step, and the capacitor 200 may have, at the end of its manufacturing process, the empty cavity 104 described in relation to [Fig. 1]. The presence of such a cavity may cause sealing problems at the insulating trench.
[0044] [Fig. 3] presents an embodiment of a method for manufacturing an insulating trench, or a capacitor 200, making it possible to reduce the formation of the cavity 104. [Fig. 3] comprises, more particularly, five sectional views (A), (B), (C), (D) and (E) illustrating steps of an embodiment of the method for manufacturing an insulating trench overcoming the problem described in relation to [Fig. 1].
[0045] In the step of view (A), an insulating trench of the type of the insulating trench 100 of [Fig.l] has been formed. In other words, a trench 302 has been formed in a substrate 301, and then has been filled with an insulating material 303. A cavity 304 of the type of the cavity 104 is still present after the filling step.
[0046] According to one example, the substrate 301 is a semiconductor substrate, comprising, for example, silicon. According to one example, the trench 302 may have a width of between 200 and 300 nm, for example of the order of 220 nm, and may have a depth of between 1 and 10 pm, for example of the order of 3 pm. According to one example, the insulating material 303 is silicon oxide (SiO2). The cavity 304 has a maximum diameter denoted d.
[0047] In addition, in step (A), and optionally, a polishing process has been implemented. This polishing step makes it possible to expose the cavity 304 on the surface side of the substrate 301. According to one example, the polishing process is chemical mechanical polishing (CMP).
[0048] In addition, and optionally, an additional cleaning step may be implemented after the polishing process. This cleaning step is, for example, the implementation of a wet etching process, for example using hydrofluoric acid.
[0049] In the step of view (B), subsequent to the step of view (A), an etch stop layer 305 is deposited conformally on the structure of view (A). An etch stop layer is a layer made of a material whose etching rate is slower than the etching rate of another material deposited after which all or part is intended to be etched. According to one example, the etch stop layer 305 is a layer of an electrically insulating material such as, for example, aluminum oxide (Al2 O3), or aluminum nitride (AIN). The etch stop layer 305 has a thickness of between 5 and 20 nm, for example of the order of 7 nm.
[0050] In the step of view (C), subsequent to the step of view (B), a layer 306 made of an insulating material is deposited on, and in contact with, the etch stop layer 305. According to one example, the insulating material of the layer 306 is silicon oxide (SiO2). According to one embodiment, the etching rate of the material of the layer 306 is greater than the etching rate of the material of the etch stop layer 305. According to one example, the insulating material of the layer 306 is the same material as that of the layer 303. According to another example, the insulating material of the layer 306 is different from the material 303. The layer 306 has a thickness greater than or equal to half the diameter of the cavity 304.
[0051] The layer 306 makes it possible to fill the cavity 304 left empty after the filling of the trench 302, and makes it possible to plug the entrance of the cavity 304. According to one example, a cavity 307 may still be present even after the deposition of the layer 306.
[0052] In the step of view (D), subsequent to the step of view (C), an etching process, for example an anisotropic etching process, is implemented. The etching process is implemented until reaching the etching stop layer 305, and therefore makes it possible to remove the parts of the layer 306 resting outside the cavity 304, such as the parts of the layer 304 resting at the surface of the substrate 301. This operation is carried out without the use of a mask. According to one example, the etching process may be plasma etching, or dry etching.
[0053] In the step of view (E), subsequent to the step of view (D), a layer 308 made of a waterproof material, for example waterproof, is deposited in a conformal manner on the structure of view (D). According to one example, the layer 308 is a layer of aluminum oxide (A12O3). The layer 308 has a thickness of between 5 and 20 nm, for example of the order of 7 nm. According to one example, the layer 308 can also serve as a charge passivation layer.
[0054] An advantage of this embodiment is that it makes it possible to fill, at least in part, the cavity 304 formed during manufacturing, and to make the insulating trench watertight, for example waterproof.
[0055] According to one embodiment, other steps of manufacturing electronic devices may be interposed between the steps of views (C) and (D). In particular, the steps of views (D) and (E) may be carried out at the end of the manufacturing process of an electronic device comprising insulating trenches, the manufacturing process of which comprises steps similar to the steps of views (A) to (C). In this case, the steps of views (D) and (E) are used as a step in a method of correcting defects that may appear during the manufacturing of one or more insulating trenches.
[0056] [Fig.4] is a sectional view illustrating an embodiment of an image sensor 400 comprising an insulating trench obtained by the method described in relation to [Fig.3].
[0057] The image sensor 400 comprises two semiconductor substrates W1 and W2 bonded to each other via a connection interface 401.
[0058] At the substrate W1, the image sensor 400 comprises an insulating trench 402 and one or more image sensor components 403 (PIX), for example one or more pixels. More particularly, the component(s) 403 and the insulating trench 402 extend from an upper face 404 of the substrate WL. The insulating trench 402 is used to electrically and optically isolate the component(s) 403 from each other. Between a lower face 405 of the substrate W1, opposite the upper face 404 of the substrate W1, and a lower face of the components 403 and the insulating trench 402, the substrate W1 comprises a connection network 406 (VIAS).
[0059] At the substrate W2, the image sensor 400 comprises a driver circuit 407 (DRIVER) for the component 403. The driver circuit 407 comprises, for example, a transistor array. The driver circuit 407 extends from a lower face 408 of the substrate W2, over an entire portion of the substrate W2, or, for example, over the entire thickness of the substrate W2. Between a lower face 409 of the substrate W2, opposite the upper face 408 of the substrate W2, and a lower face of the circuit 407, the substrate W2 includes a 410 connection network (VIAS).
[0060] An example of a method for manufacturing the image sensor 400 comprises the following successive steps: - manufacturing the component 403 in the substrate W1, comprising the implementation of the method described in relation to [Fig.3] to obtain the insulating trench 402; - manufacturing the circuit 406 in the substrate W2; and - fixing, for example by gluing, the lower face 405 of the substrate W1 to the upper face 409 of the substrate W2.
[0061] The connection networks 406 and 410 and the connection interface 401 make it possible to electrically connect the component(s) 403 with the control circuit 407.
[0062] An advantage of using the manufacturing method of [Fig. 3] is that it makes it possible to obtain an image sensor whose insulating trench is well sealed. Indeed, during the manufacturing of the component 403, and of the trench 402 a cavity of the type of the cavity 104 described in relation to [Fig. 1] may appear. The use of the method of [Fig. 3] makes it possible to plug this cavity.
[0063] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art. In particular, the method of [Fig. 3] can be applied to other manufacturing methods, such as, for example, to the method of manufacturing a capacitor of the type of capacitor 200 of [Fig. 2]. In addition, the insulating trench 402 of the image sensor 400 can be replaced by a capacitor obtained by the method described in relation to [Fig. 3].
[0064] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given above.
Claims
Claims
1. A method of manufacturing an insulating trench in a substrate (301), for an electronic device, comprising the following successive steps: (a) filling a trench (302) formed in said substrate (301) with a first insulating material (303); (b) depositing a first etch stop layer (305) on said first material (303); (c) depositing a second layer (306) of a second insulating material on said first etch stop layer (305); (d) etching down to the etch stop layer (305); and (e) depositing a third layer of a third sealing material (308), wherein the method further comprises, between step (a) and (b), a step (f) of polishing the surface of said substrate (301).
2. The method of claim 1, wherein the third material (308) is waterproof.
3. A method according to claim 1 or 2, wherein step (f) involves a chemical-mechanical polishing process.
4. A method according to any one of claims 1 to 3, further comprising, between step (f) and (b), a wet etching step (g).
5. The method of claim 4, wherein during step (g), the wet etching uses a hydrofluoric acid solution.
6. A method according to any one of claims 1 to 5, wherein step (d) is an anisotropic etching step.
7. The method of any one of claims 1 to 6, wherein the first etch stop layer (305) is a layer of aluminum oxide or aluminum nitride.
8. A method according to any one of claims 1 to 7, wherein the first etch stop layer (305) has a thickness of between 5 and 20 nm.
9. Method according to any one of claims 1 to 8, wherein the second layer (306) has a thickness greater than or equal to half a diameter of a portion (304) still empty of said trench (301) after the filling step (a).
10. A method according to any one of claims 1 to 9, wherein the second insulating material (306) is silicon oxide.
11. A method according to any one of claims 1 to 10, wherein the third sealing material (308) is aluminum oxide.
12. A method according to any one of claims 1 to 11, wherein the third layer of the third sealing material (308) has a thickness of between 5 and 20 nm.
13. A method of manufacturing a capacitor using the method according to any one of claims 1 to 12.
14. Sealed insulating trench, obtained by the method according to any one of claims 1 to 13, for an electronic device, comprising an insulating trench having a central cavity (304) filled by a stack successively comprising: - a first etch stop layer (305); - a second layer (306) of a second insulating material; and - a third layer of a third sealed material (308).
15. A sealed capacitor comprising an insulating trench according to claim 14.
16. An image sensor comprising an insulating trench according to claim 14.
17. An image sensor comprising a capacitor according to claim 15.