METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE

Abstract

METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE This description relates to a method for manufacturing an electronic device (34), comprising manufacturing a board (30) containing several copies of the electronic device (34), forming weakened areas (24) in a substrate (5) using a laser, fixing the board (30) to the substrate (5) after the formation of the weakened areas (24), etching the board along the extension of the weakened areas (24), and breaking the substrate (5) at the level of the weakened areas (24) to separate the electronic devices (34). Figure for the abstract: Fig. 1D

Description

Title of the invention: PROCESS FOR MANUFACTURING AN ELECTRONIC DEVICE Technical field

[0001] The present description generally relates to methods of manufacturing electronic devices, in particular optoelectronic devices comprising electroluminescent diodes. Prior art

[0002] An example of a method of manufacturing an electronic device includes forming, on a substrate, a plate comprising several copies of the electronic device followed by separating the electronic devices. The separation of the electronic devices can be carried out by cutting the plate and the substrate, in particular by sawing. A drawback of such a separation method is that the cutting lines have a width greater than 100 µm. For certain applications, it is desirable that the cutting lines have a reduced width, in particular to reduce material losses.

[0003] A method for separating electronic devices to obtain narrow cutting lines includes locally embrittling the substrate by laser treatment, enabling the substrate to break through mechanical action to separate the electronic devices. A drawback is that the laser treatment can damage the components of the electronic devices near the cutting lines. This drawback can be particularly pronounced when the electronic devices each comprise a plurality of three-dimensional semiconductor elements of nanometer or micrometer size, separated by an electrically insulating material.Indeed, because the size of the three-dimensional semiconductor elements and the distance separating them are reduced, the heat dissipation from the laser processing can lead to damage to the three-dimensional semiconductor elements near the cutting lines. Summary of the invention

[0004] An embodiment overcomes all or part of the drawbacks of known electronic device manufacturing processes.

[0005] An object of an embodiment is that the width of the cutting lines, in the plate comprising several copies of the electronic device, is less than 100 pm.

[0006] An object of an embodiment is that the components of the electrical devices Irons close to the cutting lines should not be damaged.

[0007] One embodiment provides a method for manufacturing an electronic device, comprising manufacturing a board containing several copies of the electronic device, creating embrittled areas in a substrate using a laser, fixing the board to the substrate after the embrittled areas have been formed, etching the board along the embrittled areas, and breaking the substrate at the embrittled areas to separate the electronic devices. Since the laser treatment step of the substrate to create the embrittled areas is performed before the step of fixing the substrate to the board containing the electronic devices, this advantageously prevents the laser treatment from damaging the electronic components of the electronic devices on the board.

[0008] According to one embodiment, the plate is fixed to the substrate by bonding. This may involve bonding with a layer of adhesive, which can advantageously be implemented simply and at low cost. Alternatively, it may involve molecular bonding, which advantageously eliminates the need for an adhesive layer between the substrate and the plate.

[0009] According to one embodiment, the process comprises, after fixing the plate to the support and before breaking the support at weakened areas, a step of thinning the support. This advantageously facilitates breaking the support at weakened areas.

[0010] According to one embodiment, the engraving of the plate extending from the weakened areas is either dry or wet engraving. This advantageously allows for the creation of shallower trenches in the plate.

[0011] According to one embodiment, the support is laser transparent at least in the area of ​​weakened zones. This advantageously allows for the creation of localized weakened areas.

[0012] According to one embodiment, the step of fixing the plate on the support after the formation of the weakened areas includes a step of positioning first marks of the support relative to second marks of the plate, so that each electronic device to be separated is positioned between two weakened areas among the weakened areas.

[0013] According to one embodiment, the support is at least partly made of glass, quartz, or sapphire. This advantageously allows the use of supports that are commonly used in laser treatments.

[0014] In one embodiment, the electronic device comprises light-emitting diodes. The formation of weakened areas does not advantageously lead to deterioration of the light-emitting diodes adjacent to the desired cutting lines. In one embodiment, each light-emitting diode comprises a three-dimensional semiconductor element of nanometer or micrometer size, corresponding to a microwire, a nanowire or a pyramidal structure of nanometer or micrometer size, and an active layer covering the three-dimensional semiconductor element. Brief description of the drawings

[0015] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0016] [Fig.1A], [Fig.1B], [Fig.1C], [Fig.1D], [Fig.1E], [Fig.1F], and [Fig.1G] are each a partial and schematic cross-sectional view of the structure obtained at a stage of an embodiment of a manufacturing process for an electronic device;

[0017] [Fig.2] is a partial and schematic cross-sectional view of an embodiment of a support;

[0018] Fig. 3A, Fig. 3B, Fig. 3C, Fig. 3D, Fig. 3E, Fig. 3F, Fig. 3G, Fig. 3H, Fig. 3I, Fig. 3J, Fig. 3K, Fig. 3L, Fig. 3M, and Fig. 3N are each a partial, schematic cross-sectional view of the structure obtained at one stage of an embodiment of a process for manufacturing an optoelectronic device comprising light-emitting diodes; and

[0019] Figures 4, 5, and 6 are each a partial, schematic cross-sectional view of an embodiment of a light-emitting diode. Description of embodiments

[0020] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0021] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0022] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures or to a probe in a normal operating position.

[0023] Unless otherwise specified, the expressions "approximately", "roughly", and "on the order of" mean to the nearest 10%, preferably to the nearest 5%. In the case of angle, the expressions "approximately", "roughly", and "of The order of " " means to the nearest 10°, preferably to the nearest 5°. Furthermore, here the terms "insulator" and "conductor" are taken to mean "electrically insulating" and "electrically conductive" respectively.

[0024] Optoelectronic devices are understood to be devices adapted to perform the conversion of an electrical signal into electromagnetic radiation or vice versa, and in particular devices dedicated to the detection, measurement or emission of electromagnetic radiation.

[0025] The transmittance of a layer corresponds to the ratio between the intensity of the radiation exiting the layer through an exit face and the intensity of the radiation entering the layer through an entrance face opposite the exit face. In the following description, a layer or film is said to be opaque to radiation when the transmittance of the radiation through the layer or film is less than 10%. In the following description, a layer or film is said to be transparent to radiation when the transmittance of the radiation through the layer or film is greater than 10%.

[0026] According to the present invention, the laser treatment step of the substrate to form weakened areas in the substrate is carried out before the step of attaching the board comprising several copies of the electronic device to the substrate. This advantageously prevents the laser treatment from damaging the electronic components of the electronic devices on the board.

[0027] Fig.1A, Fig.1B, Fig.1C, Fig.1D, Fig.1E, Fig.1F, and Fig.1G are each a partial and schematic cross-sectional view of the structure obtained at a stage of an embodiment of a manufacturing process for an electronic device.

[0028] Fig. 1A is a partial, schematic cross-sectional view illustrating a local embrittlement step of a support 5 by a laser treatment system 10.

[0029] The processing system 10 comprises a laser source 12 and a focusing optical device 14 having an optical axis D. The source 12 is adapted to provide an incident laser beam 16 to the focusing optical device 14, which provides a converging laser beam 18. The focusing optical device 14 may comprise one optical component, two optical components, or more than two optical components, an optical component corresponding, for example, to a lens. Preferably, the incident laser beam 16 is substantially collimated along the optical axis D of the focusing optical device 14.

[0030] The support 5 comprises two opposing faces 20 and 22, the laser beam 18 entering the support 5 through face 20. In one embodiment, faces 20 and 22 are parallel. In another embodiment, faces 20 and 22 are flat. In one embodiment, the thickness of the support 5 is between 50 µm and 3 mm. In one embodiment, the support 5 has a single-layer structure and is composed of a single The first material, for example glass, quartz, silicon, or sapphire, is used. The support 5 is then laser-transparent. In another embodiment, the support 5 has a multilayer structure, the top layer of which is made of the first material. At least the top layer is then laser-transparent.

[0031] The laser treatment consists of embrittling areas 24 of the support 5, according to a laser stealth cutting process, in particular using a low-energy laser. By way of example, three embrittled areas 24 are shown as dashed lines in [Fig. 1A]. In one embodiment, the embrittled areas 24 extend into the support 5 from the face 20 of the support 5, over a thickness of between 5 µm and 100 µm. In another embodiment, each embrittled area 24 has a width of between 0.5 µm and 5 µm. Each embrittled area 24 corresponds to a local melting of the support 5 without material removal.

[0032] According to one embodiment, the wavelength of the laser beam 18 provided by the processing system 10 is between 100 nm and 3000 nm, depending on the material to be embrittled. In another embodiment, the laser beam 18 is emitted by the processing system 10 in the form of one pulse, two pulses, or more than two pulses, each pulse having a duration between 0.1 ps and 1000 ps. The energy of the laser beam for each pulse is between 1 pJ and 100 pJ.

[0033] Figure 1B is a partial, schematic cross-sectional view of the structure obtained after manufacturing a plate 30 on a substrate 32. The plate 30 comprises several copies of an electronic device 34, two copies of the electronic device 34 being shown by way of example in Figure 1B. The plate 30 comprises an upper face 36 and a lower face 38, opposite the upper face 36. The lower face 38 is in contact with the substrate 32. The upper face 38 is preferably flat. In one embodiment, the thickness of the plate 30 is between 1 µm and 100 µm. The electronic device 34 comprises electronic components 40, 42, 44, three electronic components 40, 42, 44 being shown by way of example for each electronic device 34 in Figure 1B. According to one embodiment, the electronic device 34 is an optoelectronic device.Electronic components 40, 42, 44 may then include light sources, in particular light-emitting diodes.

[0034] Fig. 1C is a partial, schematic cross-sectional view of the structure obtained after a step of attaching the structure shown in Fig. 1B to face 20 of the support 5 shown in Fig. 1A. The plate 30 is attached to the support 5 on the side of face 36. In one embodiment, the plate 30 is attached to the support 5 by bonding with a layer of adhesive 50. In another embodiment, not shown, the plate 30 is attached to the support 5 by molecular bonding. Face 36 of the plate 30 is then in direct contact Physics of face 20 of support 5.

[0035] The weakened areas 24 are located in the extension of the desired separation lines between the electronic devices 34. The separation lines correspond to the parts of the plate 30 to be removed to obtain the separation of the electronic devices 34. The desired separation lines between the electronic devices and the weakened areas 24 are superimposed, the desired separation lines covering the weakened areas 24. The correct positioning of the plate 30 relative to the support 5 is obtained by using, for example, marks on the plate 30 and marks on the support 5 (the marks not being illustrated).

[0036] Figure 1D is a partial, schematic cross-sectional view of the structure obtained after a substrate removal step 32, for example by dry etching, in particular plasma etching, or by wet etching, or by chemical-mechanical polishing, also known as CMP. Further steps can then be taken to continue the fabrication of the electronic devices 34 of the wafer 30, in particular the formation of conductive pads.

[0037] Figure [1E] is a partial, schematic cross-sectional view of the structure obtained after a step of etching trenches 52 in the plate 30 at the desired separation lines of the electronic devices 34. The etching is, for example, by dry etching, in particular plasma etching. The trenches 52 can extend into the adhesive layer 50 until they reach the face 20 of the substrate 5 at the weakened areas 24. In one embodiment, the trenches 52 do not extend into the substrate 5. The trenches 52 can be obtained by chemical etching. In one embodiment, the width of each trench 52 is between 1 µm and 20 µm.

[0038] Figure 1F is a partial, schematic cross-sectional view of the structure obtained after a thinning step of the support 5 from face 22. Depending on the nature of the material or materials composing the support 5, the thinning step can be carried out by grinding and / or by CMP. The CMP step may include, simultaneously or successively, mechanical polishing steps and chemical etching steps. At the end of the thinning step, the thickness of the support 5 is between 50 µm and 200 µm. According to one embodiment, the thickness of the plate 10 is less, in particular by at least a factor of 2, than the thickness of the support 5 after thinning.

[0039] Figure 1G is a partial, schematic cross-sectional view of the structure obtained after a mechanical rupture step of the support 5 at the weakened areas 24. Separate electronic devices 34 are thus obtained. According to an embodiment not shown, the rupture step includes the attachment of a stretchable adhesive film. mechanically to the support 5, on the side of the support 5 opposite the electronic devices 34, the extension of the adhesive film in the plane of the adhesive film, the electronic devices 34 then being separated but still attached to the adhesive film, and the detachment of the electronic devices from the adhesive film.

[0040] The process may include subsequent steps, in particular a step of removing portions of the support 5 and of the adhesive layer 50 present under each electronic device 34. In the case where the support 5 is retained for future use of the electronic device 34, the support 5 may, advantageously, be transparent to the light radiation emitted by the electronic device 34.

[0041] The embodiment of the manufacturing process advantageously allows the laser treatment of the support 5 to form the weakened areas 24 not to damage the electronic components 40, 42, 44 of the plate 30 since the laser treatment of the support 5 is carried out before the fixing of the plate 30 to the support 5.

[0042] Figure 2 is a cross-sectional view of an embodiment of the support 5. According to one embodiment, the support 5 has a multilayer structure and comprises a layer 56 of the first material covering a substrate 58 made of a second material different from the first material. The weakened areas 24 are formed in the layer 56. The substrate 58 may be laser transparent. According to one embodiment, the second material is a semiconductor material. The semiconductor material may be silicon, germanium, or a mixture of at least two of these compounds. Preferably, the substrate 58 is made of silicon, more preferably single-crystal silicon. Alternatively, the substrate 58 may be, at least in part, made of a non-semiconductor material, for example, an electrically insulating material or an electrically conductive material. The thickness of the layer 56 is between 50 µm and 200 µm.Advantageously, the second material composing the substrate 58 is chosen to facilitate the thinning step described previously in relation to [Fig.1F]. In particular, determining the end of the thinning step is facilitated since it corresponds to the complete removal of the substrate 58.

[0043] A more detailed embodiment will now be described in the case where the electronic device 34 is an optoelectronic device and the electronic components 40, 42, 44 comprise light-emitting diodes (LEDs) having three-dimensional semiconductor elements of nanometer or micrometer size, in particular microwires or nanowires or pyramidal structures coated with active layers. Indeed, for such optoelectronic devices 34, separating the electronic devices 34 by creating weakened areas in a substrate through laser treatment while the plate containing the electronic devices 34 is fixed to the substrate results in significant deterioration of the LEDs near the cutting lines. desired.

[0044] The term "microwire" or "nanofil" refers to a three-dimensional structure elongated along a preferred direction, at least two dimensions of which, called minor dimensions, are between 5 nm and 5 pm, preferably between 100 nm and 2 pm, more preferably between 200 nm and 1.5 pm, the third dimension, called major dimension or height, being greater than or equal to 1, preferably greater than or equal to 3, and even more preferably greater than or equal to 5, the largest of the minor dimensions. In some embodiments, the height of each microwire or nanowire may be greater than or equal to 500 nm, preferably between 1 pm and 50 pm. In the remainder of this description, the term "wire" is used to mean "microwire or nanowire".

[0045] The cross-section of wires can have various shapes, for example, oval, circular, or polygonal, including triangular, rectangular, square, or hexagonal. It will be understood that the term "average diameter" used in relation to a cross-section of a wire designates a quantity associated with the wire in that cross-section, corresponding, for example, to the diameter of the disk having the same area as the cross-section of the wire.

[0046] In the following description, the term pyramid refers to a three-dimensional structure, part of which is pyramidal or elongated conical in shape. This pyramidal structure may be truncated, meaning that the apex of the cone is absent, leaving a flat surface. The base of the pyramid is inscribed within a square with side lengths ranging from 100 nm to 10 pm, preferably between 0.2 pm and 2 pm. The polygon forming the base of the pyramid may be a hexagon. The height of the pyramid, from its base to its apex or the apex flat surface, varies from 100 nm to 20 pm, preferably between 200 nm and 2 pm.

[0047] In the following description, embodiments will be described for an optoelectronic device with light-emitting diodes comprising microwires or nanowires. However, it is clear that these embodiments can also relate to an optoelectronic device with light-emitting diodes comprising pyramids of micrometer or nanometer size.

[0048] The wires comprise predominantly, preferably more than 60% by mass, and more preferably more than 80% by mass, at least one semiconductor material. The semiconductor material may be silicon, germanium, silicon carbide, an IILV compound, an ILVI compound, or a combination of at least two of these compounds.

[0049] Examples of Group III elements include gallium (Ga), indium (In), or aluminum (Al). Examples of Group IIIN compounds are GaN, AIN, InN, InGaN, AlGaN, or AlInGaN. Other Group V elements may also be used, For example, phosphorus or arsenic. In general, elements in III-V compounds can be combined in different mole fractions. Examples of Group II elements include Group IIA elements, notably beryllium (Be) and magnesium (Mg), and Group IIB elements, notably zinc (Zn), cadmium (Cd), and mercury (Hg). Examples of Group VI elements include Group VIA elements, notably oxygen (O) and tellurium (Te). Examples of II-VI compounds are ZnO, ZnMgO, CdZnO, CdZnMgO, CdHgTe, CdTe, or HgTe. In general, elements in II-VI compounds can be combined in different mole fractions. The semiconductor material of the wires may include a dopant, for example silicon providing N-type doping of a III-N compound, or magnesium providing P-type doping of a III-N compound.

[0050] Fig. 3A, Fig. 3B, Fig. 3C, Fig. 3D, Fig. 3E, Fig. 3F, Fig. 3G, Fig. 3H, Fig. 3I, Fig. 3J, Fig. 3K, Fig. 3L, Fig. 3M, and Fig. 3N are each a partial and schematic cross-sectional view of the structure obtained at one stage of an embodiment of a manufacturing process for the optoelectronic device 34.

[0051] Fig. 3A, Fig. 3B, Fig. 3C, Fig. 3D, Fig. 3E, and Fig. 3F illustrate the fabrication of the plate 30 on the substrate 32 in the case where the plate 30 comprises several copies of the optoelectronic device 34 with nanowires or microwires.

[0052] Figure 3A is a partial, schematic cross-sectional view of the structure obtained after the following steps: - formation, on a substrate 60 comprising opposite faces 62 and 64, face 62 being preferably flat at least at the level of the light-emitting diodes, of a germination layer 66 in a material promoting the growth of wires and disposed on face 62; - formation of a stack of two insulating layers 68 and 70 covering the germination layer 66 and comprising openings 72 exposing portions of the germination layer 66; and - growth, for each opening 72, of a light-emitting diode LED in contact with the germination layer 66 through the opening 72, six light-emitting diodes LEDs of a single optoelectronic device 34 being represented as an example in [Fig.3A], the light-emitting diodes LEDs being arranged in sets of light-emitting diodes LEDs.

[0053] Figure 3B is a partial, schematic cross-sectional view of the structure obtained after the following steps: - formation of an insulating layer 74 extending over the lateral sides of a lower portion of each LED and extending over the layer insulating 70 between the LED light-emitting diodes; - formation of a layer 76 forming an electrode covering each LED and extending further over the insulating layer 74 between the LEDs; - formation of a protective dielectric layer 78 extending over the layer 76; and - formation of a planarization layer 80 extending over the layer 78 and having a free face 81 flat.

[0054] Figure 3C is a partial, schematic cross-sectional view of the structure obtained after the following steps: - fixing a handle 82 to the face 81; and - removal of the substrate 60, and of the germination layer 66, by any known means.

[0055] [Fig.3D] is a partial and schematic cross-sectional view of the structure obtained after the formation, on the insulating layer 68, of an interconnection structure 83 comprising a stack 84 of insulating layers and conductive tracks 86 of different levels of metallization, conductive tracks 86 of two levels of metallization being shown by way of example in [Fig.3D], and conductive vias 88 extending through the stack 84 of insulating layers, the insulating layer 68, and the insulating layer 74, and connecting the electrode layer 76 to the conductive tracks 86, the interconnection structure 83 having a free face 90 preferably planar.

[0056] Fig. 3E is a partial, schematic cross-sectional view of the structure obtained after a step of fixing the substrate 32 to the face 90, for example by molecular bonding.

[0057] Figure 3F is a partial, schematic cross-sectional view of the structure obtained in the following steps: - removal of handle 82 by any known means; - etching of the insulating layer 80 at the level of certain LED light-emitting diode assemblies to expose these LED light-emitting diode assemblies, and between the LED light-emitting diode assemblies, the insulating layer 80 being retained for the other LED light-emitting diode assemblies; - formation of photoluminescent blocks 94, 96 covering the sets of exposed light-emitting diodes LEDs, two photoluminescent blocks 94, 96 being shown as an example in [Fig.3F]; - formation of reflective walls 98 between blocks 94, 96; - formation of an encapsulation layer 100 covering each block 94, 96, and the protective dielectric layer 78 between blocks 94, 96, the encapsulation layer 100 comprising the unetched parts of the insulating layer 80; and - formation, in the encapsulation layer 100, of at least one color filter 102, for example a single yellow filter, covering at least some of the photoluminescent blocks 94, 96, a single filter 102 covering both photoluminescent blocks 94, 96 being shown as an example in [Fig.3F].

[0058] The structure resting on the substrate 32 forms the plate 30 described previously and the free face 36 of the encapsulation layer 100 corresponds to the face 36 described previously.

[0059] Figure 3G is a partial, schematic cross-sectional view illustrating the step described above in relation to Figure 1C, which involves bonding the face 36 to the support 5 with a layer of adhesive 50. In Figure 3G, the support 5 is shown with two weakened areas 24 and includes an opaque layer 104 on the side opposite the plate 30. The opaque layer 104 may be omitted. The opaque layer 104 renders the substrate 5 non-transparent, which can facilitate the detection and handling of the structure by machines.

[0060] Fig. 3H is a partial, schematic cross-sectional view illustrating the step described above in relation to Fig. 1D, including the removal of substrate 32.

[0061] Fig. 31 is a partial, schematic cross-sectional view of the structure obtained after a step of forming openings 106 in the stack 84 of insulating layers to expose conductive tracks 86.

[0062] Fig. 3J is a partial, schematic cross-sectional view of the structure obtained after a step of removing the opaque layer 104. As an alternative, the opaque layer 104 can be removed at a later stage of the manufacturing process, in particular after the steps described later in relation to Fig. 3L.

[0063] Figure 3K is a partial, schematic cross-sectional view of the structure obtained after a step of forming conductive pads 108 in contact with the conductive tracks 86 exposed through the openings 106, a single conductive pad 108 being shown as an example in Figure 3K. Each conductive pad 108 can have a single-layer or multi-layer structure.

[0064] Fig. 3L is a partial, schematic cross-sectional view illustrating the step described above in relation to Fig. 1E, comprising the engraving of trenches 52 in the plate 30 at the desired separation lines of the electronic devices 34.

[0065] Fig. 3M is a partial, schematic cross-sectional view illustrating the step described above in relation to Fig. 1F, including the thinning of support 5.

[0066] Fig. 3N is a partial, schematic cross-sectional view illustrating the step described above in relation to Fig. 1G, comprising breaking the support 5 at the level of the weakened areas 24 to separate the optoelectronic devices 34.

[0067] Figure 4 represents an embodiment of the LEDs. According to one embodiment, each LED comprises a wire 110 is in contact with the seed layer 66 through one of the openings 72, and a shell 112 comprises a stack of semiconductor layers covering the lateral walls and the top of the wire 110. Such a configuration is called radial. The assembly formed by each wire 110 and its associated shell 112 constitutes the light-emitting diode (LED). In [Fig. 4], a reflective layer 114, for example metallic, is also shown, covering the electrode layer 76 between the wires 110 and in direct physical contact with the electrode layer 76.

[0068] The shell 112 may comprise a stack of several layers, including an active layer 116 and a bonding layer 118. The active layer 116 is the layer from which the majority, and preferably all, of the radiation provided by the light-emitting diode (LED) is emitted. By way of example, the active layer 116 may include confinement means, such as a single quantum well or multiple quantum wells. The bonding layer 118 may comprise a stack of semiconductor layers of the same IILV material as the wire 110 but of the opposite conductivity type to that of the wire 110.

[0069] Figure 5 represents an embodiment of the LED. The LED shown in Figure 5 comprises all the elements of the LED shown in Figure 4, except that the shell 112 is present only at the top of the wire 110. Such a configuration is called axial.

[0070] The formation of the LEDs, i.e. the growth of the wires 110 in the openings 72, and the formation of the shells 112 covering the wires 110 can be carried out for example by metal-organic chemical vapor deposition (MOCVD) or any other suitable process.

[0071] Figure 6 represents an embodiment of light-emitting diodes (LEDs). The LED shown in Figure 6 has a two-dimensional structure insofar as it is fabricated by the formation of a stack of substantially planar semiconductor layers on the substrate 60, followed by the delimitation of the LED, for example, by etching trenches in the stack of semiconductor layers. The LED shown in Figure 6 comprises a semiconductor layer 120 doped with a first type of conductivity, covered by an active layer 122, itself covered by a semiconductor layer 124 doped with a second type of conductivity.

[0072] The substrate 60 may be a single-piece structure or a layer covering a support made of another material. The substrate 60 is preferably a semiconductor substrate, for example a substrate made of silicon, germanium, silicon carbide, or an IILV compound, such as GaN or GaAs. or a ZnO substrate. Preferably, substrate 60 is a monocrystalline silicon substrate. Substrate 60 may correspond to a multilayer silicon-on-insulator structure, also known as SOI (Silicon On Insulator).

[0073] The germination layer 66 is made of a material that promotes wire growth. By way of example, the material composing the germination layer 66 may be a nitride, a carbide, or a boride of a transition metal from group IV, V, or VI of the periodic table of elements, or a combination of these compounds.

[0074] According to another embodiment, the germination layer 66 may not be present. According to another embodiment, the germination layer 66 may be replaced by germination pads, for example formed at the bottom of the openings 72.

[0075] Each insulating layer 68, 70, 74, 78, 80, and the encapsulation layer 100 may be made of a dielectric material, for example, silicon dioxide (SiO2), silicon nitride (SixNy, where x is approximately equal to 3 and y is approximately equal to 4, for example, Si3N4), silicon oxynitride (in particular of general formula SiOxNy, for example, Si2ON2), aluminum oxide (Al2O3), hafnium oxide (HfO2), titanium dioxide (TiO2), or diamond. Each insulating layer 68, 70, 74, 78, 80 may have a single-layer structure or correspond to a stack of two or more layers.

[0076] The electrode layer 76 is adapted to allow the passage of electromagnetic radiation emitted by the light-emitting diodes. The material forming the electrode layer 76 can be a transparent and conductive material such as indium tin oxide (ITO), aluminum- or gallium-doped zinc oxide, or graphene. The thickness of the electrode layer 76 can be between 0.01 pm and 10 pm.

[0077] According to one embodiment, each photoluminescent block 94, 96 is located opposite one of the light-emitting diodes or a set of light-emitting diodes. Each photoluminescent block 94, 96 comprises phosphors adapted, when excited by the light emitted by the associated LED, to emit light at a wavelength different from the wavelength of the light emitted by the associated LED.

[0078] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.

[0079] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. A method for manufacturing an electronic device (34), comprising: - manufacturing a wafer (30) comprising several copies of the electronic device (34), the wafer (30) being fixed to a substrate (32); - forming weakened areas (24) in a support (5) by means of a laser; - fixing the wafer (30) to the support (5) after the formation of the weakened areas (24); - removing the substrate (32) after fixing the wafer (30) to the support (5); - etching the wafer in line with the weakened areas (24) after removing the substrate (32); and - breaking the support (5) at the level of the weakened areas (24) to separate the electronic devices (34).

2. Method according to claim 1, wherein the fixing of the plate (30) to the support (5) is achieved by gluing.

3. Method according to claim 2, wherein the fixing of the plate (30) to the support (5) is achieved by bonding with a layer of glue (50).

4. Method according to claim 2, wherein the attachment of the plate (30) to the support (5) is achieved by molecular bonding.

5. A method according to any one of claims 1 to 4, comprising, after fixing the plate (30) to the support (5), and before breaking the support (5) at weakened areas (24), a step of thinning the support (5).

6. A method according to any one of claims 1 to 5, wherein the engraving of the plate (30) in the extension of the weakened areas (24) is a dry engraving or a wet engraving.

7. A method according to any one of claims 1 to 6, wherein the step of fixing the plate (30) on the support (5) after the formation of the weakened areas (24) includes a step of positioning first marks of the support (5) relative to second marks of the plate (30), so that each electronic device (34) to be separated is positioned between two weakened areas (24) among the weakened areas (24).

8. A method according to any one of claims 1 to 7, wherein the support (5) is laser transparent at least at the level of weakened areas (24).

9. A method according to any one of claims 1 to 8, wherein the support (5) is at least partly made of glass, quartz, or sapphire.

10. A method according to any one of claims 1 to 9, wherein the electronic device (34) comprises light-emitting diodes (LEDs).

11. A method according to claim 10, wherein each light-emitting diode (LED) comprises a three-dimensional semiconductor element (110) of nanometer or micrometer size, corresponding to a microwire, a nanowire or a pyramidal structure of nanometer or micrometer size, and an active layer (112) covering the three-dimensional semiconductor element (110).

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