Structuring a functional layer using a sacrificial layer and preparing a MIM-type capacitance implementing said structuring

Abstract

The invention relates, firstly, to a method for structuring a functional layer (130), comprising at least the following steps: a) providing a substrate (110) having a surface locally covered by a so-called sacrificial layer (120), one or more areas of the surface of the substrate (110) being devoid of the sacrificial layer (120); b) selectively growing the functional layer (130) on the area(s) of the surface of the substrate (110) devoid of the sacrificial layer (120); c) removing the sacrificial layer (120); thereby the surface of the substrate (110) is covered by a structured functional layer (130). The invention further relates to a method for preparing a MIM-type capacitance, by implementing the structuring method to structure at least one layer of the capacitance.Applications: micro- and nanoelectronic devices such as electronic chips, fabrication of high-density MIM-type capacitors. Figure for the abstract: Figure 3.

Description

Title of the invention: Structuring of a functional layer by means of a sacrificial layer and preparation of a MIM type capacitance implementing said structuring Technical field

[0001] The invention relates to the field of micro- and nano-technologies and more specifically to the field of the production of micro- and nano-electronic devices.

[0002] More particularly, the invention relates, firstly, to a method for structuring a functional layer by means of a so-called sacrificial layer.

[0003] The invention also relates to a method for preparing MIM (for “Metal-Insulator-Metal”) type capacitance by implementing a method for structuring a functional layer of the capacitance by means of a sacrificial layer.

[0004] The invention finds application in particular in micro- and nano-technology and more specifically in the manufacture of high-density capacitances such as MIM type capacitances for example for electronic chips. State of the prior art

[0005] The advent of connected and intelligent objects is currently the subject of research, particularly research into highly advanced and increasingly complex micro- and nano-electronic devices.

[0006] In addition to developments related to the architecture and design of micro- and nano-electronic components enabling them to meet very advanced technological and performance criteria, the structuring of the material at submicron and nanometric sizes is one of the key points in the manufacture of such technologies.

[0007] MIM type capacitances - corresponding to a stack of a dielectric layer nested between two electrodes - represent one of the essential components of these micro- and nano-electronic devices.

[0008] To structure or delimit the deposition of layers of materials during the manufacture of such components, photolithography and etching processes are generally implemented.

[0009] However, with the race to miniaturize micro- and nanoelectronic devices, we are witnessing a multiplication of the number of steps in photolithography and etching processes as well as a complication of these steps, for example by implementing a multiple photolithography process exhibitions (or LELE for “Litho Etch Litho Etch” in English) or even a self-aligned multi-structuring process (or SADP for “Self-Aligned Double Patterning” in English).

[0010] However, the multiplication and complexity of these steps not only increase the risk of misalignment of the layers of materials forming the components of the micro- and nano-electronic devices, which leads to a loss of efficiency, but also increase the manufacturing cost of these micro- and nano-electronic devices, in particular because of the need to use increasingly expensive equipment.

[0011] There is therefore a need to develop a new method for structuring layers of materials making it possible to reduce the number of steps in the manufacture of components for micro- and nano-electronic devices, compared to the methods already known. Statement of the invention

[0012] The invention aims precisely to provide such a method.

[0013] The subject of the invention is therefore, firstly, a method for structuring a functional layer, comprising at least the following steps: a) providing a substrate having a surface locally covered by a so-called sacrificial layer made of a lithiated material, one or more areas of the surface of the substrate being devoid of the sacrificial layer; b) growing the functional layer selectively on the area(s) of the substrate surface devoid of the sacrificial layer, the functional layer being obtained from a halogenated precursor comprising chlorine, iodine or bromine, preferably chlorine; c) removal of the sacrificial layer; whereby the surface of the substrate is covered with a structured functional layer.

[0014] It is specified that, in the above and the following, "structuring" means the act of selectively delimiting the deposition of a layer on a predetermined zone and, advantageously, giving it the shape of a desired pattern.

[0015] Furthermore, in the above and the following, "growth" means that the functional layer can be deposited and grow on the surface of an underlying material, so as to have a desired homogeneous thickness over the entire surface.

[0016] The invention is fundamentally distinguished from the prior art by the use of a sacrificial layer. The sacrificial layer is made of a material capable of delaying, or even preventing, the growth of the functional layer. The growth rate of the functional layer on the sacrificial layer is zero or less than to the growth rate of the functional layer on the substrate. When the precursors of the functional layer are deposited on the sacrificial layer, an interaction between the compounds present in the sacrificial layer and these precursors takes place, leading to a delay or even an absence of growth of the first atomic layers of the functional layer.

[0017] Thus, the area or areas of the surface of the substrate which are devoid of the sacrificial layer make it possible to obtain areas favorable to the growth of the functional layer, while the area or areas covered by the sacrificial layer are areas said to be unfavorable to the growth of the functional layer.

[0018] Advantageously, the sacrificial layer is made of a lithium oxide or a lithium oxynitride, for example chosen from LiPON, Li2SiO3, LiPO, LiSiPON, LiA102, LiOH, Li2O and Li2CO3, preference being given however to LiPON.

[0019] According to a first embodiment of the invention, the functional layer may be an electrical layer made of a metal nitride such as titanium nitride, tantalum nitride, molybdenum nitride or tungsten nitride, preference being given to titanium nitride. For example, a TiN layer obtained from a halogenated precursor has a low electrical resistivity, typically an electrical resistivity generally less than 500 pQ cm. Such a layer may be used as an electrode in a MIM capacitor.

[0020] According to a second embodiment of the invention, the functional layer may be a dielectric layer made of a metal oxide preferably chosen from hafnium oxide, silicon oxide, zirconium oxide and titanium oxide, preference being given, however, to hafnium oxide. Such a layer may be used as an electrically insulating layer in a MIM capacitor.

[0021] According to the invention, step a) of the method preferably comprises the following sub-steps: i) deposition of the sacrificial layer on all or part of the surface of the substrate, preferably by the atomic layer deposition technique (or ALD for “Atomic Layer Deposition” in English); ii) partial removal of the sacrificial layer at predetermined locations by plasma etching, wet etching or laser etching, with preference given to plasma etching.

[0022] More particularly, the sacrificial layer is preferably deposited by ALD, generally at a temperature between 200°C and 450°C, for example at 300°C and under vacuum (from a few mTorr to a few Torr; i.e. between approximately 0.1 Pa and a few hundred Pa, for example 300 Pa) which makes it possible in particular to obtain very conformable layers, of very high purity and of very low thickness.

[0023] The principle of ALD deposition lies in the fact of introducing into an ALD chamber at least two reactive species, called “precursors”, then circulating them alternately on the surface of a material.

[0024] The choice of precursors depends on the desired nature of the layer to be deposited.

[0025] For example, to deposit a sacrificial layer of lithiated material, the precursors Generally used are lithium hexamethyldisilazane (LiHMDS) coupled with diethyl phosphoramidate (DEPA), lithium tert-butylate (LiOtBu) coupled with DEPA or LiOtBu coupled with trimethyl phosphite (TMPO) to obtain a layer of lithium phosphorus oxynitride (or LiPON).

[0026] It is also possible to use, for example, LiOtBu coupled with tetraethyl orthosilicate (noted TEOS) and water, which allows the production of a layer of lithium meta-silicate (or Li2SiO3).

[0027] After the introduction and alternating circulation of each of the precursors, a step of purging them is generally implemented, for example for a duration of at least 35 seconds, to eliminate the excess precursors and any unwanted by-products obtained during a reaction between the precursors.

[0028] Furthermore, the introduction and alternating circulation can be repeated a number of times until a desired thickness is obtained.

[0029] According to the invention, the sacrificial layer thus deposited on all or part of the surface of the substrate typically has a thickness of between 1 nm and 50 nm and, more generally, between 1 nm and 5 nm, for example equal to 2 nm. This low thickness is sufficient to inhibit the growth of the overlying layer obtained from a halide.

[0030] Such a sacrificial layer comprising lithium is advantageously used in the context of the invention because it has the advantage of being easily removed by standard etching solutions such as plasma etching.

[0031] It is thus possible to implement sub-step ii) by plasma etching, for example with a fluorinated plasma (which may comprise trifluoromethane) or chlorinated plasma (which may comprise dichlorine) and using a hard mask made of a suitable material, such as titanium, aluminium or nickel and a stop layer, for example a silicon oxide layer, having one or more patterns so as, on the one hand, to protect certain parts of the underlying layer and, on the other hand, to expose others to the plasma.

[0032] Thus, the parts protected by the hard mask and the stop layer are not attacked by the plasma and therefore are not eliminated, while the parts not protected by the hard mask and the stop layer are attacked and therefore eliminated by the plasma etching.

[0033] This partial elimination sub-step thus makes it possible to obtain and select the the areas of the surface devoid of the sacrificial layer. In other words, this sub-step makes it possible to select the area(s) favorable and the area(s) unfavorable to the growth of the functional layer, which consequently makes it possible to delimit and selectively locate the deposits of layers of materials and in particular of layers obtained from at least one halide.

[0034] Also, it is preferred that step b) is carried out by ALD. At least one of the precursors of the functional layer is a halide comprising chlorine, iodine or bromine, preference being given to chlorine.

[0035] When the functional layer is an electrical layer made of a metal nitride, the ALD deposition is typically carried out at a temperature between 200°C and 450°C, for example at 400°C.

[0036] As mentioned previously, the precursors used during ALD deposition are chosen according to the desired nature of the layer. For example, titanium tetrachloride (TiCC) can be coupled with ammonia to obtain an electrical layer of titanium nitride (TiN).

[0037] When the functional layer is a dielectric layer of a metal oxide, the ALD deposition can be carried out at a temperature between 200°C and 450°C, for example at 300°C.

[0038] For example, the precursors generally used to obtain a hafnium oxide layer are hafnium tetrachloride (HfCl4) coupled with water.

[0039] It is also possible to use as precursors silicon tetrachloride (SiCl4) with water to obtain a dielectric layer of silicon oxide or zirconium tetrachloride (ZrCl4) coupled with water to obtain a layer of zirconium oxide or titanium tetrachloride (TiCl4) coupled with water to obtain a layer of titanium oxide.

[0040] A person skilled in the art will be perfectly able to adapt the precursor(s) comprising the halide according to the nature of the desired functional layer.

[0041] Usually, during the deposition by ALD of a functional layer, the introduction of each of the precursors is followed by a time, called waiting, before purging them.

[0042] The waiting time represents the residence time of the precursors on the surface of the substrate or, where appropriate, on the surface of an underlying layer. The waiting time allows the precursors to diffuse and react optimally, particularly in complex structures comprising, for example, a substrate with a micro-structured surface.

[0043] In the context of the invention, the waiting time can for example be set between 15 seconds and 100 seconds and more particularly set at 30 seconds while the purge can be implemented for example for at least 35 seconds.

[0044] As for the sacrificial layer, the introduction and alternating circulation of the precursors, allowing the deposition of the functional layer, can be repeated a certain number of times until a desired thickness of the layer is obtained.

[0045] In the context of the invention, the functional layer is an ultra-thin layer and may have a thickness of between 3 nm and 100 nm, more generally between 5 nm and 20 nm, for example equal to 10 nm.

[0046] On the other hand, in accordance with the invention, step c) of the method, consisting of removing the sacrificial layer, is preferably carried out by plasma etching, wet etching or laser etching, preference being given, however, to plasma etching, and even more preferably to plasma etching which comprises fluorine, such as trifluoromethane or which comprises chlorine, such as dichlorine, preference being given to fluorine.

[0047] Such etching techniques make it possible to easily remove the sacrificial layer without altering the properties of any other functional layer present on the substrate.

[0048] It should be noted that the sacrificial layer has the role of delaying or even inhibiting the growth of the functional layer, a very small thickness of this functional layer is therefore likely to be deposited on the sacrificial layer. However, this would in no way harm the method of the invention since the deposited functional layer would be removed at the same time as the sacrificial layer during step c), due to its very small thickness. By very small thickness, we mean a thickness of less than 3 nm and, better still, less than 1 nm.

[0049] Furthermore, the surface of the substrate may, for example, be flat - i.e., in two dimensions - or may comprise one or more flat areas and one or more microstructured areas - i.e., in three dimensions.

[0050] In the foregoing and the following, the term "microstructured zone" means a zone of the surface comprising pores or vias, for example of elongated shape, which makes it possible in particular to increase the specific surface area of ​​the substrate - that is to say the surface area of ​​the substrate intended to be covered in particular by the functional layer - compared to a flat zone.

[0051] Thus, a surface comprising one or more flat zones and one or more microstructured zones may have a more or less significant aspect ratio, this aspect ratio corresponding to the ratio of the longitudinal dimension to the transverse dimension of the pores or vias. Also, the higher the aspect ratio, the greater the specific surface area of ​​the substrate. For example, an aspect ratio greater than 20 may be considered.

[0052] More particularly, it is preferred that the surface of the substrate comprises one or more flat areas and one or more microstructured areas. In this case, the surface of the substrate is advantageously covered by the sacrificial layer only on its flat zone(s) while the microstructured zone(s) are devoid of the sacrificial layer, as a result of which the growth of the functional layer (step b) of the process) will take place selectively on the microstructured zones.

[0053] Generally, the substrate may be made of silicon, metal nitride or a metal oxide material such as alumina or any other suitable material.

[0054] The method is particularly advantageous in the context of manufacturing MIM type capacitances, since it makes it possible to reduce the number of steps in the manufacturing of a structure such as a MIM type capacitance.

[0055] In particular, the method can be implemented to structure at least one of the electrodes of the MIM type capacitance and / or to structure the electrically insulating layer of the MIM type capacitance.

[0056] The invention also relates to a method for preparing a Metal-Insulator-Metal type capacitance which comprises at least the following steps: - structuring of an electrical functional layer (first electrode also called lower electrode) by implementing the process as defined previously; - deposition of a dielectric layer; - deposition of another electrical layer (second electrode also called upper electrode), identical or different from the first electrical functional layer, preferably identical.

[0057] According to the preparation method defined above, the electrical functional layer may be made of a metal nitride, such as titanium nitride, tantalum nitride, molybdenum nitride or tungsten nitride, this layer being obtained from a halide.

[0058] In this particular case, the dielectric layer and the other electrical layer are not necessarily obtained from a halide, it being understood that they are not intended to be structured.

[0059] For example, the dielectric layer may be made of a high permittivity material, such as hafnium oxide, silicon oxide, zirconium oxide or titanium oxide or it may be an ionic dielectric layer, for example, made of LiPON, LiSiPON, LiA102, LATP or a material called LGPS, LPS or even LLZO.

[0060] The other electrical layer, for its part, can for example be made of a metal nitride, identical or different from that of the electrical functional layer.

[0061] Thus, the functional layer of the MIM type capacitance obtained is structured, in particular thanks to the phenomenon of delay or absence of growth of this layer. functional due to the presence of the sacrificial layer.

[0062] The invention also relates to a method for preparing a Metal-Insulator-Metal type capacitance which comprises at least the following steps: - structuring a dielectric functional layer by implementing the method as defined previously, the substrate provided in step a) comprising a support substrate and a first electrical layer (first electrode), the first electrical layer being covered locally by the sacrificial layer, - deposition of a second electrical layer (second electrode) on the dielectric functional layer, the second electrical layer being identical to or different from the first electrical layer, preferably identical.

[0063] According to the method defined above, the first and second electrical layers are not necessarily obtained from a halide. They may be identical or different, made of a metal such as titanium, platinum, tungsten, ruthenium, or molybdenum or of a metal nitride such as titanium nitride, tantalum nitride, tungsten nitride or molybdenum nitride.

[0064] The invention also relates to a method for preparing a Metal-Insulator-Metal type capacitance which comprises at least one step corresponding to the structuring of an electrical functional layer (second electrode) by implementing the method as defined previously, the substrate provided in step a) successively comprising a support substrate, a first electrical layer (first electrode) and a dielectric layer, the first electrical layer being identical to or different from the electrical functional layer, preferably identical and the dielectric layer being covered locally by the sacrificial layer.

[0065] According to the method defined above, the first electrical layer and the dielectric layer are not necessarily obtained from a halide.

[0066] For example, the first electrical layer may be made of a metal such as titanium, platinum, tungsten, ruthenium or molybdenum or of a metal nitride such as titanium nitride, tantalum nitride, tungsten nitride or molybdenum nitride.

[0067] The dielectric layer, for its part, can be made of a high permittivity material, such as hafnium oxide, silicon oxide, zirconium oxide or titanium oxide or it can be an ionic dielectric layer, for example made of LiPON, LiSiPON, LiA102, LATP or a material called LGPS, LPS or even LLZO.

[0068] It should be noted that, according to the methods for preparing MIM type capacitances and in the case where the structure of the substrate comprises one or more flat zones and one or more microstructured zones, then the MIM type capacitance is obtained only on the microstructured zone(s).

[0069] Furthermore, during a process for preparing a MIM type capacitance, the deposition of each of the layers is advantageously carried out by the ALD deposition technique as described previously, by adapting the precursors according to the desired nature of the layers to be deposited.

[0070] Alternatively to ALD deposition, plasma-assisted ALD deposition (also called PEALD for “Plasma Enhanced Atomic Load Deposition”), spatial ALD deposition (also called SALD for “Spatial Atomic Load Deposition”) or atmospheric pressure ALD deposition can be implemented.

[0071] Other alternatives can be implemented, such as deposition techniques adapted to thin layers, such as physical vapor deposition (or PVD for “Physical Vapor Deposition”) or even chemical vapor deposition (or CVD for “Chemical Vapor Deposition”).

[0072] A person skilled in the art knows perfectly well how to choose the most suitable deposition process depending on the surface of the substrate used (flat and / or microstructured areas).

[0073] It should be noted that it is also possible to structure several functional layers of a MIM type capacitance in the same process, it being understood that these functional layers are all obtained from at least one halide.

[0074] For example, to provide a MIM type capacitance by structuring a first electrical functional layer and a second dielectric functional layer, it is possible to carry out the following steps: - providing a substrate having a surface locally covered by a sacrificial layer, one or more areas of the surface of the substrate being devoid of the sacrificial layer; - growth of the first electrical functional layer selectively on the area(s) of the surface of the substrate devoid of the sacrificial layer; - growth of the second dielectric functional layer selectively on the area(s) of the substrate surface devoid of the sacrificial layer; - elimination of the sacrificial layer; and - deposition of another electrical layer, identical or different from the first electrical functional layer.

[0075] It goes without saying that depending on the functional layer(s) to be structured in a MIM type capacitance, a person skilled in the art is perfectly capable of adapting the structuring method as defined previously.

[0076] The invention is particularly advantageous for structuring ultrathin layers (typically having thicknesses of less than 50 nm), and / or for structures having microstructured surfaces, i.e. very large developed surfaces having an aspect ratio greater than 20 or even greater than 50. The invention is particularly advantageous for manufacturing MIM structures formed from layers ultra-thin.

[0077] Nevertheless, the invention can be implemented to structure layers having thicknesses of up to 100 nm. Other characteristics and advantages of the invention will emerge from the additional description which follows.

[0078] It goes without saying that this additional description is given only as an illustration of the subject of the invention and must in no case be interpreted as a limitation of this subject. Brief description of the figures

[0079] [Fig-1] represents a substrate 110 having a flat surface covered with a layer sacrificial 120, according to a step of a method of manufacturing a structured electrical layer according to the first exemplary embodiment of the invention.

[0080] [Fig.2] represents a structure comprising the substrate 110 whose surface is re covered locally by the sacrificial layer 120 in LiPON.

[0081] [Fig.3] represents a structure comprising the substrate 110 whose surface is re covered locally on the one hand, by the sacrificial layer 120 and, on the other hand, by an electrical functional layer 130, according to another step of the method of manufacturing a structured electrical layer according to the first exemplary embodiment of the invention.

[0082] [Fig.4] represents a structure comprising the substrate 110 whose surface is re covered locally by the electrical functional layer 130, according to another step of the method of manufacturing a structured electrical layer according to the first exemplary embodiment of the invention.

[0083] [Fig.5] represents a substrate 210 having a surface comprising flat areas and microstructured areas and of which only the flat areas are covered by a sacrificial layer 220, according to a step of a method of manufacturing a MIM structure according to a second exemplary embodiment of the invention.

[0084] [Fig.6] represents a structure comprising the substrate 210 whose flat areas of its surface are covered by the sacrificial layer 220 and the microstructured areas of its surface are covered by an electrical functional layer 230, according to another step of the method of manufacturing a MIM structure according to the second exemplary embodiment of the invention.

[0085] [Fig.7] represents a structure comprising the substrate 210 of which only the mid-zones cross-structured portions of its surface are covered by the electrical functional layer 230, according to another step of the method of manufacturing a MIM structure according to the second exemplary embodiment of the invention.

[0086] [Fig.8] represents a structure comprising the substrate 210 whose micro zones structured on its surface are covered by a stack of the functional layer- tional 230 and a dielectric layer 240 and the flat areas of its surface of which are covered only by the dielectric layer 240, according to another step of the method of manufacturing a MIM structure according to the second exemplary embodiment of the invention.

[0087] [Fig.9] represents a structure comprising the substrate 210 whose flat areas of its surface are covered solely by a stack of the dielectric layer 240 and an electrical layer 250 and whose microstructured areas of its surface are covered by a MIM type capacitance, i.e. covered by a stack of the electrical functional layer 230, the dielectric layer 240 and the electrical layer 250, according to another step of the method for manufacturing a MIM structure according to the second exemplary embodiment of the invention.

[0088] [Fig. 10] represents a structure comprising a substrate 1100 whose surface is covered by a first electrical layer 1300 and whose surface of this electrical layer 1300 is covered locally by a sacrificial layer 1200, according to a step of a method of manufacturing a MIM structure according to a third exemplary embodiment of the invention.

[0089] [Fig. 11] represents a structure comprising the substrate 1100 whose surface is covered by the first electrical layer 1300, the surface of this electrical layer 1300 being covered locally, on the one hand, by the sacrificial layer 1200 and, on the other hand, by a stack of a dielectric functional layer 1400 and an electrical functional layer 1500, according to another step of the method for manufacturing a MIM structure according to the third exemplary embodiment of the invention.

[0090] [Fig. 12] represents a structure comprising the substrate 1100 whose surface is covered by the first electrical layer 1300, the surface of this electrical layer 1300 being covered locally by a stack of the dielectric functional layer 1400 and the electrical functional layer 1500; the zones comprising the stack of these three layers correspond to a MIM type capacitance, according to another step of the method of manufacturing a MIM structure according to the third exemplary embodiment of the invention.

[0091] It should be noted that the figures described above are schematic representations whose relative dimensions and proportions of the substrates and of any of the layers are not representative of those likely to be presented in a real situation, for reasons of readability.

[0092] Detailed description of particular embodiments

[0093] Example 1: Structuring of an electrical functional layer in TiN 1.1 - Deposition of a sacrificial layer in LiPON:

[0094] A substrate 110 is placed in an ALD chamber under vacuum, at 0.3 Pa, dedicated to the deposition of ionic dielectric layers.

[0095] The substrate 110 is made of silicon with silicon oxide electrical insulation and has a flat surface.

[0096] ALD deposition is carried out at a temperature of 300°C by carrying out the following cycle of steps 20 times: - injection and circulation of LiHMDS on the surface of the substrate 110 for an injection time equal to 4 seconds; - purge for 35 seconds of excess LiHMDS; then - injection and circulation of DEPA on the surface of the substrate 110 for an injection time equal to 2 seconds; - purge for 35 seconds of excess DEPA as well as any by-products obtained during a reaction between LiHMDS and DEPA.

[0097] Thus, a sacrificial layer 120 made of LiPON, with a thickness of 2 nm, is deposited homogeneously over the entire surface of the substrate 110, as illustrated in [Fig.l]

[0098] 1.2 - Partial elimination of the LiPON sacrificial layer:

[0099] The assembly formed by the substrate 110 and the sacrificial layer 120 in LiPON is placed in a chamber under a pressure of 1 Pa.

[0100] A titanium hard mask and a SiO2 barrier layer are placed on the surface of the sacrificial layer 120.

[0101] A plasma etching method, with a fluorinated plasma based on CHF3, is carried out for 10 seconds and then the mask and the stop layer are removed.

[0102] Thus, the parts of the sacrificial layer 120 in LiPON not covered by the hard mask and the stop layer are eliminated by etching while the parts protected by the mask and the stop layer have not been attacked by the plasma and therefore have not been eliminated by etching.

[0103] A structure comprising the substrate 110 whose surface is locally covered by the sacrificial layer 120 in LiPON with a pattern as shown in [Fig.2], is obtained.

[0104] 1.3 - Growth of the electrical functional layer in TiN:

[0105] While remaining under vacuum, the assembly formed by the substrate 110 and the sacrificial layer 120, as obtained in point 1.2, is moved to an ALD chamber dedicated to the deposition of electrode layers.

[0106] ALD deposition is carried out at a temperature of 400°C by introducing and circulating TiCl4 and NH3 alternately over the assembly formed by the substrate 110 and the sacrificial layer 120 obtained in point 1.2.

[0107] The introduction and alternating circulation of TiCl4 and NH3 are each implemented and repeated 200 times, with an injection time of 2 seconds and respecting a waiting time of 30 seconds and a purge of 35 seconds.

[0108] Thus the electrical functional layer 130 in TiN, with a thickness of 10 nm, is deposited on the surface of the assembly formed by the substrate 110 and the sacrificial layer 120 obtained in point 1.2.

[0109] This functional layer 130 is ultimately only present on the parts of the surface of the substrate 110 which are devoid of the sacrificial layer 120, as illustrated in [Fig.3], since the LiPON layer 120 inhibits the growth of the electrical functional layer 130.

[0110] 1.4 - Removal of the LiPON sacrificial layer:

[0111] The assembly obtained in point 1.3 above is placed in a chamber under a pressure of 1 Pa.

[0112] A plasma etching method, with a fluorinated plasma based on CHF3, is implemented for 10 seconds, thus eliminating the entire sacrificial layer 120 in LiPON.

[0113] Thus, a structure such as illustrated in [Fig.4] is obtained. This structure comprises the substrate 110 whose surface is locally covered, selectively, by the electrical functional layer 130 made of TiN.

[0114] Example 2: Preparation of a first MIM type capacitance by structuring its electrical functional layer in TiN 2.1 - Deposition of a sacrificial layer in LiPON:

[0115] A substrate 210 is placed in a vacuum ALD chamber dedicated to the deposition of ionic dielectric layers.

[0116] The substrate 210 is made of electrically insulated silicon with a silicon oxide II having a surface comprising flat areas and microstructured areas so as to give it an aspect ratio greater than 20.

[0117] ALD deposition is carried out at a temperature of 300°C by alternately introducing and circulating LiHMDS and DEPA on the surface of the substrate 210.

[0118] The introduction and alternating circulation of LiHMDS and DEPA are each implemented and repeated 20 times, with an injection time of 4 seconds.

[0119] A purge is carried out for 35 seconds after each alternating introduction and circulation of LiHMDS and DEPA.

[0120] A sacrificial layer 220 in LiPON with a thickness of 2 nm is thus obtained.

[0121] Due to the high aspect ratio (greater than 20) of the substrate 210, the sacral layer 220 LiPON film is deposited only on the flat areas of this surface, as shown in [Fig.5].

[0122] Also, by using such a substrate and ALD deposition with the conditions described above, the deposition of the sacrificial layer 220 is carried out in a localized manner. No partial removal step, for example by plasma etching, is necessary. However, it could be possible to use such a step on the flat areas of the substrate 210, to obtain new parts of the surface of the substrate 210 devoid of the sacrificial layer 220.

[0123] 2.2 - Growth of the electrical functional layer in TiN (first electrode):

[0124] While remaining under vacuum, the assembly formed by the substrate 210 and the sacrificial layer 220, as obtained in point 2.2, is moved to an ALD chamber dedicated to the deposition of electrode layers.

[0125] A deposit by ALD is implemented with the same conditions as those described in point 1.3 above.

[0126] Thus, as shown in [Fig.6], the electrical functional layer 230 made of TiN, with a thickness of 10 nm, is deposited, selectively, on the micro-structured zones of the surface of the substrate 210, the flat zones of this surface comprising the sacrificial layer which inhibits the growth of the functional layer 230.

[0127] 2.3 - Removal of the LiPON sacrificial layer:

[0128] The assembly obtained in point 2.2 above is placed in a chamber under a pressure of 1 Pa.

[0129] A plasma etching method, with a fluorinated plasma based on CHF3, is implemented for 10 seconds, thus eliminating the entire sacrificial layer 220 in LiPON.

[0130] A structure as illustrated in [Fig.7] is obtained. This structure comprises the substrate 210 of which only the microstructured areas of its surface are covered by the electrical functional layer 230 made of TiN. 2.4 - Deposition of a dielectric layer in HfO2:

[0131] While remaining under vacuum, the assembly formed by the substrate 210 and the electrical functional layer 230 in TiN, as obtained in point 2.3 above, is moved to an ALD chamber, dedicated to the deposition of dielectric layers.

[0132] ALD deposition is carried out at a temperature of 300°C by introducing and circulating HfCl4 and water alternately over the assembly formed in point 2.3.

[0133] The introduction and alternating circulation of HfCl4 and water are each implemented and repeated 165 times, with an injection time of 2 seconds and respecting a waiting time of 30 seconds and a purge of 35 seconds.

[0134] Thus, a dielectric layer 240 in HfO2 with a thickness of 10 nm is deposited on the assembly obtained in point 2.3.

[0135] The structure thus obtained is shown in [Fig.8], which comprises the substrate 210 whose microstructured areas of its surface are covered by a stack of the functional layer 230 in TiN and the dielectric layer 240 in HfO2 and whose flat areas of its surface are covered only by the dielectric layer 240 of HfO2. 2.5 - Deposition of an electrical layer in TiN:

[0136] While remaining under vacuum, the assembly formed by the substrate 210, the functional layer 230 in TiN and the dielectric layer 240 in HfO2, as obtained in point 2.4 above, is moved to an ALD chamber, dedicated to the deposition of electrode layers.

[0137] An electrical layer 250 in TiN, with a thickness of 10 nm, is deposited on the surface of the assembly obtained in point 2.4, by implementing an ALD deposition under the same conditions as those described in point 2.2 above.

[0138] Thus, a structure such as shown in [Fig.9] is obtained. This structure comprises the substrate 210 whose flat areas of its surface are covered solely by a stack of the dielectric layer 240 of HfO2 and the electrical layer 250 of TiN and whose microstructured areas of its surface are covered by a stack of the electrical functional layer 230 of TiN, the dielectric layer 240 of HfO2 and the electrical layer 250 of TiN.

[0139] Thus, a MIM type capacitance is obtained on the microstructured areas of the surface of the substrate 210.

[0140] Example 3: Preparation of a second MIM type capacitance by structuring its dielectric functional layers in HfO2 and electric in TiN

[0141] 3.1 - Deposition of a first electrical layer in TiN (first electrode):

[0142] A substrate 1100 is placed in a vacuum ALD chamber dedicated to the deposition of electrical layers.

[0143] The substrate 1100 is made of silicon electrically insulated with a silicon oxide and has a flat surface.

[0144] ALD deposition is carried out at a temperature of 400°C by alternately introducing and circulating TiCl4 and NH3 on the surface of the substrate 1100.

[0145] The introduction and alternating circulation of TiCl4 and NH3 are each implemented and repeated 200 times, with an injection time of 2 seconds and respecting a waiting time of 30 seconds and a purge of 35 seconds.

[0146] Thus a first electrical layer 1300 in TiN, with a thickness of 10 nm, is deposited on the surface of the substrate 1100. 3.2 - Deposition of a sacrificial layer in LiPON:

[0147] While remaining under vacuum, the assembly formed by the substrate 1100 and the first electrical layer 1300 in TiN, as obtained in point 3.1 above, is moved to an ALD chamber, dedicated to the deposition of dielectric layers.

[0148] A deposit by ALD is implemented under the same conditions as those described in point 1.1.

[0149] Thus, a sacrificial layer 1200 in LiPON with a thickness of 2 nm is deposited on the surface of the first electrical layer 1300 in TiN.

[0150] 3.3 - Partial elimination of the LiPON sacrificial layer:

[0151] The assembly formed by the substrate 1100, the first electrical layer 1300 in TiN and the sacrificial layer 1200 in LiPON, as obtained in point 3.2, is placed in a chamber under a pressure of 1 Pa.

[0152] A plasma etching method is implemented under the same conditions as those described in point 1.2.

[0153] Thus, the parts of the sacrificial layer 1200 in LiPON not covered by the hard mask and the stop layer are eliminated by etching while the parts protected by the hard mask and the stop layer have not been attacked by the plasma and therefore have not been eliminated by etching.

[0154] A structure as shown in [Fig. 10] is obtained. It comprises the substrate 1100 whose surface is covered by the first electrical layer 1300 in TiN and whose surface of this electrical layer 1300 is locally covered, selectively, by the sacrificial layer 1200 in LiPON.

[0155] 3.4 - Growth of the dielectric functional layer in HfO2 (electronic layer strictly insulating):

[0156] While remaining under vacuum, the assembly formed by the substrate 1100, the first electrical layer 1300 in TiN and the sacrificial layer 1200 in LiPON, as obtained in point 3.3 above, is moved to an ALD chamber, dedicated to the deposition of dielectric layers.

[0157] A deposit by ALD is implemented under the same conditions as those described in point 2.4.

[0158] Thus, the dielectric functional layer 1400 in HfO2 with a thickness of 10 nm, is deposited on the parts of the surface of the first electrical layer 1300 in TiN devoid of the sacrificial layer 1200 in LiPON.

[0159] 3.5 - Growth of the electrical functional layer in TiN (second electrode):

[0160] While remaining under vacuum, the assembly formed by the substrate 1100, the first electrical layer 1300 in TiN, the sacrificial layer 1200 in LiPON and the dielectric functional layer 1400 in HfO2, as obtained in point 3.4 above, is moved to an ALD chamber, dedicated to the deposition of electrical layers.

[0161] A deposit by ALD is implemented under the same conditions as those described in point 3.1.

[0162] Thus, the electrical functional layer 1500 in TiN, with a thickness of 10 nm, is deposited on the surface of the dielectric functional layer 1400. It is not deposited on the sacrificial layer.

[0163] The structure obtained is shown in [Fig.l 1].

[0164] 3.6 - Removal of the LiPON sacrificial layer:

[0165] The assembly obtained in point 3.5 above is placed in a chamber under a pressure of 1 Pa.

[0166] A plasma etching method, with a fluorinated plasma based on CHF3, is implemented for 10 seconds, thus eliminating the entire sacrificial layer 1200 in LiPON.

[0167] Thus, a structure such as illustrated in [Fig. 12] is obtained. It comprises the substrate 1100 whose surface is covered by the first electrical layer 1300 made of TiN, the surface of this electrical layer 1300 being covered locally, selectively, by a stack of the dielectric functional layer 1400 and the electrical functional layer 1500.

[0168] A MIM type capacitance is thus obtained by stacking these three layers.

[0169] In this example 3, the substrate has a flat surface.

[0170] However, the different steps of example 3 could be implemented on a substrate having a microstructured surface.

Claims

Claims

1. Method for structuring a functional layer (130; 230; 1400; 1500), comprising at least the following steps: a) providing a substrate (110; 210; 1100) having a surface locally covered by a so-called sacrificial layer (120; 220; 1200) made of a lithiated material, one or more areas of the surface of the substrate (110; 210; 1100) being devoid of the sacrificial layer (120; 220; 1200); b) growing the functional layer (130; 230; 1400; 1500) selectively on the area(s) of the surface of the substrate (110; 210; 1100) devoid of the sacrificial layer (120; 220; 1200), the functional layer (130; 230; 1400; 1500) being obtained from a halogenated precursor comprising chlorine, iodine or bromine, preferably chlorine; c) removing the sacrificial layer (120; 220; 1200); whereby the surface of the substrate (110; 210; 1100) is covered by a functional layer (130; 230; 1400;1500) structured.;

2. Structuring method according to claim 1, characterized in that step a) comprises the following sub-steps: i) deposition of the sacrificial layer (120; 220; 1200) on all or part of the surface of the substrate (110; 210; 1100), preferably by ALD; ii) partial removal of the sacrificial layer (120; 220; 1200) at predetermined locations by plasma etching, wet etching or laser etching, preference being given to plasma etching.

3. Structuring method according to claim 1 or claim 2, wherein the sacrificial layer (120; 220; 1200) is made of a lithium oxide or a lithium oxynitride, for example chosen from LiPON, Li2SiO3, LiPO, LiSiPON, LiA102, LiOH, Li2O and Li2CO3, preferably LiPON.

4. A structuring method according to any one of claims 1 to 3, wherein step b) is carried out by ALD.

5. A structuring method according to any one of claims 1 to 4, wherein the functional layer is an electrical layer (130; 230; 1500) made of a metal nitride such as titanium nitride, tantalum nitride, molybdenum nitride or tungsten nitride, preferably titanium nitride.

6. A structuring method according to any one of claims 1 to 10. 4, wherein the functional layer is a dielectric layer (1400) made of a metal oxide preferably selected from hafnium oxide, silicon oxide, zirconium oxide and titanium oxide, preferably hafnium oxide.

7. A structuring method according to any one of claims 1 to 6, wherein step c) is carried out by plasma etching, wet etching or laser etching, preference being given to plasma etching, and even more preferably to plasma etching which comprises fluorine, such as trifluoromethane, or which comprises chlorine, such as dichlorine, preference being given to fluorine.

8. A structuring method according to any one of claims 1 to 7, wherein the surface of the substrate (110; 210; 1100) is flat or comprises one or more flat areas and one or more micro-structured areas.

9. A structuring method according to any one of claims 1 to 7, wherein the surface of the substrate (210) comprises one or more planar areas and one or more microstructured areas formed, for example, by pores or vias, the surface of the substrate (210) being covered by the sacrificial layer (220) only on its planar area(s) while the microstructured area(s) are devoid of the sacrificial layer (220).

10. Method for preparing a Metal-Insulator-Metal type capacitance which comprises at least the following steps: - structuring an electrical functional layer (130; 230; 1500) by implementing the method as defined in claims 1 to 5 and 7 to 9; - deposition of a dielectric layer (240); - deposition of another electrical layer (250), identical to or different from the first electrical functional layer (130; 230; 1500), preferably identical.

11. A method for preparing a Metal-Insulator-Metal type capacitance which comprises at least the following steps: - structuring a dielectric functional layer (1400) by implementing the method as defined in claims 1 to 4 and 6 to 9, the substrate (110; 210; 1100) provided in step a) comprising a support substrate and a first electrical layer (1300), the first electrical layer (1300) being locally covered by the sacrificial layer (120; 220; 1200), - depositing a second electrical layer on the dielectric functional layer (1400), the second electrical layer being identical to or different from the first electrical layer (1300), preferably identical.

12. A method for preparing a Metal-Insulator-Metal type capacitance which comprises at least one step corresponding to the structuring of an electrical functional layer (130; 230; 1500) by implementing the method as defined in claims 1 to 5 and 7 to 9, the substrate (110; 210; 1100) provided in step a) comprising a support substrate, a first electrical layer (1300) and a dielectric layer (240), the first electrical layer (1300) being identical to or different from the electrical functional layer (130; 230; 1500), preferably identical and the dielectric layer (240) being locally covered by the sacrificial layer (120; 220; 1200).

Images