Device for reading and decoding quantum information

The quantum device employs synchronized periodic excitations and multiplexing techniques to efficiently read and decode quantum information from a large number of qubits, addressing challenges of power consumption and cable management in existing technologies.

FR3150327B1Active Publication Date: 2025-06-20COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
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Patent Information

Application Number
FR2023006530
Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-06-22
Publication Date
2025-06-20
Estimated Expiration
2043-06-22

AI Technical Summary

Technical Problem

Current technologies face challenges in efficiently reading and decoding quantum information from a large number of qubits due to limitations in power consumption, size constraints, and the need to combat electromagnetic noise, especially at low operating temperatures.

Method used

A quantum device is proposed that uses a synchronized generation of periodic excitations for a group of electrometers coupled to qubits, allowing multiple qubits to be interrogated with a single frequency. This device employs phase and amplitude multiplexing in conjunction with frequency multiplexing to increase the number of qubits that can be read simultaneously while minimizing the number of cables required.

Benefits of technology

The solution enables the simultaneous reading of multiple qubits with reduced power consumption and cable requirements, improving the efficiency and scalability of quantum information reading and decoding processes.

✦ Generated by Eureka AI based on patent content.

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Abstract

Device for reading and decoding quantum information The invention relates to a quantum device comprising a plurality of qubits (11, 12, …1M, 21 …), a demultiplexing circuit, a common transmission line for transmitting reading signals from said qubits to the demultiplexing circuit, and for each qubit of the plurality, a quantum electrometer (S11, S12, … S1M, S21 …) to said qubit for transmitting on the common transmission line a signal as a function of a current state of the qubit and of a periodic excitation applied to said quantum electrometer.The quantum device is special because the periodic excitations transmitted to a group of qubits of the device are transmitted with an identical frequency, the device comprises phase shift means introducing distinct phase shifts (Phi1, Phi2, … PhiM) and possibly amplitude attenuation means introducing amplitude differences in the excitations applied respectively to the different quantum electrometers. Figure for abstract: FIGURE 1A.
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Description

Title of the invention: Device for reading and decoding quantum information Field of the invention

[0001] The invention relates to the reading and decoding of quantum information, within the framework of the implementation of electronic or computer circuits based on quantum bits, or qubits. State of the art

[0002] Quantum computing is a developing technical field, based on the use of a quantum state with two measurable levels as an information vector, called a quantum bit or "quantum bit" in English or commonly qubit.

[0003] Different implementation technologies exist, including superconducting qubits, based in particular on the use of Josephson junctions, such as charge qubits, in particular transmons.

[0004] Furthermore, spin qubit technology is known. These consist of an electron or an electron hole (commonly called a hole), with spin / 2 and whose two possible spin orientations define the measurable levels of information. Spin qubits can be formed in semiconductor material, such as silicon, with high integration potential. Electrons or holes are individually confined in quantum wells maintained at cryogenic temperatures in a cryostat and produced within confinement structures of nanometric sizes defined electrostatically, called "quantum dots" or quantum boxes.

[0005] Reading spin qubits, like reading qubits from other technologies, faces many challenges. Mainly due to the operating temperature of the qubits, generally less than 1 K, the environment close to the qubits is not very favorable to electronic reading circuits. What is more, it is necessary to read qubits in large numbers, which implies power consumption and size constraints. It is also necessary to combat electromagnetic noise and minimize reading times compared to the coherence time of the qubits.

[0006] Different solutions have been proposed. Electronic reading circuits have been proposed as close as possible to the qubits and therefore at low temperature, or on the contrary in a more distant and therefore less cold environment.

[0007] It has also been proposed to use reading techniques either by reflectometry (the qubit is reached using a single cable - excitation and reading are done using this single cable) or by reading by electrometry, namely using an electrometer, i.e. an electronic component allowing reading by charge measurement. We are interested here in electrometers qualified as quantum, because they interact with the qubit via quantum boxes. Such an electrometer has a sensitivity to the charge regulated by (at least) one pole called the gate, and two reading poles called the source and drain allowing the creation of a current (or a voltage) by variation of conductance as a function of the charge in the quantum box.

[0008] With reflectometry reading methods, based on sending a wave of up to a few GHz towards the qubits (superconducting qubits or spin qubits), and on observing the reflected wave, it is generally necessary to bring out of the cryostat a number of wired connections (cables) equal to the number of qubits to be read, which becomes very difficult if the number of qubits is large.

[0009] Alternatively, it is proposed to send several signals at different frequencies by the same wired connection (cable), according to the principle of frequency multiplexing, and to manage to process these frequencies differently in the cryostat thanks to adapted LC resonators placed within it, and coupled to each qubit. In this last solution, it is necessary that the resonance frequency of the LC resonator associated with each qubit is finely different for each resonator, which is demanding in hardware and reading time, and therefore constitutes a technological obstacle currently. To generate these signals close in frequency, it is known to synthesize a low-frequency comb with an analog generator, then to multiply it by a higher carrier frequency. The reflected signal is then demodulated by this carrier, then digitized to extract the signal associated with each qubit.The number of qubits that can thus be examined is inevitably limited by the bandwidth of the analog generator and the analog-to-digital converter.

[0010] Reflectometric reading methods are known from Park, 2021, Jerger 2012, Abdo 2018, Naaman, 2021 and Bronn, 2022.

[0011] The method by reading by charge (and therefore by electrometry), for spin qubits, consists firstly in promoting a spin to charge conversion and then secondly in measuring an output current generated by capacitive electrostatic coupling with the quantum box of the spin qubit of a quantum electrometer (i.e. a device measuring the electric charge, and comprising a quantum contact or a quantum box, which, for the measurement is coupled to the quantum box of an object to be measured, in this case a qubit). The spin of the qubit is thus converted into current information. A transistor with a electron ("Single Electron Transistor" or SET) or a quantum point contact ("Quantum Point Contact" or QPC) which are non-limiting examples of quantum electrometer. Current detection (a few nanoamperes at the output of a SET) is performed using a current-voltage amplifier, of the transimpedance amplifier (TIA) type. These amplifiers can be placed at room temperature (300K), or at a temperature close to 4K or less than 1K, with compromises in power consumption and bandwidth.

[0012] Electrometric reading methods are known from Williams, 2009, Gong, 2019 and Morel, 2022. Other electrometric reading techniques are envisaged, which instead of being based on a current measurement, are based on a voltage measurement.

[0013] Frequency multiplexing can be used to increase the number of qubits achievable for the read operation. This strategy uses a distribution of the qubits in the bandwidth of the read system by assigning each of them a different frequency.

[0014] This can be done by using hardware resonators coupled to the qubits defining different frequencies in the case of using reflectometry. We know from Jerger, 2012 a system with hardware resonators coupled to the qubits defining different frequencies, which constitutes a proposal to reduce the number of cables in the cryostat in view of the number of qubits, in a reflectometry reading system. The demodulation method is adapted to double the number of qubits read compared to previous techniques in view of the available bandwidth, by using an in-phase integration path and a quadrature integration (IQ) path, and by individually addressing the high and low band of the spectrum.But this principle remains limited to a factor of 2 improvement, and also requires doubling the number of demodulation chains or doubling the reading time, whereas we would like to obtain greater simplification to read a large number of qubits.

[0015] Frequency multiplexing can also be done by exciting the pairs formed by the electrometers and the associated qubits by separate circuits, which is advantageous, because it allows the frequencies to be changed without changing the hardware. Morel, 2022 thus proposes to use several oscillator-type excitation signal application circuits, and to demultiplex signals with a single integrator per frequency. The system of Morel, 2022, unlike that of Jerger, 2012, allows the frequencies to be changed to the extent that they are not dictated by the physical components, and it avoids crosstalk between the excitations, by providing separate lines for the different frequencies.

[0016] There is not yet known any implementation for reading more than 100 qubits with electronic circuits placed in a cryostat, in particular due to the energy consumption of the system. However, error-correcting codes require several tens, or even hundreds, of qubits in order to produce a single "perfect" logical qubit. This therefore requires being able to read several thousand qubits, or even more, to set up high-performance quantum computers.

[0017] In this context, and to solve the problems mentioned, it is proposed, according to certain known principles, a quantum device comprising a plurality of qubits, in a low temperature enclosure of the cryostat, and for each qubit of the plurality of qubits, an electrometer coupled to said qubit and subjected on its gate or on its drain to a periodic excitation to transmit to the charge measurement quantum box associated with the qubit said excitation, which makes it possible to extract a reading signal of a current state of the qubit, the reading signals of the qubits of the plurality being added on a common reading line of the quantum device, then transmitted to a demultiplexing circuit of the quantum device external to said low temperature enclosure.

[0018] Thus, these principles can be expressed in the form of a reading of the charge by current (the quantum electrometer then has a conductance which varies according to the state of the qubit linked to it and it can be a SET, or a QPC, in particular), or by voltage if the electrometer provides a voltage as an output signal.

[0019] But the quantum device is remarkable because the periodic excitations transmitted to a group of several electrometers of the device are transmitted with an identical frequency using a synchronized generation means of the quantum device external to said low temperature enclosure, the quantum device comprises phase shift and possibly amplitude attenuation means in said low temperature enclosure introducing phase shifts and possibly attenuations of distinct amplitudes in the excitations applied respectively to the electrometers of said group.

[0020] Thanks to these characteristics, several qubits can be interrogated with a single frequency, which allows, at equal bandwidth, to multiply the number of qubits read simultaneously, with a limited number of cables leaving the cryostat. The footprint of the components to demultiplex the signals is small, because only one demodulation chain is necessary per frequency, and therefore allows several qubits to be interrogated. Phase and amplitude multiplexing can be used in parallel with frequency multiplexing, and complements it (phase and amplitude multiplexing and frequency multiplexing are used simultaneously).

[0021] Thus, we read more than one qubit per frequency by assigning the same excitation frequency to each qubit, but with a phase and possibly an amplitude each time different. The output signal composed of the addition of the output currents of the Iout transistors has its phase and amplitude which change according to the state of each of the qubits excited at the frequency concerned. Finally, this phase and amplitude information is extracted by the use of IQ demodulation. The combinations of states of the qubits then take the form of a constellation of symbols which can be interpreted, in particular by digital decoding.

[0022] To avoid symmetries, one can introduce some form of singularity which makes it possible to eliminate symmetries and thus avoid superpositions of different combinations of states (or symbols) in the demodulated information, and consequently makes it possible to interpret it unequivocally.

[0023] Furthermore, the architecture has the advantage of allowing a flexible choice of frequencies, these not being imposed by the hardware and being able to be modified from one use to another, without modifying the hardware.

[0024] And according to the invention, only one cable penetrating the temperature enclosure of the cryostat is necessary (at least for one frequency), since the phase shifting and amplitude attenuation means are inside the temperature enclosure, the voltage generation means being, for their part, conventionally at a higher temperature, for example room temperature. The fact that only one cable penetrates the temperature enclosure is remarkable, because this facilitates the installation of the circuit and improves its thermal balance. The synchronized generation means is a single generator, or a group of generators synchronized with each other.

[0025] Advantageously and optionally:

[0026] - the means of phase shifting and possibly of attenuation of the amplitude can be different cable lengths, adjustable phase shifters, injection oscillators or CMOS inverter chains.

[0027] - the electrometers can be divided into several groups, each group receiving an excitation with a frequency distinct from those of the other groups, and the common reading line being common to the electrometers of the different groups.

[0028] - each electrometer may comprise a single-electron transistor, the qubits being spin qubits, the periodic excitation being applied to the gate of the transistor or more generally the gate of the electrometer and the transistor or more generally the electrometer and the associated qubit being coupled by a capacitive coupling between their quantum dots. Thus, the spin of the qubit is converted into a charge and then an output current generated by capacitive electrostatic coupling is measured. The spin of the qubit is thus converted into current information.

[0029] - the qubits can be spin qubits, and each qubit and electrometer pair associated are capacitively coupled by quantum dots of each other.

[0030] The phases assigned to the qubits can be assigned according to the following principles:

[0031] - the phases associated with the electrometers of said group can be essentially distributed regularly every 2ir / n radians, n being a prime natural integer greater than or equal to 3, and the distribution of the associated symbols in the IQ plane is made secondarily irregular by a singularity in said distribution which constitutes a disturbance in the regularity without calling into question the existence of the latter.

[0032] - For example, the number of electrometers in the group can be n-1, any of the n values ​​2ir / n radians not being assigned to any electrometer in the group. The fact that one of the values ​​is not assigned is the singularity in the distribution.

[0033] - Or as another example, the signals corresponding to the single-digit symbols value 1 (the phases associated with the electrometers) can be distributed in the interval 0 to 2ir radians according to a first order (or at first glance) regular distribution but including, in a lower order of magnitude (or in second analysis), a phase shift aimed at removing the superposition between the combination of states, or symbol comprising only 0s and the combination of states, or symbol comprising only 1s - A particular implementation of this principle, which is a non-limiting example, is that the number of electrometers in the group can be n, the phases of a pair of two phases opposite each other with respect to ir radians are shifted towards each other with respect to the values ​​they would have had for a strictly regular phase distribution. The shift in values ​​is the singularity in the distribution.

[0034] - Or as yet another example, the number of electrometers in the group can be n, the amplitude of at least one of the excitations being decreased or increased relative to at least one other. The amplitudes are multiplexed (varied for each of the qubits according to needs) in order to limit the symmetries of the chosen phase distribution. This decrease or increase is a singularity as mentioned above.

[0035] The presence of a singularity makes it possible, as has already been said, to eliminate symmetries and thus avoid superpositions of different combinations of states (or symbols) in the demodulated information, and consequently makes it possible to interpret it unequivocally.

[0036] - Alternatively, the phases associated with the electrometers of said group may be essentially regularly distributed every ir / n radians, n being a natural number greater than or equal to 4, and being the maximum number of qubits and electrometers, and their distribution is made secondarily irregular if n is greater than or equal to 5.

[0037] - Alternatively, the amplitudes are assigned according to the rule from of n =1, for odd n, the same amplitude is assigned to qubit n and to qubit n+1 and the amplitudes are assigned to each successive odd number by dividing the previous amplitude by 2, the phases associated with the electrometers of said group being successively incremented by ^ / 2 radians when moving from one qubit to the next qubit, or alternately taking two values ​​shifted by Æ / 2.

[0038] Other optional features are now discussed:

[0039] - said low temperature enclosure can be the temperature enclosure of the qubits. This is the minimum temperature enclosure, and it is very advantageous that few cables cross it, given the energy issues.

[0040] - said low temperature enclosure may be a temperature enclosure intermediate, the qubits being in an enclosure of the cryostat which is an enclosure of lower temperature than said low temperature enclosure and internal to it, and the phase shifting and amplitude attenuation means being outside the lower temperature enclosure but in the intermediate temperature enclosure, which also contains an amplifier to amplify the signal on the common reading line. Here we are talking about a cryostat with successive enclosures of decreasing sizes, the coldest enclosure being installed in the intermediate temperature enclosure.

[0041] - the device can store, for example in a computer memory, a prior characterization of the response of the quantum device through said quadrature demodulation means to the possible combinations of states of the qubits associated with the quantum electrometers of said group and to said identical frequency for said given distribution of phase shifts, the discrimination means using said prior characterization. Using the prior characterization that was obtained before operation and kept for the operation of the quantum device makes it possible to interpret the demodulated information and to identify the combinations of states of the qubits read during operation of the device.

[0042] The discrimination means can be digital and perform discriminations by region of interest or by nearest neighbor search to identify combinations of states in the complex plane.

[0043] The quantum electrometer can be built on the basis of a single-electron transistor but it can also be built on the basis of a quantum point contact, the qubits being spin qubits.

[0044] The quantum device may comprise, to transmit the information outside a cryostat in which the qubits and the quantum electrometers (typically the SETs) are placed, to the demultiplexing circuit which is placed outside said cryostat, a single radiofrequency transmission line.

[0045] The quantum device may comprise on the transmission line an amplification chain with a bandwidth of 40 MHz, the output signal-to-noise ratio of which is equal to 1.383 or more in order to ensure a reader fidelity of 99.99%, the demodulation means having a reading time of the order of 1 ps.

[0046] The quantum device may also comprise on the transmission line a transimpedance amplifier, for example a capacitive network, shunt feedback, regulated cascode type, or push-pull type, amplifying the reading signals of the qubits of the group and possibly other qubits, in particular the qubits of another group of qubits, the associated electrometers receiving another frequency, before their transmission in amplified form to the demultiplexing circuit.

[0047] The demultiplexing means may use quadrature demodulation means and then perform homodyne or heterodyne demodulation. They may also include a fast Fourier transform carried out after digitization of the read signal. Brief description of the drawings

[0048] The invention will be better understood and other advantages will appear on reading the description which follows, given without limitation and thanks to the appended figures among which:

[0049] Figures 1A and 1B are representations of a qubit reading circuit according to the principles of the invention.

[0050] [Fig.2] shows a particular aspect of the invention.

[0051] [Fig.3] shows a first example of exploitation of the reading of qubits according to the invention, in a case with 2 different phases for a frequency, placed in a simple manner.

[0052] [Fig.4] shows the implementation of one aspect of an embodiment of the invention in the case of [Fig.3].

[0053] [Fig.5] shows, on the left, an implementation for 3 phases which is not preferred, but which is used for the explanation, and on the right an example of reading qubits according to the invention, for 2 phases and based on the distribution presented in the left part for 3 phases.

[0054] [Fig.6] shows an example of a constellation of possible combinations for a particular implementation with 4 phases per frequency.

[0055] [Fig.7] shows an example of a constellation of possible combinations for a particular implementation with 6 phases per frequency.

[0056] [Fig.8A] shows another example of reading qubits according to the invention, but with three phases for one frequency, and an implementation different from that presented in figures 3 to 7.

[0057] [Fig.8B] shows another example of reading qubits according to the invention, again with three phases for one frequency, and an implementation different from that presented in the previous figures.

[0058] [Fig.8C] shows another example of the distribution of state combinations composed of a single 1 in the I,Q plane.

[0059] [Fig.8D] shows yet another example of choice of excitations, and [Fig.8E] the associated reading constellation in the IQ plane; and Figures 8F and 8G together yet another example.

[0060] Figures 9 to 12 show four technical variants of implementation of a qubit reading circuit according to the invention.

[0061] [Fig. 13] shows a variant of the circuit for connecting the single-electron transistors of [Fig.lA] or [Fig.lB]. Detailed description of the drawings

[0062] [Fig. 1 A] With reference to [Fig. 1 A], a qubit reading circuit according to an embodiment of the invention is shown. It is based on charge reading, with frequency demultiplexing.

[0063] It is built around spin qubits on silicon, placed in a cryostat at very low temperature, and in the example described, less than one kelvin (1 K). The spin qubits are each capacitively coupled to a single electron transistor (SET), placed in contact with it in the cryostat.

[0064] Qubits have been represented, forming here two groups, and referenced for the first group qubit 11, qubit 12, ... qubit IM and for the second group qubit 21, ... but the invention uses a larger number of qubits, for example of the order of ten, hundred or more, grouped into a number n of groups each comprising a number M of qubits, M being a natural integer at least equal to 2, which can vary from one group to another. The number n of groups is at least 1.

[0065] The associated SETs, one per qubit, are respectively referenced SET SI 1, SET S12, ... SET SIM and SET S21 .... They each have a gate G or several gates, as well as a source S and a drain D, which are identified in the figure for SET SI 1. Depending on the spin of the qubit (i.e. its state, in the case of a spin qubit), the SET sees its conductance vary. This effect occurs through an interaction between the respective quantum boxes of the qubit and the SET.

[0066] The drains D of the SETs are connected to one or more constant (or possibly non-constant) potentials, and consequently, depending on the spin of the qubit, the SET delivers a current to its source S, or does not deliver one or else delivers, depending on the circumstances, one or the other of two distinct current levels, both of which are not harmed.

[0067] Groups of qubits are also groups of SETs, each qubit being in fact linked to a SET which is specifically dedicated to it.

[0068] The SETs are excited in voltage by voltage generators, typically sinusoidal (but can be square or triangular), as shown in left part of the figure. Each SET is excited separately by its gate G (this is what is shown in the figure) or by its drain D (not shown). The SETs of the same group are excited with the same frequency, generated by a voltage generator common to these SETs (or possibly by separate but synchronized generators). There are thus n sinusoidal voltage generators of different frequencies, at the rate of one such generator (or sets of separate but synchronized generators) per group of SETs. Thus, in [Fig.lA], the SETs SU, S12 ... and SIM are excited by a sinusoidal voltage generator VI of frequency fl, and the SET S21 is excited by a sinusoidal voltage generator V2 of frequency f2.

[0069] The n generators VI, V2 ... are placed, in the embodiment presented, at room temperature and deploying signals of a few mV, at frequencies ranging from 1 MHz up to approximately 100 MHz. They are each connected by a transmission line which penetrates into the cryostat, to the SETs of the qubits of the group of qubits which receive the frequency generated by the generator concerned. However, it is also possible, in a variant, to place the n generators in the cryostat, which makes it possible not to have cables penetrate for excitation from the outside of the cryostat into its internal space. The invention nevertheless proposes that the phase shifters are at a lower temperature stage than the generators VI, V2 ...

[0070] A phase shift (or simply phase, for ease of language) possibly associated with an amplitude attenuation, specific to each SET is inserted between the generator of its group and the grid of the particular SET, by phase shifters DI 1, D12, ... DIM and D21 .... These distinct shifts are of the same number as the SETs of the group concerned, which for the first group which is represented in the figure is M in number as has already been said. Phases Phil, Phi2... and PhiM (between 0 and 2ir) are thus inserted between the generator VI and respectively each of the SETs SU... SIM. Other phases, identical to the phases Phil, Phi2 and PhiM or different from them, are inserted between the generator V2 and the SETs of the second group, including firstly in the figure, the SET 21, alone represented for ease of representation.Further phases are inserted, SET by SET, between the voltage generators of other frequencies, different from fl and f2, and the SETs of other groups of SETs, not shown in the figure. Passive phase shifters (such as a difference in interconnection length such as a length of cable, for example coaxial, additional to a length inducing a phase shift and possibly a significant amplitude attenuation) are, in one embodiment, used to very simply construct the phase shifters DU, D12, ... DIM and D21 .... The phase shifters can also be injection oscillators or CMOS inverter chains.

[0071] The output currents of the SETs, appearing at their source S and which are of the order of nanoamperes (nA), are collected and added on a conductive line 50 in close proximity to the SETs, in the qubit cryostat. This line is common to all the qubits of a group of qubits (here the qubits 11, 12, ... IM for the first group), or even in the example shown in the figure, to the qubits of all the groups (here the qubits 11, 12, ... IM, 21 ...).

[0072] The current resulting from the sum of the currents collected and added on this line is amplified by an amplification chain 100 (comprising one or more amplifiers), then read by a demodulation circuit 200 shown in the right part of the figure. The reading time step is of the order of a microsecond (ps), in line with the order of magnitude of the decoherence phenomenon of spin qubits on silicon.

[0073] Thus, from what has just been presented, phase multiplexing is implemented on the transmission line 50 during the collection of the currents, and also, if there are at least two groups of qubits, which is the case in the figure, frequency multiplexing in addition to phase multiplexing. Several qubits are excited with a voltage at the same frequency, but with a phase specific to each qubit. In such a way, the number of qubits per frequency is M.

[0074] The choice of frequencies as previously and, and this is new and original, the choice of phase distribution and amplitude attenuations are flexible, and can be decided after manufacturing the circuit, and also modified for the same circuit, since they are not imposed by the electrical components, in particular the components placed in the cryostat.

[0075] The demodulation chain(s) forming the demodulation circuit 200 may be constructed in integrated or non-integrated form and they may be chains by which the demultiplexing is analog or digital, the result being finally digitized in the proposed variants.

[0076] [Fig.lA] shows separate chains per frequency (a chain for fl in the upper part of the figure, then a chain for f2, and other chains for the other frequencies are not shown, but may be present), in which mixers generate the I component and the Q component using two waves of frequency fl phase-shifted from each other by 90°, thus constituting quadrature demodulation means 198. The I and Q components are then processed, for each frequency, by analog-digital converters 199.

[0077] The demodulation circuit 200 can be placed at different temperatures: the temperature of the qubits (less than 1K), the ambient temperature (of the order of 300 K), or an intermediate temperature (for example 4K), in which case it may be advantageous, without it being obligatory, to also place in the enclosure of the temperature stage of this intermediate temperature the frequency generators VI, V2, ..., for make their signal available for the purpose of performing the necessary mixing to extract the I and Q components.

[0078] The presented embodiment further combines phase and frequency multiplexing. For n different frequencies, with M different phases, n*M qubits can be read by generating only n frequencies and having only n IQ demodulation chains, namely one for each frequency.

[0079] There may be only one output cable from the coldest temperature stage for nx M qubit, this output being able to be made before or after the amplification chain 100, or between two successive segments thereof.

[0080] There is little cross talk between the qubits because there is a physical separation of the excitations, which are made by distinct interconnections carrying the phase shifters DI 1, D12, ... DIM, D21 ..., different for each qubit, even within the same group of qubits excited at the same frequency.

[0081] The amplification chain 100 comprises a transimpedance amplifier (TIA) (which converts a current into a voltage) placed for example at the same temperature as the qubits, i.e. in the embodiment described less than 1 K. In the embodiment of [Fig.lA] (or [Fig.lB]), the gain of the reading chain is entirely achieved by the TIA which is capable of amplifying the output current of the SETs which is of the order of a few nA. For this the TIA has a gain of the order of 1,000,000 V / A or more. It also has, taking into account the reading time of the order of ps, a bandwidth of the order of a few tens of MHz. We choose a low-power TIA (around a hundred pW), which allows us to place it in the cryostat as close as possible to the qubits, at the same temperature as them, i.e. at a temperature of around 100 mK. We naturally choose a low-noise TIA.A so-called "capacitive feedback" TIA architecture as disclosed by Razavi, 2000 is used in a particularly interesting variant.

[0082] The signal on the radiofrequency transmission line 50, before demodulation, but after conversion by the TIA is an output voltage.

[0083] IQ demodulation extracts the complex components I and Q from the signal and transmits them to an analog-to-digital converter 199 which allows the amplitude and phase of the signal to be placed in the complex plane. These are presented in the form of constellations of points called symbols corresponding to combinations of the states of the qubits excited at the frequency used for the demodulation chain concerned. These constellations will be discussed later.

[0084] Preliminary characterizations of the response, seen by the demodulation circuits 198, of the qubits to the excitations at the different frequencies fl, f2 ... as a function of the states of the qubits have been stored in memories 201 (or memory address) of the demultiplexing circuit 200 associated with each frequency fl, f2, ... These Preliminary characterizations are compared, by discrimination means 202, with the measured complex components I and Q to recognize the current combination of states (the current symbol) of the qubits excited at the frequency concerned. The discrimination means 202 can be an ASIC (application-specific integrated circuit) or a DSP (digital signal processor).

[0085] A similar discrimination means (not shown), which may be the same ASIC or the same DSP, is provided to process the information obtained by the demodulation chain focusing on the frequency f2. It makes it possible to deduce from the multiplexed signal the state of qubit 21 and other qubits not shown in the figure. The same applies to the other frequencies used (not shown).

[0086] [Fig.IB] With reference to [Fig.IB], a qubit reading circuit according to a second embodiment of the invention is shown. It is based on charge reading, with frequency demultiplexing, and uses elements of the circuit of [Fig.1A],

[0087] The qubits, the SETs, the generators and the phase shifters are arranged and connected together as in [Fig.lA]. An amplification chain 100 is present at the output of the SETs and this time leads to an analog to digital converter 180, which digitizes the output signal over the entire bandwidth. Thus, the analog to digital converter 180 processes the signals at the different frequencies f1, f2, ... For this purpose, a converter is chosen whose bandwidth extends up to a frequency twice the maximum limit of the bandwidth of the amplification chain (the TIA, and / or a voltage / voltage amplifier).

[0088] The output of the analog to digital converter 180 is taken over and processed by a fast Fourier transform module 181, in an ASIC or DSP, which provides (or projects) an amplitude and a phase in the complex plane separately for each of the frequencies fl, f2, ....

[0089] [Fig.2] In [Fig.2], the IQ demodulation used is shown, for the case of two phases separated by ji / 2, with respect to a single frequency fl. Other frequencies can be processed by parallel demodulation circuits downstream of the transimpedance amplifier TIA, which then makes it possible to read several pairs of qubits arranged upstream of the TIA, with one frequency per pair of qubits.

[0090] Stopping on figure 2 where a single frequency is used, the same sinusoidal excitation voltage at the frequency fl is generated and sent to the gate of the two SETs of the system. For one of the transistors, it is applied directly to the gate of the SET coupled to qubit 1. For the other transistor, it is phase shifted by another value Phi before being applied to the gate of the SET coupled to qubit 2. Here, the value Phi = Æ / 2 has been chosen.

[0091] As mentioned in the introduction, SETs exhibit different behaviors depending on the state of the qubit linked to them. If the linked qubit is in state 1, the SET transmits on its output in the form of current the excitation brought to its gate, reproducing in particular the frequency fl and the phase (here, 0 or Æ / 2). If the qubit linked to the SET is in state 0, the SET does not transmit its excitation, and no current is present on the output of the SET. The presence or absence of the excitation frequency and phase pair specific to the output of each SET is thus dependent on the state of the qubit linked to the SET.

[0092] The currents of the SETs are summed and then the sum is applied to the input of the amplification chain 100 comprising a transimpedance amplifier TIA which converts it into voltage and amplifies the signal.

[0093] The information constituted by the state of each qubit is then extracted from this signal. Two channels are used with one channel extracting the information contained in the signal which has not been phase shifted and which is classically called signal I and one channel extracting the information contained in the signal which has undergone a quadrature phase shift (of ^ / 2 or -Æ / 2) and which is classically called signal Q.

[0094] Figure 2 takes advantage of the fact that the phase brought to the SET S12 is Æ / 2, which means that the same phase shifter is used in two distinct circumstances (the phase shift of one SET relative to the other, and then the IQ demodulation), but if this phase brought to the SET S12 is different, it is appropriate to have a phase shifter of Æ / 2 for the demodulation and another, distinct, from the Phi phase for the SET S12 (which is envisaged in [Fig.lA], with nevertheless a higher number of phases).

[0095] The demodulator uses two series chains each consisting of a multiplier 210, an integrator filter 220 and a comparator 230 in order to convert the information contained in the two signals (I and Q) into two binary words of 1 bit each. A 1-bit analog-to-digital converter is thus constituted by the series connection of the multiplier, an integrator and a comparator.At the beginning of the chain are applied the amplified signal provided by the TIA and the reference sinusoidal voltage (phase shifted with respect to each other by Æ / 2) to which it is multiplied, and at the output of the chain, the information provided simultaneously by the two comparators 230 is counted for a sufficient time then is decoded by a digital threshold comparator 500 using look-up tables 510, for example by a region of interest type extraction, making it possible to deduce in a univocal and reliable manner the current combination 550 of the states of the qubits 11 and 12. The digital threshold comparator is implemented in the form of an ASIC or a DSP, and constitutes a means of discriminating the states of the qubits excited at the frequency fl.

[0096] In more detail, the signal at the output of the TIA (Vout) is multiplied by the same excitation signals (to the phase) as those applied to the respective SETs, which makes it possible to test the two channels to know the presence or absence in the latter of the excitation frequency. If the frequency is present in Vout, the output of the corresponding multiplier 210 has a voltage which has a DC component in addition to a sinusoidal component. If the frequency is absent, then at the output of the multiplier there is a sinusoidal signal without DC voltage (or even a zero signal).

[0097] The integrator 220 integrates the DC component of the voltage, in the case where it is present, in the form of an output ramp which ends up reaching a calibrated threshold in the comparator 230 whose output goes from a high level (0) to a low level (1). If no DC voltage is present at the output of the multiplier, then the output of the integrator does not reach the threshold of the comparator whose output remains at 0 (high level).

[0098] The state of the qubits is thus expressed at the output of the two comparators in the form of two voltage levels which can be interpreted as two logic levels and therefore two binary words. The generated binary words are compared with pre-established thresholds stored in the correspondence table 510 to determine the states of the qubits 550.

[0099] [Fig.3] A constellation in the complex plane for two phases per frequency is shown in Figure 3. Thus, two excitation signals at the same frequency are sent to a first and a second SET respectively, but with a phase difference between the two signals. The figure represents the complex space IQ. The first phase is conventionally taken to be 0 radians, the second phase in this embodiment is ^ / 2 radians. The signals can be represented by points called symbols in the IQ plane or as vectors I+jQ.

[0100] There are therefore four possible combinations of states depending on whether the first qubit is in state 0 or 1 and whether the second qubit is also in state 0 or 1. The figure shows the signal for these different possibilities. Qubit 1 = 0 Qubit 1 = 1 Qubit2 = 0 Signal A Signal B Qubit2 = 1 Signal C Signal D

[0101] The phase and amplitude of the sum of the output signals of the different SETs (Iout in [Fig.lA]) thus depend on the state of the qubits, in the form of an addition of complex numbers or vectors. Thus, [Fig.3] shows that D = B + C.

[0102] [Fig.4] The combinations of states are, in one embodiment, discriminated in the complex plane by different techniques which rely on a prior calibration of the output constellation by applying to multiple occurrences of each combination of input states. From this determined constellation statistically, we determine, for each combination of states, a unique way of identifying it in the demodulated signal in operating conditions of the quantum device.

[0103] One method is to use boundaries in the complex plane, by the technique of the region of interest, or "Region Of Interest" for short ROI. The ROI can use square, circular or elliptical boundaries, or any other shape that may prove advantageous, in the complex plane: inside these closed curves defining regions of the plane, a positive signal indicates the presence of the combination of states associated with the region of the plane at the end of the prior characterization. The characteristic size of the regions of the complex plane in the ROI technique depends directly on the desired readout fidelity, the readout noise and the signal integration time. There is therefore a compromise between the number of qubits read simultaneously and the fidelity of each readout, for a given TIA and readout time.

[0104] [Fig.5] If the number of SETs and qubits is larger, and there are then m different phases, there are 2Am (mth power of 2) possible combinations of states.

[0105] If the chosen phase distribution has a symmetry (which is possible as soon as two phases are used, but this has been avoided in figures 2 to 4), combinations of states are superimposed, which no longer allows the entire information present in the qubits to be read. To overcome this difficulty, phase and amplitude distribution schemes are implemented to eliminate or reduce the symmetries in the constellations of state combinations and thus read the entire information present.

[0106] In one embodiment, the number of different phases is a number less than the value 1 (i.e. less than one unit, or resulting from the difference between the chosen number and the number 1) than a chosen prime number greater than or equal to 3 (3, 5, 7, 11, ...).

[0107] Once the number of phases has been thus determined, these are equally distributed in the interval 0 to 2ir around the trigonometric circle, but as if an additional phase were planned, and their number was actually equal to the chosen prime number. A planned position is therefore left unoccupied.

[0108] Thus, if the prime number used is p, we provide an equal distribution with a step of 2ir / p radians, and we only put in place, on this distribution, p-1 phases, one of the places being unoccupied, for example the last.

[0109] By means of this method, the combination of states composed solely of 0, and the combination of states composed solely of 1 are distinct, due to the vacancy of one of the places, and all the combinations comprising 0 and 1 are also distinct, due to the prime character of the chosen number.

[0110] This is illustrated in [Fig.5] for p = 3. The figure shows, on the left, the constellation of combinations of states that can be envisaged as long as all the places defined for 3 phases are occupied. It is possible, by leaving one or other of the 3 places unoccupied, which is done in the right part of the figure, to obtain in the complex plane a distinct symbol for each combination of states. In the figure the symbols 010, 110, 000 and 100 are used, the symbols 011, 001, 111 and 101 no longer appearing, whereas if all the positions of the equidistribution had been used, the symbols 000 and 111 would have been superimposed, which is not desired. The third digit is always 0, and the four symbols appearing in the constellation are 01 in the upper left quadrant, 11 in the upper right quadrant, 00 in the center of the plane, and 10 on the abscissa axis on the positive side.

[0111] This is an alternative to the distribution proposed in [Fig.3], which also had this property of discriminating the combinations for two phases.

[0112] [Fig.6] This is also illustrated in [Fig.6] for p = 5, and a use of 4 phases, 5 being a prime number as we know. The constellation of possible state combinations with 4 phases per frequency has been represented by following an equi-distributed distribution with 5 phases.

[0113] For this figure, we have also chosen a transimpedance amplifier gain of 106 V / A, an amplifier bandwidth of 40 MHz, a single-electron transistor intensity of 1 nA, and an equivalent input noise of a value of 0.1.10A-27 A2 / Hz. We note that the symbols are quite distinct and cannot be confused.

[0114] The number of phases implemented for a given frequency is essentially limited by the noise of the amplification chain. Indeed, the standard deviation or dispersion of each symbol and therefore the risk that they partially overlap are linked to the noise of the amplification chain, as well as to the reading time.

[0115] [Fig.7] [Fig.7] shows a 6-phase per frequency constellation following an equi-distributed distribution for 7 phases (7 being a prime number as already mentioned), again for a transimpedance amplifier gain of 106 V / A, an amplifier bandwidth of 40 MHz, a single-electron transistor current of 1 nA, and an equivalent input noise of 0.1.10A-27 A2 / Hz).

[0116] [Fig.8A] In another embodiment, illustrated in [Fig.8A], the signals corresponding to the symbols with a single value 1 are distributed in the interval 0 to 2ir radians according to a first-order (or at first glance) regular distribution but including, in a lower order of magnitude (or in second analysis), a phase shift aimed at eliminating the superposition between the symbols comprising only 0s and comprising only 1s.

[0117] The number of different qubits is this time a prime number greater than or equal to 3 (3, 5, 7, 11, ...), and the signals corresponding to the symbols with a single value 1 are equally distributed in the interval 0 to 2ir around the trigonometric circle (with equal amplitudes), all the places thus defined being occupied by a qubit. Thus, if the prime number is p, an equally distributed distribution is provided with a step of 2ir / p radians, and the p signals corresponding to the symbols with a single value 1 are placed on this distribution, all the places being occupied.

[0118] Thus, all combinations comprising both 0s and 1s are distinct, due to the prime character of the chosen number.

[0119] The shift mentioned above is implemented to distinguish the remaining combinations, namely the combination which only includes 0s, and the one which only includes 1s, which, due to the symmetries, risk being superimposed if no action is taken.

[0120] Thus, some symbols with a single value of 1 are slightly moved, so that symbols comprising only 0s and only 1s are no longer superimposed.

[0121] An illustration is presented in [Fig.8A] for the case where p = 3, for which the second and third symbols with a single value 1 have been moved (from the configuration of the left part of [Fig.5]) along the unit circle, to move them away from the point (I = 1; Q = 0), which results in a displacement of the combinations of states 010 and 001 along the unit circle and of the combinations of states 110, 011 and 101 outside it.

[0122] These displacements do not call into question the possibility of distinguishing these combinations of states from the others, and also result in the appearance of a shift between the combinations of states 111 and 000 (it is 111 which moves), which makes it possible to distinguish them, which was not possible without the shift implemented for qubits 2 and 3.

[0123] Alternatively, one could simply shift more than a single pair of phases. Or one of the phases toward the other, leaving the other phase unchanged.

[0124] The figure provided does indeed present the case described, but the idea behind it is above all the contribution of some singularity in the distribution.

[0125] [Fig.8B] In another embodiment, illustrated in [Fig.8B], the signals corresponding to the symbols with a single value 1 are distributed in the interval 0 to 2ir radians according to a regular distribution, but including an amplitude shift aimed at eliminating the superposition between the symbol comprising only 0s and the symbol comprising only 1s.

[0126] The number of signals corresponding to the different single-valued 1 symbols (i.e., the number of qubits) is again a prime number greater than or equal to 3 (3, 5, 7, 11, ...), and the signals corresponding to the symbols with a single value 1 are equally distributed (as in [Fig.8A]), in first analysis, in the interval 0 to 2ir around the trigonometric circle, all the places thus defined being occupied by a signal.

[0127] An amplitude shift is introduced on one of the signals corresponding to a symbol with a single value 1, so that the symbols comprising only 0s and comprising only 1s are no longer superimposed.

[0128] An illustration is presented in [Fig.8B] for the case where p = 3, for which the signal 001 has been moved outside the unit circle, to bring it closer to the point (I = 0; Q = 0), which results in a displacement of the symbols of the state combinations 011, 101 and 111.

[0129] These displacements do not call into question the possibility of distinguishing these combinations of states from the others, and also result in the appearance of a shift between the combinations of states 111 and 000 (it is 111 which moves), which makes it possible to distinguish them, which was not possible without the shift implemented for qubit 3.

[0130] [Fig.8C] In another embodiment, four phases are distributed regularly over a single half of the trigonometric circle by choosing phases equal to ^ / 8, 3^ / 8, 5^ / 8, 7Æ / 8 for each of the signals corresponding to a symbol with a single value 1. By the distribution over one half of the trigonometric circle, the symmetry linking the combination of states 0..00 and the combination of states 1..11 is broken. In addition, by the semi-circle distribution, the amplitudes no longer cancel each other out, but add up, which resolves the symmetry problems linked to a choice of 4 phases per frequency.

[0131] In order to generalize this technique of distribution on a trigonometric semicircle to a maximum number of phases, small adjustments are made. Indeed, beyond 4 phases per frequency, it is necessary to induce a shift, for example in the distribution of the phases of a single quarter of a trigonometric circle. Or, as previously for a distribution on a complete circle, it is possible to induce a shift on one or more phases. Thus, all symmetry is broken and the distribution is normally compatible for any number of phases. It is also necessary to avoid, when placing an odd number of phases, placing a phase in the center of the semicircle.

[0132] [Fig.8C] shows an equi-distributed, off-axis semi-circle distribution.

[0133] Thus, as already said, we read more than one qubit per frequency by assigning the same excitation frequency to each qubit, but with a different phase and amplitude each time. The output signal composed of the addition of the output currents of the Iout transistors has its phase and amplitude which change according to the state of each of the qubits excited at the frequency concerned. Finally, this Phase and amplitude information is extracted using IQ demodulation. The combinations of qubit states then take the form of a constellation of symbols that can be interpreted, in particular by digital decoding.

[0134] Figures 8D, 8E and 8F, 8G show two other possible and interesting phase distributions. These both approximate a QAM constellation, known to be optimized in terms of symbol spacing (or state combination).

[0135] [Fig.8D] In figure 8D an amplitude and phase distribution is set up on the complete trigonometric circle (360°). To assign a phase to the different ordered qubits, the phases are successively incremented by Æ / 2 radians when moving from one qubit to the next qubit in the list. The amplitudes, for their part, are chosen in the following way: from n =1, for odd n, the same amplitude is assigned to qubit n and to qubit n+1 and the amplitudes are assigned to each successive odd number by dividing the previous amplitude by 2. The distribution obtained for 6 qubits is presented in [Fig.8D].

[0136] [Fig.8E] The resulting state combinations are shown in [Fig.8E]. Any number of qubits can be placed per frequency, whether this number is prime or not. The IQ plane is optimally occupied.

[0137] [Fig.8F] In another variant, the phases are alternately 0 and ^ / 2 (or any other pair of phases separated by Æ / 2). Then, the amplitudes are assigned as before: starting from n =1, for odd n, the same amplitude is assigned to qubit n and to qubit n+1 and the amplitudes are assigned to each successive odd number by dividing the previous amplitude by 2. The distribution obtained for 6 qubits is shown in [Fig.8F].

[0138] [Fig.8G] The resulting state combinations are shown in [Fig.8G]. Again it is possible to place any number of qubits per frequency, whether this number is prime or not. The first quadrant of the IQ plane is still optimally occupied.

[0139] These two choices of distributions of the quadrature phases and amplitudes in powers of 2 correspond respectively to interpreting the states of the qubits as words in negabinary (phases at 0, ji / 2, ir and 3jt / 2, the phases at + and 3+ / 2 being equivalent to amplitudes in powers of -2) or in binary (phases at 0 and ji / 2) on each axis I and Q.

[0140] These phase and amplitude distributions are powerful in terms of occupancy of the IQ plane.

[0141] In a circuit in which the main objective is to respect a reading time of 1 to 2 ps, it is proposed to place 2 or 3 phases per frequency. In a circuit where increasing the number of qubits is the priority even if it means extending the reading time, it is proposed to place 4 or 5 phases per frequency for a reading time around ten ps.

[0142] By using several frequencies, the reading chain can reach a hundred qubits with a single electrical cable coming out of the cryostat enclosing the qubits, with a reading time of 1 ps and a consumption of the order of 100 pW.

[0143] [Fig.9] In Figures 9 to 12, two frequency generators, fl and f2, and two qubits for the frequency generator fl, and one qubit for the frequency generator f2, but this number of qubits was chosen for ease of representation. The invention provides for an often higher number of frequencies, and several, and often more than two, qubits per frequency. Figures 9 to 12 discuss not this, but the temperature at which the amplification chain and the phase shifters are installed. The two phase shifters shown for the frequency fl are denoted <pl 1 et cp 12 et les déphaseurs pour la fréquence f2 ne sont pas représentés. Ils sont installés à un étage de température plus basse que les générateurs de fréquences fl, f2 ..., and a single cable, per frequency, enters their temperature stage from outside this temperature stage (this involves entering a cryostatic enclosure), this cable being the subject of parallelization in several cables carrying the same frequency inside the temperature enclosure of the phase shifters.

[0144] The gain chain is, in an embodiment shown in [Fig.9], essentially made up of a TIA in the cryostat of the qubits and the SETs, and therefore at very low temperature T0 (less than 1K in one embodiment), as shown in [Fig.9]. The input capacitance of the TIA (linked to the input line length) can be low, which is advantageous, but on the other hand the output capacitance (linked to the output line length) is inevitably quite high, which can be disadvantageous, just like the fact that the TIA which must offer a high gain of the order of 106V / A must consume little, of the order of 100pW, and not produce noise preventing a fidelity reading greater than 99.99% in a few ps. This positioning of the TIA in the cryostat therefore imposes constraints on the TIA, which it is proposed to reduce by positioning, in an alternative embodiment, the TIA outside the coldest temperature stage.

[0145] The signal-to-noise ratio at the output of the amplification chain with a bandwidth of 40 MHz has a limit value of 1.383 in order to ensure a reader fidelity of 99.99%, the demodulation means having a reading time of the order of 1 ps. The value of 1.383 is the signal-to-noise ratio value required at the output of the amplification chain with a bandwidth of 40 MHz in order to achieve a bit error rate (or Bit Error Rate, or BER in English) of 0.01% for OOK (On Off Keying) demodulation with a reading time of Ips (and therefore an integration of Ips). OOK demodulation corresponds to the case with only 1 phase per frequency. The relationship is as follows: BER=1 / 2 erfc('V(SNR) / (2'V2)).

[0146] Phase shifters 12 and the other phase shifters are placed in the cryostat of temperature T0.

[0147] [Fig.10] Alternatively, as shown in [Fig.10], the TIA is placed in an environment of intermediate temperature Tl (for example 4K), between the temperature T0 of the temperature stage of the spin qubits and the ambient temperature. Here we are talking about a cryostat with successive enclosures of decreasing sizes, the coldest enclosure being installed in the intermediate temperature enclosure. At such an intermediate temperature stage, the consumption budget is more permissive than at less than 1K, thus, such a TIA is less constrained in consumption than the TIA of the previous embodiment which was placed at less than 1K. Such a placement of the TIA thus offers greater flexibility of use than that of the previous embodiment.

[0148] Again, The phase shifters<pl 1 et q> 12 and the other phase shifters are placed in the cryostat of temperature T0, but they could be placed in the temperature stage Tl, in particular if the frequency generators are in the temperature stage T2.

[0149] [Fig.11] In another embodiment, shown in [Fig.11], a TIA with a first gain, for example 10000 V / A precedes on the reading line (single as previously) an amplifier, for example a low noise amplifier LNA (voltage / voltage) with a second gain, for example 100. The combined effect of the two amplifiers makes it possible to obtain an overall gain of 1000000 V / A. The two amplifiers are physically installed in series at an intermediate temperature Tl, between the temperature of the spin qubit temperature stage and the ambient temperature. Here again, we are talking about a cryostat with successive enclosures of decreasing sizes, the coldest enclosure being installed in the intermediate temperature enclosure. Such a choice then makes it possible to reduce the design and operating constraints weighing on the TIA, which with a lower gain can have a greater bandwidth, of the order of 100MHz without consuming more.The LNA can have a bandwidth of around a hundred MHz and consume around 1 mW. The TIA, which is preferably directly connected to the second amplifier to take advantage of the fact that they are in the same cryostatic enclosure, and consequently does not have a transmission line at its output, has a lower output capacity which allows for high performance.

[0150] Again, The phase shifters<pl 1 et q> 12 and the other phase shifters are placed in the cryostat of temperature T0, but they could be placed in the temperature stage Tl, in particular if the frequency generators are in the temperature stage T2.

[0151] [Fig.12] In another embodiment, shown in [Fig.12], a TIA again precedes on the reading line a second amplifier, for example an LNA. The two amplifiers are however physically implemented in environments at different temperatures: the TIA is close to the qubits and SETs in the very low temperature stage, for example below 1K, and therefore has a low input capacitance, which is advantageous. On the other hand, having an intermediate stage amplifier allows limiting the output capacitance of the TIA, which is also advantageous. The second amplifier can be placed at an intermediate temperature.

[0152] Again, The phase shifters<pl 1 et q> 12 and the other phase shifters are placed in the cryostat of temperature T0, but they could be placed in the temperature stage T1, in particular if the frequency generators are at the temperature stage T2. Here again we are talking about a cryostat with successive enclosures of decreasing sizes, the coldest enclosure being installed in the intermediate temperature enclosure.

[0153] The amplification chain can be constructed using several discrete circuits, and / or using one or more integrated circuits.

[0154] The TIA can be of different architectures, among which the “capacitive feedback” or “capacitive network” architecture, the push-pull architecture, shunt-feedback, or regulated cascode. These architectures are presented in the publications Razavi, 2000 and Romanova, 2019. We favor a TIA which has as wide a bandwidth as possible, as high a gain as possible, low consumption and low noise generation.

[0155] In the embodiments of Figures 9 to 12, the frequency generators are preferably at the same temperature as the demodulation circuit. This temperature is noted T2, and it can be the ambient temperature (approximately 300 K), but it can also be TL

[0156] Thus, in another embodiment, the voltage generators are placed at an intermediate temperature level, which is between room temperature and the temperature of the qubits, this choice of temperature being able to optimize the energy consumption of the system and the placement of cables through the cryostat. In another embodiment, the voltage generators are placed at the temperature of the qubits, in the cryostat, which makes it possible to minimize the number of cables passing through and entering the cryostat.

[0157] The voltage generators are constructed using discrete or integrated circuits. A topology called a "ring oscillator" is particularly suitable. In other embodiments, the voltage generators are constructed in the form of injection oscillators or relaxation oscillators. The excitation by these voltage generators is applied to the gate of the SET transistor concerned. It is of a frequency adapted to each group of qubits to which a given frequency is assigned, and for each qubit, it is shifted by a phase and attenuated by an amplitude in accordance with the principles of the invention.

[0158] The signals of all the SETs are found before demodulation on a common cable (a radiofrequency transmission line transmitting a frequency multiplexed signal). The demodulation circuits can therefore be placed at room temperature, the number of cables crossing the cryostat being limited, since the cable is unique. They can also be placed at low temperature, if this is otherwise advantageous for the implementation.

[0159] The demodulation chain is in certain embodiments implemented in an intermediate temperature stage, for example between 4K and 10K. In these different situations, the fact that the temperature stage of the qubits, which maintains a temperature at less than 1 K, is crossed by only a single outgoing cable and does not contain the demodulation electronics is advantageous.

[0160] The demodulation can be homodyne (as presented above) or heterodyne, then using an intermediate frequency. The heterodyne solution allows in certain implementations to reduce the noise of the demodulation chain, and to increase its bandwidth.

[0161] An analog demodulation chain is used in one embodiment. In another embodiment, the demodulation is performed using a digital circuit processor (DSP), and in another embodiment, an ASIC is programmed to perform the demodulation.

[0162] Discrimination is performed by ROI region of interest technique using in one embodiment as a form of discrimination in the plane circles or ellipses, or rectangles or even squares. It can also be carried out by identification of the nearest neighbor.

[0163] Thus a large number of phases per frequency is used, despite the residual noise (after all the design efforts to reduce it) of the amplification and demodulation chain.

[0164] Phase multiplexing as presented above applies to charge-based reading of spin qubits on silicon, through SETs whose conductance varies depending on the state of the qubit, and also to reading other quantum devices, such as spin qubits on silicon using a QPC whose conductance varies depending on the state of the qubit.

[0165] [Fig. 13] SETs can be connected for excitation not by their gate but by their drain, as shown in [Fig. 13]. Then the gate is connected to a fixed or non-fixed potential. And the drain receives the periodic voltage, with the frequency assigned to a group of several qubits, and among these the phase assigned specifically to the qubit concerned.

[0166] It is further specified that the SETs, in [Fig.lA] (and following) or in [Fig. 13], may include other grids. These are connected to a fixed or non-fixed potential.

[0167] It is also specified that the SETs can be replaced by electrometers providing a voltage response, and the output voltages of the electrometers are added. To make such an addition, while maintaining the parallel placement of the electrometers, a capacitance of given value C (identical for each electrometer) is added in series to the output of each electrometer. The second terminals of the different capacitances are connected together at a node, and a capacitance of identical value is placed in parallel, one of its terminals to ground and its other terminal to the node mentioned above. Thus, if the electrometers have a potential output, the capacitances thus placed form a capacitive divider bridge and we then have at the node a potential proportional to the sum of the output potentials of the electrometers.

[0168] Then the added voltages are amplified, for example by an LNA, then demodulated to find the signals of the different qubits, the excitation of which is done at the same frequency, but with shifted phases.

[0169] The invention makes it possible to read more qubits while keeping an amplification block (a TIA and / or a voltage / voltage amplifier) ​​of unchanged performance. The number of cables entering one of the temperature chambers, potentially the coldest temperature chamber, is unchanged, which is remarkable. List of cited documents

[0170] Park, 2021: Park et al., A fully integrated cryo-CMOS SoC for State manipulation, readout and high-speed gate pulsing of spin qubits, IEEE Journal of solid State circuits, vol. 56, No. 11,3289-3306

[0171] Jerger, 2012: Jerger et al., Frequency division multiplexing readout and simultaneous manipulation of an array of flux qubits arXiv: 1205.6375v2

[0172] Morel, 2022: EP4016402A1

[0173] Abdo, 2018: WO2018 / 185542

[0174] Naaman, 2021: WO2021 / 061776

[0175] Bronn, 2022: US2022 / 0140927

[0176] Gong, 2019: Gong et al. Design Considérations for Spin Readout Amplifiers in Monolithically Integrated Semiconductor Quantum Processors, 2019 IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts, 2-4 June 2019, IEEE Catalog Number: CFP19MMW-P0D

[0177] Razavi, 2000: "A 622 Mb / s 4.5 pA / / spl radic / Hz CMOS transimpedance amplifier," 2000 IEEE International Solid-State Circuits Conférence. Digest of Technical Papers (Cat. No.00CH37056), San Francisco, CA, USA, 2000, pp. 162-163, doi: 10.1109 / ISSCC.2000.839732.

[0178] Romanova, 2019: Romanova et Barzdenas "A Review of Modem CMOS Transimpedance Amplifiers for OTDR Applications. Electronics 2019, 8, 1073. https: / / doi. org / 10.3390 / electronic s 810107 3

[0179] Williams, 2009 : EP2075745A1

Claims

Claims

1. A quantum device comprising a cryostat, a plurality of qubits (11, 12,.. .,1M, 21...) in a temperature chamber of the cryostat, and for each qubit of the plurality of qubits, an electrometer (SI 1, S12, ... SIM, S21 ...) coupled to said qubit for extracting a read signal of a current state of the qubit, the read signals of the qubits of the plurality being summed on a common read line (50) of the quantum device, then transmitted to a demultiplexing circuit (200) of the quantum device, the quantum device being further characterized in that the periodic excitations transmitted to a group of several electrometers (SI 1, S12, ... SIM ) of the device being with an identical frequency (fl) using a synchronized generation means (VI, V2 ...) of the quantum device external to said temperature chamber, the quantum device comprises phase shift means and amplitude attenuation (Phil, Phi2, ...PhiM) in said temperature enclosure introducing distinct phase shifts in the excitations applied respectively to the electrometers (SU, S12, ... SIM) of said group.

2. Quantum device according to claim 1, characterized in that the phase shift means (Phil, Phi2, ... PhiM) are also amplitude attenuation means.

3. Quantum device according to claim 1 or claim 2, characterized in that the phase shifting means (Phil, Phi2, ... PhiM) are different cable lengths, adjustable phase shifters, injection oscillators or CMOS inverter chains.

4. Quantum device according to one of claims 1 to 3, characterized in that the electrometers (SI 1, S12, ... SIM, S21 ...) are divided into several groups, each group receiving an excitation with a frequency distinct (fl, f2) from those of the other groups, and the common reading line (50) being common to the electrometers of the different groups.

5. Quantum device according to one of claims 1 to 4, characterized in that each electrometer (SU, S12, ... SIM, S21 ...) comprises a single-electron transistor, the reading signal being a current.

6. Quantum device according to one of claims 1 to 5, characterized in that the qubits are spin qubits, and each qubit pair and associated electrometer is capacitively coupled by quantum dots of each other.

7. Quantum device according to one of claims 1 to 6, characterized in that the phases associated with the electrometers of said group are essentially distributed regularly every 2ir / n radians, n being a prime natural integer greater than or equal to 3, and the distribution of the signals associated with the symbols in the IQ plane is made secondarily irregular.

8. Quantum device according to claim 7, characterized in that the number of electrometers in the group is n-1, any one of the n 2ir / n radian values ​​not being assigned to any electrometer in the group.

9. Quantum device according to claim 7, characterized in that the number of electrometers in the group is n, and the phases associated with the electrometers are distributed in the interval 0 to 2ir radians according to a regular first-order distribution but including, in a lower order of magnitude, a phase shift eliminating the superposition between the symbol comprising only 0s and the symbol comprising only 1s.

10. Quantum device according to claim 7, characterized in that the number of electrometers in the group is n, the amplitude of at least one of the excitations being reduced or increased relative to at least one other in order to limit the symmetries of the chosen phase distribution.

11. Quantum device according to one of claims 1 to 6, characterized in that the phases associated with the electrometers of said group are essentially distributed regularly every ir / n radians, n being a natural integer greater than or equal to 4, and n being the maximum number of electrometers, and their distribution is made secondarily irregular if n is greater than or equal to 5.

12. Quantum device according to one of claims 1 to 6, characterized in that the amplitudes are assigned according to the rule from n = 1, for odd n, the same amplitude is assigned to qubit n and to qubit n + 1 and the amplitudes are assigned to each successive odd number by dividing the previous amplitude by 2, the phases associated with the electrometers of said group being successively incremented by 71H radians when passing from one qubit to the next qubit, alternately taking two values ​​shifted by 71H.

13. Quantum device according to one of claims 1 to 12, characterized in that said temperature enclosure is the temperature enclosure (TO) of the qubits.

14. Quantum device according to one of claims 1 to 12, characterized in that said temperature enclosure is an intermediate temperature enclosure (Tl), the qubits being in a lower temperature enclosure (TO) than said intermediate temperature enclosure (Tl) and internal to it, and the phase shifting means (Phil, Phi2, ... PhiM) being outside the lower temperature enclosure (TO) but inside the intermediate temperature enclosure (Tl), which also contains an amplifier (100) for amplifying the signal on the common reading line (50).