Switching Power Supply

Abstract

The present application discloses a switching power supply comprising a primary side control circuit and a secondary side control circuit, further comprising a processor and a millimeter wave transmission circuit; said primary side control circuit and said secondary side control circuit; said processor and said millimeter wave transmission circuit are integrated on a same chip, said processor is connected to said primary side control circuit via said millimeter wave transmission circuit; said processor is connected to said secondary side control circuit;the application ensures the safety distance requirement between said primary side control circuit and said secondary side control circuit, while realizing single-chip design, not only ensures the simplicity of switching power supply design and small footprint, but also reduces EMI. Figure for abstract: Figure 2;

Description

Title of the invention: Switching power supply Technical field

[0001] The present invention relates to the field of electrical energy conversion, and in particular to a switching power supply. Prior art

[0002] Switching power supply is a high-frequency electrical energy conversion device that generally converts an incoming alternating current power supply into a specific form of direct current power supply for charging equipment. By controlling the closing and stopping of the switch to control the working power of the power transformer, so as to meet the needs of different power circuits. Switching power supply is widely applied in automation control, military equipment, scientific research equipment, LED lighting, industrial control equipment, communication equipment, electrical equipment and other fields.

[0003] Most of the primary side and secondary side controls of discrete components, as shown in [Fig.l], the switching power supply includes a primary side switching power supply chip, a secondary side synchronous rectifier chip and a charging protocol chip. The discrete design between the switching power supply chip, the synchronous rectifier chip and the charging protocol chip is to meet the safety distance requirements of safety regulations, so the existing switching power supply design not only results in complex design and large footprint, but also causes problems such as high EMI interference. Summary of the invention

[0004] The technical problem to be solved by the present invention is: to provide a switching power supply which realizes a small footprint design of the switching power supply while reducing electromagnetic interference EMI.

[0005] In order to solve the above-mentioned technical problem, the present invention adopts the following technical solution:

[0006] A switching power supply comprising a primary side control circuit and a secondary side control circuit, further comprising a processor and a millimeter wave transmission circuit;

[0007] said primary side control circuit, said secondary side control circuit, said processor and said millimeter wave transmission circuit are integrated on a single chip;

[0008] said processor is connected to said primary side control circuit via said millimeter wave transmission circuit;

[0009] said processor is connected to said secondary side control circuit.

[0010] Further, said millimeter wave transmission circuit comprises a millimeter wave transmitter circuit and a millimeter wave receiver circuit;

[0011] one end of said millimeter wave transmitter circuit is connected to said processor and the other end is wirelessly connected to one end of said millimeter wave receiver circuit;

[0012] the other end of said millimeter wave receiver circuit is connected to said primary side control circuit.

[0013] Furthermore, said millimeter wave transmission circuit is a millimeter wave transmission chip.

[0014] Furthermore, said primary side control circuit is a switching power supply chip.

[0015] Further, said primary side control circuit comprises a driver and a power switching tube;

[0016] said processor is connected to the input end of said driver via said millimeter wave transmission circuit;

[0017] said output end of said driver is connected to said power switching tube.

[0018] Further, said primary side control circuit comprises a logic control and fault protection circuit, an overvoltage protection circuit and a voltage regulator circuit;

[0019] said overvoltage protection circuit and said voltage regulator circuit are respectively connected to said logic control and fault protection circuit;

[0020] said logic control and fault protection circuit is connected to said millimeter wave transmission circuit via said voltage regulator circuit.

[0021] Further, said millimeter wave transmission circuit comprises a millimeter wave transmitting end and a millimeter wave receiving end, a transmitting antenna and a receiving antenna;

[0022] said logic control and fault protection circuit is connected to one end of said millimeter wave receiving end via said voltage regulator circuit, and the other end of said millimeter wave receiving end is connected to said receiving antenna;

[0023] one end of said millimeter wave transmitting end is connected to said processor and the other end is connected to said transmitting antenna;

[0024] said transmitting antenna and said receiving antenna communicate with each other by millimeter waves.

[0025] Further, said overvoltage protection circuit comprises an AC overvoltage protection circuit, an undervoltage / overvoltage protection circuit and a capacitor X discharge circuit;

[0026] said voltage regulator circuit comprises a first low voltage differential linear regulator circuit, a second low voltage differential linear regulator circuit, a third low voltage differential linear regulator circuit and a VDC overvoltage protection circuit;

[0027] said millimeter wave receiving end comprises a signal output end, a receiving power supply end and a receiving activation end;

[0028] said output end of said AC overvoltage protection circuit, said output end of said undervoltage / overvoltage protection circuit, said output end of said capacitor X discharge circuit, said output end of said first low voltage differential linear regulator circuit and an output end of said VDC overvoltage protection circuit are all connected to said input end of said logic control and fault protection circuit;

[0029] an output end of said second low voltage differential linear regulator circuit is connected to an input end of the power supply of said power switching tube;

[0030] a first activation end of said logic control and fault protection circuit is connected to a first input end of said third low voltage differential linear regulator circuit;

[0031] an output end of said third low-voltage differential linear regulator circuit is connected to a receiving feed end of said millimeter-wave receiving end;

[0032] said signal output end of said millimeter wave receiving end is connected to said logic control and fault protection circuit via a first buffer memory;

[0033] a second activation end of said logic control and fault protection circuit is connected to said receiving activation end of said millimeter wave receiving end.

[0034] Further, an input control circuit is included;

[0035] Said input control circuit is respectively connected to a drain of said power switching tube, to said input end of said AC overvoltage protection circuit, to said input end of said undervoltage / overvoltage protection circuit, to said input end of said capacitor X discharge circuit, to said input end of said first low-voltage differential linear regulator circuit, to an input end of said VDC overvoltage protection circuit, to said input end of said second low-voltage differential linear regulator circuit, to a second input end of said third low-voltage differential linear regulator circuit, and to said input end of said logic control and fault protection circuit.

[0036] Furthermore, said primary side control circuit comprises an RS trigger;

[0037] an S end and an R end of said RS trigger are both connected to said logic control and fault protection circuit, a Q end is connected to an input end of said driver, and said output end of said driver is connected to a gate of said power switching tube.

[0038] Furthermore, said primary side control circuit also comprises a negative voltage sampling circuit, a leading edge suppression circuit, a CS jitter correction circuit, a maximum frequency adjustment circuit and a first comparator;

[0039] said input control circuit is connected to an input end of said negative voltage sampling circuit;

[0040] one end of said output end of said negative voltage sampling circuit 381 is connected to an input end of said leading edge suppression circuit 382;

[0041] said output end of said leading edge suppression circuit 382 is respectively connected to an input end of said jitter correction circuit CS and to an input end of said maximum frequency adjustment circuit;

[0042] said output end of said jitter correction circuit CS is connected to a positive pole of said first comparator;

[0043] a negative pole of said first comparator is connected to a first reference voltage;

[0044] an output end of said first comparator and an output end of said maximum frequency adjustment circuit are respectively connected to said logic control and fault protection circuit;

[0045] further, a transformer is included;

[0046] said input control circuit comprises a rectifier bridge, a first diode, a second diode, a first resistor, a first electrolytic capacitor, a second resistor, a first capacitor, a third diode, a fourth diode, a third resistor, a second capacitor and a fourth resistor;

[0047] one of the AC input ends of said rectifier bridge is connected to a positive end of said first diode and the other end is connected to a positive end of said second diode;

[0048] a negative pole of said first diode and a negative pole of said second diode are all connected to one end of said first resistor, and the other end of said first resistor is respectively connected to said input end of said AC overvoltage protection circuit, said input end of said undervoltage / overvoltage protection circuit, said input end of said capacitor X discharge circuit;

[0049] said primary side of said transformer comprises a first winding and a second winding;

[0050] one of the DC ends of said rectifier bridge is grounded, and the other end is respectively connected to a heteronomous terminal of said first winding, to one of the ends of said second resistor, to one of the ends of said first capacitor, and to one of the ends of said first electrolytic capacitor;

[0051] the other end of said first electrolytic capacitor is connected to one of the ends of said third resistor;

[0052] the other end of said third resistor is connected to said input end of said negative voltage sampling circuit;

[0053] the other end of said second resistor and the other end of said first capacitor are respectively connected to a negative pole of said third diode;

[0054] a positive pole of said third diode is respectively connected to said drain of said power switching tube and to a terminal of the same name of said first winding;

[0055] a terminal of the same name of said second winding is connected to a positive pole of said fourth diode;

[0056] a negative pole of said fourth diode is connected to one of the ends of said fourth resistor;

[0057] the other end of said fourth resistor is respectively connected to said input end of said first low voltage differential linear regulator circuit, to said input end of said VDC overvoltage protection circuit, to said input end of said second low voltage differential linear regulator circuit, to said second input end of said third low voltage differential linear regulator circuit and to one end of said second capacitor;

[0058] the other end of said second capacitor, a heteronomous terminal of said second winding and a source pole of said power switching tube are grounded.

[0059] Further, an output control circuit is included;

[0060] said output control circuit is respectively connected to said secondary side of said transformer and to said secondary side control circuit.

[0061] Furthermore, said secondary side control circuit comprises a synchronous rectification circuit;

[0062] said processor is connected to said synchronous rectification circuit;

[0063] Further, said millimeter wave transmitting end comprises a signal input end, a transmitting power supply end and a transmitting activation end;

[0064] said synchronous rectification circuit comprises a detector, a voltage regulator, a fourth low voltage differential linear regulator circuit, an external overheat protection circuit, a Schmitt trigger, a latch and automatic shutdown / restart circuit, a second comparator, a third comparator 418, a NOR calculator, a first AND calculator, a first OR calculator and a first oscillator;

[0065] a first input end and a second input end of said detector, a first input end and a first output end of said voltage regulator, an input end and an output end of said fourth low voltage differential linear regulator circuit, a first output end of said external overheat protection circuit, a positive pole of said Schmitt trigger, an input end of said latch and automatic shutdown / restart circuit, a positive pole of said second comparator, a positive pole of said third comparator are respectively connected to said output control circuit;

[0066] a first output end of said detector is connected to said second input end of said voltage regulator and said second output end is connected to said processor;

[0067] an input end of said external overheat protection circuit is connected to said processor;

[0068] an output end of said Schmitt trigger and an output end of said latch and automatic shutdown / restart circuit are all connected to said processor;

[0069] an output end of said second comparator is connected to a first input end of said NOR calculator;

[0070] an output end of said third comparator is connected to a second input end of said NOR calculator;

[0071] an output end of said NOR calculator is connected to a third input end of said first AND calculator;

[0072] a first input end of said first AND calculator is connected to a third output end of said detector;

[0073] a second input end of said first AND calculator is connected to said processor;

[0074] a first output end and a second output end of said first oscillator are connected to a fourth input end and a fifth input end of said first AND calculator;

[0075] a third output end of said first oscillator is connected to said processor;

[0076] a first input end of said first OR calculator is connected to said processor;

[0077] an output end of said first AND calculator is connected to a second input end of said first OR calculator;

[0078] an output end of said first OR calculator is connected to a signal input end of said millimeter wave transmitting end;

[0079] an activation end of said processor is connected to a transmitting activation end of said millimeter wave transmitting end;

[0080] an output end of said fourth low-voltage differential linear regulator circuit is connected to a transmitting power supply end of said millimeter-wave transmitting end;

[0081] Further, said output driver circuit comprises a first triode, a second electrolytic capacitor, a fifth resistor, a third capacitor, a fourth capacitor, a sixth resistor, a seventh resistor and an eighth resistor;

[0082] said secondary side of said transformer comprises a third winding;

[0083] a homonymous terminal of said third winding is respectively connected to one of the ends of said second electrolytic capacitor, to one of the ends of said sixth resistor, to a first input end of said detector and to an input end of said fourth low voltage differential linear regulator circuit;

[0084] the other end of said second electrolytic capacitor is respectively connected to a source pole of said first triode, to one of the ends of said third capacitor, to one of the ends of said fourth capacitor, to one of the ends of said eighth resistor, which are all grounded;

[0085] the other end of said sixth resistor is respectively connected to one of the ends of said seventh resistor and to a positive pole of said second comparator;

[0086] the other end of said seventh resistor is respectively connected to the other end of said eighth resistor and to a positive pole of said second comparator;

[0087] the other end of said third capacitor is respectively connected to an output end of said voltage regulator and to a positive pole of said Schmitt trigger;

[0088] the other end of said fourth capacitor is connected to said output end of said fourth low voltage differential linear regulator circuit;

[0089] a heteronomous terminal of said third winding is respectively connected to a drain of said first triode and to one of the ends of said fifth resistor;

[0090] a source pole of said first triode is connected to said processor via a second buffer memory;

[0091] the other end of said fifth resistor is connected to a second input end of said detector.

[0092] Further, said secondary side control circuit also comprises a charging protocol circuit;

[0093] said processor is connected to said charging protocol circuit.

[0094] Further, said charging protocol circuit also comprises a digital controller and a USB PD controller;

[0095] said sixth resistor and said seventh resistor in said output control circuit are replaced by a second triode and a fifth capacitor;

[0096] a drain of said second triode is respectively connected to said ends of said second electrolytic capacitor, to a first input end of said voltage regulator and to said input end of said fourth low voltage differential linear regulator circuit;

[0097] a source pole of said second triode is respectively connected to one of the ends of said fifth capacitor and to said USB PD controller;

[0098] a grid of said second triode is connected to a first output end of said digital controller;

[0099] the other end of said fifth capacitor is connected to the other end of said eighth resistor;

[0100] an input end of said digital controller is connected to a first input end of said detector;

[0101] a second output end of said digital controller is connected to a positive pole of said second comparator;

[0102] said USB PD controller is respectively connected to a first input end of said detector and to an output end of said fourth low voltage differential linear regulator circuit;

[0103] said digital controller and a control line of said USB PD controller are successively connected to control lines.

[0104] Further, said logic control and fault protection circuit comprises a fourth comparator, a first fault manager, a second AND calculator, a second OR calculator, a second oscillator, a first power manager, a fifth comparator, a sixth comparator 338 and a third triode;

[0105] an output end of said AC surge protection circuit is connected to a positive pole of said fourth comparator;

[0106] a first output end of said first power manager is connected to a negative pole of said fourth comparator;

[0107] an output end of said fourth comparator is connected to a first input end of said first fault manager;

[0108] said output end of said undervoltage / overvoltage protection circuit is connected to a second input end of said first fault handler;

[0109] said output end of said VDC overvoltage protection circuit is connected to a third input end of said first fault manager;

[0110] a fourth input end of said first fault manager is connected to an output end of an internal overheat protection circuit;

[0111] after the reverse, an output end of said first fault manager is connected to a first input end of said second AND calculator;

[0112] an output end of said first low voltage differential linear regulator circuit is connected to a first input end of said first power manager;

[0113] a second input end of said first power manager is connected to an output end of a soft start circuit;

[0114] a second output end of said first power manager is connected to a negative pole of said fifth comparator;

[0115] a third output end of said first power manager is connected to a negative pole of said sixth comparator;

[0116] a fourth output end of said first power manager is connected to said first input end of said third low voltage differential linear regulator circuit;

[0117] a fifth output end of said first power manager is connected to a negative pole of said first comparator;

[0118] a positive pole of said fifth comparator is connected to a signal output end of said millimeter wave receiving end via said first buffer memory;

[0119] an output end of said fifth comparator is connected to a second input end of said second AND calculator;

[0120] A positive pole of said sixth comparator inputs a DC voltage;

[0121] an output end of said sixth comparator is connected to a receiving activation end of said millimeter wave receiving end;

[0122] an input end of said second oscillator is connected to an output end of said maximum frequency adjustment circuit;

[0123] an output end of said second oscillator is connected to a third input end of said AND calculator;

[0124] an output end of said ET calculator is connected to said S end of said RS trigger;

[0125] a first input end of said second OR calculator is connected to a maximum conduction time adjustment circuit;

[0126] a second input end of said second OR calculator is connected to an output end of said first comparator;

[0127] an output end of said second OR calculator is connected to said R end of said RS trigger;

[0128] an output end of said capacitor discharge circuit X is connected to a grid of said third triode;

[0129] a drain of said third triode is connected to an AC input;

[0130] a source pole of said third triode is grounded.

[0131] Further, said processor comprises a seventh comparator, a second power manager, an SR driver signal manager, a second fault manager, an SR activation circuit and a pulse frequency modulator;

[0132] an output end of said latch and automatic shutdown / restart circuit is connected to an input end of said second power manager;

[0133] a second input end of said second power manager is connected to a negative pole of said seventh comparator;

[0134] the other end of said sixth resistor is connected to a positive pole of said seventh comparator;

[0135] an output end of said seventh comparator is connected to a transmitting activation end of said millimeter wave transmitting end;

[0136] a second output end of said external overheat protection circuit, an output end of said Schmitt trigger and an output end of said latch and automatic shutdown / restart circuit are all connected to an input end of said second fault handler;

[0137] an output end of said second fault manager, an output end of said pulse frequency modulator, a second output end of said detector and a third output end of said first oscillator are all connected to an input end of said SR driver signal manager;

[0138] a first output end of said SR driver signal handler is connected to an input end of said second buffer memory;

[0139] a second output end of said SR driver signal manager is connected to a first input end of said OR calculator;

[0140] a third output end of said SR driver signal manager is connected to an input end of said SR activation circuit;

[0141] an output end of said SR activation circuit is connected to a second input end of said ET calculator;

[0142] Further, said synchronous rectifier circuit is a synchronous rectifier chip and said charging protocol circuit is a charging protocol chip.

[0143] Furthermore, said synchronous rectification circuit and said charging protocol circuit are respectively integrated in said processor.

[0144] Further, a plurality of charging protocol circuits are integrated into said processor.

[0145] The beneficial effect of the present invention is that: said primary side control circuit 3 and said secondary side control circuit of the switching power supply are integrated on a single chip, and a processor is provided on a single chip, and said processor realizes the control of the primary side control circuit and the secondary side control circuit, and at the same time, said processor is configured to communicate with said primary side control circuit via said millimeter wave transmission circuit, and the isolation degree of said millimeter wave transmission circuit ensures the requirement of safe distance between said primary side control circuit and said secondary side control circuit, which also realizes the single-chip design in which said primary side control circuit and said secondary side control circuit are combined and sealed together.The single-chip design with simple structure not only ensures the simplicity of the switching power supply design and its small footprint, but also reduces the electromagnetic interference EMI, and furthermore, since the control signals of said primary side control circuit and said secondary side control circuit are all generated by said . processor, the control of said primary side control circuit does not require feedback from said secondary side control circuit, but is generated directly by said processor, while the control signal is transmitted by said processor via said millimeter wave transmission circuit, which greatly improves the transmission speed of control signals, with low delay and high efficiency. Brief description of the drawings

[0146] [Fig.l] is a schematic view of the structure of a primary side control circuit and a secondary side control circuit of the prior art switching power supply;

[0147] [Fig.2] is a schematic view of the structure of a circuit of a switching power supply according to an embodiment of the present invention;

[0148] [Fig.3] is a schematic view of the internal structure of a processor of a switching power supply according to an embodiment of the present invention;

[0149] [Fig.4] is a schematic view of a circuit connection of a processor of a switching power supply according to an embodiment of the present invention;

[0150] [Fig.5] is a schematic view of the structure of a switching power supply according to an embodiment of the present invention;

[0151] [Fig.6] is a schematic view of the structure of a primary side control circuit in a switching power supply according to an embodiment of the present invention;

[0152] [Fig.7] is a schematic view of the structure of a millimeter wave transmission circuit in a switching power supply according to an embodiment of the present invention;

[0153] [Fig.8] is a schematic view of the structure of a secondary side control circuit in a switching power supply according to one embodiment of the present invention;

[0154] [Fig.9] is a schematic view of the structure for realizing an integrated design in a switching power supply according to an embodiment of the present invention;

[0155] [Fig. 10] is a schematic view of another structure including a charging protocol circuit in a switching power supply according to an embodiment of the present invention;

[0156] [Fig. 11] is a schematic view of the structure including a secondary side control circuit in a switching power supply according to one embodiment of the present invention;

[0157] [Fig. 12] is a schematic view of the structure including an integrated design of a charging protocol circuit in a switching power supply according to an embodiment of the present invention;

[0158] [Fig. 13] is a schematic view of the structure of a logic control and fault protection circuit in a switching power supply according to an embodiment of the present invention;

[0159] [Fig. 14] is a schematic view of the circuit structure of a processor in a switching power supply according to an embodiment of the present invention;

[0160] 1. millimeter wave transmission circuit; 11. millimeter wave transmitter circuit millimeter wave; 12. millimeter wave receiver circuit; 111. millimeter wave transmitting end; 121. millimeter wave receiving end; 112. transmitting antenna; 122. receiving antenna; 2. processor; 21. seventh comparator; 22. second power manager; 23. SR driver signal manager; 24. second fault manager; 25. SR enable circuit; 26. pulse frequency modulator; 3. primary side control circuit; 31. driver; 32. power switching tube; 33. logic control and fault protection circuit; 331. fourth comparator; 332. first fault manager; 333. second AND calculator; 334. second OR calculator; 335. second oscillator; 336. first power manager; 337. fifth comparator; 338. sixth comparator; 339. second triode; 341. AC overvoltage protection circuit; 342. undervoltage / overvoltage protection circuit; 343. capacitor discharge circuit X; 351. first low-voltage differential linear regulator circuit; 353. second low-voltage differential linear regulator circuit; 354. third low-voltage differential linear regulator circuit; 352. VDC surge protection circuit; 36. first buffer; 37. RS trigger; 381. negative voltage sampling circuit; 382. leading edge suppression circuit; 383. CS jitter correction circuit; 384. maximum frequency adjustment circuit; 385. first comparator; 4. secondary side control circuit; 411. detector; 412. voltage regulator; 413. fourth low-voltage differential linear regulator circuit; 414. external overheat protection circuit; 415. Schmitt trigger; 416. latch and auto-stop / restart circuit; 417. second comparator; 418. third comparator; 419. NOR calculator; 420. first AND calculator; 421. first OR calculator; 422. first oscillator; 423. digital controller; 424. USB PD controller: 5. transformer; 61. rectifier bridge; 621. first diode; 631. first resistor; 641. first electrolytic capacitor; 632.second resistor; 651. first capacitor; 623. third diode; 624. fourth diode; 633. third resistor; 652. second capacitor; 634. fourth resistor; 711. first . triode; 72. second electrolytic capacitor; 731. fifth resistor; 741. third capacitor; 742. fourth capacitor; 732. sixth resistor; 733. seventh resistor; 734. eighth resistor. Detailed description

[0161] In order to illustrate in detail the technical contents, the objectives achieved and the effects of the present invention, the following is described with reference to the embodiments and the accompanying drawings.

[0162] The above-mentioned switching power supply according to the present invention, is applicable in all kinds of fields requiring the load, such as automation control, scientific research equipment, LED lighting, industrial control equipment, communication equipment, will be illustrated by specific embodiments.

[0163] In an optional embodiment, referring to [Fig.2] to 4 and [Fig.9], a switching power supply comprising a primary side control circuit 3 and a secondary side control circuit 4, further comprising a processor 2 and a millimeter wave transmission circuit 1;

[0164] said primary side control circuit 3, said secondary side control circuit 4, said processor 2 and said millimeter wave transmission circuit 1 are integrated on the same chip;

[0165] said processor 2 is connected to said primary side control circuit 3 via said millimeter wave transmission circuit 1;

[0166] said processor 2 is connected to said secondary side control circuit 4.

[0167] To achieve millimeter wave transmission, in one embodiment optionally, said millimeter wave transmission circuit 1 comprises a millimeter wave transmitter circuit 11 and a millimeter wave receiver circuit 12;

[0168] one end of said millimeter wave transmitter circuit 11 is connected to said processor 2 and the other end is wirelessly connected to one end of said millimeter wave receiver circuit 12;

[0169] the other end of said millimeter wave receiver circuit 12 is connected to said primary side control circuit 3, wherein said processor 2 transmits a pulse width modulated PWM signal via said millimeter wave transmitter circuit 11 and said receiver circuit, and outputs a PWM signal directly to said primary side control circuit 3 via said processor 2, without feedback from said secondary side control circuit 4.

[0170] In the present embodiment, the transmission of signals between said processor 2 and said primary side control circuit 3 is carried out using said millimeter wave transmission circuit 1. Since the transmission of signals of said millimeter wave transmission circuit 1 is realized using millimeter waves, this plays a role in the spatial isolation between said primary side control circuit 3 and said secondary side control circuit 4, and at the same time, the control signals of said primary side control circuit 3 are directly output by said processor 2 via said millimeter wave transmission circuit 1, which greatly improves the signal transmission speed.

[0171] In another optional embodiment, said millimeter wave transmission circuit 1 is a millimeter wave transmission chip, which makes it possible to further reduce the size of the switching power supply thanks to the chip-based design, and to achieve a thin and light design of the device.

[0172] In another optional embodiment, said primary side control circuit 3 is a switching power supply chip, and in the present embodiment, the size of the switching power supply is further reduced by the chip-based design of said primary side control circuit 3.

[0173] As shown in [Fig.3], in an optional embodiment, said primary side control circuit 3 comprises a driver 31 and a GaN power switching tube 32;

[0174] said processor 2 is connected to the input end of said driver 31 via said millimeter wave transmission circuit 1;

[0175] said output end of said driver 31 is connected to said power switching tube 32;

[0176] In a specific implementation, said processor 2 transmits PWM signals to said driver 31 via said millimeter wave transmission circuit 1, said driver 31 controls the operation of said GaN power switching tube 32 under the control of the PWM signals, and said transformer 5T is driven by the GaN output, HV being the high voltage power supply pin on the primary side, D being the GaN drain pin, and S being the GaN source pole pin, and S being grounded on the primary side;

[0177] In the present embodiment, said processor 2 is a processor 2 of the HOx series.

[0178] In another optional embodiment, as illustrated in Figs. 5 and 6, said primary side control circuit 3 comprises a Logic Control & Fault Protection circuit 33, an overvoltage protection circuit and a voltage regulator circuit;

[0179] said overvoltage protection circuit and said voltage regulator circuit are respectively connected to said logic control and fault protection circuit 33;

[0180] said logic control and fault protection circuit 33 is connected to said millimeter wave transmission circuit ImmW Transceiver via said voltage regulator circuit.

[0181] In [Fig.6], Soft-Start denotes soft start; Ton_MAX denotes maximum conduction time; and Internai OTP denotes internal overheat protection.

[0182] In another optional embodiment, as illustrated in [Fig.7], said millimeter wave transmission circuit 1 comprises a millimeter wave transmitting end 11 ImmW Transmitter and a millimeter wave receiving end 12 ImmW Reveiver, a transmitting antenna 112 and a receiving antenna 122;

[0183] said logic control and fault protection circuit 33 is connected to one end of said millimeter wave receiving end 121 via said voltage regulator circuit, and the other end of said millimeter wave receiving end 121 is connected to said receiving antenna 122;

[0184] one end of said millimeter wave transmitting end 111 is connected to said processor 2 in said secondary side control circuit 4 and the other end is connected to said transmitting antenna 112;

[0185] said transmitting antenna 112 and said receiving antenna 122 communicate with each other by millimeter waves.

[0186] In another optional embodiment, as illustrated in [Fig.6], said overvoltage protection circuit comprises an AC overvoltage protection circuit 341 AC OVP, an undervoltage / overvoltage protection circuit 342 Brown In / Brown Out, and a capacitor discharge circuit 343 X Cap Discharge;

[0187] said voltage regulator circuit comprises a first low voltage differential linear regulator circuit 351 LDO1, a second low voltage differential linear regulator circuit 353 LDO2, a third low voltage differential linear regulator circuit 354 LDO3 and a VDC overvoltage protection circuit 352 VCC OVP;

[0188] As illustrated in [Fig.7], said millimeter wave receiving end 121 comprises a signal output end RX, a receiving power supply end VRX and a receiving activation end EN_RX;

[0189] said output end of said AC overvoltage protection circuit 341, said output end of said undervoltage / overvoltage protection circuit 342, said output end of said capacitor discharge circuit X 343, said output end of said first differential linear regulator circuit low voltage 351 and an output end of said VDC overvoltage protection circuit 352 are all connected to said input end of said logic control and fault protection circuit 33;

[0190] an output end of said second low-voltage differential linear regulator circuit 353 is connected to an input end of the power supply of said power switching tube 32;

[0191] a first activation end EN1 of said logic control and fault protection circuit 33 is connected to a first input end of said third low voltage differential linear regulator circuit 354;

[0192] an output end of said third low-voltage differential linear regulator circuit 354 is connected to a receiving feed end of said millimeter wave receiving end 121;

[0193] said signal output end of said millimeter wave receiving end 121 is connected to said logic control and fault protection circuit 33 via a first buffer memory 36;

[0194] a second activation end of said logic control and fault protection circuit 33 is connected to said receiving activation end of said millimeter wave receiving end 121.

[0195] In another optional embodiment, an input control circuit is also included;

[0196] Said input control circuit is respectively connected to a drain D of said power switching tube 32, to said input end of said AC overvoltage protection circuit 341, to said input end of said undervoltage / overvoltage protection circuit 342, to said input end of said capacitor discharge circuit X 343, to said input end of said first low-voltage differential linear regulator circuit 351, to said input end of said VDC overvoltage protection circuit 352, to said input end of said second low-voltage differential linear regulator circuit 353, to a second input end of said third low-voltage differential linear regulator circuit 354, and to said input end of said logic control and fault protection circuit 33.

[0197] In another optional embodiment, said primary side control circuit 3 comprises an RS trigger 37 and a driver 31;

[0198] said S end and said R end of said RS trigger 37 are both connected to said logic control and fault protection circuit 33, said Q end is connected to said input end of said driver 31, and said output end of said driver 31 is connected to a grid of said power switching tube 32.

[0199] In another optional embodiment, a negative voltage sampling circuit 381 Negative voltage Sampling, a leading edge suppression circuit 382 LEB, a jitter correction circuit 383 CS jitter, a maximum frequency setting circuit 384 Maximum Frequency Setting and a first comparator 385 Comp are also included;

[0200] said input control circuit is connected to an input end of said negative voltage sampling circuit 381;

[0201] one end of said output end of said negative voltage sampling circuit 381 is connected to an input end of said leading edge suppression circuit 382;

[0202] said output end of said leading edge suppression circuit 382 is respectively connected to an input end of said CS jitter correction circuit 383 and to an input end of maximum frequency adjustment circuit 384;

[0203] said input end of said jitter correction circuit CS 383 is connected to a positive pole of said first comparator 385;

[0204] a negative pole of said first comparator 385 is connected to a first reference voltage;

[0205] an output end of said first comparator 385 and an output end of said maximum frequency adjustment circuit 384 are respectively connected to said logic control and fault protection circuit 33.

[0206] In another optional embodiment, as illustrated in [Fig.5], a transformer 5 is included;

[0207] said input control circuit comprises a rectifier bridge 61, a first diode 621, a second diode 622, a first resistor 631, a first electrolytic capacitor 641, a second resistor 632, a first capacitor 651, a third diode 623, a fourth diode 624, a third resistor 633, a second capacitor 652 and a fourth resistor 634;

[0208] one of the AC input ends of said rectifier bridge 61 is connected to a positive end of said first diode 621 and the other end is connected to a positive end of said second diode 622; optionally, said AC input end is connected to an EMI filter;

[0209] A negative pole of said first diode 621 and a negative pole of said second diode 622 are all connected to one end of said first resistor 631, the other end of said first resistor 631 is respectively connected to said input end of said AC overvoltage protection circuit 341, said input end of said undervoltage / overvoltage protection circuit 342, said input end of said capacitor X discharge circuit 343, said input end of said first low voltage differential linear regulator circuit 351, at said input end of said VDC overvoltage protection circuit 352, at said input end of said second low voltage differential linear regulator circuit 353, at a second input end of said third low voltage differential linear regulator circuit 354;

[0210] said primary side of said transformer 5 comprises a first winding and a second winding;

[0211] one of the DC ends of said rectifier bridge 61 is grounded, and the other end is respectively connected to a heteronomous terminal of said first winding, to one of the ends of said second resistor 632, to one of the ends of said first capacitor 651, and to one of the ends of said first electrolytic capacitor 641;

[0212] the other end of said first electrolytic capacitor 641 is connected to one of the ends of said third resistor 633;

[0213] the other end of said third resistor 633 is connected to said input end of said negative voltage sampling circuit 381;

[0214] the other end of said second resistor 632 and the other end of said first capacitor 651 are respectively connected to a negative pole of said third diode 623;

[0215] a positive pole of said third diode 623 is respectively connected to said drain of said power switching tube 32 and to a terminal of the same name of said first winding;

[0216] a homonymous terminal of said second winding is connected to a positive pole of said fourth diode 624;

[0217] a negative pole of said fourth diode 624 is connected to one of the ends of said fourth resistor 634;

[0218] the other end of said fourth resistor 634 is respectively connected to said input end of said first low voltage differential linear regulator circuit 351, to said input end of said VDC overvoltage protection circuit 352, to said input end of said second low voltage differential linear regulator circuit 353, to said second input end of said third low voltage differential linear regulator circuit 354 and to one end of said second capacitor 652;

[0219] the other end of said second capacitor 652, a heteronomous terminal of said second winding and a source pole of said power switching tube 32 are grounded.

[0220] In another optional embodiment, an output control circuit is also included;

[0221] said output control circuit is respectively connected to said secondary side of said transformer 5 and to said secondary side control circuit 4.

[0222] In another optional embodiment, as illustrated in [Fig.7], said millimeter wave transmitting end 111 comprises a transmitting power supply end VTX, a signal output end TX and a transmitting activation end EN_TX;

[0223] Said secondary side control circuit 4 comprises a synchronous rectification circuit, said processor 2 is connected to said synchronous rectification circuit;

[0224] As illustrated in [Fig.8], said synchronous rectification circuit comprises a processor 2 Controller, a detector 411 Detector, a voltage regulator 412 Regulator, a fourth low voltage differential linear regulator circuit 413 LDO, an external overheat protection circuit 414 EXOTP, a Schmitt trigger 415, a latch and auto-stop / restart circuit 416 LATCH / Auto Recovery, a second comparator 417, a third comparator 418, a NOR calculator 419, a first AND calculator 420, a first OR calculator 421 and a first oscillator 422 Oscillator / Timer;

[0225] a first input end and a second input end of said detector 411, a first input end and a first output end of said voltage regulator 412, an input end and an output end of said fourth low voltage differential linear regulator circuit 413, a first output end of said external overheat protection circuit 414, a positive pole of said Schmitt trigger 415, an input end of said latch and automatic shutdown / restart circuit 416, a positive pole of said second comparator 417, a positive pole of said third comparator 418 are respectively connected to said output control circuit;

[0226] a first output end of said detector 411 is connected to said second input end of said voltage regulator 412 and said second output end is connected to said processor 2;

[0227] an input end of said external overheat protection circuit 414 is connected to said processor 2;

[0228] an output end of said Schmitt trigger 415 and an output end of said latch and auto-stop / restart circuit 416 are all connected to said processor 2;

[0229] an output end of said second comparator 417 is connected to a first input end of said NOR calculator 419;

[0230] an output end of said third comparator 418 is connected to a second input end of said NOR calculator 419;

[0231] an output end of said NOR calculator 419 is connected to a third input end of said first AND calculator 420;

[0232] a first input end of said first AND calculator 420 is connected to a third output end of said detector 411;

[0233] a second input end of said first ET calculator 420 is connected to said processor 2;

[0234] a first output end and a second output end of said first oscillator 422 are connected to a fourth input end and a fifth input end of said first AND calculator 420;

[0235] a third output end of said first oscillator 422 is connected to said processor 2;

[0236] a first input end of said first OR calculator 421 is connected to said processor 2;

[0237] an output end of said first AND calculator 420 is connected to a second input end of said first OR calculator 421;

[0238] an output end of said first OR calculator 421 is connected to a signal input end of said millimeter wave transmitting end 111;

[0239] an activation end of said processor 2 is connected to a transmitting activation end of said millimeter wave transmitting end 111;

[0240] an output end of said fourth low-voltage differential linear regulator circuit 413 is connected to a receiving end of said millimeter-wave transmitting end 111;

[0241] wherein a first output end TSmax of said first oscillator 422 indicates the maximum switching period, a second output end tOFF_min indicates the minimum off time and a third output end, tSECINH_max, indicates the secondary maximum time INH;

[0242] In [Fig.4], Handshake / SET_Fault denotes the setting of the initial handshake / fault step; INH denotes the input height; VDD_UVTH denotes the undervoltage threshold VDD. VDD_UV denotes the undervoltage signal; and Vis denotes the current source;

[0243] specifically, as illustrated in [Fig.5] and 8, said output control circuit comprises a first triode 711 Ql, a second electrolytic capacitor 72, a fifth resistor 731, a third capacitor 741, a fourth capacitor 742, a sixth resistor 732, a seventh resistor 733 and an eighth resistor 734;

[0244] said secondary side of said transformer 5 comprises a third winding;

[0245] a terminal of the same name of said third winding is respectively connected to one of the ends of said second electrolytic capacitor 72, to one of the ends of said sixth resistor 732, at a first input end of said detector 411 and at an input end of said fourth low voltage differential linear regulator circuit 413;

[0246] the other end of said second electrolytic capacitor 72 is respectively connected to a source pole of said first triode 711, to one of the ends of said third capacitor 741, to one of the ends of said fourth capacitor 742, to one of the ends of said eighth resistor 734, which are all grounded;

[0247] the other end of said sixth resistor 732 is respectively connected to one of the ends of said seventh resistor 733 and to a positive pole of said first comparator 417;

[0248] the other end of said seventh resistor 733 is respectively connected to the other end of said eighth resistor 734 and to a positive pole of said second comparator 417;

[0249] the other end of said third capacitor 741 is respectively connected to an output end of said voltage regulator 412 and to a positive pole of said Schmitt trigger 415;

[0250] the other end of said fourth capacitor 742 is connected to said output end of said fourth low voltage differential linear regulator circuit 413;

[0251] a heteronomous terminal of said third winding is respectively connected to a drain of said first triode 711 and to one of the ends of said fifth resistor 731;

[0252] a source pole of said first triode 711 is connected to said processor 2 via a second buffer memory 401;

[0253] the other end of said fifth resistor 731 is connected to a second input end of said detector 411.

[0254] [Fig.9] shows a diagram of said primary side control circuit 3, said secondary side control circuit 4 and said millimeter wave transmission circuit 1 which are integrated on the same chip, which provide fixed pins outside, it is sufficient to make the connection according to the corresponding pins.

[0255] In another optional embodiment, as illustrated in Figs. 10 and 11, said secondary side control circuit 4 also comprises a charging protocol circuit; said processor 2 is connected to said charging protocol circuit; that is, said secondary side control circuit 4 comprises a synchronous rectifier circuit and a charging protocol circuit;

[0256] said processor 2 is respectively connected to said synchronous rectifier circuit and to said charging protocol circuit;

[0257] In the present embodiment, the unified control of said synchronous rectifier circuit and said charging protocol circuit in said secondary side control circuit 4 is performed by said processor 2;

[0258] Specifically, said charging protocol circuit comprises a digital controller 423 and a USB PD controller 424;

[0259] said sixth resistor 732 and said seventh resistor 733 in said output control circuit are replaced by a second triode 712 Q2 and a fifth capacitor 743;

[0260] a drain of said second triode 712 is respectively connected to said ends of said second electrolytic capacitor 72, to a first input end of said voltage regulator 412 and to said input end of said fourth low voltage differential linear regulator circuit 413;

[0261] a source pole of said second triode 712 is respectively connected to one of the ends of said fifth capacitor 743 and said USB PD controller 424;

[0262] a grid of said second triode 712 is connected to a first output end of said digital controller 423;

[0263] the other end of said fifth capacitor 743 is connected to the other end of said eighth resistor 734;

[0264] an input end of said digital controller 423 is connected to a first input end of said detector 411;

[0265] a second output end of said digital controller 423 is connected to a positive pole of said second comparator 417;

[0266] said USB PD controller 424 is respectively connected to a first input end of said detector 411 and to an output end of said fourth low voltage differential linear regulator circuit 413;

[0267] said digital controller 423 and a control line of said USB PD controller 424 are successively connected to control lines.

[0268] [Fig. 12] shows a schematic diagram of said primary side control circuit 3, said secondary side control circuit 4 including a charging protocol and said millimeter wave transmission circuit which are integrated on a same chip, which provide fixed pins to the outside, it is sufficient to make the connection according to the corresponding pins, in which DM / DP is the USB Type-C / Type-A signal pin, CC1 / CC2 pins are the USB Type-C / Type-A detection pins. For specific use, it is sufficient to connect said corresponding pins to said corresponding circuits of the switching power supply, with reference to [Fig. 10].

[0269] In another optional embodiment, as illustrated in [Fig. 13], said logic control and fault protection circuit 33 comprises a fourth comparator 331, a first fault manager 332, a second AND calculator 333, a second OR calculator 334, a second oscillator 335, a first power manager 336, a fifth comparator 337, a sixth comparator 338 and a third triode 339;

[0270] an output end of said AC surge protection circuit 341 is connected to a positive pole of said fourth comparator 331;

[0271] a first output end of said first power manager 336 is connected to a negative pole of said fourth comparator 331;

[0272] an output end of said fourth comparator 331 is connected to a first input end of said first fault manager 332;

[0273] said output end of said undervoltage / overvoltage protection circuit 342 is connected to a second input end of said first fault handler 332;

[0274] said output end of said VDC overvoltage protection circuit 352 is connected to a third input end of said first fault manager 332;

[0275] a fourth input end of said first fault manager 332 is connected to an output end of an internal overheat protection circuit;

[0276] after the reverse, an output end of said first fault manager 332 is connected to a first input end of said second AND calculator 333;

[0277] an output end of said first low voltage differential linear regulator circuit 351 is connected to a first input end of said first power manager 336;

[0278] a second input end of said first power manager 336 is connected to an output end of a soft start circuit;

[0279] a second output end of said first power manager 336 is connected to a negative pole of said fifth comparator 337;

[0280] a third output end of said first power manager 336 is connected to a negative pole of said sixth comparator 338;

[0281] a fourth output end of said first power manager 336 is connected to said first input end of said third low voltage differential linear regulator circuit 354;

[0282] a fifth output end of said first power manager 336 is connected to a negative pole of said first comparator 385;

[0283] a positive pole of said fifth comparator 337 is connected to a signal output end of said millimeter wave receiving end 121 via said first buffer memory 36;

[0284] an output end of said fifth comparator 337 is connected to a second input end of said second AND calculator 333;

[0285] a positive pole of said sixth comparator 338 inputs a DC voltage VCC;

[0286] an output end of said sixth comparator 338 is connected to a receiving activation end of said millimeter wave receiving end 121;

[0287] an input end of said second oscillator 335 is connected to an output end of said maximum frequency adjustment circuit 384;

[0288] an output end of said second oscillator 335 is connected to a third input end of said AND calculator;

[0289] an output end of said ET calculator is connected to said S end of said RS trigger 37;

[0290] a first input end of said second OR calculator 334 is connected to a maximum conduction time adjustment circuit;

[0291] a second input end of said second OR calculator 334 is connected to an output end of said first comparator 385;

[0292] an output end of said second OR calculator 34 is connected to said R end of said RS trigger 37;

[0293] an output end of said capacitor discharge circuit X 343 is connected to a grid of said third triode 339;

[0294] a drain of said third triode 339 is connected to an HV AC input;

[0295] a source pole of said third triode 339 is grounded.

[0296] In another optional embodiment, as illustrated in [Fig. 14], said processor 2 comprises a seventh comparator 21, a second power manager 22, an SR driver signal manager 23, a second fault manager 24, an SR activation circuit 25 and a pulse frequency modulator 26;

[0297] an output end of said latch and automatic shutdown / restart circuit 416 is connected to an input end of said second power manager 22;

[0298] a second input end of said second power manager 22 is connected to a negative pole of said seventh comparator 21;

[0299] the other end of said sixth resistor 732 is connected to a positive pole of said seventh comparator 21;

[0300] an output end of said seventh comparator 21 is connected to a transmitting activation end of said millimeter wave transmitting end 111;

[0301] a second output end of said external overheat protection circuit 414, an output end of said Schmitt trigger 415 and an end output end of said latch and auto stop / restart circuit 416 are all connected to an input end of said second fault handler 24;

[0302] an output end of said second fault manager 24, an output end of said pulse frequency modulator 26, a second output end of said detector 411 and a third output end of said first oscillator 422 are all connected to an input end of said SR driver signal manager 23;

[0303] a first output end of said driver signal manager SR 23 is connected to an input end of said second buffer memory 401;

[0304] a second output end of said driver signal manager SR 23 is connected to a first input end of said calculator OR 421;

[0305] a third output end of said driver signal manager SR 23 is connected to an input end of said activation circuit SR 25;

[0306] an output end of said activation circuit SR 25 is connected to a second input end of said calculator ET 420;

[0307] In another optional embodiment, to further achieve a thin and lightweight design, said synchronous rectifier circuit is a Synchronous Rectifier Chip and said charging protocol circuit is a charging protocol chip.

[0308] In another optional embodiment, said synchronous rectifier circuit and said charging protocol circuit are respectively integrated in said processor 2, i.e., said synchronous rectifier circuit and said charging protocol circuit are integrated inside said processor 2, thereby realizing the synchronous rectification function and the charging function, so that the footprint of the switching power supply is further reduced by means of an integrated design;

[0309] In a specific implementation, as illustrated in Figs. 2 and 4, said processor 1 lOx 2 externally provides a PWM OUTPUT pin, an SR pin, a GND pin, a VOUT pin, a DM pin, a DP pin, a CCI pin and a CC2 pin, and after the connection between said processor 1 lOx 2 and said primary side control circuit 3 comprising a driver 31 and a GaN power switching tube 32 via said millimeter wave transmission circuit 1, said single chip as a set externally provides an HV pin, a D pin, an S pin, an SR pin, a GND pin, a VOUT pin, a DM pin, a DP pin, a CCI pin and a CC2 pin, wherein said HV pin is a primary side high voltage power supply pin, said D pin is a GaN drain pin, said S pin is a GaN source pole pin, and said SR pin is the secondary side synchronous rectifier output,DM / DP is a USB Type-C signal pin, and the said CC1 / CC2 pin is a USB Type-C detection pin. In a specific application, it is sufficient, to connect said corresponding pins to said corresponding circuits of the switching power supply, with reference to [Fig.l];

[0310] In another optional implementation, as illustrated in [Fig.3], the whole of said millimeter wave transmission control chip may adopt a PIP hermetic structure, and said millimeter wave transmission control chip comprises a series controller 110x, a 2-way millimeter wave transmission isolator, a driver 31Driver, and a GaN high-power switching tube 32, and the operation of the different modules within said single millimeter wave transmission control chip is controlled and processed in a unified manner by said system controller 110x;said 1 lOx series controller includes PWM control, synchronous rectifier control, PD charging protocol, and can support more rapid charging by adding corresponding charging protocols of different manufacturers, that is, a plurality of charging protocol circuits can be integrated within said 1 lOx series controller, thereby improving the flexibility of the switching power supply in charging. ;

[0311] When said above-mentioned millimeter wave transmission control chip is applied to the actual switching power supply, as shown in [Fig.2], said switching power supply comprises an EMI input filter circuit, a rectifier bridge circuit 61, a coupling transformer 5T, a synchronous rectifier tube Q1, a millimeter wave transmission control chip and a USB Type-C output interface; said millimeter wave transmission control chip externally provides the pins required for the signals of each circuit in said switching power supply circuit. It is sufficient to connect said millimeter wave transmission control chip to said existing switching power supply circuit according to the existing connection relationship of each circuit signal.

[0312] In conclusion, the present invention provides a switching power supply, said primary side control circuit 3 and said secondary side control circuit 4 of the switching power supply are integrated on a single chip, and a processor 2 is provided on a single chip, and said processor 2 realizes the control of the primary side control circuit 3 and the secondary side control circuit 4, and at the same time, said processor 2 is configured to communicate with said primary side control circuit 3 via said millimeter wave transmission circuit 1, and the isolation degree of said millimeter wave transmission circuit 1 ensures the safety distance requirement between said primary side control circuit 3 and said secondary side control circuit 4, which also realizes the single-chip design in which said primary side control circuit 3 and said secondary side control circuit 4 are combined and sealed together, in addition, said primary side control circuit 3, said secondary side control circuit 4 and said millimeter wave transmission circuit 1 are all designed on the chip basis, the single-chip design and the chip-based design not only ensures the simplicity of the switching power supply design and its small footprint, but also reduces the electromagnetic interference EMI, and furthermore, since the control signals of said primary side control circuit 3 and said secondary side control circuit 4 are all generated by said processor 2, the control of said primary side control circuit 3 does not require feedback from said secondary side control circuit 4, but is generated directly by said processor 2,while the control signal is transmitted by said processor 2 via said millimeter wave transmission circuit 1, which greatly improves the transmission speed of control signals, with low delay and high efficiency, the minimal number of peripherals further reduces the difficulty of design and debugging, reduces the board area, reduces costs and achieves super high overall power density, the footprint can be reduced by 30% to 40% compared with existing switching power supply solutions.

[0313] The foregoing are merely embodiments of the present invention and are not intended to limit the scope of the patent of the present invention, and all equivalent transformations using the specification of the present invention and the accompanying drawings, or directly or indirectly in the relevant technical fields, are included within the scope of the patent protection of the present invention.

Claims

Claims

1. A switching power supply comprising a primary side control circuit (3) and a secondary side control circuit (4), characterized in that it further comprises a processor (2) and a millimeter wave transmission circuit (1); said primary side control circuit (3), said secondary side control circuit (4), said processor (2) and said millimeter wave transmission circuit (1) are integrated on a same chip; said processor (2) is connected to said primary side control circuit (3) via said millimeter wave transmission circuit (1); said processor (2) is connected to said secondary side control circuit (4).

2. The switching power supply according to claim 1, characterized in that, said millimeter wave transmission circuit (1) comprises a millimeter wave transmitter circuit (11) and a millimeter wave receiver circuit (12); one end of said millimeter wave transmitter circuit (11) is connected to said processor (2) and the other end is wirelessly connected to one end of said millimeter wave receiver circuit (12); the other end of said millimeter wave receiver circuit (12) is connected to said primary side control circuit (3).

3. The switching power supply according to claim 1 or 2, characterized in that, said millimeter wave transmission circuit (1) is a millimeter wave transmission chip.

4. The switching power supply according to claim 1, characterized in that said primary side control circuit (3) is a switching power supply chip.

5. The switching power supply according to claim 1 or 4, characterized in that, said primary side control circuit (3) comprises a driver (31) and a power switching tube (32); said processor (2) is connected to the input end of said driver (31) via said millimeter wave transmission circuit (1); said output end of said driver (31) is connected to said power switching tube (32).

6. The switching power supply according to claim 5, characterized in that, said primary side control circuit (3) comprises a logic control and fault protection circuit (33), an overvoltage protection circuit and a voltage regulator circuit; said overvoltage protection circuit and said voltage regulator circuit are respectively connected to said logic control and fault protection circuit (33); said logic control and fault protection circuit (33) is connected to said millimeter wave transmission circuit (1) via said voltage regulator circuit.

7. The switching power supply according to claim 6, characterized in that, said millimeter wave transmission circuit (1) comprises a millimeter wave transmitting end (111) and a millimeter wave receiving end (121), a transmitting antenna (112) and a receiving antenna (122); said logic control and fault protection circuit (33) is connected to one end of said millimeter wave receiving end (121) via said voltage regulator circuit, and the other end of said millimeter wave receiving end (121) is connected to said receiving antenna (122); one end of said millimeter wave transmitting end (111) is connected to said processor (2) and the other end is connected to said transmitting antenna (112); said transmitting antenna (112) and said receiving antenna (122) communicate with each other by millimeter waves.

8. The switching power supply according to claim 7, characterized in that, said overvoltage protection circuit comprises an AC overvoltage protection circuit (341), an undervoltage / overvoltage protection circuit (342) and a capacitor X discharge circuit (343); said voltage regulator circuit comprises a first low-voltage differential linear regulator circuit (351), a second low-voltage differential linear regulator circuit (353), a

9. third low voltage differential linear regulator circuit (354) and a VDC overvoltage protection circuit (352); said millimeter wave receiving end (121) comprises a signal output end, a receiving power supply end and a receiving activation end; said output end of said AC overvoltage protection circuit (341), said output end of said undervoltage / overvoltage protection circuit (342), said output end of said capacitor discharge circuit X (343), said output end of said first low-voltage differential linear regulator circuit (351) and said output end of said VDC overvoltage protection circuit (352) are all connected to said input end of said logic control and fault protection circuit (33); an output end of said second low-voltage differential linear regulator circuit (353) is connected to an input end of the power supply of said power switching tube (32); a first activation end of said logic control and fault protection circuit (33) is connected to a first input end of said third low voltage differential linear regulator circuit (354); an output end of said third low-voltage differential linear regulator circuit (354) is connected to a receiving feed end of said millimeter wave receiving end (121); said signal output end of said millimeter wave receiving end (121) is connected to said logic control and fault protection circuit (33) via a first buffer memory (36); a second activation end of said logic control and fault protection circuit (33) is connected to said receiving activation end of said millimeter wave receiving end (121). The switching power supply according to claim 8, characterized in that it also comprises an input control circuit; said input control circuit is respectively connected to a drain of said power switching tube (32), to said input end of said AC overvoltage protection circuit (341), to said input end of said undervoltage / overvoltage protection circuit (342), to said input end of said capacitor discharge circuit X (343), to said input end of said first low voltage differential linear regulator circuit (351), to said input end of said VDC overvoltage protection circuit (352), to said input end of said second low voltage differential linear regulator circuit (353), to a second input end of said third low voltage differential linear regulator circuit (354), and to said input end of said logic control and fault protection circuit (33).

10. The switching power supply according to claim 9, characterized in that said primary side control circuit (3) comprises an RS trigger (37); said S end and said R end of said RS trigger (37) are both connected to said logic control and fault protection circuit (33), said Q end is connected to said input end of said driver (31), and said output end of said driver (31) is connected to a grid of said power switching tube (32).

11. The switching power supply according to claim 9, characterized in that, said primary side control circuit (3) also comprises a negative voltage sampling circuit (381), a leading edge suppression circuit (382), a CS jitter correction circuit (383), a maximum frequency adjustment circuit (384) and a first comparator (385); said input control circuit is connected to an input end of said negative voltage sampling circuit (381); one end of said output end of said negative voltage sampling circuit (381) is connected to an input end of said leading edge suppression circuit (382); said output end of said leading edge suppression circuit (382) is respectively connected to an input end of said CS jitter correction circuit (383) and to an input end of said maximum frequency adjustment circuit (384);

12. said input end of said jitter correction circuit CS (383) is connected to a positive pole of said first comparator (385); a negative pole of said first comparator (385) is connected to a first reference voltage; an output end of said first comparator (385) and an output end of said maximum frequency adjustment circuit (384) are respectively connected to said logic control and fault protection circuit (33). The switching power supply according to claim 11, characterized in that it also comprises a transformer (5); said input control circuit comprises a rectifier bridge (61), a first diode (621), a second diode (622), a first resistor (631), a first electrolytic capacitor (641), a second resistor (632), a first capacitor (651), a third diode (623), a fourth diode (624), a third resistor (633), a second capacitor (652) and a fourth resistor (634); one of the AC input ends of said rectifier bridge (61) is connected to a positive end of said first diode (621) and the other end is connected to a positive end of said second diode (622); a negative pole of said first diode (621) and a negative pole of said second diode (622) are all connected to one end of said first resistor (631), and the other end of said first resistor (631) is respectively connected to said input end of said AC overvoltage protection circuit (341), said input end of said undervoltage / overvoltage protection circuit (342), said input end of said capacitor X discharge circuit (343); said primary side of said transformer (5) comprises a first winding and a second winding; one of the DC ends of said rectifier bridge (61) is grounded, and the other end is respectively connected to a heteronomous terminal of said first winding, to one of the ends of said second resistor (632), to one of the ends of said first capacitor (651), and to one of the ends of said first electrolytic capacitor (641); the other end of said first electrolytic capacitor (641) is connected to one end of said third resistor (633); the other end of said third resistor (633) is connected to said input end of said negative voltage sampling circuit (381); the other end of said second resistor (632) and the other end of said first capacitor (651) are respectively connected to a negative pole of said third diode (623); a positive pole of said third diode (623) is respectively connected to said drain of said power switching tube (32) and to a homonymous terminal of said first winding; a homonymous terminal of said second winding is connected to a positive pole of said fourth diode (624); a negative pole of said fourth diode (624) is connected to one end of said fourth resistor (634);the other end of said fourth resistor (634) is respectively connected to said input end of said first low-voltage differential linear regulator circuit (351), said input end of said VDC overvoltage protection circuit (352), said input end of said second low-voltage differential linear regulator circuit (353), said second input end of said third low-voltage differential linear regulator circuit (354) and one end of said second capacitor (652); the other end of said second capacitor (652), a heteronomous terminal of said second winding and a source pole of said power switching tube (32) are grounded.;

13. The switching power supply according to claim 12, characterized in that it also comprises an output control circuit; said output control circuit is respectively connected to said secondary side of said transformer (5) and to said secondary side control circuit (4).

14. The switching power supply according to claim 13, characterized in that, said secondary side control circuit (4) comprises a synchronous rectification circuit; said processor (2) is connected to said secondary side control circuit.

15. The switching power supply according to claim 14, characterized in that, said millimeter wave transmitting end (111) comprises a signal input end, a transmitting power supply end and a transmitting enable end; said synchronous rectification circuit comprises a detector (411), a voltage regulator (412), a fourth low-voltage differential linear regulator circuit (413), an external overheat protection circuit (414), a Schmitt trigger (415), a latch and automatic shutdown / restart circuit (416), a second comparator (417), a third comparator (418), a NOR calculator (419), a first AND calculator (420), a first OR calculator (421) and a first oscillator (422);a first input end and a second input end of said detector (411), a first input end and a first output end of said voltage regulator (412), an input end and an output end of said fourth low-voltage differential linear regulator circuit (413), a first output end of said external overheat protection circuit (414), a positive pole of said Schmitt trigger (415), an input end of said latch and automatic shutdown / restart circuit (416), a positive pole of said second comparator (417), a positive pole of said third comparator (418) are respectively connected to said output control circuit; a first output end of said detector (411) is connected to said second input end of said voltage regulator (412) and said second output end is connected to said processor (2);an input end of said external overheat protection circuit (414) is connected to said processor (2); an output end of said Schmitt trigger (415) and an output end of said latch and automatic shutdown / restart circuit (416) are all connected to said processor (2); an output end of said second comparator (417) is connected to a first input end of said NOR calculator (419); an output end of said third comparator (418) is connected to a second input end of said NOR calculator (419);

16. an output end of said NOR calculator (419) is connected to a third input end of said first AND calculator (420); a first input end of said first AND calculator (420) is connected to a third output end of said detector (411); a second input end of said first calculator ET(420) is connected to said processor (2); a first output end and a second output end of said first oscillator (422) are connected to a fourth input end and a fifth input end of said first AND calculator (420); a third output end of said first oscillator (422) is connected to said processor (2); a first input end of said first OR calculator (421) is connected to said processor (2); an output end of said first AND calculator (420) is connected to a second input end of said first OR calculator (421); an output end of said first OR calculator (421) is connected to a signal input end of said millimeter wave transmitting end (111); an activation end of said processor (2) is connected to a transmitting activation end of said millimeter wave transmitting end (111); an output end of said fourth low-voltage differential linear regulator circuit (413) is connected to a transmitting power supply end of said millimeter-wave transmitting end (111). The switching power supply according to claim 15 characterized in that said output control circuit comprises a first triode (731), a second electrolytic capacitor (72), a fifth resistor (731), a third capacitor (741), a fourth capacitor (742), a sixth resistor (732), a seventh resistor (733) and an eighth resistor (734); said secondary side of said transformer (5) comprises a third winding;

17. a homonymous terminal of said third winding is respectively connected to one of the ends of said second electrolytic capacitor (72), to one of the ends of said sixth resistor (732), to a first input end of said detector (411) and to an input end of said fourth low voltage differential linear regulator circuit (413); the other end of said second electrolytic capacitor (72) is respectively connected to a source pole of said first triode (711), to one of the ends of said third capacitor (741), to one of the ends of said fourth capacitor (742), to one of the ends of said eighth resistor (734), which are all grounded; the other end of said sixth resistor (732) is respectively connected to one end of said seventh resistor (733) and to a positive pole of said first comparator (417); the other end of said seventh resistor (733) is respectively connected to the other end of said eighth resistor (734) and to a positive pole of said second comparator (417); the other end of said third capacitor (741) is respectively connected to an output end of said voltage regulator (412) and to a positive pole of said Schmitt trigger (415); the other end of said fourth capacitor (742) is connected to said output end of said fourth low-voltage differential linear regulator circuit (413); a heteronomous terminal of said third winding is respectively connected to a drain of said first triode (711) and to one of the ends of said fifth resistor (731); a source pole of said first triode (711) is connected to said processor (2) via a second buffer memory (401); the other end of said fifth resistor (731) is connected to a second input end of said detector (411). The switching power supply according to claim 16, characterized in that said secondary side control circuit (4) also comprises a load protocol circuit; said processor (2) is connected to said charging protocol circuit.

18. The switching power supply according to claim 17, characterized in that, said charging protocol circuit also comprises a digital controller (423) and a USB PD controller (424); said sixth resistor (732) and said seventh resistor (733) in said output control circuit are replaced by a second triode (712) and a fifth capacitor (743); a drain of said second triode (712) is respectively connected to said ends of said second electrolytic capacitor (72), to a first input end of said voltage regulator (412) and to said input end of said fourth low-voltage differential linear regulator circuit (413); a source pole of said second triode (712) is respectively connected to one of the ends of said fifth capacitor (743) and to said USB PD controller (424);a grid of said second triode (712) is connected to a first output end of said digital controller (423); the other end of said fifth capacitor (743) is connected to the other end of said eighth resistor (734); an input end of said digital controller (423) is connected to a first input end of said detector (411); a second output end of said digital controller (423) is connected to a positive pole of said second comparator (417); said USB PD controller (424) is respectively connected to a first input end of said detector (411) and to an output end of said fourth low-voltage differential linear regulator circuit (413); said digital controller (423) and a control line of said USB PD controller (424) are successively connected to control lines.;

19. The switching power supply according to any one of claims 11 to 18, characterized in that, the, said logic control and fault protection circuit (33) comprises a fourth comparator (331), a first fault manager (332), a second AND calculator (333), a second OR calculator (334), a second oscillator (335), a first power manager (336), a fifth comparator (337), a sixth comparator (338) and a third triode (339); an output end of said AC surge protection circuit (341) is connected to a positive pole of said fourth comparator (331); a first output end of said first power manager (336) is connected to a negative pole of said fourth comparator (331); an output end of said fourth comparator (331) is connected to a first input end of said first fault manager (332); said output end of said undervoltage / overvoltage protection circuit (342) is connected to a second input end of said first fault handler (332); said output end of said VDC overvoltage protection circuit (352) is connected to a third input end of said first fault handler (332); a fourth input end of said first fault handler (332) is connected to an output end of an internal overheat protection circuit; after the reverse, an output end of said first fault manager (332) is connected to a first input end of said second AND calculator (333); an output end of said first low-voltage differential linear regulator circuit (351) is connected to a first input end of said first power manager (336); a second input end of said first power manager (336) is connected to an output end of a soft-start circuit; a second output end of said first power manager (336) is connected to a negative pole of said fifth comparator (337); a third output end of said first power manager (336) is connected to a negative pole of said sixth comparator (338); a fourth output end of said first power manager (336) is connected to said first input end of said third low voltage differential linear regulator circuit (354);

20. a fifth output end of said first power manager (336) is connected to a negative pole of said first comparator (385); a positive pole of said fifth comparator (337) is connected to a signal output end of said millimeter wave receiving end via said first buffer memory (121); an output end of said fifth comparator (337) is connected to a signal output end of said millimeter wave receiving end (121) via said first buffer memory (36); A positive pole of said sixth comparator (338) inputs a DC voltage; an output end of said sixth comparator (338) is connected to a receiving activation end of said millimeter wave receiving end (121); an input end of said second oscillator (335) is connected to an output end of said maximum frequency adjustment circuit (384); an output end of said second oscillator (335) is connected to a third input end of said AND calculator; an output end of said ET calculator is connected to said S end of said RS trigger (37); a first input end of said second OR calculator (334) is connected to a maximum conduction time setting circuit; a second input end of said second calculator OR (334) is connected to an output end of said first comparator (385); an output end of said second OR calculator (34) is connected to said R end of said RS trigger (37); an output end of said capacitor discharge circuit X (343) is connected to a grid of said third triode (339); a drain of said third triode (339) is connected to an AC input; a source pole of said third triode (339) is grounded. The switching power supply according to claim 16, characterized in that said processor (2) comprises a seventh comparator (21), a second power manager (22), an SR driver signal manager (23), a second fault manager (24), an SR activation circuit (25) and a pulse frequency modulator (26); an output end of said latch and automatic shutdown / restart circuit (416) is connected to an input end of said second power manager (22); a second input end of said second power manager (22) is connected to a negative pole of said seventh comparator (21); the other end of said sixth resistor (732) is connected to a positive pole of said seventh comparator (21); an output end of said seventh comparator (21) is connected to a transmitting activation end of said millimeter wave transmitting end (111); a second output end of said external overheat protection circuit (414), an output end of said Schmitt trigger (415) and an output end of said latch and automatic shutdown / restart circuit (416) are all connected to an input end of said second fault handler (24); an output end of said second fault handler (24), an output end of said pulse frequency modulator (26), a second output end of said detector (411) and a third output end of said first oscillator (422) are all connected to an input end of said SR driver signal handler (23); a first output end of said SR driver signal handler (23) is connected to an input end of said second buffer memory (401); a second output end of said SR driver signal manager (23) is connected to a first input end of said OR calculator (421); a third output end of said SR driver signal manager (23) is connected to an input end of said SR activation circuit (25); an output end of said SR activation circuit (25) is connected to a second input end of said AND calculator (420);

21. The switching power supply according to claim 17, characterized in that, said synchronous rectification circuit is a synchronous rectifier chip and said charging protocol circuit is a charging protocol chip.

22. The switching power supply according to claim 21, characterized in that said synchronous rectification circuit and said charging protocol circuit are respectively integrated in said processor (2).

23. The switching power supply according to claim 22, characterized in that a plurality of charging protocol circuits are integrated in said processor (2).

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