Method for securing programs in memory

Abstract

Method for securing programs in a memory. This description relates to a method for securing programs in a memory (104), comprising writing a startup program (iROT) to a first area of ​​said memory (104); writing at least one additional program (uROT, Secure OS, Applications) to at least a second area of ​​said memory (104); write protection of the first and second areas by modifying one or more values ​​of a first register (WRPSG1 / 2); and prohibiting modification of said one or more values ​​of the first register (WRPSG1 / 2) when they are associated with a write-protected state of the first area. Figure for the abstract: Fig. 3

Description

Title of the invention: Method for securing programs in a memory Technical field

[0001] The present description relates generally to methods for securing programs in memories as well as to devices implementing these methods. Prior art

[0002] Many electronic circuits such as microcontrollers use a boot program (BOOT in English) which is loaded into a non-volatile memory of the circuit at startup to then execute a startup application. Other programs can also be loaded subsequently to execute other applications. For security reasons, areas of the memory into which the boot program, other programs, or simply data are loaded, must be able to be made write-protected with respect to the outside of the circuit and / or with respect to other applications. Current solutions do not allow both optimal security to be ensured during successive loadings of the boot program and other programs, and at the same time flexibility to define memory areas to be write-protected. Summary of the invention

[0003] There is a need to ensure both optimal security when loading the startup program and other programs, and to obtain flexibility in defining the memory areas to be write-protected.

[0004] One embodiment overcomes all or part of the drawbacks of the known methods.

[0005] One embodiment provides a method for securing programs in a memory, including: - writing a startup program in a first area of ​​said memory; - writing at least one additional program in at least a second area of ​​said memory; - write protection of the first and second zones by modifying one or more values ​​of a first register; and - a prohibition on modifying said one or more values ​​of the first register when they are associated with a write protection state of the first zone.

[0006] In one embodiment, said first register associates a write protection status value with one or more areas of said memory.

[0007] In one embodiment, the prohibition comprises modifying a value of a second register.

[0008] In one embodiment, the modification of the value of the second register is authorized depending on a state of a circuit comprising said memory.

[0009] In one embodiment, the circuit state comprising said memory is one of a regression state, a write-enabled state, and a provisioning state.

[0010] In one embodiment, modification of the value of the second register is authorized by use of a specific security code.

[0011] In one embodiment, the second register is configured to take two distinct values ​​each coded on a number of bits greater than or equal to 8, each bit of one of the two distinct values ​​being different from the corresponding bit of the other value.

[0012] In one embodiment, the second register is non-volatile.

[0013] In one embodiment, the first register is non-volatile.

[0014] In one embodiment, the prohibition of modifying said one or more values ​​of the first register are implemented after writing said at least one additional program.

[0015] In one embodiment, the prohibition of modifying said one or more values ​​of the first register is implemented before writing said at least one additional program.

[0016] In one embodiment, the first area of ​​said memory is defined by two user option bytes.

[0017] In one embodiment, the write protection of said startup program is implemented before writing said at least one additional program.

[0018] One embodiment provides a microcontroller, comprising a memory, and configured to implement the program security method described above, in this memory.

[0019] In one embodiment, said memory is non-volatile. Brief description of the drawings

[0020] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0021] [Fig.l] represents, very schematically and in the form of blocks, an example of an integrated circuit of the type to which the described embodiments apply;

[0022] [Fig.2] schematically represents an example of a memory of the integrated circuit of [Fig.l];

[0023] [Fig.3] schematically illustrates steps in a method for securing programs in a memory according to one embodiment;

[0024] [Fig.4] illustrates a mode of implementation of a method for securing programs in a memory; and

[0025] [Fig.5] illustrates another mode of implementation of a method for securing programs in a memory. Description of the embodiments

[0026] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0027] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed.

[0028] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0029] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.

[0030] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0031] [Fig.l] represents, very schematically and in the form of blocks, an example of an integrated circuit 100 of the type to which the described embodiments apply. The circuit 100 is for example a microcontroller.

[0032] The circuit 100 comprises a non-volatile memory 104 (FLASH MEMORY), for example of the FLASH memory type, capable of communicating, via a communication bus 114, with a non-volatile memory interface 106 (FLASH INTERFACE) configured to write or read data in and from the non-volatile memory 104.

[0033] The circuit 100 further comprises, for example, a processing unit 110 (CPU) comprising one or more processors under control of instructions stored in an instruction memory 112 (INSTR MEM). The instruction memory 112 is for example a volatile memory of the random access type (in English Random Access Memory, RAM). The processing unit 110 and the memory 112 communicate, for example, via a system bus 140 (data, address and control). The FLASH memory 104 is connected to the system bus 140 via the non-volatile memory interface 106 and via the bus 114. The device 100 further comprises an input / output interface 108 (FO interface) connected to the system bus 140 for communicating with the outside.

[0034] The device 100 may integrate other circuits implementing other functions (for example, one or more volatile and / or non-volatile memories, or other processing units), symbolized by a block 116 (FCT) in [Fig.l]. Among these other circuits, the circuit 100 comprises for example a read-only or static memory 118 (ROM).

[0035] The embodiments described relate to securing the programs or data loaded into the non-volatile memory 104.

[0036] To do this, the startup programs are for example transferred directly to the memory 104 during factory programming processes. However, the contents of a flash memory are in principle modifiable. However, care must be taken, for example in the case of loading several operating systems, to ensure that they cannot be modified once transferred to flash memory 104, except in the case of regression of the system or circuit 100.

[0037] An example concerns the boot programs (BOOT in English) and the operating systems or OEM type applications, which must be loaded, during the manufacturing processes of the circuit 100, for example by several different subcontractors or successive users. For example, the circuit 100 is, upon leaving the factory, in a so-called "open" state (Open in English), that is to say that the memory is not write-protected. Then a first subcontractor has the task of loading a boot program (iROT for Immutable Root Of Trust) into the memory 104, the circuit is then in a provisioning mode (Provisioning in English). Once loaded and secured, the circuit 100 goes into the boot program provisioning mode (iROT provisioned). At this stage, the iROT boot program can take charge of the other installation steps including code and encryption keys for example.Another subcontractor may then load one or more programs such as one or more operating systems and / or secure applications and / or updates which, once loaded, must be secured. Once this is done, the product goes into closed mode. At this point, the various installed programs may support non-secure installations including code and encryption keys. Applications with a lower level of security (Non-Secure Applications in English) can then be installed.

[0038] The startup programs are implemented at the initialization of the system in flash memory 104 so that they can then be executed at each startup of the system. However, once in flash memory, access to the boot program must be protected from other boot programs, any application or access from outside the circuit to prevent it from being modified. To do this, provision is made to write-protect the area of ​​memory 104 containing the boot program so that it cannot be accessed without restarting the circuit. Provision is also made to write-protect certain areas (comprising one or more sectors) of memory 104 linked to other programs or data.

[0039] Once write-protected, it is currently difficult to maintain flexibility with regard to possible subsequent modifications of the memory areas to be protected while guaranteeing the immutability of the iROT startup program.

[0040] The described embodiments provide a method for securing programs in a memory, comprising writing the iROT startup program in a first area of ​​said memory; writing at least one additional program (uROT, Secure OS, Applications) in at least a second area of ​​said memory; write protection of the first and second areas by modifying one or more values ​​of a first register (WRPSG1 / 2); and prohibiting modification of said one or more values ​​of the first register WRPSG1 / 2 when they are associated with a write protection state of the first area.

[0041] The write-protected areas are thus defined flexibly and without difficulty, for example using a single register. The immutability of the iROT boot program is ensured by prohibiting modification of the write protection targeted on the memory areas dedicated to the iROT boot program. It is possible to use write protection during all phases of manufacturing of the product, for example at different subcontractors from a phase where the circuit is in the open state to a phase where it is in the closed state. Several program layers can thus define their own memory areas to be write-protected for their own programs.

[0042] [Fig.2] schematically represents an example of a memory 104 of the circuit integrated in [Fig.l]. More specifically, in the example in [Fig.2], the memory comprises two banks (Bank 1, Bank 2) of memory. In this example, groups of memory sectors numbered 2, 3, 14, 16, 18 and 31 are write-protected (Code Write protected) by the use of the first register WRPSG1 / 2 which uses a bitmap of a write-protection status value (for example 0 for "unprotected" and 1 for "protected") to one or more areas of said memory. In the example shown, the register WRPSG1 / 2 takes the values WRPSG1[2]=1, WRPSG1

[14] =1, WRPSG1

[16] =1 and WRPSG1

[31] =1 to write-protect the sector groups numbered 2, 14, 16 and 31 in the first bank. The other sectors of the first bank are in state 0 in the first bank of the register, for example WRPSG1[X]=0 where X represents the unprotected sector group numbers of the first bank. The same reasoning applies to the second bank with the values ​​of the register WRPSG1 / 2 which takes the values ​​WRPSG2[3]=1 and WRPSG2

[18] =1 to write-protect the sector groups numbered 3 and 18 in the second bank.

[0043] Each program that is loaded into the circuit when it is in the "open", "supply" states, and before the state is "closed", can thus flexibly define sectors, or areas, of the memory 104 that are write-protected by modifying the value 0 or 1 associated with these sectors in the WRPSG1 / 2 register.

[0044] [Fig.3] schematically illustrates steps in a method for securing programs in a memory according to one embodiment.

[0045] In a step 302 (START PROGRAMMING MEMORY), the program securing process begins.

[0046] In a step 304 (Write Root program (iROT)), the iROT startup program is loaded into a first area or areas of the memory 104. In one example, the first area of ​​the memory 104 is defined by two user option bytes (HDP_START, HDP_END). These two user option bytes are for example non-volatile.

[0047] In a step 306 (Write Protection of Root program), subsequent to step 304, the first zone, which corresponds to the iROT startup program, is write-protected by modifying the write protection state (going from 0 to 1) of the WRPSG1 / 2 register corresponding to the first zone.

[0048] In a step 308 (Write other program (uROT, Secure OS, Applications)), other programs such as other startup programs (uROT), one or more operating systems (Secure OS) or one or more applications, are loaded into at least a second area of ​​the memory 104.

[0049] In a step 310 (Write Protection of other program (uROT, Secure OS, Applications), the second zone is write-protected by modifying the write-protection state (going from 0 to 1) of the WRPSG1 / 2 register corresponding to the second zone.

[0050] In a step 312 (Lock Write Protection of Root program), the modification of the values ​​of the WRPSG1 / 2 register which are associated with the write protection state of the first zone is prohibited. This prohibition includes for example the modification of a value of a second register (WRPLOCK). In one example, the value of the second register changes to 1 to allow the prohibition of modification of the values of the first register associated with the first zone. In other words, when the value of the second register WRPLOCK changes to 1, modification of the values ​​of the register WRPSG1 / 2 associated with the first zone is prohibited. Only a regression state of the circuit allows, for example, modification of the second register.

[0051] In one example, the value of the second WRPLOCK register can only be modified by a secure program (Secure and privilege SW) with restricted access.

[0052] In another example, the value of the second WRPLOCK register is a non-volatile resource, for example defined by a user option byte. This allows the WRPLOCK register to be usable as soon as the processing unit 110 is started.

[0053] The second register WRPLOCK can for example be modified when the circuit is in the “open” state or until the supply state.

[0054] In one example (illustrated by broken arrows), steps 306, 312, 308 and 310 are performed successively.

[0055] In another example (illustrated by solid arrows), steps 306, 308, 310 and 312 are performed successively.

[0056] [Fig. 4] illustrates an embodiment of a method for securing programs in a memory according to an embodiment. More particularly, [Fig. 4] describes the memory 104 during different states of the circuit (Device State), open, provisioning and closed (Open, provisioning, closed) which correspond for example to manufacturing phases for example at different subcontractors.

[0057] In the illustrated example, the circuit is first in the "open" state. In this state, the iROT startup program is loaded, for example, into the first area of ​​the memory and write-protected (Write protection area 1). A monotonic counter HDPL1 is, for example, used to define the protection area of ​​the iROT program with a user option byte OB-HDP. A second startup program (uROT) is then loaded into the memory in another area, without being write-protected. An operating system and / or other applications (Secure OS and application) are also loaded into another area of ​​the memory 104 and then only certain sectors of the memory linked to these programs are write-protected (Write protection area 2).Less secure applications (NS Appli) are also loaded into yet another area of ​​memory 104 and then only certain memory sectors related to these applications are write-protected (Write protection area 3). In this state, the value of the WRPLOCK register is 0 which implies that the modification of the write protection values ​​of the WRPSG1 / 2 register, associated with the memory area where the iROT program is loaded, is not prohibited.

[0058] Then, the circuit is in the provisioning state. In this state, the value of the WRPLOCK register is 1 which implies that the modification of the write protection values ​​of the WRPSG1 / 2 register, associated with the memory area where the iROT program is loaded, is prohibited (Write protection area 1 locked). On the other hand, the modification of the write protection values ​​of the WRPSG1 / 2 register, associated with the other areas of the memory 104 which are different from the memory area where the iROT program is loaded, remains possible. In the example shown, the write protection value(s) of the WRPSG1 / 2 register which are associated with the operating system and / or other applications (Secure OS and application), are modified (Write protection area 2') to increase the number of write-protected sectors.

[0059] Then, the circuit is put in the "closed" state.The write protection value(s) in the WRPSG1 / 2 register that are associated with less secure applications (NS Appli) are modified to increase and change the number of write-protected sectors (Write protection area 3').

[0060] [Fig.5] illustrates another mode of implementation of a method for securing programs in a memory.

[0061] More particularly, [Fig.5] describes the memory 104 during different states of the circuit (Device State), provisioning, provisioning performed (iROT provisioned) and closed (TZ-Closed).

[0062] In the illustrated example, the circuit is first in the "provisioning" state. In this state, the iROT boot program is loaded, for example, into the first memory area and is write-protected (Write protection area 1). The value of the WRPLOCK register is set to 1 (Write protection area 1 locked) after write protection.

[0063] In the illustrated example, the circuit is then in the "provisioned" state (iROT provisioned). In this state, a second startup program (uROT) is then loaded into the memory in another area, without being specifically write-protected. An operating system and / or other applications (Secure OS and application) are also loaded into yet another area of ​​the memory 104. Only certain memory sectors linked to this operating system and / or other applications are then write-protected (Write protection area 2) by modifying values ​​of the WRPSG1 / 2 register. The value of the WRPLOCK register remains locked at 1. In the illustrated example, the circuit is then in the closed state (TZ-Closed). Less secure applications (NS Appli) are loaded into yet another area of ​​the memory 104 and then only certain memory sectors linked to these applications are write-protected (Write protection area 3).The value of the WRPLOCK register remains stuck at 1.

[0064] The examples in Figures 4 and 5 allow flexibility to be maintained in modifying the areas of memory that are write-protected while ensuring that the modi Setting write protection values ​​associated with the iROT bootloader memory area is prohibited after the WRPLOCK register value is set to 1.

[0065] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will occur to those skilled in the art. In particular, even if in the examples presented the modification of the WRPLOCK register to state 1 activates the modification prohibition, the person skilled in the art could implement the opposite, namely that the value of WRPLOCK at 0 triggers the modification prohibition. In addition, the use of the WRPLOCK register can be used for example to prohibit the modification of WRPSG1 / 2 on only a portion of the sectors associated with the iROT program.

[0066] Finally, the practical implementation of the embodiments and variants described is within the reach of the person skilled in the art from the functional indications given above. In particular, in the examples presented, only one WRPLOCK register is used to prohibit modifications of the values ​​corresponding to sectors of a single iROT startup program. The person skilled in the art may nevertheless implement several additional registers having a function similar to that of the WRPLOCK register. These additional registers may be used, like the WRPLOCK register, to prohibit the modification of certain values ​​of the WRPSG1 / 2 register which are associated with areas of the memory 104 corresponding to other programs or applications or data, different from the iROT startup program and which must be write-protected in an immutable manner.

Claims

Claims

1. Method for securing programs in a memory (104), comprising: - writing a startup program (iROT) in a first area of ​​said memory (104); - writing at least one additional program (uROT, Secure OS, Applications) in at least a second area of ​​said memory (104); - write protection of the first and second areas by modifying one or more values ​​of a first register (WRPSG1 / 2); and - prohibiting modification of said one or more values ​​of the first register (WRPSG1 / 2) when they are associated with a write protection state of the first area.

2. The method of claim 1, wherein said first register (WRPSG1 / 2) associates a write protection status value with one or more areas of said memory (104).

3. The method of claim 1 or 2, wherein the prohibiting comprises modifying a value of a second register (WRPLOCK).

4. The method of claim 3, wherein the modification of the value of the second register (WRPLOCK) is authorized depending on a state of a circuit comprising said memory (104).

5. The method of claim 4, wherein the circuit state comprising said memory (104) is one of a regression state, a write-open state, and a provisioning state.

6. Method according to any one of claims 3 to 5, in which the modification of the value of the second register (WRPLOCK) is authorized by use of a specific security code (Secure and privilege SW).

7. Method according to any one of claims 3 to 6, in which the second register (WRPLOCK) is configured to take two distinct values ​​each coded on a number of bits greater than or equal to 8, each bit of one of the two distinct values ​​being different from the corresponding bit of the other value.

8. A method according to any one of claims 3 to 7, wherein the second register (WRPLOCK) is non-volatile.

9. A method according to any one of claims 1 to 8, wherein the first register (WRPSG1 / 2) is non-volatile.

10. Method according to any one of claims 1 to 9, in which the prohibition of modifying said one or more values ​​of the first register (WRPSG1 / 2) is implemented after writing said at least one additional program (uROT, Secure OS, Applications).

11. Method according to any one of claims 1 to 9, in which the prohibition of modifying said one or more values ​​of the first register (WRPSG1 / 2) is implemented before writing said at least one additional program (uROT, Secure OS, Applications).

12. A method according to any one of claims 1 to 11, wherein the first area of ​​said memory (104) is defined by two user option bytes (HDP_START, HDP_END).

13. Method according to any one of claims 1 to 12, wherein the write protection of said boot program (iROT) is implemented before writing said at least one additional program (uROT, Secure OS, Applications).

14. Microcontroller, comprising a memory (104), and configured to implement the method for securing programs according to one of claims 1 to 13, in this memory (104).

15. The microcontroller of claim 14, wherein said memory (104) is non-volatile.

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