Display pixel comprising light-emitting diodes with reduced static power consumption and display screen comprising such display pixels

Abstract

Display pixel comprising light-emitting diodes having reduced static power consumption and display screen comprising such display pixels. This description relates to a display pixel (12i,j) comprising a first electrically conductive connection pad intended to receive a high reference voltage (Vcc), a second electrically conductive connection pad (P_Gnd) intended to receive a low reference voltage (Gnd), a light-emitting device (LED), a current source (ACS) supplying said light-emitting device (LED) with a current, the light-emitting device (LED) being in series with the current source (ACS) between the first and second electrically conductive connection pads,the only electrical path from the current source to the first electrically conductive connection pad or to the second electrically conductive connection pad passing through the light-emitting device (LED). Figure for abbreviation: Fig. 5,

Description

Title of the invention: Display pixel comprising light-emitting diodes having reduced static power consumption and display screen comprising such display pixels. Technical field

[0001] This description relates to a display pixel comprising light-emitting diodes and a display screen comprising such display pixels. Prior art

[0002] A pixel of an image corresponds to the unit element of the image displayed by a display screen. For displaying color images, the display screen generally comprises, for the display of each pixel of the image, at least three components, also called display subpixels, each of which emits light, called the color component of the image pixel, essentially in a single color (for example, red, green, and blue). The superposition of the color components of the image pixel emitted by the three display subpixels provides the observer with the color sensation corresponding to the pixel of the displayed image. In this case, the set formed by the three display subpixels used for displaying a pixel of an image is called the display pixel of the display screen. Each display subpixel may include a light source, in particular a light-emitting diode.

[0003] The display pixels can be distributed in a matrix, each display pixel being located at the intersection of a row and a column of the matrix. Generally, each row of display pixels is selected successively, and the display pixels of the selected row are programmed to display the desired image pixels.

[0004] An active matrix is ​​a screen driver architecture that keeps all pixel rows active for the entire duration of a frame, unlike so-called passive matrices, where each row is only active for a time T = Tframe / N (where Tframe is the frame duration and N is the number of rows on the screen). This allows for increased screen brightness. Furthermore, it is possible to send low voltage or current levels on the matrix's control lines, enabling the display of larger data streams.

[0005] An active matrix may comprise display pixels, each containing light-emitting diodes (LEDs), and a driver circuit to control the LEDs. These are then referred to as smart pixels. This notably simplifies the formation of an active matrix, since the control electronics of the The light-emitting diodes of the display pixel are largely integrated into the display pixel.

[0006] The static power consumption of a display pixel corresponds to the electrical power consumed by the display pixel when it is not emitting light. It may consist of leakage currents from the components or currents required for the internal operation of the display pixel's driver circuit.

[0007] The trend is towards an increase in the number of pixels on display screens. The static power consumption of display pixels can then become a critical factor. Indeed, for a so-called 4K screen with a resolution of 2160 by 3840 pixels, the static power consumption of the screen can exceed 150 W.

[0008] It is necessary to reduce the static power consumption of the display screen. Summary of the invention

[0009] An object of an embodiment is to provide a display pixel comprising light-emitting diodes and a display screen comprising such display pixels which overcome all or part of the disadvantages of existing display pixels comprising light-emitting diodes and display screens comprising such display pixels.

[0010] One embodiment provides a display pixel comprising a first electrically conductive connection pad for receiving a high reference voltage, a second electrically conductive connection pad for receiving a low reference voltage, a light-emitting device, a current source supplying said light-emitting device with current, the light-emitting device being in series with the current source between the first and second electrically conductive connection pads, the only electrical path from the current source to the first or second electrically conductive connection pad being through the light-emitting device. The static current consumption of the current source is advantageously reduced since there is no current consumption when the light-emitting diode is off.

[0011] According to one embodiment, the display pixel further comprises a switch in series with the light-emitting device and the power source. When the switch is open, the power source is advantageously not energized.

[0012] According to one embodiment, the display pixel further comprises a control circuit for controlling the switch, the display pixel being configured to receive a first binary signal, the control circuit being configured to determine a digital signal from successively received values ​​from the first binary signal and to control the switch by pulse width modulation based on the digital signal.

[0013] According to one embodiment, the switch is interposed between the light-emitting device and the current source.

[0014] According to one embodiment, the light-emitting device comprises a light-emitting diode, the anode of the light-emitting diode being coupled to the first electrically conductive connection point.

[0015] According to one embodiment, the current source comprises a first current source terminal and a second current source terminal, the second current source terminal being coupled to the second electrically conductive connection pad.

[0016] According to one embodiment, the current source comprises first and second current sources in parallel, the first current source being configured to supply a first current proportional to the absolute temperature and the second current source being configured to supply a second current complementary to the absolute temperature. The intensity of the first and second currents and the rates of change of the first and second currents can advantageously be determined such that the current supplied by the current source, which is equal to the sum of the first and second currents, is substantially independent of the temperature, within a typical operating temperature range of the display pixel, for example from -35 °C to 85 °C.

[0017] According to one embodiment, the current source comprises: - first and second current source terminals - first, second, third, fourth, fifth, sixth and seventh MOS transistors, each having a first power terminal, a second power terminal and a gate; - first and second resistors, each having first and second resistance terminals, The second power terminals of the first and second transistors are coupled to the first resistor terminal of the first resistor, the second resistor terminal of the first resistor is coupled to the second current source terminal, the gate of the third transistor is coupled to the first power terminal of the third transistor, to the gate of the fourth transistor and to the gate of the fifth transistor, the second power terminals of the third, fourth and fifth transistors are coupled to the first current source terminal, the first power terminal of the third transistor is coupled to the first power terminal of the first transistor, the first power terminal of the fourth transistor is coupled to the first power terminal of the second transistor, the first terminal the power terminal of the fifth transistor being coupled to the gate of the second transistor, the second power terminal of the sixth transistor being coupled to the second current source terminal, the first power terminal of the sixth transistor being coupled to the gate of the second transistor, the gate of the sixth transistor being coupled to the first power terminal of the sixth transistor, the second power terminal of the seventh transistor being coupled to the first current source terminal, the first power terminal of the seventh transistor being coupled to the gate of the first transistor, the gate of the seventh transistor being coupled to the first power terminal of the second transistor, the first terminal of the second resistor being coupled to the gate of the first transistor and the second terminal of the second resistor being coupled to the second current source terminal.The current source structure is advantageously simple, as it comprises only seven transistors and two resistors.

[0018] Another embodiment provides for a display screen comprising: display pixels as defined previously; the first electrodes coupled to the display pixels; a first circuit to provide a selection signal on each first electrode for the selection of the display pixels coupled to the first electrode; second electrodes coupled to the display pixels; and a second circuit to provide data signals on the second electrodes. Brief description of the drawings

[0019] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0020] Fig. 1 illustrates in a partial and schematic way an example of a display screen;

[0021] Figure 2 represents a functional diagram of an example display pixel of the screen of [Fig.1];

[0022] Figure 3 shows a functional diagram of an example of an emission circuit light and a light emission driver of the display pixel of the [Fig.2];

[0023] Figure 4 illustrates a drawback of the light emission driver shown in Figure 3.

[0024] Figure 5 shows a functional diagram of one embodiment of the circuit light emission and light emission driver of the display pixel of [Fig.2];

[0025] Figure 6 represents a more detailed embodiment of the emission circuit light and light emission pilot of the [Fig.5];

[0026] Fig. 7 represents the curves of evolution of the currents of the circuit of Fig. 6 as a function of temperature;

[0027] Fig. 8 represents a circuit diagram of an embodiment of a current source of the light emission circuit of Fig. 6;

[0028] Fig. 9 represents the evolution curves of the resistance of a resistor and of a gate-source voltage of a MOS transistor of the circuit of Fig. 8 as a function of temperature;

[0029] Fig. 10 represents another more detailed embodiment of the light emission circuit and the light emission driver of Fig. 5. Description of the implementation methods

[0030] Unless otherwise specified, when reference is made to two elements connected together, this means a direct connection without any intervening elements other than conductors, and when reference is made to two elements coupled together, this means that these two elements can be connected or coupled through one or more other elements. Furthermore, a signal that alternates between a first constant state, for example a logic low state, denoted "0", and a second constant state, for example a logic high state, denoted "1", is called a "binary signal". The high and low states of the different binary signals in the same electronic circuit can be different. In practice, binary signals can correspond to voltages or currents that may not be perfectly constant in the high or low state.

[0031] Furthermore, unless otherwise specified, when referring to a voltage at a conductive pad, the difference between the potential at said conductive pad and a reference potential, for example earth, considered to be equal to 0 V, is considered. In addition, in the following description, the source and drain of a MOS transistor are referred to as the "power terminals" of the insulated-gate field-effect transistor, or MOS transistor.

[0032] Unless otherwise specified, the expressions "approximately", "roughly", "about" and "in the order of" mean within 10%, and preferably within 5%. Furthermore, the expression "varyingly constant" means that it varies by less than 10% over time from a reference value.

[0033] Figure 1 represents a partial and schematic representation of a known example of a display screen 10. The display screen 10 comprises display pixels 12^, for example, arranged in M ​​rows and N columns, where M is an integer from 1 to 8000 and N is an integer from 1 to 16000, i is an integer from 1 to M, and j is an integer from 1 to N. For example, in Figure 1, M and N are equal to 6. Each display pixel 1¾ is coupled to a source from a low reference potential Gnd, for example ground, via an electrode 14; and to a source with a high reference potential Vcc via an electrode 16j. As an example, the electrodes 14 are aligned along the rows of [Fig. 1] and the electrodes 16j are aligned along the columns of [Fig. 1], the reverse arrangement being possible. The supply voltage of the display screen corresponds to the voltage between the high reference potential Vcc and the low reference potential Gnd, and is denoted Vcc as the high reference potential. The supply voltage Vcc depends in particular on the arrangement of the LEDs and the technology by which the LEDs are manufactured. As an example, the supply voltage Vcc can be in the range of 4 V to 5 V.

[0034] For each row, the display pixels 12j of the row are coupled to a row electrode 18j. For each column, the display pixels 1¾ of the column are coupled to a column electrode 20j. The display screen 10 includes a selection circuit 22 coupled to the row electrodes 18j and adapted to provide a selection signal Cornj on each row electrode 18j. The display screen 10 includes a data transmission circuit 24 coupled to the column electrodes 20j and adapted to transmit a data signal Dataj on each column electrode 20j. The selection circuit 22 and the control circuit 24 are controlled by a circuit 26, comprising, for example, a microprocessor.

[0035] Fig. 2 represents an example of a functional diagram of a display pixel 1¾ of the display screen 10.

[0036] The display pixel 12j comprises conductive connection pads P_Gnd, P_Vcc, P_Col, P_Row. Each conductive pad P_Gnd, P_Vcc, P_Col, P_Row is intended to be coupled to one of the electrodes 14j, 16j, 18j, 20j, not shown in [Fig. 2]. The first conductive pad P_Vcc is coupled, preferably connected, to electrode 14j and receives the high reference potential Vcc. The second conductive pad P_Gnd is coupled, preferably connected, to electrode 16j and receives the low reference potential Gnd. The third conductive pad P_Col is coupled, preferably connected, to column electrode 20j and receives the data signal Data. The fourth conductive pad P_Row is coupled, preferably connected, to row electrode 18j and receives the selection and synchronization signal Corn.

[0037] For a color display screen, the display pixel 1¾ comprises a light-emitting circuit 52 including at least three light-emitting diodes emitting radiation of different colors, for example red, green, and blue, a single LED being illustrated in [Fig. 2]. In the present example, for each color, the anode of the LED is, for example, coupled, preferably connected, to the conductive contact P_Vcc receiving the The high reference potential Vcc and the cathode of the LED are, for example, coupled, preferably connected, to one terminal of a controllable current source CS, the other terminal of the controllable current source CS being coupled, preferably connected, to the conductive terminal P_Gnd receiving the low reference potential Gnd. Alternatively, for each LED, the cathode of the LED is, for example, coupled to the conductive terminal P_Gnd receiving the low reference potential Gnd and the anode of the LED is coupled to one terminal of the controllable current source CS, the other terminal of the controllable current source CS being coupled to the conductive terminal P_Vcc receiving the high reference potential Vcc.

[0038] The display pixel 1¾ further includes a driver circuit 40 for driving the controllable current source CS. The driver circuit 40 may, in particular, include electronic components such as MOS transistors or TFTs.

[0039] It may be desirable to use a reduced supply voltage Vdd, lower than the supply voltage Vcc, for example less than 4 V, in particular on the order of 1 V or 1.8 V, to power at least some of the electronic components of the driver circuit 40, this reduced supply voltage corresponding, for example, to the voltage that can be applied between the power terminals of the MOS transistors. To this end, the display pixel 12ij includes a power supply circuit 60 that provides the reduced supply voltage Vdd. The power supply circuit 60 receives the high reference potential Vcc and at least one of the selection signals Com and Dataj and provides the reduced supply voltage Vdd. For example, in [Fig. 2], the power supply circuit 60 receives the high reference potential Vcc, the selection signal Com, and the data signal Dataj.Alternatively, the 1¾ display pixel may include an additional conductive connection pad receiving the reduced supply voltage Vdd.

[0040] The control circuit 40 includes a circuit 46 (Selection Mode) coupled to the conductive pin P_Col receiving the data signal Dataj and coupled to the conductive pin P_Row receiving the selection and synchronization signal Com;, and configured to provide a clock signal Clk and a data signal Data to a storage circuit 48 (Color Data registers) or to provide a PWM signal to implement pulse-width modulation to a circuit 50 (LED driver), hereinafter referred to as the LED driver circuit, to control the controllable current source CS associated with each LED. The storage circuit 48 is configured to store color signals R, G, B representative of the image pixel to be displayed. The circuit 50 is configured to control the controllable current sources CS coupled to the LEDs with The I_red, I_green, and I_blue signals are obtained from the R, G, and B color signals and the PWM signal. In this embodiment, the Data signal can correspond to the Dataj data signal, and the Clk clock signal is obtained from the Com; select and synchronize signal. Circuit 50 is powered by the high reference potential Vcc and the reduced supply voltage Vdd.

[0041] Fig. 3 shows a functional diagram of an example of a light emission circuit 52 and LED control circuit 50 of the display pixel 1¾ of Fig. 2 for one colour, for example blue.

[0042] The controllable current source CS comprises a switch SW in series with an adjustable current source CCS providing a controllable current ICS. The adjustable current source CCS can be coupled between an OUT terminal of the switch SW and the conductive pin P_Gnd of the display pixel 1¾, which is connected to the low reference potential source Gnd. The switch SW is controlled by the signal I_blue. The adjustable current source CCS is controlled by the constant bias signal Bias. For example, the switch SW corresponds to a MOS transistor, for example, an N-MOS transistor. The signal I_blue can then correspond to the gate voltage of the transistor. For example, the adjustable current source CCS corresponds to a MOS transistor, for example, an N-MOS transistor. The signal Bias can then correspond to the gate-source voltage of the transistor.

[0043] According to one embodiment, the LEDs of the display pixel 12; j are controlled by pulse-width modulation. For this purpose, during a display phase, the PWM signal, illustrated in [Fig. 2], presents a succession of pulses in the logic state "1" which regulates the operation of the circuit 50 controlling the LEDs by pulse-width modulation. The number of pulses in the pulse sequence corresponds to the number NB of bits of each digital color signal R, G, and B. By way of example, the switch SW is closed or opened, in rhythm with the pulses of the PWM signal, depending on the logic value "0" or "1" of each bit of the color signal R, G, or B, for example, starting with the most significant bit, this switch being held closed or open until the next pulse of the PWM signal.The time between two successive PWM signal pulses is halved each time, so the total time the LED is illuminated depends on the value of the R, G, or B color signal. The sequence of PWM signal pulses can be repeated until another pixel of the image is displayed. In this case, the sequence of PWM signal pulses forms a display cycle, and the display phase comprises more than one display cycle.

[0044] The LED control circuit 50 includes a digital block 54 that provides the I_blue signal and an analog block 56 that provides the bias signal. The digital block 54 can be powered by the reduced supply voltage Vdd, which is lower than the supply voltage Vcc. The analog block 56 must be powered by the supply voltage Vcc. The analog block 56 may include a digital-to-analog converter providing the bias signal. When the adjustable current source CCS corresponds to a MOS transistor, the analog block 56 provides the bias signal so that the CCS MOS transistor operates in the saturation region.

[0045] Part of the static current consumption of the display pixel 1¾ comes from the static current consumption of the analog circuit 56. When the display screen includes a large number of display pixels 12ij, the static current consumption of the analog circuits 56 of all the display pixels 12^ can be high.

[0046] Furthermore, with the structure of the light emission circuit 52 and the LED control circuit 50 illustrated in [Fig.3], it can be complex to control the adjustable current source CCS so that the current ICS does not vary practically as a function of temperature within a typical temperature range, for example from -35 °C to 85 °C.

[0047] Figure 4 illustrates a drawback of the LED control circuit 50 shown in Figure 3. The light-emitting circuit 52 for a single display pixel 1¾ of the screen is schematically represented on the left of Figure 4 with the switch SW and the adjustable current source CCS corresponding to N-MOS transistors, while the other display pixels of the screen 10 are schematically represented by a block 58 on the right of Figure 4. All the pixels of the screen 10 are coupled, preferably connected, to the low reference potential source Gnd via electrodes distributed across the screen 10. Due to the internal electrical resistances of the conductive tracks, electrical contacts, etc., a common resistance is perceived by each pixel of the screen, resulting in a resistance Rcom present between the low reference potential source Gnd and the screen pixels.Therefore, a voltage VR exists across resistor Rcom when the display screen 10 is in operation, due to the currents powering the LEDs of the display pixels that emit light. Even if resistance Rcom is kept as low as possible, the voltage VR may not be negligible when the number of display pixels 1¾ is high. The drawback is that the voltage VR changes the gate-source voltage Vgs of the adjustable current source CCS. Consequently, obtaining control can be difficult. Precise bias for the CCS adjustable current source, especially when the CCS adjustable current source corresponds to a MOS transistor that is operating in the saturation region.

[0048] Figure 5 shows a functional diagram of one embodiment of the circuit The light emission circuit 52 and the LED control circuit 50 of the display pixel of [Fig. 2]. The light emission circuit 52 and the LED control circuit 50 of [Fig. 5] include all the elements illustrated in [Fig. 3], except that the analog circuit 56 is not present and the adjustable current source CCS is replaced by a self-contained current source ACS which is coupled between the OUT terminal of the SW switch and the conductive pin P_Gnd of the display pixel 1¾ which is connected to the low reference potential source Gnd. The self-contained current source ACS provides the current ICS.

[0049] The only current flowing through the ACS self-contained current source is the ICS current. This means that the ACS self-contained current source is supplied by a supply voltage VCS that corresponds to the voltage between the OUT terminal of the SW switch to which the ACS self-contained current source is connected and the conductive contact P_Gnd. In particular, when the SW switch is open, the ICS current is equal to 0 A and the VCS voltage is equal to 0 V, and the ACS self-contained current source is not powered. The static current consumption of the ACS self-contained current source is advantageously reduced since there is no current consumption when the LED is off.

[0050] Figure [Fig. 6] is a figure similar to Figure [Fig. 5] showing an example of a source of ACS autonomous current.

[0051] According to one embodiment, the self-contained current source ACS comprises a first current source CT AT and a second current source PT AT. The CTAT and PTAT current sources are connected in parallel between the OUT terminal of the SW switch and the conductive contact P_Gnd. The CTAT current source provides an ICTAT current, and the PTAT current source provides an IPTAT current. The ICS current is equal to the sum of the ICTAT and IPTAT currents.

[0052] Figure 7 shows the evolution curves of the ICTAT, IPTAT, and ICS currents of the The circuit of [Fig. 6] as a function of temperature. The CTAT current source provides an ICTAT current that decreases as the temperature of the ACS self-contained current source components increases. The PTAT current source provides an IPTAT current that increases as the temperature of the ACS self-contained current source components increases. The magnitudes of the ICTAT and PTAT currents and their rates of change are determined such that the ICS current, which is equal to the sum of the ICTAT and IPTAT currents, is substantially independent of temperature, within a typical operating temperature range of the display pixel, for example from -35 °C to 85 °C.

[0053] Fig. 8 shows a circuit diagram of an embodiment of the ACS self-contained current source of Fig. 6.

[0054] The self-contained current source ACS comprises a differential pair consisting of a MOS transistor T1, for example an N-MOS transistor, and a MOS transistor T2, for example an N-MOS transistor. The sources of transistors T1 and T2 are coupled, preferably connected, to a first terminal of a resistor RI, the second terminal of the resistor RI being coupled, preferably connected, to the conductive pad P_Gnd coupled to the source of the low reference potential Gnd.

[0055] The self-contained current source ACS further comprises a current mirror consisting of a MOS transistor T3, for example a P-MOS transistor, a MOS transistor T4, for example a P-MOS transistor, and a MOS transistor T5, for example a P-MOS transistor. The gate of transistor T3 is coupled, preferably connected, to the drain of transistor T3, to the gate of transistor T4, and to the gate of transistor T5. The source of transistor T3, the source of transistor T4, and the source of transistor T5 are coupled, preferably connected, to the OUT terminal. The drain of transistor T3 is coupled, preferably connected, to the drain of transistor T1. The drain of transistor T4 is coupled, preferably connected, to the drain of transistor T2. The drain of transistor T5 is coupled, preferably connected, to the gate of transistor T2.

[0056] The ACS self-contained current source further comprises a MOS transistor T6, for example an N-MOS transistor, configured as a diode. The source of transistor T6 is coupled, preferably connected, to the conductive pad P_Gnd. The drain of transistor T6 is coupled, preferably connected, to the gate of transistor T2. The gate of transistor T6 is coupled, preferably connected, to the drain of transistor T6. The ACS self-contained current source further comprises a MOS transistor T7, for example a P-MOS transistor. The source of transistor T7 is coupled, preferably connected, to the OUT node. The drain of transistor T7 is coupled, preferably connected, to the gate of transistor TL. The gate of transistor T7 is coupled, preferably connected, to the drain of transistor T2.The autonomous current source ACS further includes a resistor R2 whose first terminal is coupled, preferably connected, to the gate of transistor T1 and whose second terminal is coupled, preferably connected, to the conductive pad P_Gnd.

[0057] A current II flows through transistor T3. Transistors T3, T4, and T5 form a current mirror such that the currents flowing through transistors T3, T4, and T5 are equal to the current II. A current 12 flows through resistor R2. The current ICS is equal to the sum of the current 12 and three times the current II.

[0058] Calling Vgs6 the gate-source voltage of transistor T6 and Vgsl the gate-source voltage of transistor Tl, the current II is given by the following relation: [Math 1] 11 = (Vgs6 - Vgsl) / (2 "R1")

[0059] The resistance R2, the gate-source voltage Vgs6, and the gate-source voltage Vgsl decrease with temperature. Since the temperature variations of the gate-source voltage Vgs6 and the gate-source voltage Vgsl are identical, this leads to an increase in II with temperature.

[0060] During operation, the gate-source voltage Vgsl of transistor T1 and the gate-source voltage Vgs2 of transistor T2 tend to be maintained equal. Therefore, the current 12 is given by the following relation: [Math 2] 12 = (Vgs6) / (R2)

[0061] Figure 9 shows the percentage changes in resistance R2 and percentage changes in the gate-source voltage Vgs6 of transistor T6 in the circuit of Figure 8 as a function of temperature. Both resistance R2 and gate-source voltage Vgs6 decrease with temperature. As shown in Figure 9, the change in gate-source voltage Vgs6 of transistor T6 is greater than the change in resistance R2 with temperature. This results in a decrease of 12 with temperature.

[0062] The previously described ICTAT current corresponds to current 12. The previously described IPTAT current corresponds to three times current II. The structure of the autonomous current source ACS is advantageously simple since it comprises only seven MOS transistors and two resistors. The intensity of the ICS current can be adjusted by changing resistors RI and R2. For example, each of resistors RI and R2 can be a variable resistor that can be adjusted by a register.

[0063] Figure 10 is similar to Figure 5, showing another embodiment of the ACS self-contained current source. The ACS self-contained adjustable current source comprises the CCS adjustable current source and an analog block 60 that provides the bias signal. The analog block 60 is powered by a supply voltage VCS, which corresponds to the voltage between the OUT terminal of the SW switch and the conductive pad P_Gnd. For example, the adjustable current source VCS corresponds to a MOS transistor, for example, an N-MOS transistor. The bias signal then corresponds to the gate-source voltage of the VCS transistor.

[0064] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will appear to the person of the trade.

[0065] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

[0066] In particular, in the previously disclosed embodiments of the light-emitting circuit 52, the LED is shown with its anode connected to the conductive terminal P_Vcc, the self-contained current source ACS is shown coupling the OUT terminal to the conductive terminal P_Gnd, and the switch SW is shown interposed between the LED and the self-contained current source ACS. However, the relative positions of the LED, the switch SW, and the self-contained current source ACS may be different. For example, the cathode of the LED may be connected to the conductive terminal P_Gnd. In another example, the self-contained current source ACS may be interposed between the LED and the switch SW. In yet another example, the LED may be interposed between the self-contained current source ACS and the switch SW.In another example, the ACS autonomous power source can be connected to the P_Vcc conductive terminal.

Claims

1. Demands Display pixel (1¾) comprising a first electrically conductive connection pad (P_Vcc) intended to receive a high reference voltage (Vcc), a second electrically conductive connection pad (P_Gnd) intended to receive a low reference voltage (Gnd), a light-emitting device (LED), a current source (ACS) supplying said light-emitting device (LED) with a current, the light-emitting device (LED) being in series with the current source (ACS) between the first and second electrically conductive connection pads (P_Vcc, P_Gnd), the only electrical path from the current source (ACS) to the first electrically conductive connection pad (P_Vcc) or to the second electrically conductive connection pad (P_Gnd) passing through the light-emitting device (LED), wherein the current source (ACS) comprises first and second current sources in parallel,the first current source (PTAT) being configured to provide a first current (IPTAT) which is proportional to the absolute temperature and the second current source (CTAT) being configured to provide a second current (ICTAT) which is complementary to the absolute temperature, and wherein the current source (ACS) comprises:, - the first and second terminals of the current source (OUT, P_Gnd); - the first, second, third, fourth, fifth, sixth and seventh MOS transistors (T1, T2, T3, T4, T5, T6, T7), each having a first power terminal, a second power terminal and a gate; - the first and second resistors (RI, R2), each having first and second resistance terminals, the second power terminals of the first and second transistors (T1, T2) being coupled to the first resistance terminal of the first resistor (RI), the second resistance terminal of the first resistor (RI) being coupled to the second current source terminal (P_Gnd), the gate of the third transistor (T3) being coupled to the first power terminal of the third transistor (T3), to the gate of the fourth transistor (T4) and to the gate of the fifth transistor (T5), the second power terminals of the third, fourth and fifth transistors (T3, T4, T5) being coupled to the first current source terminal (OUT), the first power terminal of the third transistor (T3) being coupled to the first power terminal of the first transistor (T1), the first power terminal of the fourth transistor (T4) being coupled to the first power terminal of the second transistor (T2), the first power terminal of the fifth transistor (T5) being coupled to the gate of the second transistor (T2), the second power terminal of the sixth transistor (T6) being coupled to the second current source terminal (P_Gnd), the first power terminal of the sixth transistor (T6) being coupled to the gate of the second transistor (T2), the gate of the sixth transistor (T6) being coupled to the first power terminal of the sixth transistor (T6),the second power terminal of the seventh transistor (T7) being coupled to the first current source terminal (OUT), the first power terminal of the seventh transistor (T7) being coupled to the gate of the first transistor (T1), the gate of the seventh transistor (T7) being coupled to the first power terminal of the second transistor (T2), the first resistance terminal of the second resistor (R2) being coupled to the gate of the first transistor (T1), and the second resistance terminal of the second resistor (R2) being coupled to the second current source terminal (P_Gnd).

2. Display pixel according to claim 1, further comprising a switch (SW) in series with the light-emitting device (LED) and the current source (ACS).

3. Display pixel according to claim 2, further comprising a driver circuit (40) for controlling the switch (SW), the display pixel (12^) being configured to receive a first binary signal (Dataj), the driver circuit (40) being configured to determine a digital signal (R, G, B) from successively received values ​​of the first binary signal (Dataj) and to control the switch (SW) by pulse width modulation on the basis of the digital signal (R, G, B).

4. Display pixel according to claim 2 or 3, wherein the switch is interposed between the light-emitting device (LED) and the current source (ACS).

5. Display pixel according to any one of claims 1 to 4, wherein the light-emitting device (LED) comprises a light-emitting diode, the anode of the light-emitting diode (LED) being coupled to the first electrically conductive connection pad (P_Vcc).

6. Display pixel according to any one of claims 1 to 5, wherein the current source (ACS) comprises a first current source terminal and a second current source terminal, the second current source terminal being coupled to the second electrically conductive connection pad (P_Gnd).

7. Display screen (10) comprising: display pixels (1¾) according to any one of claims 1 to 6; first electrodes (18i) coupled to the display pixels; a first circuit (22) for providing a selection signal (Com;) on each first electrode for selecting the display pixels (1¾) coupled to the first electrode; second electrodes (20j) coupled to the display pixels; and a second circuit (24) for providing data signals (Dataj) on the second electrodes.

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