Switching device incorporating a contact degradation protection mechanism

Abstract

------ Switching device incorporating a contact degradation protection mechanism The invention relates to a switching device (1), comprising an input (E), an output (S), N variable resistance elements (R), and N+1 primary switches (P1, P2), the N variable resistance elements (R) and the N+1 primary switches (P1, P2) being connected in series to form a chain with, for each link of the chain comprising a variable resistance element (R) connected in series upstream with an upstream primary switch (P1) and in series downstream with a downstream primary switch (P2), an upstream secondary switch (S1) connected in parallel between the input of the upstream primary switch (P1) and the output of the variable resistance element (R), and a downstream secondary switch (S2) connected in parallel between the input of the variable resistance element (R) and the output of the downstream primary switch (P2),the switching device further comprising a control device (C). Figure to be published with the abbreviation: Figure 1,

Description

Title of the invention: Switching device incorporating a contact degradation protection mechanism

[0001] The present invention relates to the field of microelectromechanical systems, designated by the acronym MEMS, and more particularly to a switching device with MEMS switches integrating a mechanism for protection against contact degradation.

[0002] A switch is a basic function in electronics that allows the isolating / blocking or the flow of electrical current to ensure the functionality of a device. For example, a switch allows a car's windshield wipers to sweep every second or a mobile phone to switch to Bluetooth® mode. They are found everywhere (household appliances, airplanes, satellites, elevators, electrical outlets, light bulbs, etc.).

[0003] Among the available switching technologies, electromechanical relays, which have existed for nearly two centuries, still hold a significant share of the global market. Indeed, unlike its only alternative (the semiconductor), the electromechanical relay is often less expensive. It is also bidirectional and exhibits galvanic isolation in its off state and low heat generation in the on state. It is therefore difficult to replace to this day, despite the compromises that system designers must accept regarding its size, weight, slow response time, and the significant energy consumption of its activation system.

[0004] A MEMS switching device is capable of retaining the advantages of the electromechanical relay (bidirectionality, galvanic isolation, low heating in the on state) while allowing a level of integration comparable to semiconductors, switching 1000 times faster, and energy consumption close to 0. It is a potentially very inexpensive technology to manufacture since it uses older generation semiconductor manufacturing processes (not requiring advanced nodes).

[0005] The MEMS switching devices according to the present invention can be any type of switch that, depending on its state, can block or carry an electrical or electronic signal, regardless of its waveform, frequency, or power level. This can be, for example, without limitation:

[0006] - an electrical switch (also called a remote switch or electrical contactor) enabling the routing of continuous (DC) or alternating (AC) signals from a device or electrical network (12-5000 V, 1-200 A, DC-50 Hz);

[0007] - a circuit breaker allowing the power supply to an installation to be cut off at the time from an electrical overload or short circuit;

[0008] - an electronic switch allowing the control of low-power digital signals power (5 V, 0.5 A);

[0009] - a radio frequency (RF) switch of the ohmic or capacitive type allowing to perform switching operations on an impedance of 50 Ohms or 75 Ohms on signals up to 200 GHz.

[0010] The basic building block of MEMS switching devices is the MEMS switch. The MEMS switch generally comprises a deformable element (wholly or partly metallic or semiconductor) suspended opposite a substrate (wholly or partly insulating or semiconductor) and attached to the substrate by means of at least one anchor. This can be, for example, a cantilever beam (or simply beam, or sometimes for short, cantilever) or a membrane, which must be able to deform between two states: a first state in which electrical contact is made by the deformable element between a signal input line and a signal output line of the MEMS switch (the conducting or "ON" state), and a second state in which electrical isolation is made by the deformable element between the signal input line and the signal output line of the MEMS switch (the blocking or "OFF" state).

[0011] Depending on the power level required by the application, the MEMS switching device can consist of several MEMS switches arranged in series (for better voltage handling in the OFF state) and / or in parallel (for better current handling in the ON state). For example, it is now possible to design MEMS switching devices capable of carrying several tens of amperes in the ON state and blocking several hundred volts in the OFF state.

[0012] This technology would therefore theoretically be capable of switching power levels above IkW. However, the contact area of ​​each MEMS switch in the device degrades during the switching transient (transition from the ON state to the OFF state or from the OFF state to the ON state) for much lower power levels.

[0013] This phenomenon, which reduces the reliability of the switching device as a whole, is mainly related to the voltage present across the contacts of each MEMS switch, which must remain sufficiently low during the transient to avoid:

[0014] - field emission phenomena when the contacts are very close,

[0015] - significant heating due to Joule effect when the contacts touch penalty.

[0016] The document Hot switching damage mechanisms in MEMS contacts - evidence and understanding, Basu & al., Journal of Micromechanics and Microengineering, Volume 24, Issue 10, October 2014, describes such damage mechanisms.

[0017] To overcome these degradation problems, it would theoretically be possible to arrange a large number of MEMS switches in series and parallel. However, this solution has the drawback of requiring perfect synchronization of switch closure, which is impossible to achieve in practice.

[0018] This is why the current state of the art (European patent applications EP3654358A1, EP1681694A1, EP2485232A1, US patent application US2019172672A1, French patent application FR3067165 and US patent US7864491) presents hybrid devices based on semiconductors and MEMS switches that allow the voltage across each contact to drop to an acceptable level at the time of the switching transient.

[0019] However, these solutions prove unsatisfactory for at least one of the following reasons:

[0020] - they are too expensive: they require the use of semi-components latest generation conductors (GaN, SiC) to maintain the voltage level required by the application;

[0021] - they are not symmetrical and bidirectional: they do not allow support both continuous and alternating signals and their performance depends on the direction in which the protection is positioned;

[0022] - they degrade the performance of the MEMS switch and make the solution non-attractive: they increase heating in the ON state and / or they no longer allow galvanic isolation and / or they increase the sensitivity of the switch to temperature.

[0023] The Applicant therefore sought to overcome the drawbacks of the prior art by proposing a solution designed to make the protection architecture much less dependent on the electrical constraints of the application. The proposed solution effectively reduces the voltage stresses borne by the protection circuit in the OFF state. Furthermore, the proposed solution can handle AC and DC signals for the same architecture and is therefore standard. It is advantageously symmetrical, and its performance does not depend on the orientation of the protection. In addition, it prevents the protection circuit from negatively impacting the resistance of the device in the on state. The proposed solution is also capable of guaranteeing galvanic isolation, i.e., no contact points. electrical current between the input and output. Finally, the protection device does not affect the temperature sensitivity of the switch.

[0024] The present invention therefore relates to a switching device, characterized in that it comprises an input, an output, N variable resistance elements, N being a natural number greater than or equal to 1, and N+l primary switches with microelectromechanical systems, MEMS, the N variable resistance elements and the N+l primary switches being connected in series to form a chain with a variable resistance element between two primary switches and a primary switch at each end connected respectively to the input and output of the switching device, with, for each link of the chain comprising a variable resistance element connected in series upstream with an upstream primary switch and in series downstream with a downstream primary switch, an upstream secondary MEMS switch connected in parallel between the input of the upstream primary switch and the output of the variable resistance element,and a downstream secondary MEMS switch connected in parallel between the input of the variable resistance element and the output of the downstream primary switch, the switching device further comprising a control device configured to control the primary switches, the secondary switches and the variable resistance element(s) such that: ,

[0025] - to switch the switching device from the open state to the closed state, the or With the variable resistance elements at their maximum resistance state, the control device closes the primary switches, moves the variable resistance element(s) from their maximum resistance state to their minimum resistance state, then closes the secondary switches, and

[0026] - to switch the switching device from the closed state to the open state, the or with the variable resistance elements at their minimum resistance state, the control device opens the secondary switches, moves the variable resistance element(s) from their minimum resistance state to their maximum resistance state, and then opens the primary switches.

[0027] Thus, the variable resistance protects against degradation:

[0028] - primary MEMS switches exhibiting a high series impedance which will reduce field emission phenomena when contacts are close (see the thesis An Experimental Investigation of Hot Switching Contact Damage in RF MEMS Switches, A. Basu, 2013, available at https: / / repository.library.northeastern.edU / files / neu:1425) and drop the voltage when contacts touch;

[0029] - secondary MEMS switches exhibiting low impedance in parallel which will cause the voltage to drop before the contacts get close and then touch.

[0030] Also, the configuration of this new switching device offers a number of benefits:

[0031] - the variable protection resistor advantageously has a zero voltage at its terminals when the switching device is in the OFF or ON state. This means in particular that:

[0032] - the protection system does not impact the insulation performance of the device switching when it is in the OFF state,

[0033] - the protection system does not affect the Ron resistance of the device in the ON state and therefore does not cause additional heating of the switching device - the protection system, even if it is temperature sensitive, does not affect the thermal sensitivity of the switching device when it is in the ON or OFF position.

[0034] Thus, the variable resistor is only capable of withstanding a small amount of power during the switching transient of the device. The designer will then have the option of choosing low-cost variable resistor technologies for the implementation of the device.

[0035] Also, the switching device can operate bidirectionally, even when the variable protection resistor uses unidirectional technology, making the switching device simple, standard and adaptable to DC or AC applications.

[0036] Finally, there is no electrical connection between the input and output of the switching device in the OFF state, which offers the possibility of maintaining galvanic isolation when the application requires it.

[0037] It is understood that, for two consecutive links, the downstream primary switch of one link corresponds to the upstream primary switch of the next link, in the direction from the input to the output of the switching device.

[0038] The control device may integrate, without limitation, one or more switches (such as photodiodes, MOSFETs), one or more voltage converters (such as a charge pump), one or more driver circuits, one or more programmable logic circuits (such as a microcontroller).

[0039] Preferably, the ratio between the maximum resistance value and the minimum resistance value of the variable resistance element(s) is greater than 103, advantageously greater than 105, preferably greater than 107, even more preferably greater than 109.

[0040] According to one embodiment, the primary MEMS switches are advantageously identical.

[0041] According to one embodiment, the secondary MEMS switches are advantageously identical.

[0042] According to one embodiment, the primary MEMS switches and the secondary MEMS switches are advantageously identical. A symmetrical solution is thus proposed.

[0043] According to one embodiment, the control device is further configured to move the variable resistance element(s) to their maximum resistance state after closing the secondary switches when closing the switching device and to move the variable resistance element(s) to their minimum resistance state before opening the secondary switches when opening the switching device.

[0044] The behavior of the switching device in the on state is thus improved by the fact that the electrical consumption of the variable resistance element(s) is made minimal.

[0045] According to one embodiment, a resistor of value R is connected in parallel with each primary switch.

[0046] The sensitivity of the switching device in the open state is thus reduced, the voltage being distributed uniformly across the terminals of the different switches.

[0047] According to one embodiment, a resistor of value R is connected in parallel with each secondary switch.

[0048] The sensitivity of the switching device in the open state is thus reduced, the voltage being distributed uniformly across the terminals of the different switches.

[0049] According to one embodiment, the chain comprises P links, P being a natural number greater than or equal to 2, and for a link i, i being a natural number between 1 and P, each upstream secondary switch comprises Pi redundant secondary switches connected in parallel, and each downstream secondary switch comprises i-1 redundant secondary switches connected in parallel, to form a matrix having P+l rows and P+l columns, each element of the matrix being constituted by a switch.

[0050] According to one embodiment, the switches on a row of the matrix are connected in series, the rows of the matrix are connected in parallel between the input and output of the switching device, the input of the switches in the first column is therefore connected to the input of the switching device and the output of the switches in the last column being connected to the output of the switching device, the output of the switch in row i and column j, with i being a natural number between 1 and P, j being a natural number between 1 and P, being connected to the input of the switch in row i+1 and column j+1 by one of a wire and one of the N variable resistance elements.

[0051] According to one embodiment, a resistor of value R is connected in parallel to each end of the column of the matrix.

[0052] According to one embodiment, each primary switch consists of one or more identical switches mounted in series and / or in parallel and controlled simultaneously.

[0053] According to one embodiment, each secondary switch consists of one or more identical switches mounted in series and / or in parallel and controlled simultaneously.

[0054] According to one embodiment, the control device is one of a programmable pre-diffused matrix (FPGA) and an application-specific integrated circuit (ASIC).

[0055] According to one embodiment, each variable resistance element is one or more of a field-effect transistor, in particular of the MOSFET type, a transistor, a phototransistor, an IGBT transistor, a bipolar transistor, a HEMT transistor, a diode, a transil diode, a triac, a thyristor, a resistive sensor, a phase-change material.

[0056] According to one embodiment, the primary switches, the secondary switches, the control device and the variable resistance element(s) are on the same chip or are distributed over two or more chips.

[0057] Thus, the switching device can be divided into:

[0058] - a monolithic chip integrating the control device, the MEMS circuits and variable resistance elements,

[0059] - two chips: one chip carrying the MEMS circuits and the resistor elements variable and a chip carrying a control ASIC,

[0060] - three chips: one chip carrying the MEMS circuits, one chip carrying the elements to variable resistor and a chip carrying a control ASIC.

[0061] - a printed circuit board on which a set of chips are connected including the chip carrying the MEMS circuits, the chips carrying the variable resistance elements, the chips necessary for control.

[0062] The switching device according to the invention can be encapsulated in a SiP (System in Package) or a SoC (System on Chip) or in an electronic package (QFN, DIN, SOT...). When there are several elements, they can be connected to each other by solder wires (wirebonding) or via the printed circuit board on which they are located.

[0063] To better illustrate the object of the present invention, particular embodiments, indicated by way of illustration and not limitation, will now be described, in connection with the attached drawings.

[0064] On these drawings:

[0065] [Fig.1] is a schematic view of a switching device according to a first embodiment of the present invention;

[0066] [Fig.1A] is a schematic view of the operation of the switching device of [Fig.1] according to the first embodiment of the present invention;

[0067] [Fig.1B] is a schematic view analogous to [Fig.1A] for operation in AC mode;

[0068] [Fig.2] is a schematic view of a switching device according to a second embodiment of the present invention;

[0069] [Fig.3] is a schematic view of a switching device according to a third embodiment of the present invention;

[0070] [Fig.4] is a schematic view of a switching device according to a fourth embodiment of the present invention;

[0071] [Fig.5] is a schematic view of a switching device according to a fifth embodiment of the present invention;

[0072] [Fig.6] is a schematic view of a switching device according to a sixth embodiment of the present invention;

[0073] [Fig.7] is a schematic view of a switching device according to the present invention with its control device;

[0074] [Fig.8] represents the timing diagrams of the signals emitted by the control device of the switching device of the [Fig.7];

[0075] [Fig.9] is a schematic view of a switching device according to the present invention implemented on two chips;

[0076] [Fig. 10] is a schematic view of a switching device according to the present invention implemented on a chip; and

[0077] [Fig. 11] is a schematic view of a switching device according to the present invention implemented on four chips.

[0078] Referring to [Fig.1], one can see that a switching device 1 according to the present invention has been represented.

[0079] The switching device 1 includes a primary MEMS switch PI, called the upstream primary MEMS switch, in series with a variable resistance element R, itself in series with another primary MEMS switch P2, called the downstream primary MEMS switch.

[0080] A secondary MEMS switch SI, called the upstream secondary MEMS switch, is connected in parallel between the input of the primary MEMS switch PI and the output of the variable resistance element R, while another secondary MEMS switch S2, called the downstream secondary MEMS switch, is connected in parallel between the input of the variable resistance element R and the output of the primary MEMS switch P2.

[0081] The input E of the switching device 1 is located on the left and corresponds to the input of the primary MEMS switch PI, the output S of the switching device 1 being located on the right and corresponding to the output of the primary MEMS switch P2.

[0082] It should be noted that, as in all embodiments, the switching device 1 is symmetrical. The input E and the output S are therefore interchangeable.

[0083] Fig. 1 shows two equivalent schematic representations of the switching device 1, the representation on the left showing a pattern or link comprising the two primary MEMS switches PI and P2 in series with the variable resistance element R.

[0084] The control device of the switching device 1, not shown in these first figures so as not to complicate the drawing, will be described in detail with Figures 9 to 11 and controls the primary and secondary MEMS switches PI, P2, SI and S2 and the variable resistance element R.

[0085] If we now refer to [Fig. IA], we can see that the operation of a switching device 1 according to the present invention has been represented on the basis of the embodiment of [Fig. 1].

[0086] The open (OFF) state of the switching device 1 is shown on the left of [Fig. 1A], and corresponds to the state in which all the primary and secondary MEMS switches PI, P2, SI, and S2 are open and the variable resistance element R has its maximum resistance value. It can be seen that, in this open state of the switching device 1 according to the invention, galvanic isolation is preserved between the input E and the output S since there is no electrical contact point between the input E and the output S of the switching device 1.

[0087] Furthermore, in the OFF state, the variable resistor advantageously has a zero voltage across its terminals. Therefore, it does not affect the performance and temperature sensitivity of the switching device 1.

[0088] To switch to the closed (ON) state of the switching device 1, we first go through a transient state A in which, the variable resistance element R remaining at its maximum resistance value, the primary MEMS switches PI and P2 are closed.

[0089] Since the variable resistance element R is at its maximum resistance value, the field emission phenomena occurring when the primary switch contacts come together are therefore reduced. Similarly, the increase The temperature due to the Joule effect occurring during the contact of the primary MEMS switches PI and P2 is minimized.

[0090] Once the primary MEMS switches PI and P2 are closed, the variable resistance element R is brought into a transient state B at its minimum resistance value. This transition of the variable resistance element R to its minimum resistance value causes current to flow between the input E and the output S of the switching device 1 through the two primary MEMS switches PI and P2.

[0091] Once current is flowing, the two secondary MEMS switches SI and S2 can be closed. Since current is already flowing, the voltage between the input E and the output S of the switching device 1 is low, and the risks of field emission or heating due to Joule effect when the secondary MEMS switches SI and S2 are closed are minimized.

[0092] Once the secondary MEMS switches SI and S2 are closed, the switching device 1 is in its closed (ON) state.

[0093] To minimize the power consumption of the switching device 1 in the closed state, it is possible to switch to an optional state (ON (option)) in which the variable resistance element R is set to its maximum resistance value. Furthermore, in the ON or ON (option) state, the variable resistance R advantageously has a zero voltage across its terminals. Therefore, it does not affect the performance and temperature sensitivity of the switching device 1.

[0094] We go from the closed state to the open state by carrying out the steps in the opposite direction.

[0095] If we are in the ON state (option), we first switch to the ON state by doing set the variable resistance element R to its minimum resistance value.

[0096] If we are already in the ON state, then we go through the transient state B, the transient state A and the OFF state.

[0097] Fig.1B represents the operation of the switching device in alternating current (AC) mode.

[0098] In the case where the variable resistance element R is unilateral (i.e., can only pass positive DC signals, for example, like a MOSFET), and if the switching device 1 carries AC signals, the switching operation must take place when the current or voltage goes in the direction that the variable resistance element R can withstand. The direction of the current or voltage can be detected by the control device of the switching device 1, which can command switching when the current / voltage is in the correct direction.

[0099] In the OFF state, the variable resistance element R does not see the voltage from the input E. It is only in the transient state A that the variable resistance element R sees this value. Thus, for AC signals, the control device can detect the waveform of the electrical signal and decide to switch when the voltage, respectively the current, is close to 0 V, respectively 0 A. This allows the use of low-cost variable resistance element architectures R that do not need to withstand high voltages.

[0100] Thus, the operation is identical to that described in connection with [Fig.1A], except that the switching of the primary and secondary MEMS switches PI, P2, SI, S2 takes place around the value of 0 V (0V switching, corresponding to the English acronym ZVS for Zero Voltage Switching).

[0101] Hereafter, the states of the switching devices will be designated in relation to the states ON, OFF, transient state A, transient state B, ON (option) with reference to the states described in Figures IA and IB, namely:

[0102] - OFF state: all primary and secondary MEMS switches open, variable resistance element(s) at their maximum resistance value;

[0103] - transient state A: all primary MEMS switches closed, switches open secondary MEMS, variable resistance element(s) at their maximum resistance value;

[0104] - transient state B: all primary MEMS switches closed, switches open secondary MEMS, variable resistance element(s) at their minimum resistance value;

[0105] - ON state: all primary and secondary MEMS switches closed, element(s) variable resistance at their minimum resistance value;

[0106] - ON state (option): all primary and secondary MEMS switches closed, variable resistance element(s) at their maximum resistance value.

[0107] If we now refer to [Fig.2], we can see that a switching device 20 has been represented according to a second embodiment of the invention in its OFF (open) state.

[0108] The structure is overall identical to that of the switching device 1 according to the first embodiment, except that resistors, respectively RP1 and RP2, are put in parallel with the primary MEMS switches, respectively PI and P2, and resistors, respectively RS1 and RS2, are put in parallel with the secondary MEMS switches, respectively SI and S2.

[0109] This embodiment relates to applications not requiring galvanic isolation. It has the advantage of ensuring a uniform voltage distribution across all MEMS switches of the device in the OFF state, even in the presence of non-uniform contact separation distances between the MEMS switches.

[0110] In this configuration, the resistances RP1, RP2, RS1 and RS2 have identical values ​​at least 10 times greater than the resistance of the switching device 20 in the OFF state.

[0111] In the embodiment shown, half the voltage in the OFF state is carried across each of the resistors RP1, RP2, RS1, and RS2. This embodiment demonstrates that it is also possible, by adding appropriately sized resistors RP1, RP2, RS1, and RS2, to maintain zero voltage across the variable protective resistor R when the switching device 20 is in the OFF state. Apart from galvanic isolation, this embodiment therefore benefits from the advantages of the invention (zero voltage in the OFF and ON states across the variable resistor, bidirectionality).

[0112] The operation of the switching device 20 of this second embodiment is otherwise identical to that of the first embodiment, whether in continuous mode ([Fig.1A]) or in alternating mode ([Fig.1B]), and will therefore not be described again.

[0113] If we now refer to [Fig.3], we can see that a switching device 30 has been represented according to a third embodiment of the invention in its OFF (open) state.

[0114] In this third embodiment, compared to the first embodiment, a primary MEMS switch P3 is put in parallel with the primary MEMS switch PI, a primary MEMS switch P4 is put in parallel with the primary MEMS switch P2, a secondary MEMS switch S3 is put in parallel with the secondary MEMS switch SI, and a secondary MEMS switch S4 is put in parallel with the secondary MEMS switch S2.

[0115] The primary MEMS switches PI, P2, P3 and P4 have synchronized operation, while the secondary MEMS switches SI, S2, S3 and S4 also have synchronized operation.

[0116] Synchronized operation means that the MEMS switches in question are controlled to open or close simultaneously.

[0117] This third embodiment offers the same advantages as the device in [Fig. 1] (galvanic isolation, zero voltage in the OFF and ON states across the variable resistor, bidirectionality). Furthermore, because the current is distributed among more MEMS switches in the ON state, this switching device 30 according to this third embodiment exhibits a lower overall device resistance (Ron) and improved current withstand.

[0118] The operation of the switching device 30 of this third embodiment is otherwise identical to that of the first embodiment, whether in continuous mode ([Fig.1A]) or in alternating mode ([Fig.1B]), and will therefore not be described again.

[0119] If we now refer to [Fig.4], we can see that a switching device 40 has been represented according to a fourth embodiment of the invention in its OFF (open) state.

[0120] This fourth embodiment is analogous to the third embodiment, except that each MEMS switch in the third embodiment is replaced by two MEMS switches of the same type in series.

[0121] Thus, the primary MEMS switches, respectively PI, P2, P3 and P4, of the switching device 30 of the third embodiment are replaced in this fourth embodiment by two primary switches in series, respectively P1a, Pib, P2a, P2b, P3a, P3b and P4a, P4b.

[0122] Similarly, the secondary MEMS switches, respectively SI, S2, S3 and S4, of the switching device 30 of the third embodiment are replaced in this fourth embodiment by two secondary switches in series, respectively Sla, Slb, S2a, S2b, S3a, S3b and S4a, S4b.

[0123] This gives a voltage corresponding to a quarter of the voltage in the OFF state of the switching device 40 across the terminals of each of the switches, which allows for better voltage resistance in the OFF state.

[0124] The operation of the switching device 40 of this fourth embodiment is otherwise identical to that of the first embodiment, whether in continuous mode ([Fig.1A]) or in alternating mode ([Fig.1B]), and will therefore not be described again.

[0125] If we now refer to [Fig.5], we can see that a switching device 50 has been represented according to a fifth embodiment of the invention in its transient state A (with reference to Figures 1A and 1B of the first embodiment).

[0126] The switching device 50 according to this fifth embodiment has a matrix structure, with a first column comprising, from top to bottom, two primary MEMS switches PI and P2 in parallel, then four secondary MEMS switches SI, S4, S5 and S6 in parallel.

[0127] The second column comprises two secondary MEMS switches S2 and S9 in parallel, then two primary MEMS switches P2 and P5 in parallel, then two secondary MEMS switches S7 and S8 in parallel.

[0128] The third column comprises four secondary MEMS switches SI 1, S10, S3 and S12 in parallel, and then two primary MEMS switches P3 and P6 in parallel.

[0129] Two variable resistance elements R are respectively connected between the output of the primary MEMS switch PI and the input of the primary MEMS switch P2 and between the output of the primary MEMS switch P5 and the input of the primary MEMS switch P.

[0130] All primary MEMS switches PI to P6 are synchronized and all secondary MEMS switches SI to S12 are synchronized.

[0131] The operation described in connection with Figures IA and IB for the first embodiment is applicable to this fifth embodiment: one passes from the state OFF in transient state A by closing all primary MEMS switches and we go from transient state B to ON by closing all secondary MEMS switches.

[0132] Similarly, the transition from the ON state to the transient state B is achieved by opening all the secondary MEMS switches, and the transition from the transient state A to the OFF state is achieved by opening all the primary MEMS switches. The values ​​of the variable resistance elements R are also controlled synchronously.

[0133] The advantage of this fifth embodiment is that the voltage is more evenly distributed across several variable resistors during the transition, which reduces the voltage withstand stresses on these resistors and thus allows the use of less expensive components. This configuration also reduces the voltage stress on the MEMS switches during the transition.

[0134] If we now refer to [Fig.6], we can see that a switching device 60 has been represented according to a sixth embodiment in its OFF state.

[0135] This embodiment is identical to the fifth embodiment described above, except that resistors RI are put in parallel at the top and bottom of each column, more precisely in parallel with the MEMS switches P4, S9, S11, S6, S8 and P6.

[0136] Preferably, the resistances RI have a value greater than 10 times the resistance value of the variable resistance elements R.

[0137] It should be noted that this sixth embodiment relates to applications not requiring galvanic isolation. In this embodiment, the RI resistors ensure voltage distribution across each MEMS switch in the OFF state of the switching device 60, even with non-uniform contact separation distances between the MEMS switches.

[0138] Referring to [Fig.7], we can see that a switching device 1 has been represented according to the first embodiment, with its control device C. Note that the Vbias control is represented here by a single pin but it can be a set of pins in parallel (bus) allowing the communication of a binary order to the control device (such as for example an SPI bus for Serial Peripheral Interface).

[0139] The controlled device C is controlled and powered by a bias voltage Vbias and delivers three control signals: a PRI signal to deliver a voltage VPRi controlling the primary MEMS switches PI and P2, a SEC signal to deliver a voltage VSEc controlling the secondary MEMS switches SI and S2, and a MOS signal controlling the variable resistance element R, which in this variant of the first embodiment is implemented by a MOSFET transistor. It should be noted that the resistances related to the biasing of the MEMS switches or the MOSFET, although present in practice, are not shown so as not to clutter the Figure.

[0140] The voltage diagrams of Vbias, VMEMS, VPR1, VM0S and VSEc shown in [Fig.8] describe the evolution of these different voltages over time, as a function of the different states (OFF, transient A, transient B, ON) of the switching device 1 of [Fig.7].

[0141] The high voltage levels of VPRi and VSEc correspond to the closed state of the corresponding controlled switches.

[0142] The low voltage levels of VPR1 and VSEc correspond to the open state of the corresponding controlled switches.

[0143] The high voltage level of VMos corresponds to the maximum resistance state of the variable resistance element R, while the low voltage level of VM0S corresponds to the minimum resistance state of the variable resistance element R.

[0144] We can thus see, by following the evolution of the VMEMS voltage, that we go from the OFF state to the ON state, then back to the OFF state.

[0145] It is understood that all the embodiments described above include an analogous control device C, for controlling the various MEMS switches and the variable resistance element(s).

[0146] Fig.9 schematically represents a first implementation of the switching device of Fig.7, in which the switching device on the one hand, and the control device C on the other hand, are on two separate chips: a chip Cl carrying the switching device, and a chip C2 carrying the control device C.

[0147] Figure 10 represents a variant of Figure 9, in which the switching device and its control device C are on the same chip CL

[0148] [Fig. 11] represents another variant of [Fig. 9], in which the switching device is distributed over three separate chips: a Cl chip for the MEMS switches PI and S2, a C2 chip for the variable resistance element (MOSFET) R, a C3 chip for the MEMS switches SI and P2 and a C4 chip for the control device C.

[0149] It is understood that a person skilled in the art may consider other implementations, on one or more chips, depending on the application constraints. When there are several chips, they can be connected to each other by solder wires (wirebonding) or via the printed circuit board on which they are located.

[0150] These arrangements can be applied to all embodiments of the switching device described above.

[0151] Preferably, the primary switches are identical to each other, the secondary switches are identical to each other, and the primary switches are identical to the secondary switches for reasons of symmetry and dimensioning.

[0152] The variable resistance element(s) may be one or more of the following: a field-effect transistor, a transistor, a phototransistor, an IGBT transistor, a bipolar transistor, a HEMT transistor, a diode, a transil diode, a triac, a thyristor, a resistive sensor, or a phase-change material. Preferably, the ratio between the maximum resistance value and the minimum resistance value of the variable resistance element(s) is greater than 10³, advantageously greater than 10⁵, preferably greater than 10⁷, and even more preferably greater than 10⁹.

Claims

1. Demands - Switching device (1, 20, 30, 40, 50, 60), characterized in that it comprises an input (E), an output (S), N variable resistance elements (R), N being a natural number greater than or equal to 1, and N+l primary switches (PI, P2) of microelectromechanical systems, MEMS, the N variable resistance elements (R) and the N+l primary switches (PI, P2) being connected in series to form a chain with a variable resistance element (R) between two primary switches (PI, P2) and a primary switch (PI, P2) at each end connected respectively to the input and output of the switching device (1, 20, 30, 40, 50, 60), with, for each link of the chain comprising a variable resistance element (R) connected in series upstream with an upstream primary switch (PI) and in series downstream with a downstream primary switch (P2),an upstream secondary MEMS switch (SI) connected in parallel between the input of the upstream primary switch (PI) and the output of the variable resistance element (R), and a downstream secondary MEMS switch (S2) connected in parallel between the input of the variable resistance element (R) and the output of the downstream primary switch (P2), the switching device (1, 20, 30, 40, 50, 60) further comprising a control device (C) configured to control the primary switches (PI, P2), the secondary switches (SI, S2) and the variable resistance element(s) (R) such that: - to switch the switching device (1, 20, 30, 40, 50, 60) from the open (OFF) state to the closed (ON) state, the variable resistance element(s) (R) being at their maximum resistance state, the control device (C) closes the primary switches (PI, P2),switches the variable resistance element(s) (R) from their maximum resistance state to their minimum resistance state, then closes the secondary switches (SI, S2), and, - to switch the switching device (1, 20, 30, 40, 50, 60) from the closed (ON) state to the open (OFF) state, with the variable resistance element(s) (R) at their minimum resistance state, the control device (C) opens the secondary switches (SI, S2), switching the variable resistance element(s) (R) from their minimum resistance state to their maximum resistance state, then opens the primary switches (PI, P2).

2. - Switching device (1, 20, 30, 40, 50, 60) according to claim 1, characterized in that the control device (C) is further configured to move the variable resistance element(s) (R) to their maximum resistance state after closing the secondary switches (SI, S2) when closing the switching device (1, 20, 30, 40, 50, 60) and to move the variable resistance element(s) (R) to their minimum resistance state before opening the secondary switches (SI, S2) when opening the switching device (1, 20, 30, 40, 50, 60).

3. - Switching device (20) according to claim 1 or claim 2, characterized in that a resistor (RP1, RP2) of value R is connected in parallel with each primary switch (PI, P2).

4. - Switching device (20) according to claim 3, characterized in that a resistor (RS1, RS2) of value R is connected in parallel with each secondary switch (SI, S2).

5. - Switching device (30, 40, 50, 60) according to claim 1 or claim 2, characterized in that the chain comprises P links, P being a natural number greater than or equal to 2, and that for a link i, i being a natural number between 1 and P, each upstream secondary switch comprises Pi redundant secondary switches connected in parallel, and each downstream secondary switch comprises i-1 redundant secondary switches connected in parallel, to form a matrix having P+l rows and P+l columns, each element of the matrix being constituted by a switch.

6. - A switching device (30, 40, 50, 60) according to claim 5, characterized in that the switches on a row of the matrix are connected in series, the rows of the matrix are connected in parallel between the input and output of the switching device, the input of the switches in the first column is therefore connected to the input of the switching device and the output of the switches in the last column is connected to the output of the switching device, the output of the switch in row i and column j, with i being a natural number between 1 and P, j being a natural number between 1 and P, being connected to the input of the switch of row i+1 and column j+1 by one of a wire and one of the N variable resistance elements (R).

7. - Switching device (60) according to claim 5 or claim 6, characterized in that a resistor of value R is connected in parallel to each end of the column of the matrix.

8. - Switching device (30, 40) according to any one of claims 1 to 7, characterized in that each primary switch consists of one or more identical switches mounted in series and / or in parallel and controlled simultaneously.

9. - Switching device (30, 40) according to any one of claims 1 to 8, characterized in that each secondary switch consists of one or more identical switches mounted in series and / or in parallel and controlled simultaneously.

10. - Switching device (1) according to any one of claims 1 to 9, characterized in that the control device (C) is one of a programmable pre-diffused array (FPGA) and an application-specific integrated circuit (ASIC).

11. - Switching device (1, 20, 30, 40, 50, 60) according to any one of claims 1 to 10, characterized in that each variable resistance element (R) is one or more of a field-effect transistor, a transistor, a phototransistor, an IGBT transistor, a bipolar transistor, a HEMT transistor, a diode, a transil diode, a triac, a thyristor, a resistive sensor, a phase-change material.

12. - Switching device (1, 20, 30, 40, 50, 60) according to any one of claims 1 to 11, characterized in that the primary switches, secondary switches, control device and variable resistance element(s) are on the same chip or are distributed over at least two chips.

Images