Method for controlling a power converter

The method for controlling a matrix AC/AC power converter addresses efficiency and compactness issues by synchronizing current oscillations for smooth switching, optimizing power transfer and reactive power management, enhancing reliability in on-board chargers.

FR3164075A1Active Publication Date: 2026-01-02UNIV DE LILLE
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Patent Information

Application Number
FR2024007022
Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-06-28
Publication Date
2026-01-02
Estimated Expiration
2044-06-28

AI Technical Summary

Technical Problem

Existing AC/AC power converters face challenges in efficiency, compactness, thermal management, and complexity, particularly in bidirectional power transfer and reactive power absorption, which are crucial for advanced on-board charger applications like Vehicle2Everything (V2X) functionalities.

Method used

A method for controlling a matrix AC/AC power converter with bidirectional current and voltage switches, synchronized with the oscillation of currents to achieve smooth switching, reducing switching losses and optimizing efficiency by using a control sequence that ensures the ratio of instantaneous currents matches reference currents within a tolerance, allowing for reduced power losses and passive component size.

Benefits of technology

The method enhances efficiency by minimizing switching losses and thermal stress, reduces passive component size, and improves reliability and fault tolerance, making it suitable for bidirectional power transfer and reactive power management in on-board chargers.

✦ Generated by Eureka AI based on patent content.

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Abstract

Method for controlling a power converter. Method for controlling a converter comprising bidirectional switches and connected at its input to a three-phase low-frequency (LF) electrical network and at its output to an inductive circuit operating at high frequencies (HF), the frequency of the HF currents of the inductive circuit being equal to the switching frequency of the switches, the method comprising drawing or injecting a reference current from each phase of the network, the switches taking successive states during a switching period resulting from the application of a control sequence for which the ratio of the average values ​​over a switching period of the two smallest instantaneous LF currents in absolute value is substantially equal to the ratio of the corresponding reference currents. Figure for the abstract: Fig. 5
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Description

Title of the invention: Method for controlling a power converter. Technical field.

[0001] The present invention relates to the field of power converters, and more particularly to a method of controlling a matrix AC / AC power converter. Previous technique

[0002] Until now, on-board chargers have essentially had a charging function (unidirectional). The issue of power reversibility is recent, and has mainly focused on the transfer of active power (with a unity power factor).

[0003] Conventional converters are of the AC / DC + DAB (Dual Active Bridge) type, where the DAB is actually a DC / AC + high-frequency (HF) transformer + AC / DC converter. They therefore consist of an AC / DC + DC / AC (HF) + HF transformer + AC (HF) / DC cascade. They can operate at arbitrary power factors, but are subject to size constraints related to the coils necessarily placed in series on the network phases and to thermal constraints related in particular to the switching of the power semiconductors of the AC / DC stage connected to the network.

[0004] The DAB stage in these structures only ensures the transfer of active power (reactive power being managed by the AC / DC connected to the network) and achieves a high efficiency and a high power density.

[0005] Currently commercially available on-board chargers typically employ a structure of this type.

[0006] The more recently published conversion structures (matrix + DAB type, or more precisely AC / AC + HF transformer + AC / DC) make it possible to save a conversion stage and the bulky coils in series on the phases of the AC network compared to the classic structures, thanks to the use of a direct AC / AC (HF) converter - also called matrix converter - connected on one side to the low frequency AC network and on the other to the primary of the HF transformer.

[0007] However, it should be noted that this type of converter uses more complex semiconductor components or combinations of such components to achieve the functionality of bidirectional switches in both current and voltage, and is not necessarily more advantageous in terms of conduction losses since two components must be placed in series to ensure bidirectionality in the voltage of the equivalent switch thus obtained. Indeed, the passage of current causes a voltage drop across the terminals of each of the semiconductor components connected in series to withstand the alternating voltage.

[0008] However, the scientific literature and currently published patents show the possibility of controlling these switches in such a way as to reduce switching losses by implementing soft switching techniques developed for unity power factor operations.

[0009] In particular, Zero Voltage Switching (ZVS) allows a transistor to be turned on when the voltage across its terminals is already almost zero due to the current flowing through its antiparallel diode (structural or external) prior to the transistor's turn-on command. The turn-off, on the other hand, can be controlled by the presence of an inter-electrode capacitor acting as a switching aid circuit ("snubber"), reducing the losses when the transistor turns on.

[0010] Due to their properties on the evolution of switched voltages and currents, these switching smoothing techniques are very beneficial for:

[0011] - to greatly reduce switching losses;

[0012] - allow for frequency increases (and therefore the use of more passive components) small);

[0013] - shifting the trade-off between conduction losses and commutation losses in favor of the conduction to further increase efficiency by using more semiconductor surface area;

[0014] - reduce the speed of switching transients and problems of associated electromagnetic disturbances (normative electromagnetic compatibility (EMC) constraints which may require costly and bulky passive filtering).

[0015] Current gains are mainly obtained by the use of recent technologies of power semiconductor components based on wide bandgap (WBG) materials, typically silicon carbide (SiC) or gallium nitride (GaN) as a replacement for conventional silicon (Si) components.

[0016] These WBG components make it possible to reduce both conduction and switching losses, improving efficiency and consequently thermal constraints, and allowing a frequency increase which makes it possible to reduce the size of passive components (especially magnetic ones).

[0017] Thermal management of on-board chargers generally involves liquid cooling, which is detrimental.

[0018] Improving efficiency and compactness are issues generally encountered in power electronic converters and which guide a number of design choices regarding technologies of components (semiconductors, passive components, cooling), conversion structures (arrangement of components constituting a circuit topology adapted to the constraints of the application), as well as remote control (development of setpoints for electrical quantities to be controlled, in average value over the switching period) and close control (development of instantaneous ON / OFF control commands for transistors to satisfy these setpoints).

[0019] Efficiency and power density are particularly important criteria in embedded systems such as AC / DC chargers on board electric vehicles (saving space, mass and range and opportunity to extract the converter from the liquid cooling loop, easing integration constraints).

[0020] Regarding AC / DC conversion isolated by HF transformer, the simple transfer of active power (including bidirectional) is already quite well controlled at present, in particular by the use of recent topologies using a direct conversion stage (of matrix converter type) between the first AC network (low frequency) and the primary of a transformer working at high frequency (in DAB type operation), although this type of converter remains complex (in particular its control) and is the subject of current research work.

[0021] However, extending this to reactive power absorption challenges existing techniques for optimizing efficiency and compactness, and therefore requires further development. Nevertheless, such functionality may prove necessary and will constitute, in particular, a new application for next-generation automotive chargers.

[0022] Indeed, recent work shows the interest of exploiting the energy stored in batteries when vehicles are stopped, to power loads at different scales (Vehicle2Load: V2L, Vehicle2Home: V2H) or to provide services to the electrical network (Vehicle2Grid: V2G) facilitating for example the integration of renewable energies, power clipping or even frequency control of the network.

[0023] These Vehicle2Everything (V2X) applications in the broad sense require advanced on-board charger features including not only bidirectional active power transfer, but also the ability to supply or consume reactive power (necessary for example for grid-forming for voltage control in V2G), while ensuring galvanic isolation.

[0024] Regarding three-phase connection to the low-frequency AC network (typically 50 Hz or 60 Hz), this is an alternative to single-phase domestic connection that allows for increased battery charging power and therefore faster charging speed. The power values ​​typically encountered in chargers Onboard power is 7kW in single-phase and 22kW in three-phase. Three-phase is also more suitable for V2G functionalities.

[0025] The main problems related to the implementation of isolated AC / DC converters are:

[0026] - the conversion efficiency (impacted by losses, particularly from semi- power conductors);

[0027] - the volume of passive components necessary for the operation of the structure;

[0028] - thermal management (heat extraction) and integration constraints with the cooling system;

[0029] - the complexity of the control, in particular for structures based on matrix converter; and

[0030] - reliability and fault tolerance. Description of the invention

[0031] There is therefore a need to improve electronic power converters, particularly in terms of efficiency gains and compactness.

[0032] The invention aims to meet this objective and relates, according to one of its aspects, to a method for controlling a matrix AC / AC power converter, the converter comprising a matrix of bidirectional current and voltage switches, the converter being suitable for being connected at the input to a three-phase RST electrical network at low frequency LF and at the output to an inductive circuit operating at high frequency HF, the frequency of the HF currents of the inductive circuit being equal to the switching frequency of the switches, the method comprising drawing or injecting on each phase (R, S, T) of this network a determined reference current î^EF, k € {R, S, T].the switches of the matrix converter taking successive states during a switching period resulting from the application of a control sequence for which the ratio of the average values ​​over a switching period of the two smallest instantaneous currents BF of the currents 4, k € {R, S, T] generated by the converter on said phase (R, S, T) of the network, denoted h and »2, in absolute value is substantially equal to the ratio of the corresponding reference currents, i.e.,

[0033] h being the instantaneous BF current whose reference îEEEa is the smallest absolute value among the three reference currents and L being the instantaneous BF current whose reference fi1-1 is intermediate in absolute value among the three reference currents.

[0034] By "substantially equal", we mean equal with a margin of tolerance of less than 10%, or even 5%, better 3%, even better 1%.

[0035] The electronic power converter considered is of the AC / AC (alternating LF / alternating HF) type, being connected on one side to a three-phase alternating voltage system at low frequency (LF, typically 50 Hz or 60 Hz for applications connected to the electrical distribution network), and on the other side to a stage exhibiting inductive behavior and operating at high frequency (HF, typically between a few tens of kilohertz and a few megahertz).

[0036] The fact that the frequency of the HF currents in the inductive circuit is equal to the switching frequency of the switches corresponds to a specific operating mode on the HF side, classically called "full wave," which allows the current sign changes within a switching period to be taken advantage of to perform smooth switching. This drastically reduces switching losses, thereby increasing efficiency, decreasing thermal stress, and increasing the switching frequency (which allows the size of passive components such as inductors and capacitors to be reduced). Thus, the control of the switches is synchronous with the oscillation of the currents; that is, a change in the period of one switch will be followed by an equivalent change in the period of the other to maintain synchronism, namely the positioning of the switch control signals relative to the alternating evolution described by the currents.

[0037] The invention provides a general and systematic control method for the matrix converter allowing control of the LF currents flowing in the R, S, T phases of the network, and consequently the active P and reactive Q powers exchanged with the low frequency AC network.

[0038] The invention makes it possible to reconstruct the LF currents from the available HF currents. The LF currents are advantageously homothetic to the reference currents, up to a multiplicative constant (thanks to compliance with the aforementioned ratio).

[0039] The method according to the invention works advantageously regardless of the desired phase shift between network currents and voltages, which can also be described as an arbitrary power factor.

[0040] Thanks to the invention, it is possible to obtain smooth switching conditions in Zero-Voltage Switching (ZVS), thus considerably reducing switching losses. In particular, these switches are ensured regardless of the phase shift between network currents and voltages.

[0041] The invention allows the amplitude of the HF currents to be reduced to the minimum necessary to ensure the operation mentioned above, in order to reduce power losses and thus optimize the efficiency of the converter.

[0042] Preferably, the switching of the switches is carried out in soft switching so that an HF voltage rise occurs at a time when the corresponding HF current is negative and an HF voltage fall occurs at a time when the corresponding HF current is positive.

[0043] The term "HF voltage rise" means an increase in the electrical potential of a phase on the HF side, and the "negative HF current" refers to the fact that the current on this same phase flows in the direction from the inductive circuit to the matrix converter ("incoming" current) at the moment of switching.

[0044] The term "HF voltage drop" refers to a drop in the electrical potential of a phase on the HF side, and "positive HF current" refers to the fact that the current on this same phase flows in the direction from the matrix converter to the inductive circuit ("outgoing" current) at the moment of switching.

[0045] In one embodiment, a safety time <5 equal to at least a minimum difference between the switching instant and the instant of change of sign of the HF current associated with the switching switch is present in the control sequence between two successive states of this switch, to ensure that the switching takes place under a current value and with a time margin sufficient for smooth switching.

[0046] Low-pass filtering is preferably applied between the matrix converter and the LF electrical network in order to attenuate harmonics of frequencies greater than or equal to the switching frequency and to allow the LF component to flow to the network.

[0047] The low-pass filter can be of the LC type, comprising on each LF phase (R, S, T) a capacitor in parallel with said phase and an inductor in series between the capacitor and the electrical network. This can be a parasitic capacitor or inductor, or added components.

[0048] Preferably, the BF voltages are ordered according to a voltage value sorting at each instant and noted as follows: - M refers to the phase among R, S or T that has the greatest electrical potential; - m refers to the phase among R, S or T that has the lowest electrical potential; - i refers to the phase among R, S or T whose electrical potential is intermediate, located between the two preceding ones; the BF currents being renamed such as: - iM denotes the current among iR, is and iT flowing in the phase of greatest potential M; - im denotes the current among iR, is and iT flowing in the phase of smallest potential m; - i; denotes the current among iR, is and iT flowing in the intermediate potential phase i; the reference current [FEF k € {R, S, T} renamed i^FF j € {M, i, m} following æ J of the voltage scheduling, being represented by an iSFF vector in a complex plane such that: 2 / -REF , -REF (,-22.} . -REF J j^L}\ _ r lREF “ 3 \ lM + li 3 + lm 33 ) “ ^REF^

[0049] Where P is the argument of the vector and i^EF C( ^REF are orthogonal projections of said vector onto respective axes of the currents iM, i; ​​and im which intersect at the center of the complex plane representing the zero value of the currents, the axis of iM corresponding to the real axis of the complex plane, the positive part of the axis of i; being rotated 120° in the trigonometric direction with respect to the positive part of the axis of iM, the positive part of the axis of im being rotated 120° in the trigonometric direction with respect to the positive part of the axis of ii5 the axes of the currents and their respective perpendicular axes, called perpendicular current axes, defining twelve sectors numbered from I to XII, each of which is identified by a specific ordering of the currents as represented in the following table: Sector Current scheduling I ■REF , >0>ifEF' •REF > hn II -REF - >i?EF>0ï -REF > hn III -REF , li >$F>^ -REF IV -REF „ >0>iwF' •REF > lm V -REF , h' >0>i^F^ -REF >lM VI •RE F >iREF>0' hn v - •REF VII •REF hn >^>0^ •REF >lM VIII •REF s hn >0>iREF' -REF >lM IX -REF

[0050]

[0051]

[0052]

[0053] Advantageously, the sum of the HF currents is zero and the sum of the LF currents is zero. In one embodiment, the output of the matrix converter defines at least two arms connecting the converter to the inductive circuit, with a single switch for each arm being closed at all times. In particular, the matrix converter can be of the 3x3 type having three output arms A, B, C. In one embodiment, the possible connections of arms A, B, C to phases R, S, T and their impact on the LF currents (iR, is, iT) are defined in the following tables, the positive sign of an HF current (iA, iB, ic) indicating a current leaving the converter, the negative sign of this current indicating a current entering the converter ("leaving" means "side ABC towards the inductive circuit for currents iA iB iC): A tas R ï C À AARR i 0 8 SRS “R: A À RR t ~ta 0 4: — S JR PTP ta fi ; ta ta « R 8 RT À Ai: ART' A : -¾ 8 À ï RTH Pi ta j 0 T -A tas contact i ABCA ] À ...sJ g RR "A: A 0 ; SR 5 A i ta 0 ] g RT: 4 P ; SR À: riss SR ! 0 gs 8 T û "ta A s TR ■T ï ta $ TS fi ï "A ta ; s TT fi i A "'A

[0054] Possible states in notation<M,i,m> Arms A, B, C and their impact on the BF currents (iR, is, iT) can be defined in the following tables: current arm. AS c ta j AM ta A ....... ta ta i fi ............G "'À: s A fi fi MM -A 8 AM i ta tas i A 0 M i . 'ta "A 0 i tTï ; AAA ta ta 'ta: 0 A ......... — >31 im; .....your A! 1 <3! ! '....¾.... ta;ts S: COlirSSît ASC; ta: fi ta s ta M ........... *A fi; i «i tj "A fi s M ta ta j ...A. .Pi A -A fi s pile A gc: ta A ta A:.....:.....: ta A ta s ta ta ta; ta G —% ; ta ta A to ; Ô "ta Pè™. ------ 1.-.-.-.-.-.-.-.-. -.-.-. -.-.-. ........... ii fi ta "ta sn M ta ,Ô "ta s» S e .JA... Al i G ca

[0055] We will now describe the sequence of states to be taken by the converter during a period of HF currents, this same period being divided into intervals for this purpose (to describe the arrangement of states over time).

[0056] An interval being defined by the duration separating two zero crossings of the HF currents, a switching period comprising six substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed in the intervals, each arrangement corresponding to an area of ​​the complex plane obtained by subdividing each of the sectors into two, the set of possible arrangements is preferably defined in the following table: U (2 BBB AI MmM ; mMm j mim [ mmM ; reto ] O AS Mmi > ( imm ( Sim i to ( mim ( mms [ ô AS to [ imm- i ïMm | sim ( mira ! J mii ] isto ; Mms ] • A7 iîYsi s :Mi ( iMïYï J ::ÎO : miM | mis ) sMM} -M i Mis { Mm MM, )M A3 ,Mi ï Mm | ■MM | iiM | miM | W [ Mis i Mmi | MBS | O AW îMM |mMM| miM | MiM MmJ ] MMi O An snMM ] miM ; | MmM [ Mmi MMm j Q AG ïîVMnï mMi s«mM [ Mfîw | Mim iMM^i G A13 ton jmMsnl mGi [ mmi HnssM] -, f / j ïmrh' s Mmm) Msüs} G A1A mira | mii ; mMî i ] ■imi ] imM ï inssn | sifsî i Mim ] O AÏS Mîm ; mto [ mil ( mMl : nto | ÊfUî ( imM ; ton | to [ O .ATS Mis [ wist ] mMî ] iMs J oî' f J SM ; ism [ ç G Mil [ MMs « mMi ) iMi ( iMM î smM | iiM | G MîM ( Mfm | M8 ( MMi ] mMi ] JM? { :MM [ itsM i SM [ G .

[0057] Where II to 16 denote the intervals within a switching period, the symbol ] indicates that two states succeed one another within the same interval, the symbol ) denotes a transition between two intervals involving a positive safety time <5, the symbol ( denotes a transition between two intervals involving a negative safety time <5 and the symbol O indicates that each arrangement is cyclic, repeating identically from one switching period to another.

[0058] The command sequences can be up to fourteen in number and are defined in the following table: i Comp&ndsnt States i "to! | St MbMMiMMtas MM: mMt æMM iMM imM S2 Mita mMî «MM mraM imM A3 | S3 Mmi Mitw Mt 'm iMm mMm mMM mîM mmM AS i S4 Mno imra A*!.' ns Ms» miM mtmî A4 j S5 ÎWYi iMm mira S:S <M nw Mmi AS. As i SS «Mm «m üM Mit Mrtsi A7 s? iMi iMM iJM miM MM Mis Mmi MMi AS: A§ { SS MM bïMM mM MM MmM Mmi MMi MM:!': AW i SS Mm «Mm miM Sïm'ïM MmM Mmi Mmtn MMm Ail ] S1& mMm mW wnM «bM MmM Mîîim Mim MMrss A12 sn nV - sraM toM M::" AB S12 wüm 5^5 S fïîMi toi mm iram sim MM; Al 4 : AIE j six Mît inn mMî Ms imM iîM ito AU su MiM MES mW Mi MM tmM hM ; AM j

[0059] a command sequence being unique to given LF voltages and LF current references.

[0060] Preferably, the applied arrangement is that which corresponds to the "small" value of the reference current ratio in the following table, i.e., in the case where this ratio is less than a limit value Xlim which is less than 1; otherwise, the applied arrangement is that which corresponds to the "large" value of the reference current ratio in the same table, i.e., in the case where this ratio is greater than the limit value Xlim: Angular sector Value of ■ >■ small large arrangement sequence arrangement I S2 A2 SI Al II S3 A3 S4 A4 IH S5 A5 S4 A4 IV S5 AS S6 A 7 V S7 A8 S6 A7 VI S? A9 SS A10 VH S9 Garlic SS A10 vin sio A12 SU A13 IX S12 AI 4 Sll A13 X SI 2 A15 S13 A16 XI SU A17 SI 3 A16 XII SU A18 SI Al

[0061] A variable X can be defined such that: -REF h__ -REF

[0062] Then y» = arcos ( )

[0063] Where W is the angle covered by a peak of the current ii and going up to the zero crossing of the current on the curve followed by ii when it is not zero, considering a scale of angles in radians based on the switching period, the selection of the arrangement to be applied being carried out according to the value of W.

[0064] In one embodiment, if W is less than a limit value Wiim, i.e., W < Wiim , the arrangement applied being that which corresponds to the "small" value of X in the previous table, otherwise the arrangement applied being that which corresponds to the "large" value of X in the same table, WUm corresponding to the width of an interval, i.e. jt / 3, to which we add, or subtract depending on the arrangements the safety duration <5.

[0065] Preferably, the limit value XUm of the variable X defining the transition between the "small" and "large" values ​​of the preceding table is defined such that:

[0066] (tan(f + (?) if = 7 + 5

[0067] In one embodiment, the matrix converter is of the 3x2 type having two output arms A, B.

[0068] The possible connections of arms A, B to phases R, S, T and their impact on the LF currents (iR, is, iT) are preferably defined in the following table, the positive sign of an HF current (iA) indicating a current leaving the converter, the negative sign of this current indicating a current entering the converter: running arm A g A; RR 0 0 0 RS * À 0 RTGSR 0 SS 0 G 0 s T 0 -¾ TRQ -¾ TSQ ^A' ATT 0 0 0

[0069] Possible states in notation<M,i,m> Arms A and B and their impact on the BF currents (iR, is, iT) can be defined in the following table: current arm AB ■AAMM 0 Q 0 M i A '*AGM m 0 " A i M ” - AS A 0 ii 0 0 G im 0 A m -ÎA 0 A mi 0 “XA 7,smm GG 0

[0070] An interval being defined by the duration separating two zero crossings of the HF currents, a switching period comprising two substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed in the intervals, the set of possible arrangements is preferably defined in the following table: ______________________il______________________ ______________________fâ_______________________ U Sh Mm > Mi ] mM n & m Mm ; im [ ; ™ (Q IV & V | sM | | mi; Ms (Mm) n VI & w iM î | Mi; Mro) r; vm & tx; Mm [ Q i Mi > king | srM j iM ; (wire [fa] Q

[0071] Where II and 12 denote the intervals within a switching period, the symbol ] indicates that two states succeed one another within the same interval, the symbol ) denotes a transition between two intervals involving a positive safety time <5, the symbol ( denotes a transition between two intervals involving a negative safety time <5, the symbol O indicates that each arrangement is cyclic, repeating identically from one switching period to another, The notation of type (xy) refers to an intermediate state of duration less than or equal to 2π appearing at the transition between intervals.

[0072] The invention also relates, according to another of its aspects, to a computer program product comprising instructions readable by the processor of a device for the implementation of the process according to the invention.

[0073] The invention also relates, according to another of its aspects, to a matrix AC / AC power converter comprising a matrix of bidirectional current and voltage switches, suitable for being connected at input to a low frequency RST three-phase electrical network LF and at output to an inductive circuit operating at high frequency HF, configured to be controlled by the method according to the invention in order to control the active power P and reactive power Q exchanged with the LF network.

[0074] The invention also relates, according to another aspect, to a DC current source, in particular a battery charger, from a three-phase network comprising: - the converter according to the invention, - a converter controller configured to implement the control method according to the invention. Brief description of the drawings

[0075] The invention will be better understood upon reading the detailed description that follows, the non-limiting examples of its implementation, and upon examination of the accompanying drawing, on which:

[0076] [Fig.1] Fig.1 is a schematic view of an example of AC / DC conversion isolated by an HF transformer implementing an AC / AC converter which is the subject of the invention;

[0077] [Fig.2] [Fig.2] represents different representations of a 3x3 matrix converter;

[0078] [Fig.3] [Fig.3] represents an example of isolated AC / DC conversion implementing a 3x2 matrix converter;

[0079] [Fig.4] [Fig.4] shows an equivalent circuit for one phase of the inductive circuit linking the HF current with the voltages generated by the two converters: (a) general representation without parallel impedance; (b) example of a resonant circuit involving a capacitor in series on one phase;

[0080] [Fig.5] [Fig.5] schematically illustrates a basic system considered with definition of electrical quantities;

[0081] [Fig.6] [Fig.6] schematically represents the shapes of the electrical quantities on either side of a matrix converter: (a) network voltages; (b) switched voltages on the HF side; (c) HF currents; (d) switched currents on the LF side; (e) filtered currents on the network;

[0082] [Fig.7] Figure 7 shows the current curves on the LF side on either side of the LC filter: (a) currents on the network; (b) currents generated by the converter on the LF side; (c) magnification of the network current / ^ with respect to the reference jFEF; (d) magnification of the current Îr with its reference i^F; (e) magnified view showing the shape of Îr and the deviation (grey area) from its reference iFEF',

[0083] [Fig.8] [Fig.8] illustrates the curves of the evolutions of the voltages and currents on the HF side verifying the conditions of soft switching in ZVS;

[0084] [Fig.9] [Fig.9] schematically represents safety margins for ZVS switching during zero crossings of the current;

[0085] [Fig. 10] [Fig. 10] shows an example of safety margins on either side of the zero crossings of the current for switching in ZVS;

[0086] [Fig. 11] [Fig. 11] schematically illustrates the minimum amplitude of the HF currents to construct the reference LF currents;

[0087] [Fig. 12] [Fig. 12] schematically represents the construction of a low frequency (LF) current reference with minimum amplitude of high frequency (HF) currents, including a safety margin on the minimum value of the switched current;

[0088] [Fig. 13] [Fig. 13] illustrates the states of the matrix converter: (a) identification of the three arms; (b) examples of states and their consequence on the currents injected on the LF side;

[0089] [Fig. 14] [Fig. 14] schematically represents the rearrangement and naming of the phases on the LF side of the converter according to a voltage sorting;

[0090] [Fig. 15] [Fig. 16] [Fig. 17] Figures 15 to 17 schematically illustrate an example of a succession of states according to the control principle of the invention;

[0091] [Fig.18] [Fig.19] [Fig.20] Figures 18 to 20 schematically represent successions of states on the scale of the switching period for a period at a low switching frequency;

[0092] [Fig.21] [Fig.22] [Fig.23] Figures 21 to 23 are analogous to Figures 18 to 20 but with a frequency four times higher;

[0093] [Fig.24] [Fig.25] [Fig.26] Figures 24 to 26 show an example of successions of states in a switching period;

[0094] [Fig.27] [Fig.28] [Fig.29] Figures 27 to 29 show another example of a succession of states with ;REF > 0 > > iREE',

[0095] [Fig.30] the [Fig.30] is a representation of the reference currents in the complex plane;

[0096] [Fig. 31] Figure 31 illustrates examples of trajectories in the plane complex over a complete period To: (a) for q > 30°; (a) for q > 70°; (c) for q> = -135°;

[0097] [Fig.32] [Fig.33] [Fig.34] Figures 32 to 34 represent an example of state arrangement in sector XII (verifying i^-F > 0 > î^F > iREF) similar to that of sector I around the intersection between the values ​​of ;REF and jREF; •7

[0098] [Fig. 35] Figure 35 represents all the sectors associated with arrangements of distinct states depending on the position of REF'

[0099] [Fig.36] [Fig.37] [Fig.38] Figures 36 to 38 represent an example involving the A17 arrangement mixing positive and negative safety margins in the same switching period;

[0100] [Fig.39] [Fig.40] [Fig.41] Figures 39 to 41 illustrate an example involving the A10 layout containing only positive margins;

[0101] [Fig.42] [Fig.43] [Fig.44] Figures 42 to 44 show an example involving arrangement A18 with the same sequence of states as that of figures 36 to 38 but arranged differently;

[0102] [Fig.45] [Fig.45] represents the flowchart of a control process according to the invention;

[0103] [Fig.46] [Fig.46] illustrates an example of the angle rp and its limit TpUm;

[0104] [Fig. 47] Figure 47 represents the BF side current curves on either side of the LC filter for a 3x2 converter: (a) mains currents; (b) currents generated by the converter on the audio frequency side; (c) magnification of the mains current 1™ with reference ^F'; (d) magnification of the current Îr with its reference iREF; (e) magnified view showing the shape of Îr and the deviation (grey area) from its reference

[0105] [Fig.48] [Fig.48] illustrates the minimum amplitude of the HF currents to construct the reference LF currents in a 3x2 matrix converter;

[0106] [Fig.49] [Fig.49] represents the construction of a LF current reference with minimum amplitude of HF currents in a 3x2 converter including a safety margin on the minimum value of the switched current;

[0107] [Fig.50] [Fig.51] [Fig.52] Figures 50 to 52 represent an example of successions of states of a 3x2 converter in a switching period;

[0108] [Fig.53] [Fig.54] [Fig.55] Figures 53 to 55 illustrate an example for the 3x2 converter involving positive and negative safety margins θ in the same switching period, and showing transition states; and

[0109] [Fig.56] [Fig.57] [Fig.58] Figures 56 to 58 represent an example for the 3x2 converter involving positive safety margins θ. Detailed description

[0110] Figure 1 schematically illustrates a view of an example of an AC / AC converter 1 according to the invention. This converter 1 comprises a matrix of bidirectional switches 2 in current and voltage, suitable for connection at the input to a three-phase RST electrical network 3 at low frequency LF and at the output to an inductive circuit 5 operating at high frequency HF.

[0111] The inductive stage 5 comprises one or more magnetic components and is implemented either by one or more coils in series, or by connection to a winding of an electrical transformer (whose leakage inductance can act as a series coil), or by a combination of both (coil and transformer). If a transformer is present, it typically provides galvanic isolation between one or more primary windings and one or more secondary windings, forming magnetically coupled coils. The terms primary and secondary are interchangeable (a transformer being inherently reversible), and the convention adopted here is to designate the winding(s) connected to the aforementioned AC / AC converter as primary.In this case, the secondary is usually connected to another converter 4, for example of type AC / DC so that the assembly formed by the first converter (AC / AC), the magnetically coupled inductive circuit (transformer), and the second converter (AC / DC), achieves overall an AC / DC function with galvanic isolation.

[0112] (provided by the HF transformer).

[0113] Figure 1 illustrates such an association including a three-phase inductive circuit 5. However, the invention focuses on the control of the first converter 1 (grey part). The inductive circuit 5, as well as the second converter 4 (including its (nature AC / DC or AC / AC) may differ from the examples shown in this figure.

[0114] In the following, the low frequency will be identified by the variable f0 and the high frequency by fsw (the subscript "sw" referring to "switching" frequency). Indeed, a particularity justifying the notation fsw is that the invention relates to a specific operating mode on the HF side, classically called "full wave." This means that the frequency of the alternating current(s) in the inductive stage is also equal to the frequency of the on / off state change (switching) of the power semiconductor components (also called power switches).This operating mode allows us to take advantage of the changes in sign of the current within a switching period to perform smooth switching, which drastically reduces switching losses in order to both increase efficiency, decrease thermal stresses, and increase the switching frequency (which allows us to reduce the volume of passive components - coils and capacitors).

[0115] The converter considered 1 performs a direct AC / AC conversion, i.e., without an intermediate storage stage (inductive or capacitive). In the scientific literature, such an AC / AC converter is commonly called a "matrix converter" because it consists of a matrix of equivalent power switches (associations of transistors and possibly four-segment diodes, i.e., bidirectional in current and voltage). In the case where the AC networks on both sides of the converter are three-phase, [Fig. 2] shows equivalent representations of the converter, displaying a "3x3 matrix" of switches (3 phases on the LF side and 3 phases on the HF side). Other configurations are possible, such as a 3x2 matrix converter if the inductive circuit on the HF side is single-phase (i.e., 2 wires), as illustrated in [Fig. 3].

[0116] In the configuration of the invention, the matrix converter is connected on the RF side to an inductive circuit, which therefore behaves as a current source. Consequently, it must be connected to a voltage source on the RF side, implemented by capacitors. On a three-phase network, these capacitors can be connected in delta (between phases) or star (forming a capacitive neutral point, known in English as a "star point"). These configurations are equivalent from the point of view of the invention.

[0117] According to this configuration, the switching of the matrix converter allows the electrical potentials of the voltage source (LF side) to be applied to the phases of the inductive circuit on the HF side. Conversely, the currents of the inductive circuit (HF side) are found on the phases of the LF network depending on the on / off states of the switches. of the converter's power. This is referred to as voltage switching on the HF side and current switching on the LF side.

[0118] It is specified that the time-domain shape of the HF alternating current(s) in the inductive circuit depends on:

[0119] - the AC voltage applied on the HF side by the first converter;

[0120] - the AC voltage controlled by the second converter;

[0121] - the impedance of the inductive circuit between the two (at the switching frequency and its harmonics).

[0122] Figure 4a shows a simplified phase-dependent equivalent circuit, where iHF corresponds to a current on one phase of the inductive circuit (iA, iB, or ic in the example in [Fig. 1]), vi represents an AC voltage HF applied by the first converter (related to potentials A, B, C in [Fig. 1]), and v2 represents an AC voltage HF imposed by the second converter (related to potentials A', B', C' in the same example). In this case, the instantaneous voltage vind seen on one phase by the inductive stage is, at each instant t, the voltage difference vind(t) = vft) - v2(t). In steady state, its Fourier series decomposition leads to frequency components with fsw and its multiples. For each frequency f, the current IHF satisfies:

[0123] [Math 1]

[0124] ZHF( / ) x Iw(f) = Vind( / ) = 7,( / ) - V2(f)

[0125] Where 7ind, ZHF and Zhf(t) are complex numbers at the considered frequency. The inductive circuit results in ZHF approaching a purely imaginary number that increases with frequency for sufficiently high frequencies (above fsw). In this case, / m is a consequence of the voltage difference 7ind and the frequency evolution of the impedance ZHF, and the resulting time-domain shape of the current / m(t) is:

[0126] - controllable (by controlling the converters allowing a voltage to be imposed) 7ind (t) adequate and at the desired frequency);

[0127] - devoid of discontinuities (by virtue of the inductive nature of the circuit, modelable (by any impedance in series with a coil).

[0128] It is assumed in the following that the voltage 72(t) imposed by the second converter always allows the fundamental (at fsw) of the voltage 7ind (t) to be adjusted according to equation (1), and therefore the fundamental of the current / m (t).

[0129] Moreover, an approximation to the fundamental of this current makes it possible to neglect its harmonics and reduce the analysis to the sinusoidal component at fsw, which has the most significant impact on the power transfer.

[0130] Indeed, at a given voltage excitation, current harmonics attenuate rapidly in an inductive circuit, because its impedance increases with frequency. Furthermore, a quasi-sinusoidal current at fsw can be obtained when the inductive circuit is made resonant, typically by adding capacitors in series with the magnetic components (example in Figure 4b) so that fsw is close to the circuit's resonant frequency. It should be noted that even in this case, the circuit can still be described as such, because the magnetic component(s) exhibiting the behavior of a series coil are still present.

[0131] (The impedance might then no longer be inductive at the fsw frequency, but it would become so again at higher frequencies). Finally, the exact time shape of the HF current is not a decisive factor for the application of the invention; the prerequisite is simply that this current exhibits a positive half-cycle and a negative half-cycle, allowing the zero crossing to be identified, which will serve as a reference point for controlling the converter by ensuring smooth switching. Thus, without loss of generality, the figures presented below will show sinusoidal HF currents in the inductive circuit.

[0132] One objective of matrix converter control is to control the active power P and reactive power Q exchanged with the low-frequency AC network, the latter typically imposing a sinusoidal voltage at 50 Hz (f0) for the French electrical grid. Consequently, power control amounts to drawing or injecting, on each phase of this network, a reference current determined to satisfy the required power references P and Q. This current is typically sinusoidal at the same frequency as the voltage. However, it has been previously stated that the current injected by the matrix converter on the low-frequency side phases depends on the states of the switches and the high-frequency currents of the inductive circuit.This current, produced on the LF side by the converter, is therefore composed of different portions of the HF currents which will trace, as will be shown later, a certain time pattern during a switching period Tsw = l / fsw, depending on the succession of states of the matrix converter switches during this period. The current produced by the converter to the network therefore contains frequency components at the frequency fsw and its multiples, in addition to an LF component (at f0) which follows its reference to satisfy the power requirements. Consequently, obtaining sinusoidal currents on the network corresponding to their reference at the frequency f0 requires:

[0133] - a filtering function to remove frequency components from the network at f SW and beyond;

[0134] - a control of the currents injected by the converter on the LF side so that the current filtered has at each instant the correct value corresponding to the reference BF at f0.

[0135] A low-pass filter is therefore useful between the matrix converter and the LF electrical network, in order to attenuate switching harmonics (fsw and beyond) and only allow the low-frequency (LF) component (at f0) to flow to the network. Such a filter is typically of the LC type, therefore comprising:

[0136] - a capacitive part (C) placed in parallel on the phases on the LF side of the converter matrix, offering a low impedance path at high frequencies which promotes the feedback of frequency components at fsw and beyond, these can then remain confined to this point without propagating towards the network. Conversely, the impedance of this capacitive part is high for the LF component at f0 which is therefore not impacted;

[0137] - an inductive part (L) placed in series between the capacitor(s) and the network BF electric.

[0138] The corresponding impedance is low in BF, allowing the current component at f0 to circulate to the network. Conversely, the impedance is high at high frequencies, opposing the propagation of components above fsw, which will thus remain all the more confined to the capacitive part of the filter.

[0139] This LC filter 6 is identified in [Fig. 1], between the network 3 modeled by three voltage sources and the matrix converter 1 on the LF side. It can be noted here that the capacitive part of the filter, directly connected to the converter, constitutes the voltage source ensuring the alternation of the sources with the inductive circuit 5 HF on the other side of converter 1. The inductive part of the filter, for its part, is further upstream and only plays an additional filtering function.

[0140] On the scale of a switching period Tsw (very short compared to the network period To = l / f0), the average current value in Tsw corresponds to the reference current value at that instant. Indeed, this average value is not, or only slightly, altered by the LC filter and will be found on the network. From one switching period to the next, the average value in Tsw will gradually evolve with a slow periodicity (To), producing a low-frequency alternation and allowing the synthesis of the reference current. A key challenge in the converter control is therefore to ensure that, at each switching period, the pattern formed by the portions of HF current injected on the LF side has an average value equal to the LF current reference. This point will be discussed further below.

[0141] Figure 5 shows the system under consideration where the BF electrical network is represented by three voltage sources (the internal impedance of the network is not shown). For a balanced sinusoidal three-phase network (for simplicity, but the invention does not impose any constraints regarding the harmonic distortion or imbalance of the network), the time-domain expression of the network voltages satisfies (for a direct cyclic order and fixing the phase origin for R, without loss of generality):

[0142] [Math.2] «') = (2^ / ) ^sn^ ) ( 27rf Q t - ) v^v ( t ) = Vsin ( 27Tf(^ - Ÿ )

[0143] where y is the amplitude of the line-to-neutral voltages of the network. In this case, the control of active and reactive power amounts to defining the amplitude / of the network current setpoints as well as the phase shift q> between current and voltage:

[0144] [Math.3] i^ F (t) - isin( - (p) i FEF (t) = Isin(Inf J-(p-Ÿ ) i^EF ( t ) = Isin ( 2æ / ^ - - t )

[0145] The currents i^F iEEF' i^F are "reference currents" on the network and are assumed to be known at every instant (even if they do not form a perfectly balanced sinusoidal network as in equation (3)). The converter control must therefore ensure that the currents iR, is, iT generated by the matrix converter (a function of the HF currents and the control of the power switches) allow, via the LC filter, the production on the network of currents i™, i™'\ ™ which follow their references i^EF, i^EF■ lR lS lT

[0146] Figure 6 shows the time-domain waveform of the voltages and currents on either side of the matrix converter. The triplets of electrical quantities are labeled in a grouped form: for example, v(R → si) denotes the vkN for ke {R, S, T], or i(A → bi cj) the currents ik for ke {A, B, C}. In Figure 6, the voltages v(R → si) at the input of the matrix converter are assumed to be similar to the network voltages ^^sy^y and form a balanced sinusoidal three-phase network (Figure 6a). In practice, the invention can be applied identically even if these characteristics are not perfectly met (presence of harmonics, slight phase shift introduced by the filter, etc.).

[0147] Strictly speaking, a common-mode voltage may be present, composed, for example, of voltage pulses with a zero average value and supported by the LC filter coils (a consequence of converter switching and possible earth connections in the conversion chain, including an EMC filter). In the general case, it would then be necessary to distinguish the neutral potential N appearing near the matrix converter in [Fig. 6] from the network neutral (also N) appearing at the connection point of the three AC voltage sources. in [Fig.5]. We could then name N' the local neutral potential at the level of the matrix converter, satisfying at each instant vRN , + vSN ' + vTN , = 0. To avoid unnecessary overloads, we retain in the following the single-point notation N, which does not entail any loss of generality (we could always replace the v(R → si tîn and v(aibic}n by v(risit}n' and v(A → B → c}n' in what follows).

[0148] The matrix converter control produces voltages v(A i B ic}n cut on the HF side of the converter, shown in Figure 6b. The interaction of these voltages with the control

[0149] of the second converter 4 (shown in Figure 1) produces the HF currents i(A → B → O) shown in Figure 6c, and assumed to be sinusoidal during a switching period. Similar to the switching of the voltages on the HF side, the switching operations imposed by the matrix converter control induce a switching of the currents on the LF side, producing the currents i(R → si tj shown in Figure 6d and clearly exhibiting an LF component at f0 (positive and negative alternations are distinguishable) and rapid HF variations (at fsw) consisting of portions of the HF current curves. The HF components are then rejected by the LC filter so that the current on the network ï^Svïj retains only the LF component (Figure 6e) corresponding to the desired current references (in equation (3), apart from imperfections in the LC filter).

[0150] Assuming perfect filtering where only high frequencies (fsw and above) are altered by the LC filter (these frequency components not appearing on the network side), the synthesis of reference currents amounts to ensuring that at each instant t, the average value of the currents ik (with ke {R, S, T}) in a small window of width Tsw around the instant considered is equal to the corresponding reference current j^EF that we seek to obtain. This is referred to as sliding averaging, denoted or more simply (ï*), considering that the averaging window implicitly corresponds to the switching period Tsw:

[0151] [Math.4] VH ke {RS, T ) ( i t ) ( t) = i^ F (t)

[0152] Note: in practice, if the filter slightly alters the LF component at f0, typically causing a small phase shift of the currents between upstream and downstream for example, it is still possible to define reference LF currents qUj which, after filtering, allow the desired results to be obtained.

[0153] Figure 7a-b shows the currents obtained on the network after filtering the currents i(R → si tj) generated by the converter on the LF side. The currents are essentially identical on the three phases R, S, T (with simply a shift) (temporal, one-third period T0), a single phase is sufficient for the analysis. Thus, Figure 7c-d shows a magnified view of the current closely following the reference, as well as the current iR generated by the matrix converter. A further magnified view of iR is presented in Figure 7e, showing that this current consists of portions of the HF current curves (iA, iB, ic, as well as their opposites and the zero value). Moreover, it appears that the current iR oscillates around its reference, as revealed by the shaded gap between these two currents, so that the average value of iR over a small time interval corresponds to iEF-.

[0154] Thus, an objective of the invention is to control the matrix converter so that the currents i(R । si tj follow their references this BF component then being found on the network currents via the LC filter.

[0155] Switching in power electronics relies on controlling a transistor in conjunction with a diode, forming a "switching cell" that interfaces a voltage source (capacitor) with a current source (inductor). There are two types of switching of this kind, described below in a simplified manner:

[0156] - Turning on: also called switching on the transistor, which consists of switching a The transistor switches from the off state to the on state. When current first flows through the diode in the switching cell, the initially off transistor carries the full voltage of the capacitor and carries no current. When the transistor turns on (by applying a gate voltage), the current flowing through it increases (reducing the proportion of current flowing through the diode) until it reaches the value of the current in the inductor. At this instant, the diode no longer carries current and turns off spontaneously. The voltage across the transistor then decreases to a small value (voltage drop in the component's on state), marking the end of the switching. This switching process is the source of instantaneous power losses, resulting in energy lost during this turn-on, commonly referred to as Eon.

[0157] - Blocking: also called transistor turn-off, which consists of switching a transistor from The transistor switches from the conducting (on) state to the blocking (off) state. When current is initially flowing through the transistor, the voltage across its terminals is initially low, and the diode in the switching cell carries the entire voltage of the capacitor without conducting any current. When the transistor is switched off (again, via its gate voltage), the voltage across its terminals begins to increase (reducing the voltage across the diode accordingly) until it reaches the voltage across the capacitor. At this point, the voltage across the diode drops to zero and changes polarity until it reaches its threshold voltage, spontaneously turning the diode forward. The current in the transistor decreases. then down to a negligible value, marking the end of the switching. This process is also the source of instantaneous power losses leading to energy lost during this turn-off, commonly called Eoff.

[0158] For the same switched current, the switching losses Eon are generally much greater than the blocking losses Eoff. However, thanks to the "full wave" operation of the matrix converter on the HF side, the current changes sign and exhibits positive and negative alternations at each switching period.

[0159] This feature can be exploited to avoid on-off switching, and thus only incur Eoff losses during switching. In this case, each blocking of a transistor (let's call it the first transistor) is followed (after a short dead time) by the turn-on command of the complementary transistor (let's call it the second transistor), which is located in parallel with the diode forming a switching cell with the first transistor. According to the blocking mechanism described above, this diode conducted current immediately after the first transistor was turned off, so that the voltage across it, and therefore across the second transistor, was very low (negligible) when the second transistor turned on. Thus, the switching to the "on" state of the second transistor occurs at zero voltage (zero-voltage switching: ZVS) and avoids the mechanism described above, which induced Eon losses.This is referred to as "soft switching," as opposed to "hard switching," which corresponds to the simplified descriptions at the beginning of this subsection. In reality, this involves turning on the second transistor even though it's not (yet) necessary, since current could flow through the parallel diode. However, because this principle is linked to the fact that the current changes sign during the switching period, the second transistor is thus turned "on" in anticipation of the next change of sign in the current. Consequently, the current will no longer be able to flow through the diode but will instead find a path through this second transistor, which is already prepared to carry the current in the opposite direction.Through the interplay of positive / negative current alternations, the previously described roles of the first and second transistors are then reversed, so that the next conduction of the first transistor is also a soft switching in ZVS (after the second transistor is blocked).

[0160] The preceding textual description corresponds to classical techniques which do not need to be detailed further here. It can be adapted to a 3x3 matrix converter, for example, by focusing on the switching cells activated according to the instantaneous signs of the switched voltage and current.

[0161] The important points are:

[0162] - the consequence: working with soft switching drastically reduces losses By switching, efficiency is increased and a higher switching frequency is allowed, which is beneficial for the sizing of passive components (magnetics and capacitors) in the conversion structure. This allows for better energy efficiency and space savings, as these components (especially magnetics) are typically the bulkiest. It should be noted that heat sinks are also bulky systems, and soft switching, by reducing losses, also allows for gains in this area through the reduction of thermal stresses.

[0163] - Implementation: To ensure smooth switching conditions in ZVS, it It is sufficient to ensure compliance with a simple rule regarding the signs of voltage and current changes during switching. This rule is stated below.

[0164] Rule to be followed for switching in ZVS

[0165] For the matrix converter under consideration, the quantities to be taken into account are:

[0166] - the HF-side potentials of phases A, B, C, or (equivalently) the cut voltages v(A । B i cîn if we consider the neutral point (BF side) serving as a potential reference to express these voltages;

[0167] - the HF currents defined for the sign convention as "outgoing" from the converter on phases A, B, C. Therefore, it is i(A । bi cj-

[0168] The "on" or "off" state changes of the converter switches lead to potential variations on the phases on the HF side, so that the voltages v(A B ic}n evolve in steps with steep transitions in the positive direction (voltage rise) or negative direction (voltage fall) at the time of switching.

[0169] Knowing the direction of voltage variation, the type of switching involved (on-action or blocking) can be determined according to Table 1.

[0170] [Tables] Increase in v kN, decrease in v kN, ik > 0, conduction activation, blockage, ik < 0, blockage, conduction activation

[0171] Therefore, the elimination of conduction switching, and thus the implementation of soft switching in ZVS, can be achieved by respecting the following rule for each phase ke {A,B,C]:

[0172] - if the current ik is positive (outgoing), the phase potential k (or the voltage vkN) must decrease during switching

[0173] - if the current ik is negative (incoming), the phase potential k (or the voltage vkN) must rise during switching.

[0174] Figure 8a shows the voltages and currents on the RF side of the converter, with a time-domain enlargement in Figure 8b. Since the three phases exhibit similar behavior, only phase A is studied here, with curves that are more pronounced than the other phases for Van and iA. The gray half-planes in the current graph allow us to identify the sign of iA and to verify that each rise in Van voltage occurs when the current iA is negative, while each fall in Van voltage occurs when the current iA is positive. Thus, all the state changes visible in this figure comply with the rule stated above and involve exclusively turn-off switching, which confirms the application of smooth switching in ZVS in all cases for this example.

[0175] An objective of the invention is therefore to conform to this mode of operation in all situations, regardless of the position in the period of the network and regardless of the phase shift between network currents and voltages.

[0176] Figure 9 illustrates the situation shown in Figure 8b, focusing on switching operations involving a current iA close to the sign change. It is crucial that the current sign be precisely controlled at the time of switching, and therefore that its value be avoided being too close to zero at the time of switching. Furthermore, even with the correct sign as described in the preceding paragraph, an insufficient current value would lead to slow blocking switching, which might not have time to complete during the dead time. In this case, the second transistor mentioned above would only turn on under reduced voltage, but not truly in ZVS (zero-voltage switching), and would therefore result in unexpected Eon losses.Finally, this conduction in ZVS requires that the current not have changed sign during the dead time: in the case where the switching occurs just before a change of current sign, this imposes a time margin at least equal to the value of the dead time between the instant of switching and the instant of the current sign change. This is the situation encountered in [Fig. 9], where the low-current switching instants, marked by blue markers on the iA curve, occur just before a sign change. A safety time, denoted δ, is then introduced to ensure that the switching occurs below a sufficient current value and with a sufficient time margin.

[0177] This constraint is commonly encountered in systems operating with soft switching. It is not a specific feature of the invention but must be taken into account. Thus, the value of θ is an adjustable parameter in the proposed control. It can be defined in time (seconds), or in angle after normalization by the switching period (2πr or 360° corresponding to a period T). -1- SW / *

[0178] It is important to note that θ is negative in the example in [Fig. 9] because the low-current switching occurs just before the sign change of iA. However, other situations may arise: it may be positive (if these switching occurs just after the sign change), or even that during a switching period, one switching occurs just before the sign change, and another just after. This latter situation is illustrated in the example in [Fig. 10], where some low-current switching occurs just before, and others just after, the sign change. Thus, θ can be positive or negative, depending on the circumstances.

[0179] Generally, this parameter is at the designer's discretion and depends in particular on the characteristics of the semiconductor components used: there is no absolute rule for deciding its value. In the following examples, an arbitrary value is therefore used (between five and ten degrees), identical in absolute value for all low-current switching operations, although this is not strictly necessary. It is important, however, to specify when this value should be positive or negative depending on the time at which the switching occurs relative to the zero crossing of the current.

[0180] Another aspect of the invention is related to minimizing the effective value of the HF currents (and therefore their amplitude for sinusoidal currents) in order to reduce power losses related in particular to the flow of current in the Semiconductor components (primarily conduction losses). However, The amplitude reduction of HF currents is limited by the value of the largest reference in absolute value among the BF currents to be constructed &rEncflcl- As mentioned previously and shown in Figure 7e, the currents i(Ri) if tj are composed of portions of the HF current curves (as well as their opposites and possibly the zero value). Assuming three-phase HF currents of amplitude The forming a balanced network, six HF current values ​​are available at any given time: iA, iB, ic, and their opposites -iA, -iB, -ic. Therefore, the The maximum current attainable from portions of the HF current curves is obtained from the maxima at each instant of these currents, tracing a time-domain arc (maximum envelope of all HF currents and their opposites) whose average value over a switching period is IHF x 3 / n. Thus, to construct current references whose largest absolute value is 1 at a given instant, it is necessary to have HF currents whose amplitude IHF is at least equal to IHF x 3 / r at that instant.

[0181] At each instant within the period of the LF network, a certain minimum amplitude of the HF currents is therefore necessary. It is also sufficient to construct the set of reference currents since the largest of these currents (in absolute value) can be obtained from this amplitude, and the other two are necessarily smaller and can also be synthesized as will be shown later. From this perspective, it is unnecessary to use higher amplitude HF currents, which would have the major drawback of increasing conduction losses in the semiconductor components. It is therefore desirable to keep the amplitude of the HF currents at the minimum value necessary to synthesize the largest possible reference current in absolute value.

[0182] The restriction of the amplitude of the HF currents to the strict minimum is observable in Figure 11, which shows the HF currents i(A → bi cj) and their opposites (6 HF currents in total), as well as the three current references. The enlarged view of the area where The largest reference shows the construction of the corresponding current iR, from the peaks (maxima) of the six HF currents. The amplitude of the HF currents is thus modulated to follow the largest reference in absolute value. It can be noted that this is sometimes positive, sometimes negative, and corresponds to the reference that has the opposite sign to the other two; it is identified by the areas circled in [Fig. 11].

[0183] In reality, Figure 11 is obtained without the time offset δ ensuring the safety margin for ZVS switching. By introducing this offset, Figure 12 is obtained. The circled areas show slight differences, including in the upper maximum portion an iR shape with more pronounced peaks towards the bottom (one could say “notches”), because the change in the curve portion no longer occurs at the exact moment of the crossovers as in Figure 11. This results in a lower average value (r)Tsw for the same amplitude of the HF currents; in other words, the amplitude of these HF currents must in practice be slightly higher than in the ideal case to allow control of the ZVS switching. This observation does not change the general principle, which preferentially seeks to minimize the HF currents circulating in the inductive circuit, and therefore to adapt their amplitude according to the largest reference LF current in absolute value.It is simply concluded here that this amplitude is related to the parameter θ.

[0184] In the following, it is considered that the HF currents have, for a fixed value of θ, the minimum amplitude required to synthesize the largest LF reference current.

[0185] Figure 13a reproduces the representation of matrix converter 1 used in [Fig. 5], and identifies three "arms" associated with phases A, B, C on the HF side, each containing three equivalent power switches. The relevance of these groupings stems from the nature of the sources:

[0186] - on the HF side, the inductive circuit constitutes the current source of the converter, which does not must not be open circuit. Therefore, for a given phase A, B, or C, at least one switch on the corresponding arm must be conducting (on);

[0187] - on the BF side, the filter capacitors constitute the voltage source of the converter, which must not be short-circuited between phases. Therefore, for a given arm A, B or C, it is not permitted to turn on more than one switch (if two are "on", a short circuit between the two corresponding phases R, S, or T would occur).

[0188] It follows that for each arm A, B, or C, one and only one switch on the arm must be "on" at all times (the other two necessarily being "off"). Each arm thus connects the phase A, B, or C associated with exactly one phase R, S, or T. Defining the state of the arm therefore amounts to identifying to which of these phases it is connected. Consequently, the state of the complete converter is defined by the states of each of its three arms and can therefore be written using the notation: <state arm A> <state arm B> <state arm C>

[0189] For example, the notation “RST” means that phase A is connected to R, phase B to S, and phase C to T.

[0190] Figure 13b gives some examples of complete converter states and their effect on the resulting low-frequency (LF) currents. The representation used for the matrix converter is further simplified, showing only the actual connections made by the power switches in the "on" state, using square markings at the intersections between phases A, B, C on the one hand, and R, S, T on the other. Thus, the four example configurations shown are as follows:

[0191] “RRR” state: the switches in the conducting state connect each of the phases A, B, C on the HF side to the same phase R on the LF side. In this case, phases S and T are not connected, and the respective currents is and iT are naturally zero. Consequently, the current iR is also zero, due to the zero sum of the currents on the phases on both the LF and HF sides.

[0192] "RTS" state: in this state, each phase on the HF side is connected to a different phase on the LF side: A with R, B with T, and C with S. This results in a direct injection of the HF currents redistributed on the phases R, S, T with iR = iA, is = ic and iT = iB.

[0193] "RSS" state: In this case, one phase BF(T) is not connected, implying iT = 0. Phase R is connected only to phase A, leading to iR = iA. Phase S is then connected simultaneously to B and C, and thus sees the sum of their respective currents. By virtue of equation (5) below, this also corresponds to the opposite of the current in phase A, leading to is = -iA (which also verifies that the sum of the currents i(R ∩ T) is zero).

[0194] State "TST": this case is similar to the previous one, with R not connected, S connected to B, and T connected simultaneously to A and C, leading to iR = 0, is = iB, and iT = -iB.

[0195] Note regarding the sum of the currents: the system shown in [Fig. 5] does not include a fourth conductor in the converter's operation. Therefore, there is no return path for any component of the current flowing in the same direction on all three phases. Consequently, the sum of the three currents is zero on both sides of the converter.

[0196] [Math 5]

[0197] iR + is + ii = 0

[0198] iA + iB + ic = 0

[0199] It follows from the above that each current on the BF side i(R । si tj is equal to at any instant Either one of the currents i(A → B i in s°it, its opposite, or zero (therefore 7 possible values). This result was mentioned previously and is justified here. The assignment of one of the seven possible current values ​​to iR, is, and iT thus depends on the state of the complete converter, which has 3 arms (A, B, C) each of which can take 3 states (R, S, or T). The total number of state combinations for the three arms is then 33, which leads to 27 possible states for the matrix converter. These states are listed in Tables 2 to 4 below with their impact on the currents i(R → B i in s°it injected on the LF side.

[0200] [Tables2] current arm ABC z'R zS zT RRR 0 0 0 RRS -zC zC 0 RRT -zC 0 zC RSR -z'B z'B 0 RSS z'A -z A 0 RST z'A z'B zC RTR -z'B 0 z'B RTS z'A zC z'B RTT z'A 0 -z'A

[0201] [Tables3] current arm ABC z'R zS zT SRR -z A z'A 0 s RS z'B -z'B 0 s RT z'B z'A zC s SR zC -zC 0 ss S 0 0 0 ss T 0 -zC zC s TR zC z'A z'B s TS 0 -z'B z'B s TT 0 z'A -z'A

[0202] [Tables4] current arm ABC z'R zS zT TRR -z A 0 zA TRS z'B zC zA TRT z'B 0 -z'B TSR zC z'B zA TSS 0 -z'A zA TST 0 z'B -z'B TTR zC 0 -zC TTS 0 zC -zC TTT 0 0 0

[0203] It is possible to order the voltages v(R s tîn) according to a sorting by voltage value at each instant, and to give them a specific name. Thus, the following notations will be used:

[0204] M (capital letter): for “MAX”. This designation will refer to the phase among R, S, or T, which has the greatest electrical potential (in other words, the maximum voltage v^).

[0205] m (lowercase): for “min”. This designation will refer to the phase among R, S, or T, which has the smallest electrical potential (in other words, the minimum voltage vkN).

[0206] i (lowercase): for “int”. This designation will refer to the remaining phase among R, S, or T, whose electrical potential is therefore between the two preceding ones (in other words, corresponding to the intermediate voltage vkN).

[0207] Consequently, the currents i{RISIT] can be renamed according to the preceding notations, so that:

[0208] - iM denotes the current (among iR, is, iT) flowing in the phase of highest potential (M)

[0209] - im denotes the current (among iR, is, iT) flowing in the phase of lowest potential (m)

[0210] - i; denotes the current (among iR, is, iT) flowing in the potential phase intermediate (i)

[0211] A visual representation is provided in [Fig. 14] which shows a "voltage sorting" block that can be conceived as a selector reordering the R, S, T phases from highest to lowest potential. Thus, the converter states and the currents injected into the phases on the LF side can be expressed using the notation "M,i,m" rather than "R,S,T", which will subsequently allow a generalized description of the control method that naturally adapts to all LF potential scheduling configurations.

[0212] Some examples are given below:

[0213] "MMM" state: phases A, B, C on the HF side are all connected to the one among R, S, T that has the greatest potential. The injected currents on the LF side are all negative.

[0214] State "mMi": phase A is connected to the one among R, S, T that has the lowest potential; phase B to the one with the highest potential; and phase C to the one with intermediate potential. The current, among i(R ≤ si tj), flowing in the phase with highest potential (and therefore renamed iM) is iB; that in the phase with lowest potential (im) is iA, and that in the phase with intermediate potential (i;) is ic.

[0215] State "imm": phase A is connected to the phase among R, S, T that has the intermediate potential; phases B and C are both connected to the phase with the lowest potential. The current, among i(R ≤ tj), flowing in the phase with the highest potential (therefore denoted iM) is zero because this phase is not connected; the current in the phase with the intermediate potential (i) is iA, and the current in the phase with the minimum potential (im) is therefore -iA. Consequently, the 27 possible configurations, according to the notation of the type "M,i,m", are listed in Tables 5 to 7 with their impact on the currents thus renamed iM, i15 and im.

[0216] [Tables5] current arm ABC z'M zi zm MMM 0 0 0 MM i -zC zC 0 MM m -zC 0 zC M i M -z'B z'B 0 M ii z'A -z A 0 M im z'A z'B zC M m M -z'B 0 z'B M mi z'A zC z'B M mm z'A 0 -z A

[0217]

[0218] [Tableauxô] current arm ABC zM zi zm i MM -z'A z'A 0 i M i z'B -z'B 0 i M m z'B z'A zC ii M zC -zC 0 iii 0 0 0 iim 0 -zC zC im M zC z'A z'B imi 0 -z'B z'B imm 0 z'A -z'A [Paintings?] current arm ABC zM zi zm m MM -zA 0 z'A m M i z'B zC z'A m M m z'B 0 -z'B mi M zC z'B z'A mii 0 -z'A z'A mim 0 z'B -z'B mm M zC 0 -zC mmi 0 zC -zC mmm 0 0 0

[0219] Figures 15 to 17 show an example of successive states of the converter in only a portion of the low frequency period (To) showing about ten HF periods (Tsw).

[0220] Note: It should be noted, however, that the switching frequency fsw is chosen to be very low compared to the BF frequency at f0, to facilitate the visualization of electrical quantities and the understanding of the explanations. In a real system, the switching frequency could be on the order of 100 times that used in these examples, which would lead to a correspondingly increased number of switching cycles and states (and therefore also to illegible figures).

[0221] Figure 15 and the upper graph of Figure 16 show the slowly evolving voltages v(Risit) and the voltages v(AiBi)n, which exhibit repeated cycles at the switching frequency. It can be observed that at any given instant, each voltage v(Aibin) is equal to one of the voltages v(Risitin), due to the converter's switching, which always connects a phase A, B, C on the HF side to one of the phases R, S, T on the LF side. The lower graph of Figure 16 and Figure 17 represent the six HF currents (i(Aibic) and their opposites), the three LF current references, with different line styles (as in [Fig. 12]), and the three currents i(Risit) associated this time with gray filling from zero to clearly identify the different curves. In the intermediate zone of the [Fig.16], the instantaneous states of the complete converter (i.e. the three arms, noted here from top to bottom for reasons of space), are entered according to the two formats previously described: in the form “R, S, T” and in the form “M, i, m”. .

[0222] As a reminder, the purpose of the process of the invention is:

[0223] - to systematically define the states to be applied successively for construct the reference BF currents as specified above, regardless of the values ​​of these references and a fortiori the phase shift q> between the voltages v{R । si tjn and the low frequency currents, which guarantees the possibility of consuming or supplying both active and reactive power;

[0224] - to ensure smooth switching in ZVS for all conduction starts, as detailed above, this allows for high efficiency and a compact converter due to the reduction of losses and the size of passive components;

[0225] - to avoid the use of unnecessarily large HF currents, as mentioned above previously, with the aim again of limiting losses and enabling high yield and compactness.

[0226] The operation of the proposed control satisfying these requirements is shown later, focusing on a single HF period (i.e., the switching period T 1 -1- SW / *

[0227] The switching period (Tsw) is the most important time unit for studying the converter control. Indeed, it is the site of a complete revolution cycle of the converter states, which is then repeated with minor changes from one period to the next to take into account the variations of the LF references, knowing that the latter are slow compared to the switching period.

[0228] In this regard, it can be recalled that the actual switching frequency of the device is typically much higher than what is shown in the figures, so that the BF references do not have time to evolve significantly during a single switching period.

[0229] Note: In fact, it is common practice in power electronic converters for the references (or modulating signals in pulse-width modulation carrier control methods) to be fixed during one or more switching periods. That is, their value is sampled at the beginning of a period and is only updated at the beginning of another period. On the one hand, this process generally has little impact on control performance since their variation from one period to the next is small. This is particularly the case in the structure studied here since the soft-switching operation allows for a high switching frequency. On the other hand, it is often a necessity related to the measurement acquisition times and the computation times required in the digital systems that execute the control algorithms (microcontroller, DSP, etc.).before determining the next reference value to apply. Furthermore, it is sometimes desirable to complete a period already underway before updating the references, to avoid erratic switching during reference changes mid-period, particularly in carrier modulations (or sometimes updates are permitted at very specific points within the period for the same reason). This is therefore a common practice, but one that is often neglected in converter simulations due to its minimal functional impact and the resulting discretized curves, which do not facilitate the reading and understanding of the results. Thus, in this description, the results presented come from simulations that do not require such reference discretization, while recognizing that a real-world implementation would certainly make use of it.In any case, it should be remembered for the remainder of this discussion that the references change little, if at all, within a switching period, and that it is therefore possible to consider them constant on this time scale.

[0230] In the left part of Figure 16, a series of states is shaded. The duration The corresponding value is precisely one switching period, and a magnified view. of this single period is shown in Figures 18 to 20. A slow variation of references •REF l{RvSvT} can still be observed in the figure, due to the low frequency switching, as mentioned previously (fsw = 2.5 kHz for f0 = 50 Hz) (in this example). By visualizing the same time interval with a switching frequency four times higher (10 kHz) in Figures 21 to 23, we observe the reduction in the switching period (still shaded gray), and naturally, the smaller change in the reference values ​​during this shorter period. This configuration will be used subsequently, bearing in mind that the actual switching frequency can reach several hundred kilohertz, leading to near-constant reference values ​​during the switching period, even without sampling.

[0231] Thus, Figures 24 to 26 present the succession of states in a switching period, annotated with markers indicating the width of the switching period and the zero-crossing times of the HF currents (vertical lines and black marks) which delimit six intervals within a switching period, named II to 16 on [Fig.26],

[0232] In this example, the largest reference in absolute value is î^F, which is positive, while the other two are negative. Thus, the iT curve has a pattern repeated six times during the period, consisting of the maxima of all the HF currents (including their opposites), except for the notches at the boundaries of the intervals related to the safety margin ô already mentioned previously. For the other two references, is slightly negative, so iR is simply made up of three small portions of negative curves of the HF currents close to zero. As for iFEF, it is more negative, and is consequently made up of portions of curves with larger values ​​in the negative range.

[0233] It is important to note that the changes of state associated with each "jump" of the current curve are also linked to variations in the voltages v(A B i en and that each of these voltages takes successively, within the switching period, each of the three values ​​of the voltages v(R si tj- Thus, the arms of the converter all switch three times in the period, leading to a total of 9 switching, and therefore 9 distinct states that the complete converter will have to take during a switching period.

[0234] The 9 states of the converter are shown in [Fig. 25], and begin the switching period identified in gray by the state “TST”, meaning that arms A and C are both connected to phase T, while B is connected to phase S. Observation Voltage curves trivially confirm this, since vAX and vCN are both equal to vTN at this instant, while vBn is then superimposed on vSN- The other 8 states are verified in the same way.

[0235] In the “M,i,m” type notation, the voltages must first be ordered, and it appears during this switching period that the phase with the highest potential (denoted “M”) is phase T, the phase with the intermediate potential (“i”) is R, and the phase with the lowest potential (“m”) is S. Consequently, the “TST” state is also expressed as “MmM” in this notation, which corresponds to the indication given in Figures 24 to 26. Again, the other 8 states follow from the same analysis. The sequence of states obtained in this example is then:

[0236] MmM; Hmm; Mim; MMm; mMm; mMi; mMM; mmM; imM

[0237] It should be noted, however, that this sequence is cyclical (after the “imM” state comes the “Mmm” state, and so on), and that the “start” considered here is arbitrary. The choice made (but not mandatory) in this description is to count the start of the period from the zero crossing of the current iA in the upward direction: it can be verified in Figures 24 to 26 that the identified period Tsw corresponds precisely to a complete revolution (positive then negative alternation) of this current. Thus, the interval II begins when iA becomes positive.

[0238] It is also observed that certain states apply throughout the interval separating two zero crossings of the HF currents (between the vertical separators), within a time margin δ which can increase or decrease this interval (examples will be given later) or simply shift it, as in this example. Here, these are the states “MmM” (in interval II), “MMm” (in 13), and “mMM” (in 14). Conversely, other intervals (again within δ) share two states, such as “Mmm” and “Mim” (in interval 12), or “mMm” with “mMi” (in 14), and finally “mmM” with “imM”.

[0239] (in 16). Denoting “II” the separation linked to the zero crossing of the current (neglecting the impact of θ for the moment), and “]” the transition separating the two states that coexist within the same interval, the previous sequence can be rewritten more completely:

[0240] [Tables8] Interval II 12 13 14 15 16 # # # # # # State Mm M II Mmm 1 Mim II MMm II mMm 1 mMi II mM M II mMM 1 imM II C

[0241] Where the final symbol O refers to the cyclical nature of the sequence, which therefore then starts again at the first element (here “MmM”) and so on.

[0242] It is important to note that this new representation is not limited to listing a sequence of states: it also indicates how these states are arranged within a switching period divided into intervals defined by the zero crossings of the currents. Therefore, the following terminology will be used in the following:

[0243] - the sequence of states is simply the sequence of 9 states applied successively, without indication of grouping within intervals or safety margin

[0244] - for a given sequence, the arrangement of states is the additional information appearing in the representation introduced above and indicating how the states group together, or not, in the different intervals, as well as how the transition from one interval to another takes place with respect to the safety margin ô, as developed below.

[0245] Figures 24 to 26 show, on the voltage graph, the directions of variation indicated by arrows, and on the current graph, the current value when it is close to zero crossing indicated by a square marking. It can thus be verified that all voltage drops occur under a positive current and all voltage increases under a negative current, which complies with the rule stated earlier and ensures that each of the nine switching operations satisfies the switching constraint in ZVS. To guarantee this operation, a time margin θ has been applied, as mentioned previously, to prevent switching at current values ​​too close to zero. This value is indicated at the bottom of [Fig. 26] and is negative for all zero crossings in this example. However, it has already been mentioned that this will not always be the case, so it is important to specify how it is applied during the transitions between states arranged in this way:

[0246] - its (absolute) value is a parameter decided by the designer, and can range from 0 up to 30 degrees angle (one-twelfth of the switching period)

[0247] - its sign depends on the sequence of states that will be applied, and must be specified when low current transitions. For example in figures 24 to 26, this concerns the transition from the state “MmM” to “Mmm”, as well as from “Mim” to “MMm”, from “MMm” to “mMm”, from “mMi” to “mMm”, from “mMM” to “mmM”, and from “imM” to “MmM” (which corresponds to the return to the beginning of the cycle).

[0248] To specify the place of application and the sign of ô, the arrangement of states can then be rewritten again, according to a suitable definitive notation:

[0249] - the symbol ) denotes a transition between two intervals (therefore near the sign change of an HF current) involving the application of a margin with θ > 0

[0250] - the symbol ( denotes a transition between two intervals (therefore near the sign change of an HF current) involving the application of a margin with θ < 0

[0251] - the symbol ] denotes (as before) a transition occurring at within the same interval (therefore under a higher switched current) and therefore not being concerned by the application of a safety margin.

[0252] Thus, the final notation adopted to describe the sequence of states and their arrangement in the example of Figures 24 to 26 is as follows:

[0253] [Tables9] Interval II 12 13 14 15 16 # # # # # # State Mm M 1 Mi M < Mim < MM m 1 MM i < mMi < mMM 1 iM M < imM (O

[0254] For given voltages v(R । si tîn and BF current references, the sequence of states to be applied to meet the objectives of the invention is always defined and unique.

[0255] Indeed, starting from the configuration in Figures 24 to 26 as an example, the largest current reference in absolute value is i^F, and its value is positive. The current iT is therefore constructed from the maxima of all the HF currents (with the notches related to the safety margin θ). Consequently:

[0256] - at the beginning of the switching period, the largest HF current is -iB. It is found also that phase T is that of greatest electrical potential in this period (vTN is the greatest voltage), which is therefore designated “MAX” (notation “M”). The current iM therefore corresponds to iT, which, as mentioned, is equal to -iB at the beginning of the period. Table 3 then informs us of the possible states that lead to iM = -iB: there are only two, which are “MiM” and “MmM”;

[0257] - it is also known that f™Fest is weakly negative, leading to a curve of i R is often zero. Thus, the current iR must be either zero or equal to a negative current close to zero, which would correspond at this point to the curves of -iA or -ic. However, these last two cases are not possible because, due to the zero sum of the currents (equation (5)) and iT which is already known at -iB, the third current should be equal to -ic or -iA, respectively: the values ​​of the currents i(R → if tj would then be a permutation of the currents -iA, -iB, -ic, but such a situation is not possible according to tables 2 and 3. Therefore, iR is necessarily zero in the interval 11;

[0258] - as a consequence of the above, the last current is must be equal to the opposite of iT in order to maintain the zero sum of the currents. We observe that is equal to iB at the beginning of the period in [Fig. 17], knowing that phase S is that of minimum potential in this period (vSN is the smallest voltage). The current is can therefore to be named im and is then equal to iB. According to table 3, only four states respect this constraint: “MmM”, “Mmi”, “imM” and “imi”.

[0259] Thus, the state “MmM” is the only one which simultaneously satisfies the requirements stated above, and Figures 24 to 26 show that it is indeed the first state of the sequence in this example.

[0260] A little further along in the switching period, we consider the interval 12 between the zero crossings of currents iB and ic: the current iR (which remained zero during interval II) must take the value of one or the other of these two currents near their zero crossing. If it were to immediately take the value of ic, it can be shown that the resulting state would be “Mmi” (with iT = iM = U and is = im = iB). Since the current iR is slightly negative, it would then return to zero by applying the state “Mmm” (with iT = iM = iA again and this time is = im = -iA). Consequently, arm C would switch from state “i” to state “m”, reflecting a potential drop (from the intermediate to the minimum), while its current in this region is negative, which does not comply with the rule stated above on the conditions for smooth switching.Therefore, the slightly negative current iR can only be obtained by taking the value of iB when it approaches zero (at the end of interval 12), and must have remained zero before. Combined with the fact that iT takes the value of iA in this region, we necessarily arrive at the states “Mmm” then “Mim” which complete the sequence of states in this interval.

[0261] By following the reasoning to its conclusion, it is therefore shown that the sequence of states presented in Figures 24 to 26 is the only one capable of meeting the objectives of the invention, for this given situation of voltage values ​​v(Rsitin) and reference currents

[0262] When the voltage scheduling changes (a little further into the low-frequency period), as well as that of the current references (also affected if the phase shift value changes), the sequence or arrangement of states to be applied also changes. The very object of the invention is therefore to determine this sequence and its arrangement systematically in order to control the matrix converter with the technical characteristics described above, with a view to high energy efficiency and compactness, and with an arbitrary power factor on the network.

[0263] Knowing the values ​​of the voltages v(R s tîn) at each instant allows us to order them and to identify the quantities according to the notation “M, i, m” which allows us to rename the currents as i^F^ ifEF and i^F- The sequence and arrangement of states to be applied during a switching period then depends on the value and in particular the ordering of these currents.

[0264] Starting from the situation shown in Figures 24 to 26, for small variations in the current references, the sequence and arrangement of states remains valid. Adjustment to the references can be achieved, assuming constant θ, by acting on the separation instants “F’” between the two states coexisting within intervals 12, 14, and 16. Preferably, the distribution of states on either side of this separation is the same for all three intervals, as this creates a tripling effect of the apparent frequency (on iR and is here) relative to the switching frequency fsw (which simplifies the work of the LC filter, allowing its components to be sized to a minimum). Therefore:

[0265] - Moving the 'T' boundary to the right reduces the (negative) area of ​​the drawn peaks downwards by the current iR (at the expense of that of is, which is also negative), which is suitable for the case where it approaches zero. Regarding the interval 12, for example, this increases the duration of the “Mmm” state and reduces that of “Mim”. The zero crossing of •REF corresponds to the disappearance of the “Mim” state, and a new sequence of states is established when j^F becomes positive.

[0266] - conversely, moving the boundary to the left increases the (negative) area covered by iR (duration of “Mim” in interval 12), at the expense of that of is (reduction in duration of “Mmm”), which corresponds to a more negative reference fREF (while î^EF approaches zero). However, a limit appears when the state “Mim” occupies the entire interval 12 and the state “Mmm” disappears. Figures 27 to 29 show this situation with a more negative reference j^F than in Figures 24 to 26. Now, interval 12 (not shown) uses “Mim” entirely (to within 0) while II now shares two states: “MmM” (which was already present in Figures 24 to 26) and the new state “MiM”. This behavior is reflected similarly in the other intervals 13 to 16.

[0267] Thus, the value and ordering of the reference currents lead to different sequences or arrangements of states. For example, the situation in Figures 27 to 29 corresponds to the following arrangement (it can be verified that the φs are also always negative, justifying the separator “(” between the intervals): ¢1 !S fâ K JS fô Èm: MraM | MW ( Mto ( MMm | MMi | ( mMM pMM ( W4 ( O

[0268] It is therefore necessary to establish the conditions on the currents i^F, iEEF, îFFF allowing the correct sequence of states and its arrangement to be defined systematically.

[0269] Here, reference is made to the reference currents i^FvTj renamed in the form iEEF, iEEF^ •REF the continuation of the sorting on the tensions. lm *

[0270] Since these three currents have a zero sum, they form variables linearly linked by equation (5) and consist of only two independent quantities (two currents automatically defining the third). The three currents can then be represented in a two-dimensional space. Figure 30 shows the classic representation, where the axes iM, i, and im are rotated 120° relative to each other, with the zero value at the center of the figure. The perpendiculars of the axes passing through the center are drawn as dashed lines: they delimit the half-planes in which a current is positive or negative. For example, iM is positive at every point in the plane to the right of the vertical dashed line identified by the notation “iM = 0”, and i is negative at every point below and to the right of the dashed line “i = 0”. This figure can be considered as a complex plane in which the real axis is horizontal and the imaginary axis is vertical.Each triplet of values ​​iM, ii5 im can then be associated with a vector ip^p such that: .

[0271] [Math.6] ÎREF = i ( + + iEnF^~^ ) = Iref^

[0272] Where the three currents i^F, iFEF, i^F are deduced by orthogonal projection of i^p onto the respective axes iM, ù, im, and where [3 is the argument of i^p, that is to say the angle which it forms with the horizontal axis.

[0273] Depending on the value of [3], the vector i^p is located in one of the twelve angular sectors identified in Roman numerals from I to XII in Figure 30. Each of these sectors corresponds to a precise arrangement of the reference currents, easily verifiable by projecting ; onto the axes. For example, for the vector ; As shown in Figure 30, the largest current in absolute value is i^F, which is positive, while i^F is slightly negative and i^F is even more negative. All possible configurations with the associated angular sector are listed in Table 10.

[0274] [TableauxlO] Sector Scheduling of currents I -REF. n. -REF. -REF Im > ij > im II -REF -REF n -REF III -REF. -REF. n. -REF •iu > hn IV -REF . n. -REF. -REF h > v > Im > V -REF . n. -REF ~ -REF ij > u > im > Im VI ■REF , h' >iREF>0- •REF >lM VII >^F>^ •REF VIII -REF hn ■REF IX •REF s •REF * X •W . •REF >li XI •REF - >^EF>^ hn ■REF > h XII •REF v >0>iREFï ■REF *

[0275]

[0276]

[0277]

[0278] It is useful to note that the vector iR^, can potentially be reached by all sectors, depending on the value of the phase shift q> between reference currents and network voltages. To this end, Figure 31 shows several trajectories followed by the vector's tip (the set of locations traversed during a period T0), for three different phase shift values. The "jumps" observed in the trajectories correspond to voltage crossings v(R^, i, t_n), which induce a change in the voltage order and therefore a reassignment of the current designations in the "M, i, m" notation. It can be observed that in the general case (arbitrary phase shift), the vector} can potentially enter any sector of [Fig. 30]. It is therefore important to determine the sequence and arrangement of suitable states in each sector. In the example of Figures 24 to 26, it was established that the currents iM, i;, im were respectively iT, iR and is, with iR slightly negative, leading to the ordering i^F > 0 > > i^F which corresponds to the position of iRFF in sector I in [Fig. 30]. Starting from this example: ■ if i^F = z^F were to evolve to become positive (as long as the voltage ordering is the same), this would result in an increase in the angle [3 and a passage of iRFF into sector II which would require a new sequence of states as mentioned previously; - otherwise, a more negative iR would amount to decreasing [3], bringing îR^F closer to the iM axis. The vector îR^"F would initially remain in sector I, but the sequence of states could not remain the same. Indeed, this corresponds to the phenomenon mentioned previously regarding the transition to the sequence in figures 27 to 29, which nevertheless follows the same ordering (indicated in the legend of these figures) but with a proportion between the values ​​of i^F and îFEF. ^1( iJ which cannot be obtained with the sequence in Figures 24 to 26. Therefore, the Sector I still needs to be subdivided in Figure 30 to show the two

[0279]

[0280]

[0281]

[0282]

[0283]

[0284] possibilities of sequences depending on the proximity of REF with the dotted line at i; = 0; - By continuing the analysis for even more negative values ​​of while ^REF approaches zero, a crossover between these values ​​occurs, such that iR^p passes below the iM axis in sector XII of Figure 30. It is natural to think that this sector change requires a different sequence of states again. However, Figure 33 shows an example of this situation with the same sequence and arrangement of states as in Figure 28. This peculiarity is easily explained by the fact that when iR^ passes in front of the iM axis, i.e., at [3 = 0], the two currents and i^F (here iR and is respectively) are equal, which amounts to equating the areas under the curves of these two currents in Figures 27 to 29 and those of 32 to 34, and thus placing the separation “F’” in the middle of the interval. Consequently, the crossing of the iM axis between sectors I and XII occurs naturally without modify the states or the arrangement of the sequence; - however, continuing towards i^F, which is more strongly negative and [PPP approaching zero, a limitation similar to that mentioned above for sector I will appear when the states “MmM”, “MMm” and “mMM” have disappeared from their respective interval II, 13 and 15. A new sequence of states will then be necessary, yet still in sector XII, when iRRp approaches the dotted boundary at im = 0. Figure 35 complements the complex plan of Figure 30. Each sector (I to XII) is subdivided in two (boundaries in purple dashed lines), and the names “A11” to “A18” are associated with areas separated by the different delimiters appearing in the figure. The previous analyses are found in the same way: - the vector iRER in [Fig.35] always corresponds to the situation in [Fig.24] 26, and is located in the area named “A2”, which will identify the arrangement of states to be applied at this location; - for an angle [3] which would become smaller but still in sector I, iR^F would enter the zone named “Al” which characterizes the arrangement of states applied in figures 27 to 29 and those of 32 to 34. We observe that Al straddles sectors I and XII, in accordance with previous observations which showed that the arrangement to be applied remained the same when iR^, is close to the axis iM, whether it is above or below;

[0285] - if [3] were to decrease even further, it would cross a new boundary, leading to the application of a new arrangement called Al8 even though the sector is still the XII.

[0286] Subdividing the 12 angular sectors into two visually leads to 24 subsectors. However, the peculiarity shown above regarding crossing iM without changing arrangement reduces the number of arrangements required. This peculiarity is actually found on each of the three axes iM, i, and im, including when crossing their negative parts, and therefore concerns a total of 6 crossings. Consequently, only the 18 distinct state arrangements of [Fig. 35] remain. The corresponding state sequences and arrangements are listed in the following arrangement table: il & 13 B S6 Al StaM[»( Mta I MMm | MMs { înM) ] raMM ; IMM ( taM i O A2 MmM { Mita ( MMst [ ïhMœ ? mMt { mMM ( WæM ; imM ! O A3 MmM i Mmi ( ( MMm [ JMm ( tnMm ( stMM i taM ] freaM i Q A4 Mta ( tam taM [ tata? ; mta i Q AS Wi [ ta! ( taîT! ( iMm j ita [ mta ( taM ? tas ] tata i O AS tas ( sMm j ita ] ; MM: |. îsM (taM ) MiM [ Mis ] Mta i MM: û A1G iMm ) iMM MiM Mta I MMi ÎMMmi ta Ail iMta sT: MM | taM j mæM | MmM | Msta? Mmm) MMAv ] O A12 mMm | rnMG taM j Mim iMMm v if A13 ) mta J staM ) WM- | inw fMwta) Mta i A14 tai !bMî tai j taM | imm ) ita ; Mta ; AÏS Mta i tata [ ] mMi | | tas (s) ita [G AÏS Mta; Mil mis ( mMi | îMs y tai ( j W | W ! O Al? MiM | Mta [ Msi [ MM! i mMs | iMi ( iMM î imM ) iiM ta A18 ( Mta MS ( MMi [ta® | sMi ( iMM ( taM ! iiM i X..?

[0287] This table makes it possible to identify, in all situations, the sequence of states to be applied, the arrangement of these states in the intervals, and the direction in which the safety margin θ guaranteeing smooth switching conditions must be applied. Indeed, on this last point:

[0288] - for six of the arrangements (A1 to A5, and A18), ô is negative for all transitions interval change (symbol “ ( “ between intervals in the table). This was the configuration observed in figures 24 to 26, 27 to 29 and 32 to 34 (obtained respectively with arrangements A2 and Al);

[0289] - for six other arrangements (A6 to A8, and A15 to A17), the safety margin may taking on different signs within the same switching period: some transitions involve θ < 0 (symbol “(” in the table) and for others θ > 0 (symbol ”). As an illustration, Figures 36 to 38 (obtained within the trajectory of Figure 31b for θ > 70°) show an example corresponding to arrangement A17 where the switching time offsets relative to the zero crossing of the currents are indeed positive and then negative alternately (according to the table). It can easily be verified that this safeguard effectively guarantees a minimum current whose sign is adapted to the ZVS switching for each voltage transition;

[0290] - for the other six arrangements (A9 to A14), the safety margin is always positive (symbol “ ) ” in the table). An example is given in figures 39 to 41 (obtained in the trajectory of figure 31c for q> = -135°), corresponding to arrangement A10. Here again, the relevance of the sign of ô is verified by respecting the objectives of smooth switching.

[0291] As a note regarding the arrangement table and the distinction in terminology between a sequence of states and an arrangement of these states, it can be observed that some arrangements in this table implement the same sequence of states. Indeed, the sequence of states applied by the last two arrangements, A17 and A18, is identical: only the arrangement of these states within the intervals is modified. The same is true for arrangements A5 and A6 (except for the “first” state, but it should be remembered that the sequence is cyclic and therefore does not really have a beginning or an end), as well as A8 and A9, and finally A14 and A15. There are therefore only 14 distinct sequences of states applied cyclically in each switching period. These sequences are named S1 to S14 in the following Table 11, which also specifies the corresponding sequence (the beginning being arbitrary) as well as the associated arrangements.

[0292] [Tables II] Séquenc e États successivement appliqués Agencements correspondan ts SI MmM MiM Mim MMm MMi mMi mMM iMM imM Al S2 MmM Mmm Mim MMm mMm mMi mMM mmM imM A2 S3 MmM Mmi Mmm MMm iMm mMm mMM miM mmM A3 S4 Mmi Mmm imm iMm mMm mim miM mmM mmi A4 S5 imi imm iMm iim mim miM mii mmi Mmi A5 ; A6 S6 imi iMi iMm iim iiM miM mii Mii Mmi A7 S7 iMi iMm iMM iiM miM MiM Mii Mmi MMi A8 ; A9 S8 iMm iMM mMM miM MiM MmM Mmi MMi MMm A10 S9 iMm mMm mMM miM mmM MmM Mmi Mmm MMm Ail S10 mMm mMi mMM mmM imM MmM Mmm Mim MMm A12 SU mim mMm mMi mmi mmM imM imm Mmm Mim A13 S12 mim mii mMi mmi imi imM imm iim Mim A14 ; A15 S13 Mim Mü mii mMi iMi imi imM iiM iim A16 S14 MiM Mim Mii MMi mMi iMi iMM imM iiM A17 ; A18

[0293] This peculiarity, whereby two arrangements can implement an identical sequence, is explained by the way in which the zero crossing of •REF or iFEF occurs. For example, in Figures 36 to 38, the current jFEF is close to zero and corresponds to i^F-. When this reference approaches zero, the “Mim” state (considering only interval II, but 13 and 15 are similar) becomes increasingly shorter. But even when the reference is zero, this state has not disappeared due to the safety margin that continues to apply it for a short period of time in interval 12 (in fact, at = 0, there is also a portion of “Mim” in interval II that compensates very precisely for the small portion of the negative curve in 12). When the reference becomes negative, it is not necessary to resort to a new state, but simply to evolve the boundaries in another way.Thus, figures 42 to 44 show how iEEF is made negative while preserving the state “Mim”, but which now extends within the interval 12 rather than II. We can observe that the succession of states is indeed the same as in figures 36 to 38, but with a different arrangement within the intervals.

[0294] Finally, one last remark must be made here: the states described in this description are expressed according to the notation “<state arm A> <state arm B> <state arm C>” and the development has been presented under the assumption of corresponding HF currents forming a three-phase system in “direct cyclic order”, that is to say, they are out of phase with each other in the order: iA, then iB, then ic, and so on (this can be observed in the succession of passages through their maximum of these three currents over time, or their crossing of zero in a defined direction, for example, upward). However, it is quite possible to work in “reverse cyclic order”, that is to say iA, then ic, then iB (then iA and so on). This is in fact equivalent to swapping two phases on the HF side and therefore the naming of the arm states is permuted (for example “Mmi” must become “Mim” if we permute phases B and C).To avoid complications in the description, it is certainly beneficial. to impose from the outset that the three phases A, B, C are named in this order according to the cyclic order of the currents, so that iA, iB and ic always form a three-phase system in direct cyclic order (the choice of naming always allows this).

[0295] Note:

[0296] - A, B, C the HF-side phases such that the respective currents iA, iB, ic flowing on these phases, and counted as positive when exiting the converter, form a three-phase system in direct cyclic order (without loss of generality, it is simply a naming convention);

[0297] - iFEF^ 'cs reference currents to be injected on the BF side (to satisfy by example to active and reactive power setpoints on the network), counted with a positive sign upon entering the converter;

[0298] - i^F, i^F, iFEF these same reference currents such that i^F is the one that flows in the phase among R, S, T of greatest potential, î^-F that in the phase of smallest potential, and that in the phase of intermediate potential;

[0299] - ii the instantaneous current among iR, is, iT whose reference has the smallest value absolute; and jFEF its reference (it is therefore the reference closest to zero);

[0300] - i2 the instantaneous current (always among iR, is, iT) whose reference is intermediate in absolute value; and jFEF its reference;

[0301] - i3 the instantaneous current whose reference has the largest absolute value; and its reference (so it is the reference furthest from zero).

[0302] Note: i3 is thus the current that must be constituted by the extrema of the HF currents, corresponding for example to iT in Figures 24 to 26. The current ii would correspond in these figures to iR, and i2 would correspond to is (whose reference has an absolute value intermediate between iFEF and iEEF). In these figures, the converter control acts in particular on the distribution between the average values ​​of the currents iR and is (relative size of the shaded areas, the evolution of which is shown in Figures 27 to 29), characterized according to the notation introduced here by the ratio .

[0303] At a given moment in the BF period, we want to know how to control the matrix converter in a switching period.

[0304] A very general description of the invention is given below:

[0305] - the scheduling of currents iFFF, iFEFi ifEF allows the sector to be defined angular (from I to XII) in Table 10, and therefore two candidate sequences to control the converter among the 14 appearing in Table 12 below and defined in Table 11;

[0306] - the converter is controlled by one of these two sequences in such a way that each change of state involves a variation in the potential of one phase (among A, B, C) which is either:

[0307] —► in the positive direction (potential rise) with the current in the same phase (iA , iB or ic) negative (re-entrant) at that instant

[0308] —► in the negative direction (potential drop) with the current in the same phase is positive (outgoing) at this time

[0309] - the selected sequence is the one that allows the proportions of the values ​​to be respected currents, that is to say for which the ratio of the average values, over a switching period, of the two smallest currents in absolute value (therefore ii and i2) is equal to the reference of this ratio:

[0310] [Math.7]

[0311] [Tables 12] Angular Sector hEr Value ^REF small large sequence arrangement sequence arrangement I S2 A2 SI A1 II S3 A3 S4 A4 III S5 A5 S4 A4 IV S5 A6 S6 A7 V S7 A8 S6 A7 VI S7 A9 S8 A10 VII S9 A11 S8 A10 VIII S10 A12 SU A13 IX S12 A14 SU A13 X S12 A15 S13 A16 XI S14 A17 S13 A16 XII S14 A18 SI A1

[0312] Note: if, by respecting these criteria, the current i3 does not satisfy its reference, then it is necessary to play on the amplitude of the HF currents to scale their values ​​without altering the ratio.

[0313] As mentioned above, this aspect is assumed to be ensured by the control of the 2nd converter (example in [Fig.1]) and is not part of the invention: the amplitude of the HF currents is assumed to conform to the limits described above.

[0314] The above description can be expanded as follows:

[0315] - the scheduling of the currents i^F, i^F> iFEF allows the sector to be defined angular (from I to XII) in Table 10, and therefore two candidate arrangements to control the converter among the 18 appearing in Table 12 and defined in the arrangement table;

[0316] - the converter is controlled by one or the other of these two arrangements: it is the one which allows us to respect the proportions of the current values, that is to say for which the ratio of the average values, over a switching period, of the two smallest currents in absolute value (therefore ii and i2) is equal to the reference of this ratio (equation (7)).

[0317] Note: a safety margin θ will have been chosen beforehand to properly stagger the switching during interval changes in order to ensure smooth switching. By varying the distribution of coexisting states within the same interval, the ratio θ(f₀) is varied, and it is easy to verify if the value of The reference point can be reached.

[0318] The arrangements defined in this way naturally ensure compliance with the conditions for smooth switching; it is not necessary to seek to re-verify them. Thus, the control method can be simply summarized according to the flowchart in [Fig. 45].

[0319] It is important to note that the control principle presented here is systematic and can be carried out in real time on the basis of knowledge of the instantaneous electrical quantities only: it adapts naturally to any phase shift condition between currents and voltages of the network for example, without needing to know this phase shift or the power setpoints.

[0320] Regarding the discrimination between the two candidate arrangements from Table 12, in practice, one can try to predetermine the one that will satisfy equation (7) if an analytical expression for the exact shape of the currents is known. Otherwise, a closed-loop system can automatically vary the ratio fo) in playing on the instant of separation “F’ of states cohabiting in the same interval, and will change arrangement as soon as a limit is reached (for example disappearance of a state).

[0321] In the case of sinusoidal HF currents as presented in this description, a simple analytical solution (used in the simulations whose results are shown in the figures) allows the characteristic criteria and instants to be formally expressed, as will be shown later.

[0322] Figure 46 shows a view of the HF currents in Figures 24 to 26. The smallest current in absolute value is iR, which can therefore be denoted ii according to the notation introduced previously, and i2 corresponds to is. Considering a scale of angles in radians based on the switching period (one revolution of the HF currents is 2ir), we can define the variable rp as the angle covered by a peak of the current ib and extending to the zero crossing of the current on the curve followed by h when it is not zero (therefore without considering the margin ô at this point). This angle is an essential parameter of the control since it will determine the distribution of the states coexisting within an interval (here 12). In fact, rp quantifies the position of the separator “F’” in the arrangement table.

[0323] Furthermore, knowing the BF current references, we define a variable X such that:

[0324] [Math. 8]

[0325] It can then be shown that the value of rp which allows us to verify equation (7) is written:

[0326] [Math.9] / 1-X c- \ ip - arcosy -pp^coso )

[0327] where ô is the safety margin, expressed in radians, applied at the zero crossing of the HF current curve followed by ib. Thus, for the chosen arrangement, the switching times are fully known, on the one hand, by the choice of the ô applied in accordance with the arrangement table, and on the other hand, by the value of rp thus calculated.

[0328] Furthermore, the discrimination between candidate arrangements in the same sector (Table 7) amounts to determining whether rp exceeds a certain limit value ipiim, also identified in Figure 46: this arrangement is suitable as long as rp < TpUm (which corresponds to the "small" value of i™1 in Table 12), but the second must be used beyond that point ("■REF large » value of l*™ in table 12). ■REF

[0329] The limit value TpUm corresponds to the width of an interval, therefore ir / 3, to which must be added, or subtracted depending on the arrangements, the angle ô applied here between Intervals II and 12. Since the arrangement table specifies the signs of θ at each transition, this value is known. Furthermore, it is possible to deduce the limiting value XUm of the variable X, which defines the transition between the two columns "small" and "large" of table 12:

[0330] [Math. 10]

[0331] The case of a single-phase, rather than three-phase, inductive circuit has already received considerable attention in the literature, although generalization to arbitrary power factor is much less frequent. The method developed so far based on a three-phase inductive circuit on the high-frequency side can be adapted for the single-phase case, implementing a 3x2 matrix converter as shown, for example, in [Fig. 3]. The two phases on the high-frequency side will simply be labeled A and B. Due to the reduction in degrees of freedom (only 32 = 9 states remain) for the converter, the control is greatly simplified, while retaining many similarities with the three-phase version, but also differences that will highlight the advantages of the three-phase solution.

[0332] The working assumptions are similar to the three-phase case, namely that the HF current is approximated by its sinusoidal fundamental at the frequency fsw, given that there is now only one current, named iA and defined as exiting the matrix converter on phase A. In reality, a current iB could also be defined in the same way, but since there are only two, the zero sum of the currents immediately results in iB = -Îa, and therefore only iA will be referred to hereafter. The phase named A is chosen arbitrarily, but will again serve as a reference point to define the switching period, which will also contain a positive half-cycle followed by a negative half-cycle of iA. The control of the currents i(R → si tj injected on the LF side will follow the same objectives as for the three-phase version, as illustrated in [Fig. 47].The operating constraint in soft switching ZVS remains the same, and still obeys the rule of evolution of potentials according to the sign of the currents presented above, including the similar introduction of a safety margin θ. Finally, the minimization of HF currents remains a desired objective, illustrated in [Fig.48], with again a slight impact of the safety margin on the waveforms presented in [Fig.49].

[0333] Figures 47, 48, and 49 are the counterpart, for the 3x2 matrix converter, of Figures 7, 11, and 12 presented previously for the 3x3 matrix. Comparison of these figures reveals fundamental differences between the two structures:

[0334] - in figure 47e, the current iR always follows its reference jEEF but is constructed This is based on portions of the curves using only the HF current iA and its inverse, since there is no other current on the HF side. Consequently, its apparent frequency is lower than in the three-phase case and exhibits higher amplitude variations. Over a complete period T0, Figure 47b also shows that it systematically returns to zero in each switching period. As a result, its HF frequency content is higher and of lower frequency; these two drawbacks translate into greater difficulty in filtering the HF components via the LC filter. Thus, the filtered current on the network (Figure 47a) contains not only the LF component at f0, but also undesirable HF residuals clearly perceptible in Figure 47a and its enlarged view 47c.Further filtering of these currents to reduce ripple is possible but would require increasing the values ​​of the inductive and capacitive elements of the LC filter, leading to oversizing this filter compared to the three-phase system; .

[0335] - Figure 48 also shows that minimizing the HF current is not possible in below a certain value significantly higher than in three-phase systems. This phenomenon is due to the fact that the largest reference current, in absolute value, is constructed from the maxima or minima of the iA and -iA curves, which return to zero twice per switching period, requiring a larger amplitude to compensate for these small values ​​on the resulting average during a switching period. For a sinusoidal HF current, the observed shape leads to a ratio of ir / 2 between the amplitude IHF of the HF current and the largest absolute value IREF of the references. Here again, this ratio is a minimum value and increases slightly with the application of the safety margin, which creates notches at the zero crossings of the current ([Fig. 49]), which must be compensated for by a larger amplitude. As a reminder, for the 3x3 converter, for the same Iref, the minimum amplitude of the HF currents was amplified by only a ratio of it / 3.

[0336] These observations highlight the advantages of a three-phase rather than a single-phase HF inductive circuit structure. Firstly, the LC filter consists of passive components that still contribute to the overall converter volume, and for the same switching frequency, the three-phase configuration naturally offers an HF content that is easier to filter (higher frequency with less variation), thus reducing the stress on the filter components. Secondly, the amplitude of the HF currents required to build the same reference values ​​on the LF side is reduced by one-third (ratio between the factors ir / 2 and ir / 3).

[0337] Even though three-phase requires an additional conductor, this reduction allows for lower losses per conductor, with better heat distribution over The three conductors help to avoid hot spots. In addition, three-phase has other advantages such as potentially more favorable sizing of the magnetic component of the HF circuit, or an intrinsic redundancy offered by the 3rd phase, making it possible to ensure continuity of operation in the event of failure of a component of the matrix converter, since a degraded “single-phase” mode operation could remain possible on the two still operational phases.

[0338] Thus, the three-phase version is seen here as a more attractive technical solution for the conversion system. However, in order to complete the study of the two variants, the control of the converter with a single-phase HF circuit is developed below.

[0339] The 9 states of the 3x2 matrix converter are listed in Tables 13 and 14 below for the notations “R, S, T” and “M, i, m”, which have the same meaning as in three-phase, except that only two arms are present. The converter state will therefore be defined by two of these letters instead of three, and Tables 13 and 14 also indicate the effect of each state on the injected currents on the LF side.

[0340] [Tables 13] current arm AB z'R zS zT RR 0 0 0 RS z'A -z'A 0 RT z'A 0 -zA SR -z A z'A 0 SS 0 0 0 ST 0 z'A -z'A TR -z A 0 z'A TS 0 -z'A z'A TT 0 0 0

[0341] [Tables 14] current arm AB zM zi zm MM 0 0 0 M i z'A -z'A 0 M m z'A 0 -z'A i M -z A z'A 0 ii 0 0 0 im 0 z'A -zA m M -z A 0 z'A mi 0 -z'A z'A mm 0 0 0

[0342] Again, each of the arms changes state three times, leading to a total of Six switching cycles for the two arms, and therefore, in principle, six states. However, single-phase operation leads to a peculiarity, which will be explained later. Figures 50 to 52 show a succession of states for a configuration analogous to that of Figures 24 to 26 in three-phase operation. During a switching period, the current iA crosses zero twice, defining two intervals: 11 (positive half-cycle of iA) and 12 (negative half-cycle). Each interval is composed of two states that are distributed in such a way as to adjust the proportion of the average current values, which can be characterized, as above, by the ratio i1^. This leads to four states in the reference diagram. during a period. However, it can be observed that during interval changes, both arms switch states simultaneously (“Mi” to “mM”, then “iM” to “Mm”). This case is equivalent to applying an intermediate state of zero duration at these two instants. In reality, [Fig. 52] shows the safety margins θ, which are negative, but strictly speaking, there is a first negative margin to ensure that arm A switches before the current crosses zero, and a second, also negative, margin in this example to ensure that arm B also switches before crossing zero. If these two margins were not perfectly identical, there would be a slight overlap and the fleeting appearance of an intermediate state.For example, the transition from interval II to 12 (i.e., “Mi” to “mM”) might show a fleeting “mi” state if arm A switches slightly before arm B, or a “MM” state if it switches slightly after (while always leaving sufficient margin before the zero crossing). Thus, if the switching of arms A and B at interval changes is not perfectly synchronous, then we do see 6 states appear within the switching period, but the near-simultaneity of these switchings allows us to identify only 4 truly significant states in the construction of the LF current references.

[0343] However, the transitions at the change of interval may be different and make an intermediate state appear more markedly, and above all, indispensable to The control system functions correctly. This is the case in the example shown in Figures 53 to 55. This time, the safety margins of arm A and arm B do not apply in the same direction. Consequently, the interval change, for example between II and 12, implements a transition state (here “mM”) that cannot be described as fleeting or negligible as in the previous case, because its duration cannot be zero: it plays a significant role in the control system to facilitate the transition between the two principal states that occupy each of the two intervals, ensuring that the two arms switch under the correct conditions in zero-crossing conditions (one just before the current crosses zero, the other just after). Analyzing the directions of potential variation, in conjunction with the signs of the currents at these times, allows us to verify this correct operation.

[0344] Finally, as in the three-phase version, the case where the safety margins are all positive can also appear, as shown in Figures 56 to 58. Again, the margins in the same direction for both arms lead to the disappearance of two states out of the six normally applied in the switching period, due to the simultaneous switching on arms A and B that results from it.

[0345] As with the three-phase case, Figures 50 to 52, 53 to 55, and 56 to 58 were obtained in different configurations, with phase shifts between reference voltages and currents on the network of 30°, 70°, and -135°, allowing exploration of different angular sectors (I to XII in [Fig. 30]). Ultimately, the single-phase case is simpler, as there is only one sequence (and therefore one arrangement, the distinction no longer being necessary here) per sector, and two consecutive sectors share the same sequence. Only six sequences / arrangements are then defined and directly assigned to the different sectors according to the table below, without the need to choose between two arrangements as was the case in the three-phase case following sector identification. Sector iriteteafe fl 12 ■■ ■ I & XH Mm Mi mM iM U II & III Mm mM ; R'! IV & V im iM ( mM [ hM ; Mi i Mm| Vi t VH iM mM Mi î Mm n VHI & K mi mM J im Mm

[0346] In this table, a new notation of the type “Qy) ” is introduced in certain rows at the transition between intervals. It corresponds to the transition state mentioned previously for Figures 53 to 55. In the other rows, only the negative or positive sign of the safety margin is indicated using the symbol “(” or ”, respectively. In this case, two switching operations take place simultaneously on both arms, and it is recalled that any asynchronicity between these two switching operations results in the appearance of a stealth state (corresponding to the state, in the following interval, of the arm that switches first, with the state, in the previous interval, of the arm that switches last).

[0347] Finally, for simplified implementation based on an HF current approximated as a sinusoid, the principles previously stated continue to apply identically regarding the definition of the angle rp and equations (8) and (9). However, it is no longer necessary to determine a limiting value for this angle, since the same arrangement of the last table is applied throughout the associated angular sector.

[0348] Of course, the invention is not limited to a balanced sinusoidal three-phase system, and also applies to cases where the amplitudes are not identical on the three phases with different phase shifts of 2π / 3 and to non-sinusoidal waveforms, linked to the presence of harmonics, which may be the case in certain applications, in particular in sectors other than vehicle charging.

Claims

Demands

1. A method for controlling a matrix AC / AC power converter (1), the converter comprising a matrix of bidirectional current and voltage switches (2), the converter (1) being capable of being connected at its input to a low-frequency (LF) three-phase RST electrical network (3) and at its output to a high-frequency (HF) inductive circuit (5), the frequency of the HF currents of the inductive circuit (5) being equal to the switching frequency of the switches (2), the method comprising drawing or injecting a determined reference current iFEF, k ∈ {R, S, T} from each phase (R, S, T) of this network, the switches (2) of the matrix converter (1) taking successive states during a switching period resulting from the application of a control sequence for which the ratio of the average values ​​over a switching period of the two smallest instantaneous LF currents of the currents 4, k ∈ {R, S, T}T} generated by the converter (1) on said phase (R, S, T) of the network, denoted h and in absolute value is substantially equal to the ratio of the corresponding reference currents, i.e., h being the instantaneous LF current whose reference has the smallest absolute value among the three reference currents and l'2 being the instantaneous LF current whose reference is intermediate in absolute value among the three reference currents.

2. Method according to the preceding claim, the switching of the switches (2) being carried out in soft switching such that an HF voltage rise occurs at an instant when the corresponding HF current is negative and an HF voltage fall occurs at an instant when the corresponding HF current is positive.

3. Method according to the preceding claim, a safety time <5 equal to at least a minimum difference between the switching instant and the instant of change of sign of the HF current associated with the switching switch (2) being present in the control sequence between two successive states of this switch, to ensure that the switching takes place under a current value and with a time margin sufficient for smooth switching.

4. A method according to any one of the preceding claims, a low-pass filter being applied between the matrix converter (1) and the LF power network (3) in order to attenuate harmonics of frequencies greater than or equal to the switching frequency and to allow the LF component to flow to the network.

5. Method according to the preceding claim, the low-pass filter (6) being of the LC type comprising on each phase BF (R, S, T) a capacitance placed in parallel on said phase and an inductance placed in series between the capacitance and the electrical network (3).

6. A method according to any one of the preceding claims, wherein the LF voltages are ordered according to a voltage value sort at each instant and denoted such that: - M refers to the phase among R, S, or T that has the greatest electrical potential; - m refers to the phase among R, S, or T that has the smallest electrical potential; - i refers to the phase among R, S, or T whose electrical potential is intermediate between the two preceding ones; the LF currents being renamed such that: - iM denotes the current among iR, is, and iT flowing in the phase of greatest potential M; - im denotes the current among iR, is, and iT flowing in the phase of least potential m; - i denotes the current among iR, is, and iT flowing in the phase of intermediate potential i;the reference current i^F, k € {R, S, T} renamed j € {M, i, m} following the voltage ordering, being represented by a vector iRFF in a complex plane such as: i * _ “ / >REF . ;REF f .. ,;REF / ,H _ y ■ R EF “ 1 ;M ~ «AP 1.7 —} < m «4* l J ~ H - J RFF P ( JP / \ XO ? \ O / / Where [3 is the argument of the vector and i^F, i^FF and j^F are the orthogonal projections of said vector onto respective axes of the currents iM, i; ​​and im which intersect at the center of the complex plane representing the zero value of the currents, the axis of iM corresponding to the real axis of the complex plane, the positive part of the axis of i; being rotated by 120° in the direction; trigonometric with respect to the positive part of the axis of iM, the positive part of the axis of im being rotated 120° in the trigonometric direction with respect to the positive part of the axis of ii5 the axes of the currents and their respective perpendicular axes, called perpendicular current axes, defining twelve sectors numbered from I to XII, each of which is identified by a determined ordering of the currents as represented in the following table: sector current scheduling I ,REF > g ^REF •i$EF II „REF > > g > •REF III ,.;REF ,-REF -, : ; fEF > 0 > ?REF VIII ,;REF > ,-REF IX :ÿ:REF > 0> > ;REF

7.

8.

9.

10. A method according to any one of the preceding claims, the sum of the HF currents being zero and the sum of the LF currents being zero. Method according to any one of the preceding claims, the output of the matrix converter (1) defining at least two arms (A, B, C) connecting the converter to the inductive circuit, a single switch (2) for each arm being conducting at all times. Method according to the preceding claim, the matrix converter (1) being of type 3x3 having three output arms A, B, C. Method according to the preceding claim with reference to claim 7, the possible connections of arms A, B, C to phases R, S, T and their impact on the BF currents (iR, is, iT) being defined in the following tables, the positive sign of a current HF (iA, iB, ic) indicating a current leaving the converter (1), the negative sign of this current indicating a current entering the converter (1): brae current AB Ç 7P U •;TR p R Ci nop RS ~}-r tr R- P r -•c ir pqp 'RRS $ *'A -7A 0 R' $ T 7 A ' DRT .R ' t; R 1' S 7A ART' T ■'a A our current ABR 's lT SRR “ïfi 0 Ç R r? 7 R (JS R- 3' 2 D ;A ss R i.- SSS 0 fi 0 s $ T —R 'ir s TR tr 'ZA T p - !b *8: s TT 0 running arm ABC 'S ' TTRR Ci 7a T R. s 'B ••ATRT 7B Cl s R 7C rA T gb 0 ^A 7A TS - 0 -':BTTR Cl — rr 3' T s 0 R- -i;r TTTB Cl 33

11. Method according to the preceding claim, the possible states in notation<M,i,m> arms A, B, C and their impact on the BF currents (iR, is, iT) are defined in the following tables: electric arm AB ï. M 0 C» n M t ?-rû ' M rn ~3r 0 ô- i M 7 B û M ii 7 A ^'AM i ni 'A 7 B ÿc M ni M “7B 0 7 s M i 7a 7c l OM 0 ~7a broc playing ABC ! MM — JA f'A ai M i • m ir : i —;A p • ii •3 0 G i i ni o. 'C • m M aim B :B is m ü LA electric pitcher ■A. BCA bn m MM —iii Cf 7A tn M «A SA m M m Ci "7B ni i 7e SA mi 0. ^'a ni im Ci 7b - / B ni ni b- Cimm Ci R- — m ni rn 0 Û 0

12. A method according to the preceding claim with reference to claim 3, an interval being defined by the time separating two zero crossings of the HF currents, a switching period comprising six substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed in the intervals, each arrangement corresponding to an area of ​​the complex plane obtained by subdividing each of the sectors into two, the set of possible arrangements being defined in the following table: Agencement Intervalie ______Il _______12 13 14 18 IA Al MmM I MiM { Mini MM»] MMi [ mMi ( mMM ? iMM { imM { © A2 MmM Mmm : Mini { MMm $ niMm ; mMi i mMM $ mniM i imM $ Q A3 MmM i MM { Mmm | MMæî iMm | mMni | ■nMM ; miM | mniM { O A4 Mmi inim { iMm ■J niMm i mini miM ( mniM i mmi j Q A3 Mnii ; Smï { tmm j iMm i inn [ mm j m:M J mti ( mmi { □ AG imi { inim ; iMni 4m { mim ; m:M} n;:i ( mmi i Mmi J <>. A7 irai ; iMi E iMni J fim ; iiM ( miM j :rm J Mü Mmi O AS: tMi 4M { m:M [ MiM ] M» ( Mmi i MMi ) O A9 IMi ; iMm} iMM ) iiM ; m:M ) MiM j Mîi ; Mmi | MMf J O Aie} iMM i mMtvQ miM} MiM Mmi [ MMi ÎMMm} & AU îMm ■ mMn J- mMM miM ; mmM î MmM j .Mmî iMnimj MMm J T}. A12 mMm} .-Mi mmM} imM sMmM] Mnim} Mini O A13 min; mMi ) mmi ■nimM | imM J imm jMmmJ Mim | O A14 mini J m:i: mMtJ mmi $ imi; imM ji îmm £ iim i Mim Çy AÏS Mim • mim j mil ( mMi i mmi J imi | smM J inim J sim J A16 Mim} Mil ; mil ( nM} Mi i im; { ImM [ KM î iim ( Q A17 MiM ; Mim | Mil { MMi i mMi ) Mi ( iMM î imM )<M { o AÏS M> M [ Mim i MB- { MMi | mMi i iMi «MM I imM î «M (Q. Where II to 16 denote the intervals within a period of switching, the symbol [ indicates that two states follow one another

13. within the same interval, the symbol | denotes a transition between two intervals involving a positive safety duration <5, the symbol denotes a transition between two intervals involving a negative safety duration <5 and the symbol ys indicates that each arrangement is cyclic, repeating identically from one switching period to another. A method according to the preceding claim, the command sequences being fourteen in number and defined in the following table: Sequence States successively applied^ Arrangements correr>pond3nt“ SI MmM Mini MMm MMi mMî mMM iMM imM Al 82 feM Mim Mim Ml* mMm mMi mMM mmM ImM A2 83 Mmi Mmm te teM miM mmM A3 Si Mimi Mmm •mm iMm mMm mim -"M mmM mmi A4 S5 îmi imm jMm ■im mim miM mii mmi Mmi As. A6 S6 imi Mi iMm ■im ts'M miM mü Mi. MmM Mmt Mmm MMm Garlic S KJ mMm mMi mW mmM imM Mmm Mim ®n A12 SU mtm mMn'! mMi mmi minM ■mM imm Mmrn Mim A13 S12 mrm rniî rnMt mmi imi imM imm iim Mim AU ; AÏS 813 Mim Mii mii mMi iMi ■mM 8M iim AÏS 814 MM Mim Mi! MMi mM; iM: iMM imM te! AIT; A13

14. a command sequence being unique to given LF voltages and LF current references. The method according to the preceding claim, the arrangement applied being that which corresponds to the "small" value of the reference current ratio in the following table, i.e., in the case where this ratio is less than a limit value XUm which is less than 1, otherwise the arrangement applied being that which corresponds to the "large" value of the reference current ratio in the same table, i.e., in the case where this ratio is greater than the limit value Xiim: Angular sector Value dfe small large sequence arrangement sequence ■arrangement 1 S2 A2 SI Al n S3 A3 S4 A4 ni S5 AS A4 IV SS A6 S6 A7 V' S7 A8 S6 A7 VI b / AS SS A1Ô VH S9 Ail SS A10 VIII S10 A12 SM A13 IX SI 2 A14 SM AM X SI 2 A15 S13 A16 XI SM A17 SI 3 AÏS XH SM A1S SI Al

15. A method according to the preceding claim, wherein a variable X is defined such that: REF = it— jREF SO where W is the angle spanned by a peak of the current ii and extending to the zero crossing of the current on the curve followed by ii when it is not zero, considering a scale of angles in radians based on the switching period, the selection of the arrangement to apply being made according to the value of W, if W is less than a limit value i.e. jA, the applied arrangement being

16.

17.

18. that which corresponds to the "small" value of X in the table of claim 14, otherwise the applied arrangement being that which corresponds to the "large" value of X in the same table, WHm corresponding to the width of an interval, i.e. ir / 3, to which is added, or subtracted depending on the arrangement, the safety duration <5. Method according to the preceding claim, the limit value Xiim of the variable X defining the transition between the "small" and "large" values ​​of the table of claim 14 is defined such that: Method according to claim 8, the matrix converter being of type 3x2 having two output arms A, B. Method according to the preceding claim with reference to claim 7, the possible connections of arms A, B to phases R, S, T and their impact on the LF currents (iR, is, iT) being defined in the following table, the positive sign of an HF current (iA) indicating a current leaving the converter, the negative sign of this current indicating a current entering the converter: current arm A 8 «R '^TRR 0 0 R -A û RT 0 -3 * SR 4 A 0 q S G- 0 0 s T & £ A ■ TR 0 ( ATS 9 ;A % TT g 0 0

19. Method according to the preceding claim with reference to claim 6, the possible states in notation<M,i,m> arms A, B and their impact on the BF currents (iR, is, iT) are defined in the following table: current arm AB $ MM 0 0 QM s «A -¼ 0 M mo "V i M “V gi î 0 0 0: S Û *A —V m 0 'ZA m 4 Ü' mm 0 0 Û

20. A method according to the preceding claim with reference to claim 3, an interval being defined by the duration separating two zero crossings of the HF currents, a switching period comprising two substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed in the intervals, the set of possible arrangements being defined in the following table: Sector Interval 11!2 I & Xî! Mm i- Mi i- { O a & m Mm îm ; mi s IV & V jm î iM rnM mi! Mi O VI & VH iM: mM Mi £ Mm * vm & ix mi mM Vf. Mm} XA: XI Mi m: iM irr. Where II and 12 denote the intervals within a switching period, the symbol j indicates that two states succeed one another within the same interval, the symbol i denotes a transition between two intervals involving a positive safety duration <5, the symbol | denotes a transition between two intervals involving a negative safety duration <5, the symbol q indicates that each arrangement is cyclic, repeating identically from one switching period to another, The notation of type “j^yp” refers to an intermediate state of duration less than or equal to 2ô appearing at the transition between intervals.

21. Product computer program comprising instructions readable by the processor of a device for carrying out the method according to any one of the preceding claims.

22. Matrix AC / AC power converter comprising a matrix of bidirectional current and voltage switches, suitable for input connection to a low-frequency RST three-phase electrical network LF and output connection to a high-frequency (HF) operating inductive circuit, configured to be controlled by the method according to any one of claims 1 to 20 in order to control the active power P and reactive power Q exchanged with the LF network.

23. DC power source, in particular battery charger, from a three-phase network comprising: - the converter according to the preceding claim, - a converter controller configured to implement the control method according to any one of claims 1 to 20, - a transformer comprising the high-frequency inductive circuit HF, and - an AC / DC converter at the output of the transformer and configured to supply a DC current.

Citation Information

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