Light-emitting substrate and light-emitting apparatus

Abstract

Disclosed is a light-emitting substrate. The light-emitting substrate comprises a first conductive coil, a light-emitting unit, and a control circuit. The first conductive coil is provided with a first end and a second end, and the first conductive coil is coupled to an external coil, so as to generate a first power source signal. The light-emitting unit comprises a first electrode and a second electrode, wherein the second electrode of the light-emitting unit is electrically connected to the first end of the first conductive coil. A control end of the control circuit is electrically connected to the second end of the first conductive coil, an input end of the control circuit is electrically connected to a first power source end, and an output end of the control circuit is electrically connected to the first electrode of the light-emitting unit. A first voltage signal provided by the first power source end is a direct-current voltage signal. The control circuit is configured to transmit the first voltage signal, which is received at the first power source end, to the light-emitting unit under the control of the first power source signal from the first conductive coil, such that the light-emitting unit emits light.

Description

Light-emitting substrate and light-emitting device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a light-emitting substrate and a light-emitting device. Background Art

[0002] Near Field Communication (NFC) is an emerging technology that allows devices (such as mobile phones) to exchange data when they are close to each other. Based on this, NFC can be widely used in payment, security, tagging, and other applications.

[0003] Summary of the Invention

[0004] On the one hand, a light-emitting substrate is provided. The light-emitting substrate includes a first conductive coil, a light-emitting unit and a control circuit. The first conductive coil has a first end and a second end. The first conductive coil is used to couple with an external coil so that the first conductive coil forms a first power supply signal. The light-emitting unit includes a first electrode and a second electrode. The second electrode of the light-emitting unit is electrically connected to the first end of the first conductive coil. The control end of the control circuit is electrically connected to the second end of the first conductive coil, the input end of the control circuit is electrically connected to the first power supply end, and the output end of the control circuit is electrically connected to the first electrode of the light-emitting unit. The first voltage signal provided by the first power supply end is a DC voltage signal. The control circuit is configured to transmit the first voltage signal received at the first power supply end to the light-emitting unit under the control of the first power supply signal from the first conductive coil, so that the light-emitting unit emits light.

[0005] In some embodiments, the control circuit includes: a first control unit and a second control unit. The control terminal of the first control unit is electrically connected to the first conductive coil at a first node, the input terminal of the first control unit is electrically connected to the first power supply terminal, and the output terminal of the first control unit is electrically connected to the second node. The control terminal of the second control unit is electrically connected to the first conductive coil at a first node, the input terminal of the second control unit is electrically connected to the first power supply terminal, and the output terminal of the second control unit is electrically connected to the second node.

[0006] In some embodiments, the first control unit includes a P-type transistor, and the second control unit includes an N-type transistor.

[0007] In some embodiments, the light-emitting substrate further comprises: a base substrate, a first gate metal layer, a first source-drain metal layer, a first electrode metal layer, and a second electrode metal layer. The first gate metal layer is located on one side of the base substrate, and the first gate metal layer includes a control electrode of a P-type transistor and a control electrode of an N-type transistor. The first source-drain metal layer is located on a side of the first gate metal layer away from the base substrate, and the first source-drain metal layer includes a first electrode of a P-type transistor, a second electrode of a P-type transistor, a first electrode of an N-type transistor, and a second electrode of an N-type transistor. The first electrode metal layer is located on a side of the first source-drain metal layer away from the base substrate. The second electrode metal layer is located on a side of the first electrode metal layer away from the base substrate. Among them, one of the first electrode of the light-emitting unit and the second electrode of the light-emitting unit is located in the first electrode metal layer, and the other is located in the second electrode metal layer.

[0008] In some embodiments, a voltage value of the first voltage signal is greater than 0 V. The first electrode of the light emitting unit is located in the first electrode metal layer, and the second electrode of the light emitting unit is located in the second electrode metal layer.

[0009] In some embodiments, the voltage value of the first voltage signal ranges from 2V to 5V.

[0010] In some embodiments, the first electrode metal layer further includes a first connecting portion; the first end of the first conductive coil is electrically connected to the second electrode of the light-emitting unit through the first connecting portion.

[0011] In some embodiments, a voltage value of the first voltage signal is less than 0 V. The first electrode of the light emitting unit is located in the second electrode metal layer, and the second electrode of the light emitting unit is located in the first electrode metal layer.

[0012] In some embodiments, the voltage value of the first voltage signal ranges from -5V to -2V.

[0013] In some embodiments, the first electrode metal layer further includes a second connecting portion; the second electrode of the P-type transistor and the second electrode of the N-type transistor are electrically connected to the first electrode of the light-emitting unit through the second connecting portion.

[0014] In some embodiments, the first conductive coil is located in one of the first gate metal layer and the first source / drain metal layer.

[0015] In some embodiments, the light-emitting substrate further includes: a second conductive coil connected in parallel with the first conductive coil.

[0016] In some embodiments, of the first conductive coil and the second conductive coil, one is located in the first source / drain metal layer, and the other is located in the first gate metal layer.

[0017] In some embodiments, an orthographic projection of the first conductive coil on the substrate at least partially overlaps with an orthographic projection of the second conductive coil on the substrate.

[0018] In some embodiments, the thickness of the first conductive coil is greater than or equal to 1 μm.

[0019] In some embodiments, the number of turns of the first conductive coil is greater than or equal to 10 turns.

[0020] In some embodiments, the line width of the first conductive coil is greater than or equal to 500 μm.

[0021] In some embodiments, the first conductive coil includes multiple turns of conductive wire; and a first minimum spacing between two adjacent turns of conductive wire is greater than or equal to 10 μm.

[0022] In some embodiments, the light emitting unit includes a light emitting diode.

[0023] In another aspect, a light-emitting device is provided, comprising: a light-emitting substrate as described in any one of the above embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, actual timing of signals, and the like involved in the embodiments of the present disclosure.

[0025] FIG1 is a structural diagram of a light emitting device according to some embodiments;

[0026] FIG2 is a structural diagram of a light-emitting substrate according to some embodiments;

[0027] FIG3 is a driving circuit diagram of a light-emitting substrate according to some embodiments;

[0028] FIG4 is a driving circuit diagram of a light-emitting substrate according to some other embodiments;

[0029] FIG5 is a cross-sectional view taken along the line AA' in FIG2;

[0030] FIG6 is a cross-sectional view taken along the line BB' in FIG2;

[0031] FIG7 is a cross-sectional view taken along the line CC' in FIG2;

[0032] FIG8 is a cross-sectional view taken along the line D-D' in FIG2 ;

[0033] FIG9 is a driving circuit diagram of a light-emitting substrate according to yet other embodiments;

[0034] FIG10 is a waveform diagram of a first power signal and a first voltage signal in a control circuit according to some embodiments;

[0035] FIG11 is another cross-sectional view taken along line AA' in FIG2;

[0036] FIG12 is a driving circuit diagram of a light-emitting substrate according to yet other embodiments;

[0037] FIG13 is a waveform diagram of a first power signal and a first voltage signal in a control circuit according to some other embodiments;

[0038] FIG14 is a structural diagram of a light-emitting substrate according to some other embodiments;

[0039] FIG15 is a cross-sectional view taken along the line H-H' in FIG14;

[0040] FIG. 16 is another cross-sectional view taken along line HH′ in FIG. 14 . DETAILED DESCRIPTION

[0041] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0042] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0043] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0044] When describing some embodiments, the word "connected" and its derivatives may be used. The term "connected" should be understood broadly. For example, "connected" can mean fixed, removable, or integrated; it can be directly connected or indirectly connected through an intermediary. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0045] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0046] As used herein, the term "if" is optionally interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined that" or "if [stated condition or event] is detected" are optionally interpreted to mean "upon determining" or "in response to determining" or "upon detecting [stated condition or event]" or "in response to detecting [stated condition or event]," depending on the context.

[0047] The use of "adapted to" or "configured to" herein is intended to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0048] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0049] As used herein, "about" or "approximately" includes the stated value and the average value that is within an acceptable range of deviation from the particular value, where the acceptable range of deviation is determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0050] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0051] In this context, "same layer" refers to a layer structure formed using the same film-forming process to form a specific pattern, followed by a single patterning process using the same mask. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching steps, and the specific patterns within the resulting layer structure may be continuous or discontinuous, at varying heights or thicknesses.

[0052] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0053] The transistors used in the circuits provided in the embodiments of the present disclosure may be thin film transistors, field effect transistors, or other switching devices with the same characteristics. The embodiments of the present disclosure are described using thin film transistors as an example.

[0054] In the circuit structure provided in the embodiments of the present disclosure, the first electrode of each transistor is one of the source and the drain, and the second electrode of each transistor is the other of the source and the drain. Since the source and drain of the transistor can be structurally symmetrical, the source and drain can be structurally identical. In other words, the first electrode and the second electrode of the transistor in the embodiments of the present disclosure can be structurally identical.

[0055] In the circuit structure provided by the embodiments of the present disclosure, the first node, the second node and other nodes do not represent actual existing components, but represent the junction points of related couplings in the circuit diagram. That is, these nodes are nodes formed by the equivalent junction points of related couplings in the circuit diagram.

[0056] FIG1 is a structural diagram of a light emitting device according to some embodiments.

[0057] Some embodiments of the present disclosure provide a light-emitting device 200. As shown in FIG1 , the light-emitting device 200 may include a light-emitting substrate 100. The light-emitting device 200 may emit light through the light-emitting substrate 100 to display a fixed image or provide prompts; furthermore, the light-emitting substrate 100 may also enable near-field communication (NFC).

[0058] For example, the light emitting device 200 further includes a frame, and the light emitting device 200 can fix the light emitting substrate 100 using the frame.

[0059] Exemplarily, the light emitting device 200 can be any light emitting device 200 that displays a fixed image (e.g., a still image), whether text or text. More specifically, it is expected that the light emitting device of the embodiments described can be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal data assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, video cameras, game consoles, watches, clocks, calculators, television monitors, flat-panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigation systems, cockpit controls and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photographs, electronic billboards or signs, light emitting film strips, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images for a piece of jewelry), etc.

[0060] It is worth noting that in some feasible ways, the electrical signal generated by the magnetic field formed by the NFC antenna is generally an AC signal (a sine wave with positive and negative bands). However, due to the unidirectional conduction characteristic of the light-emitting unit, it is impossible to use an AC signal to emit light, and it can only use a DC voltage to emit light. Therefore, the NFC antenna and the light-emitting unit need to be driven separately, and then the light-emitting device needs to integrate the NFC antenna and display functions in different substrates. That is, the light-emitting device may include a substrate with an NFC antenna and a display panel, and the substrate with the NFC antenna is attached to the backlight side of the display panel, so that the light-emitting device can integrate the NFC function and the display function. However, the above arrangement will lead to a complex structure of the light-emitting device, which is not conducive to the light-weighting of the light-emitting device.

[0061] FIG2 is a structural diagram of a light-emitting substrate according to some embodiments, and FIG3 is a driving circuit diagram of the light-emitting substrate according to some embodiments.

[0062] Some embodiments of the present disclosure provide a light-emitting substrate 100. Referring to Figures 2 and 3, the light-emitting substrate 100 includes a first conductive coil 10, a light-emitting unit E, and a control circuit 20.

[0063] Exemplarily, the light-emitting substrate 100 can be one of an OLED (Organic Light Emitting Diode) light-emitting substrate, a QLED (Quantum Dot Light Emitting Diodes) light-emitting substrate, a micro LED (including: Mini LED or Micro LED, LED is a light-emitting diode) light-emitting substrate, and an electronic ink light-emitting substrate.

[0064] The first conductive coil 10 is an NFC antenna and has a first end 11 and a second end 12 .

[0065] Exemplarily, the first end 11 of the first conductive coil 10 is located outside the first conductive coil 10 , and the second end of the first conductive coil 10 is located inside the first conductive coil 10 .

[0066] For example, the light-emitting substrate 100 may include a base substrate, and the first conductive coil 10 may be located on the base substrate. The orthographic projection of the first conductive coil 10 on the base substrate may be roughly triangular, rectangular, or circular. FIG. 2 illustrates an example in which the orthographic projection of the first conductive coil 10 on the base substrate is a rectangle. However, some embodiments of the present disclosure are not limited to this shape for the first conductive coil 10.

[0067] Based on this, when the external coil and the light-emitting substrate 100 are close to each other, the external coil couples with the first conductive coil 10, and a magnetic field is formed between the external coil and the first conductive coil 10, enabling data exchange between the external coil and the light-emitting substrate 100. The light-emitting substrate 100 implements near-field communication via the first conductive coil 10. Furthermore, when the external coil and the first conductive coil 10 form a magnetic field, the first conductive coil 10 can also generate a first power signal.

[0068] 2 and 3 , the light emitting unit E includes a first electrode P1 and a second electrode P2 . The second electrode P2 of the light emitting unit E is electrically connected to the first end 11 of the first conductive coil 10 , thereby electrically connecting the light emitting unit E to the first conductive coil 10 .

[0069] Exemplarily, one of the first electrode P1 and the second electrode P2 in the light-emitting unit E is an anode of the light-emitting unit E, and the other is a cathode of the light-emitting unit E.

[0070] For example, the first electrode P1 of the light-emitting unit E is the anode of the light-emitting unit E, and the second electrode P2 of the light-emitting unit E is the cathode of the light-emitting unit E. Alternatively, the first electrode P1 of the light-emitting unit E is the cathode of the light-emitting unit E, and the second electrode P2 of the light-emitting unit E is the anode of the light-emitting unit E.

[0071] 2 and 3 , the light-emitting substrate 100 further includes a control circuit 20. The control circuit 20 can be connected in series between the first conductive coil 10 and the light-emitting unit E, so that the first conductive coil 10, the control circuit 20 and the light-emitting unit E can form a loop.

[0072] Exemplarily, the control circuit 20 includes a control terminal 21, an input terminal 22, and an output terminal 23. The input terminal 22 of the control circuit 20 is electrically connected to the first power terminal V, which is configured to transmit a DC voltage signal. Furthermore, the control terminal 21 of the control circuit 20 is electrically connected to the second terminal 12 of the first conductive coil 10, and the output terminal 23 of the control circuit 20 is electrically connected to the first electrode P1 of the light-emitting unit E.

[0073] The control circuit 20 is configured to transmit the first voltage signal V2 received at the first power terminal V to the light emitting unit E under the control of the first power signal from the first conductive coil 10, so as to make the light emitting unit E emit light.

[0074] Based on this, when the external coil and the first conductive coil 10 can form a magnetic field, the first conductive coil 10 can also generate a first power signal. Because the control terminal 21 of the control circuit 20 is electrically connected to the second terminal 12 of the first conductive coil 10, the control terminal 21 of the control circuit 20 can receive the first power signal from the first conductive coil 10. The control circuit 20 can be turned on under the control of the first power signal. The control circuit 20 can transmit the first voltage signal V2 received from the input terminal 22 of the control circuit 20 to the light-emitting unit E via the output terminal 23 of the control circuit 20. The light-emitting unit E can then receive the first voltage signal V2 at the output terminal 23 of the control circuit 20, thereby emitting light.

[0075] In summary, some embodiments of the present disclosure provide a light-emitting substrate 100 that can fully utilize the first power signal generated within the first conductive coil 10 when the first conductive coil 10 forms a magnetic field with an external coil. Although the first power signal generated by the magnetic field generated by the first conductive coil 10 is an AC signal and cannot directly act on the light-emitting unit E to cause it to emit light, a control circuit can be directly connected in series between the first conductive coil 10 and the light-emitting unit E. The first power signal generated by the first conductive coil 10 can be used to drive the control circuit 20 to conduct. The control circuit 20 can then transmit the first voltage signal V2 provided from the first power terminal V to the light-emitting unit E to cause the light-emitting unit E to emit light. Based on this, the light-emitting substrate 100 can integrate the first conductive coil 10 and the light-emitting unit E on the same substrate, that is, simultaneously integrating NFC wireless communication and display on the same substrate, which also facilitates the light-emitting substrate 100 to be lightweight and thin.

[0076] Furthermore, since the light-emitting substrate 100 can also use the first conductive coil 10 to power the light-emitting unit E, driving the light-emitting unit E to emit light and display, the light-emitting substrate 100 can achieve passive driving through electromagnetic induction without requiring a power supply to power the light-emitting unit, thereby simplifying the structure of the light-emitting substrate 100.

[0077] In some examples, the near field identification (NFC) band is 13.56 MHz. Based on this, the light-emitting substrate 100 can use the first conductive coil 10 to receive the 13.56 MHz electromagnetic signal to perform light-emitting display.

[0078] In some embodiments, referring to FIG. 2 , the thickness of the first conductive coil 10 in the light-emitting substrate 100 is greater than or equal to 1 μm.

[0079] The thicker the first conductive coil 10 is in the light-emitting substrate 100, the lower its internal resistance and the greater its inductance, which can improve the signal quality of the NFC antenna. Furthermore, when the thickness of the first conductive coil 10 is equal to or close to 1 μm, the thicker the first conductive coil 10 can be, which can help reduce its internal resistance, and thus the internal resistance of the NFC antenna. A greater inductance of the NFC antenna improves the signal quality of the NFC antenna.

[0080] In some examples, the thickness of the first conductive coil 10 in the light emitting substrate 100 is approximately 1 μm, 1.5 μm, 2 μm, 2.5 μm, or 3 μm. However, some embodiments of the present disclosure are not limited thereto.

[0081] It should be noted that, taking the thickness of the first conductive coil 10 as approximately 1 μm as an example, due to certain uncontrollable errors (such as manufacturing process errors and equipment precision), the thickness of the first conductive coil 10 can fluctuate within a range of 5% × 1 μm. In other words, when the thickness of the first conductive coil 10 fluctuates within a range of ±0.05 μm, it can be considered that the thickness of the first conductive coil 10 meets the requirement of being equal to 1 μm. Other numerical fluctuation ranges for the thickness of the first conductive coil 10 are as described above and are not further elaborated here.

[0082] In some embodiments, referring to FIG. 2 , the number of turns of the first conductive coil 10 in the light-emitting substrate 100 is greater than or equal to 10. However, to clearly illustrate the structure of the first conductive coil 10, FIG. 2 only shows a first conductive coil 10 with three turns. For first conductive coils 10 with other numbers of turns, the connection between the first end 11 and the second end 12 of the first conductive coil 10 is the same as that of the first conductive coil 10 with three turns shown in FIG. 2 , the difference being the number of turns of the first conductive coil 10.

[0083] The more turns of the first conductive coil 10 provided in the light-emitting substrate 100, the stronger the magnetic field generated by the first conductive coil 10, thereby improving the signal quality of the NFC antenna. Furthermore, when the number of turns of the first conductive coil 10 is equal to or close to 10, the first conductive coil 10 can be provided with a larger number of turns. This can help enhance the magnetic field generated by the first conductive coil 10, thereby strengthening the magnetic field generated by the NFC antenna and increasing the signal strength of the NFC antenna, thereby improving the signal quality of the NFC antenna.

[0084] In some examples, please continue to refer to FIG. 2 , the number of turns of the first conductive coil 10 in the light-emitting substrate 100 may be greater than or equal to 30 turns.

[0085] When the number of turns of the first conductive coil 10 is equal to or close to 30 turns, the intensity of the magnetic field formed by the first conductive coil 10 can be made stronger, thereby better enhancing the signal strength of the NFC antenna and improving the signal quality of the NFC antenna.

[0086] For example, the number of turns of the first conductive coil 10 in the light emitting substrate 100 is approximately 10 turns, 15 turns, 20 turns, 30 turns, 40 turns, 50 turns, 60 turns, 70 turns or 80 turns. However, some embodiments of the present disclosure are not limited thereto.

[0087] In some embodiments, referring to FIG. 2 , the number of turns of the first conductive coil 10 in the light-emitting substrate 100 is less than or equal to 80 turns.

[0088] Since the size of the light-emitting substrate 100 is fixed, that is, the internal space of the light-emitting substrate 100 is limited, when the number of turns of the first conductive coil 10 is large, the line spacing between two adjacent turns of the first conductive coil 10 will be small, the coil routing will be more difficult, and short circuit problems will easily occur.

[0089] Based on this, the number of turns of the first conductive coil 10 in the light-emitting substrate 100 can be set to be less than or equal to 80. When the number of turns of the first conductive coil 10 in the light-emitting substrate 100 is equal to or close to 80, the number of turns of the first conductive coil 10 can be ensured to be large while ensuring sufficient spacing between adjacent turns of the first conductive coil. In other words, the signal quality of the NFC antenna can be improved while preventing short circuits at various locations on the NFC antenna.

[0090] In some examples, please continue to refer to FIG. 2 , the number of turns of the first conductive coil 10 in the light-emitting substrate 100 is less than or equal to 50 turns.

[0091] When the number of turns of the first conductive coil 10 is equal to or close to 50 turns, the signal quality of the NFC antenna in the light-emitting substrate 100 can be improved, and the coil routing of the NFC antenna is less difficult.

[0092] For example, the number of turns of the first conductive coil 10 in the light emitting substrate 100 is approximately 10 turns, 15 turns, 20 turns, 30 turns, 40 turns, 50 turns, 60 turns, 70 turns or 80 turns. However, some embodiments of the present disclosure are not limited thereto.

[0093] In some examples, please continue to refer to FIG. 2 , the number of turns of the first conductive coil 10 in the light-emitting substrate 100 may range from 10 turns to 80 turns.

[0094] Setting the number of turns of the first conductive coil 10 in the light-emitting substrate 100 within the above range can not only meet the requirement for the number of turns of the first conductive coil 10 in the light-emitting substrate 100, so that the NFC antenna in the light-emitting substrate 100 has good signal quality, but also meet the requirement for the difficulty of the coil routing of the first conductive coil 10 in the light-emitting substrate 100, so as to prevent short circuits at various positions of the NFC antenna.

[0095] In some embodiments, referring to FIG. 2 , the line width of the first conductive coil 10 in the light-emitting substrate 100 is greater than or equal to 500 μm.

[0096] The wider the line width of the first conductive coil 10 in the light-emitting substrate 100, the lower the internal resistance of the first conductive coil 10 and the greater the inductance generated by the first conductive coil 10, thereby improving the signal quality of the NFC antenna. Furthermore, when the line width of the first conductive coil 10 is equal to or close to 500 μm, the wider line width of the first conductive coil 10 can be used to reduce the internal resistance of the first conductive coil 10, and thus the internal resistance of the NFC antenna. A greater inductance of the NFC antenna improves the signal quality of the NFC antenna.

[0097] In some examples, the line width of the first conductive coil 10 is approximately 500 μm, 550 μm, 600 μm, or 650 μm, but some embodiments of the present disclosure are not limited thereto.

[0098] It should be noted that, taking the line width of the first conductive coil 10 as an example, which is approximately 500 μm, due to certain uncontrollable errors (such as manufacturing process errors and equipment precision), the line width of the first conductive coil 10 can be considered to meet the 500 μm requirement when the line width of the first conductive coil 10 fluctuates within a range of 5% × 500 μm. In other words, when the line width of the first conductive coil 10 fluctuates within a range of ±25 μm, the line width of the first conductive coil 10 can also be considered to meet the requirement of 500 μm. Other numerical fluctuation ranges for the line width of the first conductive coil 10 are as described above and are not further elaborated here.

[0099] In some embodiments, referring to FIG. 2 , the first conductive coil 10 in the light-emitting substrate 100 includes multiple turns of conductive wire 10 a , and a first minimum distance D01 between two adjacent turns of conductive wire 10 a is greater than or equal to 10 μm.

[0100] If the first minimum spacing D01 between two adjacent turns of conductive wire 10a in the first conductive coil 10 is set too small, the conductive wires 10a in the first conductive coil 10 will be arranged too densely, which may easily cause problems such as short circuits between adjacent conductive wires 10a. Furthermore, the dense arrangement of conductive wires 10a will make routing the first conductive coil 10 more difficult, making it difficult to manufacture.

[0101] Based on this, the first minimum distance D01 between two adjacent turns of the conductive wire 10a in the first conductive coil 10 can be set to be greater than or equal to 10 μm. When the first minimum distance D01 between two adjacent turns of the conductive wire 10a in the first conductive coil 10 is equal to or close to 10 μm, the first minimum distance D01 between two adjacent turns of the conductive wire 10a in the first conductive coil 10 will not be too small, thereby preventing short circuits. The first minimum distance D01 between two adjacent turns of the conductive wire 10a in the first conductive coil 10 will also be kept from being too large, thereby preventing the first minimum distance D01 from occupying too much space on the light-emitting substrate 100 and reducing the number of turns of the first conductive coil 10.

[0102] In some examples, the first minimum distance D01 between two adjacent turns of the conductive wire 10a in the first conductive coil 10 is approximately 10 μm, 12 μm, 15 μm, 18 μm, or 20 μm, but the present disclosure is not limited thereto.

[0103] It should be noted that, taking the first minimum spacing D01 between two adjacent turns of wire 10a in the first conductive coil 10 as an example, which is approximately 10 μm, due to certain uncontrollable errors (such as manufacturing process errors and equipment precision), the first minimum spacing D01 between two adjacent turns of wire 10a in the first conductive coil 10 can be considered to meet the 10 μm requirement if the error range is within 5% × 10 μm. That is, if the first minimum spacing D01 fluctuates within a range of ±0.5 μm, the first minimum spacing D01 between two adjacent turns of wire 10a in the first conductive coil 10 can also be considered to meet the requirement of 10 μm. Other numerical fluctuation ranges for the first minimum spacing D01 between two adjacent turns of wire 10a in the first conductive coil 10 are as described above and are not further detailed here.

[0104] In some embodiments, as shown in FIG3 , the first voltage signal V2 provided by the first power terminal V includes a smooth DC voltage signal or a pulsating DC voltage signal.

[0105] For example, the first voltage signal V2 provided by the first power supply terminal V can be a smooth DC voltage signal. For example, the voltage value of the first voltage signal V2 is a fixed value that is not zero. In this case, the light-emitting unit E can continuously receive the constant first voltage signal V2, thereby stabilizing the brightness of the light-emitting unit E and improving the display effect of the light-emitting substrate 100.

[0106] For example, the first voltage signal V2 provided by the first power supply terminal V can be a pulsating DC voltage signal. For example, the voltage value of the first voltage signal V2 can be a varying positive value, or the voltage value of the first voltage signal V2 can be a varying negative value. In this case, the light-emitting unit E can continuously receive a positive voltage or a negative voltage to emit light.

[0107] In some embodiments, as shown in FIG3 , the light emitting unit E includes at least one light emitting diode.

[0108] In some examples, the light-emitting unit E may include a light-emitting diode (LED). The light-emitting substrate 100 may utilize the LED in the light-emitting unit E to emit light, thereby providing a prompt. In this case, the anode of the LED serves as the anode of the light-emitting unit E, and the cathode of the LED serves as the cathode of the light-emitting unit E.

[0109] In other examples, the light-emitting unit E may include multiple light-emitting diodes. The light-emitting substrate 100 may utilize the multiple diodes in the light-emitting unit E to emit light to display a fixed image. For example, the multiple light-emitting diodes may be arranged according to a desired image, and the multiple light-emitting diodes may emit light to display a fixed image.

[0110] Wherein, multiple light emitting diodes can be connected in parallel or in series.

[0111] When multiple light-emitting diodes are connected in series, the cathodes and anodes of two adjacent light-emitting diodes are electrically connected, and the anode of the first light-emitting diode can serve as the anode of the light-emitting unit E, and the cathode of the last light-emitting diode can serve as the cathode of the light-emitting unit E.

[0112] When multiple light-emitting diodes are connected in parallel, the anodes of the multiple light-emitting diodes are electrically connected to each other, and the anode of any light-emitting diode can serve as the anode of the light-emitting unit E; the cathodes of the multiple light-emitting diodes are electrically connected to each other, and the cathode of any light-emitting diode can serve as the cathode of the light-emitting unit E.

[0113] In some examples, the light emitting diode may include an organic light emitting diode or an inorganic light emitting diode.

[0114] Exemplarily, the light emitting unit E may be one of an organic light emitting diode (OLED), a quantum dot light emitting diode (QLED), a light emitting diode (LED), and a liquid crystal light emitting unit, but is not limited thereto.

[0115] Some embodiments of the present disclosure do not limit the type of the light-emitting unit E, that is, the light-emitting unit E can be any other light-emitting device (such as a light-emitting device that emits light by discharge), as long as they can emit light so that the light-emitting substrate 100 can emit light.

[0116] In some examples, the light-emitting unit E is an organic light-emitting diode OLED.

[0117] The light emitting unit E further includes a light emitting portion located between the first electrode P1 and the second electrode P2. The light emitting portion includes a light emitting layer (EML).

[0118] When the light-emitting unit E receives the first voltage signal V2 from the control circuit 20, that is, when the light-emitting unit E is powered on, electrons and holes migrate to the light-emitting layer through the first electrode P1 and the second electrode P2 respectively, and meet in the light-emitting layer to form excitons and excite the light-emitting molecules, which emit visible light through radiative relaxation.

[0119] In some examples, in addition to the light-emitting layer, the light-emitting portion may also include one or more layers of an electron transport layer (ETL), an electron injection layer (EIL), a hole transport layer (HTL), and a hole injection layer (HIL).

[0120] When the light-emitting unit E receives the first voltage signal V2 from the control circuit 20, that is, when the light-emitting unit E is powered on, holes enter the light-emitting unit E from the anode (one of the first electrode P1 and the second electrode P2), pass through the hole injection layer and the hole transport layer, and electrons enter the light-emitting unit E from the cathode (the other of the first electrode P1 and the second electrode P2), pass through the electron injection layer and the electron transport layer, and both eventually reach the light-emitting layer, where the holes and electrons meet to form excitons and excite the light-emitting molecules, which emit visible light through radiative relaxation.

[0121] In some embodiments, referring to FIG. 3 , the control circuit 20 in the light-emitting substrate 100 includes a first control unit 20A and a second control unit 20B.

[0122] The control terminal of the first control unit 20A and the control terminal of the second control unit 20B are electrically connected to a first node N1, which can serve as the control terminal of the control circuit 20. The output terminal of the first control unit 20A and the output terminal of the second control unit 20B are electrically connected to a second node N1, which can serve as the output terminal of the control circuit 20. Furthermore, the output terminal of the first control unit 20A and the output terminal of the second control unit 20B are both electrically connected to a first power supply terminal V.

[0123] As shown above, when the control terminal 21 of the control circuit 20 receives the first power signal from the first conductive coil 10, the first node N1 can transmit the first power signal to the control terminals of the first control unit 20A and the second control unit 20B. At this point, the control terminals of the first control unit 20A and the second control unit 20B can alternately conduct in response to the first power signal from the first conductive coil 10, allowing the control circuit 20 to transmit the first voltage signal V2 from the first power terminal V to the light-emitting unit E, causing the light-emitting unit E to emit light.

[0124] FIG4 is a driving circuit diagram of a light-emitting substrate according to some other embodiments.

[0125] In some embodiments, referring to FIG. 4 , the first control unit 20A may include a P-type transistor T1 , and the second control unit 20B may include an N-type transistor T2 .

[0126] The control electrode c1 of the P-type transistor T1 is electrically connected to the first node N1; the first electrode a1 of the P-type transistor T1 is electrically connected to the first power supply terminal V; and the second electrode b1 of the P-type transistor T1 is electrically connected to the second node N2. The control electrode c2 of the N-type transistor T2 is electrically connected to the first node N1; the first electrode a2 of the N-type transistor T2 is electrically connected to the first power supply terminal V; and the second electrode b2 of the N-type transistor T2 is electrically connected to the second node N2. The first node N1 serves as the control terminal 21 of the control circuit 20; and the second node N2 serves as the output terminal 23 of the control circuit 20.

[0127] Based on this, when the control terminal 21 of the control circuit 20 receives the first power signal from the first conductive coil 10, that is, the first node N1 can transmit the first power signal to the control electrode c1 of the P-type transistor T1 and the control electrode c2 of the N-type transistor T2.

[0128] Since the first power signal is an AC signal, the first power signal is an alternating first level signal and a second level signal, wherein the voltage value of the first level signal in the first power signal is greater than the voltage value of the second level signal in the first power signal.

[0129] At a first moment, when the first power signal is a first level signal, that is, when the first power signal is a high level signal, after the control electrode c1 of the P-type transistor T1 receives the first power signal, the P-type transistor T1 is turned off, and after the control electrode c2 of the N-type transistor T2 receives the first power signal, the N-type transistor T2 is turned on. At this time, the N-type transistor T2 can transmit the first voltage signal V2 from the first power terminal V to the second node N2. Since the second node N2 serves as the output terminal 23 of the control circuit 20 and is electrically connected to the first electrode P1 of the light-emitting unit E, based on this, the first electrode P1 of the light-emitting unit E can receive the first voltage signal V2 from the output terminal 23 of the control circuit 20, which increases the potential of the first electrode P1, thereby creating a voltage difference between the two electrodes of the light-emitting unit E (the first electrode P1 and the second electrode P2), thereby driving the light-emitting unit E to emit light.

[0130] At the second moment, when the first power signal is at the second level, that is, when the first power signal is at a low level, after the control electrode c2 of the N-type transistor T2 receives the first power signal, the N-type transistor T2 is turned off. After the control electrode c1 of the P-type transistor T1 receives the first power signal, the P-type transistor T1 is turned on. At this time, the P-type transistor T1 can transmit the first voltage signal V2 from the first power terminal V to the second node N2. Since the second node N2 serves as the output terminal 23 of the control circuit 20 and is electrically connected to the first electrode P1 of the light-emitting unit E, the first electrode P1 of the light-emitting unit E can receive the first voltage signal V2 from the output terminal 23 of the control circuit 20, thereby raising the potential of the first electrode P1. This creates a voltage difference between the two electrodes of the light-emitting unit E (the first electrode P1 and the second electrode P2), driving the light-emitting unit E to emit light.

[0131] Based on this, under the control of the alternating first-level signal and the second-level signal of the first power supply signal, the N-type transistor T2 and the P-type transistor T1 are alternately turned on, so that the control circuit 20 can continuously transmit the first voltage signal V2 from the output terminal 23 of the control circuit 20 to the light-emitting unit E, so as to use the first voltage signal V2 to drive the light-emitting unit E to emit light.

[0132] FIG5 is a cross-sectional view taken along the line AA′ in FIG2 .

[0133] In some embodiments, referring to FIG. 5 , the light emitting substrate 100 further includes a base substrate 00 , a first gate metal layer 01 , a first source / drain metal layer 02 , a first electrode metal layer 03 , and a second electrode metal layer 04 .

[0134] In some examples, the base substrate 00 may be a flexible substrate. Exemplarily, the material of the base substrate 00 may be an organic material. For example, the material of the base substrate 00 may be any one of polyimide (English full name: Polyimide, English abbreviation: PI), polycarbonate (English full name: Polycarbonate, English abbreviation: PC), or polyvinyl chloride (English full name: Polyvinyl Chloride, English abbreviation: PVC).

[0135] In other examples, the substrate 00 may be a rigid substrate, for example, a glass substrate or a PMMA (Polymethyl Methacrylate) substrate.

[0136] The first gate metal layer 01 is located on one side of the base substrate 00. The first gate metal layer 01 includes a control electrode c1 of the P-type transistor T1 and a control electrode c2 of the N-type transistor T2.

[0137] In some examples, the light emitting substrate 100 further includes an active layer 05 between the base substrate 00 and the first gate metal layer 01. The active layer 05 includes a channel of the P-type transistor T1, and the active layer 05 also includes a channel of the N-type transistor T2.

[0138] For example, taking the case where both the P-type transistor T1 and the N-type transistor T2 are low temperature polysilicon transistors (LTPS), the active layer 05 is low temperature polysilicon (LTPS).

[0139] In some examples, the light emitting substrate 100 further includes a first gate insulating layer (GI) 06 located between the active layer 05 and the first gate metal layer 01 . The first gate insulating layer 06 insulates the active layer 05 from the first gate metal layer 01 .

[0140] For example, the material of the first gate insulating layer 06 includes any one of inorganic insulating materials such as silicon nitride, silicon oxynitride, and silicon oxide. The material of the first gate insulating layer 06 may also include silicon dioxide, but the present disclosure is not limited thereto.

[0141] The first source / drain metal layer 02 is located on the side of the first gate metal layer 01 away from the substrate 00. The first source / drain metal layer 02 includes a first electrode a1 of the P-type transistor T1, a second electrode b1 of the P-type transistor T1, a first electrode a2 of the N-type transistor T2, and a second electrode b2 of the N-type transistor T2.

[0142] In some examples, the light emitting substrate 100 further includes a first inter-layer dielectric (ILD) 07 between the first gate metal layer 01 and the first source / drain metal layer 02. The first inter-layer dielectric 07 insulates the first gate metal layer 01 and the first source / drain metal layer 02.

[0143] Exemplarily, the material of the first interlayer dielectric layer 07 may be silicon oxide (SiOx).

[0144] The first electrode metal layer 03 is located on a side of the first source / drain metal layer 02 away from the base substrate 00. The first electrode metal layer 03 includes an anode in the light emitting unit E (the first electrode P1 or the second electrode P2).

[0145] In some examples, the light-emitting substrate 100 further includes a planarization layer (PLN) 08 located between the first source / drain metal layer 02 and the first electrode metal layer 03. The planarization layer 08 not only insulates the first source / drain metal layer 02 and the first electrode metal layer 03 but also serves to planarize the substrate 100 to improve its flatness, facilitating the subsequent fabrication of other film layers on the planarization layer 08.

[0146] Exemplarily, the material of the planarization layer 08 may include an organic material. For example, the material of the planarization layer 08 may include polyimide, an acrylic-based polymer, or a silicon-based polymer.

[0147] The second electrode metal layer 04 is located on a side of the first electrode metal layer 03 away from the base substrate 00. The second electrode metal layer 04 comprises a cathode in the light emitting unit E (the second electrode P2 or the first electrode P1).

[0148] Among them, one of the first electrode P1 of the light emitting unit E and the second electrode P2 of the light emitting unit E is located in the first electrode metal layer 03 , and the other is located in the second electrode metal layer 04 .

[0149] For example, the first electrode metal layer 03 includes the first electrode P1 in the light emitting unit E, and the second electrode metal layer 04 includes the second electrode P2 in the light emitting unit E. Alternatively, the first electrode metal layer 03 includes the second electrode P2 in the light emitting unit E, and the second electrode metal layer 04 includes the first electrode P1 in the light emitting unit E.

[0150] In some embodiments, referring to FIG. 5 , the light-emitting substrate 100 further includes a light-emitting definition layer 09. The light-emitting definition layer 09 is located between the first electrode metal layer 03 and the second electrode metal layer 04. The light-emitting definition layer 09 includes a plurality of openings W. The light-emitting portion E0 of the light-emitting unit E is located within the openings W, and the light-emitting portion E0 is sandwiched between the first electrode P1 and the second electrode P2.

[0151] In some embodiments, referring to FIG. 5 , the first conductive coil 10 is located in the first gate metal layer 01. Forming the first conductive coil 10 in the first gate metal layer 01 eliminates the need for a separate metal layer in the light-emitting substrate 100 and increases the manufacturing process of the light-emitting substrate 100.

[0152] In some examples, the first conductive coil 10 can be provided and formed in the same patterning process as the control electrode c1 of the P-type transistor T1 and the control electrode c2 of the N-type transistor T2 located in the first gate metal layer 01. This can simplify the manufacturing process of the light-emitting substrate 100.

[0153] In some examples, the first gate metal layer 01 can be made of copper. Therefore, the first conductive coil 10 can also be made of copper. Since copper has a lower resistance, the first conductive coil 10 can have a thinner heat release linewidth, allowing for a greater number of turns within a given space. This can increase the magnetic field strength of the first conductive coil 10 and, in turn, improve the quality of near-field communication on the light-emitting substrate 100.

[0154] In other embodiments, the first conductive coil 10 may be located in the first source / drain metal layer 02. Forming the first conductive coil 10 in the first source / drain metal layer 02 eliminates the need for a separate metal layer in the light-emitting substrate 100, and thus eliminates the need for additional manufacturing steps for the light-emitting substrate 100.

[0155] In some examples, the first conductive coil 10 can be provided and formed using the same patterning process as the first electrode a1 of the P-type transistor T1, the second electrode b1 of the P-type transistor T1, the first electrode a2 of the N-type transistor T2, and the second electrode b2 of the N-type transistor T2 located on the first source / drain metal layer 02. This can simplify the manufacturing process of the light-emitting substrate 100.

[0156] In some examples, the material of the first source / drain metal layer 02 can be copper. Based on this, the material forming the first conductive coil 10 can also be copper. Since copper has a lower resistance, the heat release line width of the first conductive coil 10 can be made thinner, allowing for a greater number of turns of the first conductive coil 10 within a given space. This can help increase the magnetic field strength of the first conductive coil 10, thereby improving the quality of near-field communication of the light-emitting substrate 100.

[0157] In addition, it is understood that in some other embodiments, the first conductive coil 10 may be disposed in other metal film layers in the light-emitting substrate 100, or a separate metal layer may be disposed in the light-emitting substrate 100. The present disclosure is not limited thereto.

[0158] FIG6 is a cross-sectional view taken along line BB' in FIG2 .

[0159] 6 , the second end 12 of the first conductive coil 10 includes a first sub-portion G1 and a second sub-portion G2 . The first sub-portion G1 serves as the control electrode c1 of the P-type transistor T1 , and the second sub-portion G2 serves as the control electrode c2 of the N-type transistor T2 .

[0160] In the case where the second end 12 of the first conductive coil 10 needs to be electrically connected to the control electrode c1 of the P-type transistor T1 and the control electrode c2 of the N-type transistor, respectively, the first conductive coil 10 can be arranged to be located in the first gate metal layer 01, and the first sub-portion G1 of the second end 12 of the first conductive coil can be reused as the control electrode c1 of the P-type transistor T1, and the second sub-portion G2 can be reused as the control electrode c2 of the N-type transistor T2. There is no need to separately pattern the first gate metal layer 01 to form the control electrode c1 of the P-type transistor T1 and the control electrode c2 of the N-type transistor T2, which can help simplify the process of the light-emitting substrate 100.

[0161] In some examples, please continue to refer to Figure 6, the second end 12 of the first conductive coil 10 can also include a third sub-section G3 for connecting the first sub-section G1 and the second sub-section G2, and the third sub-section G3 is used to achieve electrical connection between the first sub-section G1 and the second sub-section G2.

[0162] For example, the first sub-portion G1 , the second sub-portion G2 and the third sub-portion G3 can be formed by the same patterning process, thereby simplifying the manufacturing process of the light-emitting substrate 100 .

[0163] Based on this, the first power signal generated by the first conductive coil 10 can subsequently be transmitted to the first sub-section G1 via the second end 12, that is, to the control electrode c1 of the P-type transistor T1. Furthermore, the third sub-section G3 can be used to transmit the first power signal at the location of the first sub-section G1 to the second sub-section G2, that is, to the control electrode c2 of the N-type transistor T2. Furthermore, the first power signal from the first conductive coil 10 can be used to control the on / off state of the P-type transistor T1 and the N-type transistor T2.

[0164] It is understood that in other examples, the first subsection G1 and the second subsection G2 may be arranged to expand relative to each other. For example, the end of the first subsection G1 close to the second subsection G2 is expanded toward the side close to the second subsection G2, and the end of the second subsection G2 close to the first subsection G1 is expanded toward the side close to the first subsection G1, so that the first subsection G1 and the second subsection G2 can contact and electrically connect with each other. However, the present disclosure is not limited to this.

[0165] FIG. 7 is a cross-sectional view taken along the line CC' in FIG. 2 .

[0166] In some embodiments, referring to FIG. 7 , the second electrode b1 of the P-type transistor T1 and the second electrode b2 of the N-type transistor are electrically connected, so that the P-type transistor T1 and the N-type transistor T2 are subsequently electrically connected to the optical unit E.

[0167] In some examples, please continue to refer to Figure 7, the first source and drain metal layer 02 may also include a fourth sub-portion G4, which is located between the second electrode b1 of the P-type transistor T1 and the second electrode b2 of the N-type transistor, and is used to electrically connect the second electrode b1 of the P-type transistor T1 and the second electrode b2 of the N-type transistor T2.

[0168] For example, the fourth sub-portion G4, the second electrode b1 of the P-type transistor T1, and the second electrode b2 of the N-type transistor can be formed using the same patterning process, thereby simplifying the manufacturing process of the light-emitting substrate 100.

[0169] Based on this, the fourth sub-section G4 can be used to electrically connect with the light-emitting unit E, so that the first voltage signal V2 transmitted by the control circuit 20 through the P-type transistor T1 and the N-type transistor T2 can be transmitted to the light-emitting unit E through the third sub-section G3, and the light-emitting unit E emits light.

[0170] It is understood that in other examples, the second electrode b1 of the P-type transistor T1 and the second electrode b2 of the N-type transistor T2 may be relatively expanded. For example, the end of the second electrode b1 of the P-type transistor T1 that is close to the second electrode b2 of the N-type transistor T2 is expanded toward the side close to the second electrode b2 of the N-type transistor T2, and the end of the second electrode b2 of the N-type transistor T2 that is close to the second electrode b1 of the P-type transistor T1 is expanded toward the side close to the second electrode b1 of the P-type transistor T1, so that the second electrode b1 of the P-type transistor T1 and the second electrode b2 of the N-type transistor T2 can contact and be electrically connected to each other. However, the present disclosure is not limited to this.

[0171] FIG8 is a cross-sectional view taken along line DD' in FIG2 .

[0172] In some embodiments, referring to FIG8 , a first electrode a1 of a P-type transistor T1 is electrically connected to a first power supply terminal V, and a first electrode a2 of an N-type transistor T2 is also electrically connected to the first power supply terminal V. The first electrode a1 of the P-type transistor T1 and the first electrode a2 of the N-type transistor T2 can be electrically connected to facilitate subsequent electrical connection to the first power supply terminal V.

[0173] In some examples, please continue to refer to Figure 8, the first source-drain metal layer 02 may also include a fifth sub-portion G5, which is located between the first electrode a1 of the P-type transistor T1 and the first electrode a2 of the N-type transistor, and is used to electrically connect the first electrode a1 of the P-type transistor T1 and the first electrode a2 of the N-type transistor T2.

[0174] For example, the fifth sub-portion G5, the first electrode a1 of the P-type transistor T1, and the first electrode a2 of the N-type transistor can be formed using the same patterning process, thereby simplifying the manufacturing process of the light-emitting substrate 100.

[0175] Based on this, the fifth sub-section G5 can be used to electrically connect with the light-emitting unit E, so that the first voltage signal V2 transmitted by the control circuit 20 through the P-type transistor T1 and the N-type transistor T2 can be transmitted to the light-emitting unit E through the third sub-section G3, and the light-emitting unit E emits light.

[0176] It is understood that in other examples, the first electrode a1 of the P-type transistor T1 and the first electrode a2 of the N-type transistor T2 may be relatively expanded. For example, the end of the first electrode a1 of the P-type transistor T1 close to the first electrode a2 of the N-type transistor T2 is expanded toward the side close to the first electrode a2 of the N-type transistor T2, and the end of the first electrode a2 of the N-type transistor T2 close to the first electrode a1 of the P-type transistor T1 is expanded toward the side close to the first electrode a1 of the P-type transistor T1, so that the first electrode a1 of the P-type transistor T1 and the first electrode a2 of the N-type transistor T2 can contact and be electrically connected to each other. However, the present disclosure is not limited to this.

[0177] Fig. 9 is a driving circuit diagram of a light-emitting substrate according to some embodiments. Fig. 10 is a waveform diagram of a first power signal and a first voltage signal in a control circuit according to some embodiments.

[0178] In some embodiments, referring to FIG. 5 and FIG. 9 , in the light-emitting substrate 100 , the voltage value of the first voltage signal V2 provided by the first power supply terminal V is greater than 0V.

[0179] At this time, please refer to Figure 10. After the control end 21 of the control circuit 20 receives the first power signal from the first conductive coil 10, the P-type transistor T1 and the N-type transistor T2 in the control circuit 20 can be driven to turn on alternately based on the first power signal V1 to output the first voltage signal V2 to the light-emitting unit E.

[0180] Because the output terminal 23 of the control circuit 20 is electrically connected to the first electrode P1 of the light-emitting unit E, the first electrode P1 of the light-emitting unit E can receive a first voltage signal V2 greater than 0V from the control circuit 20. Meanwhile, the second electrode P2 of the light-emitting unit E does not receive an external driving voltage and remains unpowered (approximately 0V). This creates a voltage differential between the two electrodes of the light-emitting unit E (the first electrode P1 and the second electrode P2), driving the light-emitting unit E to emit light. In other words, the control circuit 20 can drive the light-emitting unit E to emit light in the positive direction based on the first voltage signal V2 greater than 0V.

[0181] At this time, the first electrode P1 of the light-emitting unit E is equivalent to the anode of the light-emitting unit E, and the first electrode P1 of the light-emitting unit E can be set on the first electrode metal layer 03. In addition, the second electrode P2 of the light-emitting unit E is equivalent to the cathode of the light-emitting unit E, and the second electrode P2 of the light-emitting unit E can be set on the second electrode metal layer 04.

[0182] In some embodiments, referring to FIG. 9 and FIG. 10 , the voltage value of the first voltage signal V2 ranges from 2V to 5V.

[0183] When the voltage value of the first voltage signal V2 is within the range of 2V to 5V, the light emitting unit E can be driven to emit light, and the light emitting unit E can be prevented from being burned due to a large voltage value of the first voltage signal V2.

[0184] In some examples, the voltage value of the first voltage signal V2 may be approximately any one of 2 V, 3 V, 4 V, or 5 V. The present disclosure is not limited thereto.

[0185] In some embodiments, referring to FIG9 and in combination with FIG5 , a first via hole may be provided in the film layer (the first interlayer dielectric layer 07 and the planarization layer 08) between the first source / drain metal layer 02 and the first electrode metal layer 03, and the second electrode b2 of the N-type transistor T2 located in the first source / drain metal layer 02 is exposed by the first via hole, so that the first electrode P1 located in the first electrode metal layer 03 can be electrically connected to the second electrode b2 of the N-type transistor T2 located in the first source / drain metal layer 02 through the first via hole.

[0186] In some embodiments, a second via can be provided in the film layer between the first source-drain metal layer 02 and the second electrode metal layer 04, and the first end 11 of the first conductive coil 10 located in the first source-drain metal layer 02 is exposed by the second via, so that the second electrode P2 located in the second electrode metal layer 04 can be electrically connected to the first end 11 of the first conductive coil 10 located in the first source-drain metal layer 02 through the second via.

[0187] 9 and in combination with FIG5 , in some embodiments, the first electrode metal layer 03 further includes a first connection portion F1 . The first end 11 of the first conductive coil 10 is electrically connected to the second electrode P2 of the light emitting unit E via the first connection portion F1 .

[0188] Based on this, a third via can be provided in the film layer (first interlayer dielectric layer 07 and planarization layer 08) between the first source / drain metal layer 02 and the first electrode metal layer 03. The third via is used to expose the first end 11 of the first conductive coil 10 located in the first source / drain metal layer 02, so that the first connection portion F1 located in the first electrode metal layer 03 can be electrically connected to the first end 11 of the first conductive coil 10 located in the first source / drain metal layer 02 through the third via. Furthermore, a fourth via can be provided in the light-emitting definition layer 09. The fourth via is used to expose the first connection portion F1, so that the second electrode P2 located in the second electrode metal layer 04 can be electrically connected to the first connection portion F1 located in the first electrode metal layer 03 through the fourth via. This allows the first end 11 of the first conductive coil 10 to be electrically connected to the second electrode P2 of the light-emitting unit E through the first connection portion F1.

[0189] The use of a segmented punching design (setting a third via and a fourth via separately) can effectively reduce the via depth, help alleviate the problem of poor via contact, and also help reduce the difficulty of the punching process.

[0190] In some examples, as shown in FIG9 , the first connection portion F1 is formed on the same layer as the first electrode P1 of the light-emitting unit E. The first connection portion F1 and the first electrode P1 of the light-emitting unit E can be formed using the same process. This simplifies the manufacturing process of the light-emitting substrate 100 .

[0191] In some embodiments, as shown in Figure 5 and in combination with Figure 2, the light-emitting unit E shown in Figure 2 can be understood as the first electrode P1 (anode) in the light-emitting unit E, and the second electrode P2 (cathode) of the light-emitting unit E can be partially expanded to form a first conductive portion S1, and the first conductive portion S1 is electrically connected to the first end 11 of the first conductive coil 10.

[0192] Figure 11 is another cross-sectional view taken along line AA' in Figure 2. Figure 12 is a driving circuit diagram of a light-emitting substrate according to yet other embodiments. Figure 13 is a waveform diagram of a first power signal and a first voltage signal in a control circuit according to yet other embodiments.

[0193] In some embodiments, as shown in FIG11 and FIG12 , in the light-emitting substrate 100, the voltage value of the first voltage signal V2 is less than 0 V. This differs from the light-emitting substrate 100 shown in FIG5 in that the voltage value range of the first voltage signal V2 is different, resulting in different film positions of the first electrode P1 and the second electrode P2 of the light-emitting unit E.

[0194] At this time, referring to Figure 13, when the voltage value of the first voltage signal V2 is less than 0V, after the control end 21 of the control circuit 20 receives the first power signal from the first conductive coil 10, it can drive the P-type transistor T1 and the N-type transistor T2 in the control circuit 20 to alternately turn on based on the first power signal V1, so as to output the first voltage signal V2 less than 0V to the light-emitting unit E.

[0195] Because the output terminal 23 of the control circuit 20 is electrically connected to the first electrode P1 of the light-emitting unit E, the first electrode P1 of the light-emitting unit E can receive a first voltage signal V2 less than 0V from the control circuit 20. At this time, the second electrode P2 of the light-emitting unit E does not receive an external driving voltage and remains unpowered (approximately 0V). This creates a voltage differential between the two electrodes of the light-emitting unit E (the first electrode P1 and the second electrode P2), driving the light-emitting unit E to emit light. In other words, the control circuit 20 can reversely drive the light-emitting unit E to emit light based on the first voltage signal V2 less than 0V.

[0196] At this time, the first electrode P1 of the light-emitting unit E receives a negative voltage and is equivalent to the cathode of the light-emitting unit E. The first electrode P1 of the light-emitting unit E can be set in the second electrode metal layer 04. In addition, the second electrode P2 of the light-emitting unit E has a higher potential than the first electrode P1. The second electrode P2 can be equivalent to the anode of the light-emitting unit E. Further, the second electrode P2 of the light-emitting unit E can be set in the first electrode metal layer 03.

[0197] In some embodiments, referring to FIG. 11 to FIG. 13 , the voltage value of the first voltage signal V2 ranges from -5V to -2V.

[0198] When the voltage value of the first voltage signal V2 is within the range of -5V to -2V, the light emitting unit E can be driven to emit light, and the light emitting unit E can be prevented from being burned out due to a large voltage value of the first voltage signal V2.

[0199] In some examples, the voltage value of the first voltage signal V2 may be approximately any one of -2 V, -3 V, -4 V, or -5 V. The present disclosure is not limited thereto.

[0200] In some embodiments, referring to FIG11 , a fifth via can be provided in the film layer (the first interlayer dielectric layer 07 and the planarization layer 08) between the first source / drain metal layer 02 and the first electrode metal layer 03, and the first end 11 of the first conductive coil 10 located in the first source / drain metal layer 02 is exposed by the fifth via, so that the second electrode P2 located in the first electrode metal layer 03 can be electrically connected to the first end 11 of the first conductive coil 10 located in the first source / drain metal layer 02 through the fifth via.

[0201] In some examples, as shown in FIG11 and in combination with FIG2 , the light-emitting unit E shown in FIG2 can be understood as the first electrode P1 (cathode) in the light-emitting unit E, and the second electrode P2 (anode) of the light-emitting unit E can be partially expanded to form a second conductive portion S2, and the second conductive portion S2 is electrically connected to the first end 11 of the first conductive coil 10.

[0202] In some embodiments, a sixth via can be provided in the film layer between the first source-drain metal layer 02 and the second electrode metal layer 04, and the second electrode b2 of the N-type transistor T2 located in the first source-drain metal layer 02 is exposed by the sixth via, so that the first electrode P1 located in the second electrode metal layer 04 can be electrically connected to the second electrode b2 of the N-type transistor T2 located in the first source-drain metal layer 02 through the sixth via.

[0203] In some embodiments, as shown in FIG11 , the first electrode metal layer 03 further includes a second connection portion F2 . The second electrode b1 of the P-type transistor T1 and the second electrode b2 of the N-type transistor T2 are electrically connected to the first electrode P1 of the light emitting unit E through the second connection portion F2 .

[0204] Based on the electrical connection between the second electrode b1 of the P-type transistor T1 and the second electrode b2 of the N-type transistor T2 , the second electrode b2 of the N-type transistor T2 can be provided to be electrically connected to the first electrode P1 of the light emitting unit E through the second connecting portion F2 .

[0205] Based on this, the film layer (first interlayer dielectric layer 07 and planarization layer 08) located between the first source-drain metal layer 02 and the first electrode metal layer 03 can be provided with a seventh via hole, and the second electrode b2 of the N-type transistor T2 located in the first source-drain metal layer 02 can be exposed by the seventh via hole, so that the second connection portion F2 located in the first electrode metal layer 03 can be electrically connected to the second electrode b2 of the N-type transistor T2 located in the first source-drain metal layer 02 through the seventh via hole. In addition, an eighth via hole can be provided in the light-emitting definition layer 09, and the second connection portion F2 can be exposed by the eighth via hole, so that the first electrode P1 located in the second electrode metal layer 04 can be electrically connected to the second connection portion F2 located in the first electrode metal layer 03 through the eighth via hole. This achieves the electrical connection between the second electrode b2 of the N-type transistor T2 and the first electrode P1 of the light-emitting unit E through the second connection portion F2.

[0206] The use of a segmented punching design (setting the seventh via and the eighth via separately) can effectively reduce the via depth, help reduce the problem of poor via contact, and also help reduce the difficulty of the punching process.

[0207] In some examples, as shown in FIG9 , the second connection portion F2 can be formed on the same layer as the second electrode P2 of the light-emitting unit E. The second connection portion F2 and the second electrode P2 of the light-emitting unit E can be formed using the same process. This simplifies the manufacturing process of the light-emitting substrate 100.

[0208] FIG14 is a structural diagram of a light-emitting substrate according to some other embodiments.

[0209] In some embodiments, as shown in FIG14 , the light-emitting substrate 100 further includes a second conductive coil 30. The first conductive coil 10 and the second conductive coil 30 in the light-emitting substrate 100 together constitute an NFC antenna. In other words, two conductive coils can be provided in the light-emitting substrate 100 to implement near-field communication, which helps improve the signal quality of the NFC antenna.

[0210] In some examples, please continue to refer to Figure 14, the first conductive coil 10 and the second conductive coil 30 are located in different film layers in the light-emitting substrate 100. Compared with the case where the first conductive coil 10 and the second conductive coil 30 are located in the same layer, it is beneficial to increase the number of turns of the first conductive coil 10 and the second conductive coil 30, which can help strengthen the magnetic field generated by the NFC antenna, strengthen the signal strength of the NFC antenna, and thus improve the signal quality of the NFC antenna.

[0211] In some examples, please continue to refer to FIG. 14 , when the first conductive coil 10 and the second conductive coil 30 are located in different film layers in the light-emitting substrate 100 , the first conductive coil 10 and the second conductive coil 30 in the light-emitting substrate 100 can be coaxially arranged.

[0212] Based on this, when the first conductive coil 10 and the second conductive coil 30 are in the working state, the magnetic field generated by the first conductive coil 10 and the magnetic field generated by the second conductive coil 30 can be superimposed, which can help to strengthen the magnetic field generated by the NFC antenna, strengthen the signal strength of the NFC antenna, and improve the signal quality of the NFC antenna.

[0213] In some examples, referring to FIG. 14 , the orthographic projection of the first conductive coil 10 in the light-emitting substrate 100 on the base substrate 00 at least partially overlaps with the orthographic projection of the second conductive coil 30 on the base substrate 00 .

[0214] The orthographic projection of the first conductive coil 10 in the light-emitting substrate 100 on the base substrate 00 is set to at least partially overlap with the orthographic projection of the second conductive coil 30 on the base substrate 00. This can facilitate the superposition of the magnetic field generated by the first conductive coil 10 and the magnetic field generated by the second conductive coil 30, thereby facilitating the strengthening of the magnetic field generated by the NFC antenna, thereby strengthening the signal strength of the NFC antenna and improving the signal quality of the NFC antenna.

[0215] For example, the orthographic projection of the first conductive coil 10 in the light-emitting substrate 100 on the base substrate 00 partially overlaps with the orthographic projection of the second conductive coil 30 on the base substrate 00. This allows the magnetic field generated by the first conductive coil 10 and the magnetic field generated by the second conductive coil 30 to overlap to a certain extent, which helps to strengthen the magnetic field generated by the NFC antenna, enhance the signal strength of the NFC antenna, and thus improve the signal quality of the NFC antenna.

[0216] For example, the orthographic projection of the first conductive coil 10 in the light-emitting substrate 100 on the base substrate 00 overlaps with the orthographic projection of the second conductive coil 30 on the base substrate 00. This allows the magnetic field generated by the first conductive coil 10 and the magnetic field generated by the second conductive coil 30 to be better superimposed, which helps to strengthen the magnetic field generated by the NFC antenna, enhance the signal strength of the NFC antenna, and thus improve the signal quality of the NFC antenna.

[0217] However, in some embodiments of the present disclosure, the degree of overlap between the orthographic projection of the first conductive coil 10 in the light-emitting substrate 100 on the base substrate 00 and the orthographic projection of the second conductive coil 30 on the base substrate 00 is not limited thereto.

[0218] In some embodiments, referring to FIG. 14 , the thickness of the second conductive coil 30 in the light-emitting substrate 100 is greater than or equal to 1 μm.

[0219] The thicker the second conductive coil 30 is in the light-emitting substrate 100, the lower its internal resistance and the greater its inductance, which can improve the signal quality of the NFC antenna. Furthermore, when the thickness of the second conductive coil 30 is equal to or close to 1 μm, the thicker the second conductive coil 30 can be, which can help reduce its internal resistance, and thus the internal resistance of the NFC antenna. A greater inductance of the NFC antenna improves the signal quality of the NFC antenna.

[0220] In some examples, the thickness of the second conductive coil 30 in the light emitting substrate 100 is approximately 1 μm, 1.5 μm, 2 μm, 2.5 μm, or 3 μm. However, some embodiments of the present disclosure are not limited thereto.

[0221] It should be noted that, taking the thickness of the second conductive coil 30 as approximately 1 μm as an example, due to certain uncontrollable errors (such as manufacturing process errors and equipment precision), the thickness of the second conductive coil 30 can fluctuate within a range of 5% × 1 μm. In other words, when the thickness of the second conductive coil 30 fluctuates within a range of ±0.05 μm, it can be considered that the thickness of the second conductive coil 30 meets the requirement of being equal to 1 μm. Other numerical fluctuation ranges for the thickness of the second conductive coil 30 are as described above and are not further elaborated here.

[0222] In some examples, the thickness of the second conductive coil 30 can be set to be approximately equal to the thickness of the first conductive coil 10. It is understood that in other examples, the thickness of the second conductive coil 30 can be set to be different from the thickness of the first conductive coil 10. However, some embodiments of the present disclosure are not limited to this.

[0223] In some embodiments, referring to FIG. 14 , the second conductive coil 30 in the light-emitting substrate 100 has 10 or more turns. However, to clearly illustrate the structure of the second conductive coil 30, FIG. 14 only shows three turns of the second conductive coil 30. For second conductive coils 30 with other turns, the connection between the first end 31 and the second end 32 of the second conductive coil 30 is the same as that shown in FIG. 14 , except that the number of turns of the second conductive coil 30 is different.

[0224] The more turns of the second conductive coil 30 provided in the light-emitting substrate 100, the stronger the magnetic field generated by the second conductive coil 30, thereby improving the signal quality of the NFC antenna. Furthermore, when the number of turns of the second conductive coil 30 is equal to or close to 10, the second conductive coil 30 can be provided with a larger number of turns. This can help enhance the magnetic field generated by the second conductive coil 30, thereby strengthening the magnetic field generated by the NFC antenna and increasing the signal strength of the NFC antenna, thereby improving the signal quality of the NFC antenna.

[0225] In some examples, please continue to refer to FIG. 14 , the number of turns of the second conductive coil 30 in the light-emitting substrate 100 may be greater than or equal to 30 turns.

[0226] When the number of turns of the second conductive coil 30 is equal to or close to 30, the intensity of the magnetic field formed by the second conductive coil 30 can be made stronger, thereby better enhancing the signal strength of the NFC antenna and improving the signal quality of the NFC antenna.

[0227] For example, the number of turns of the second conductive coil 30 in the light emitting substrate 100 is approximately 10 turns, 15 turns, 20 turns, 30 turns, 40 turns, 50 turns, 60 turns, 70 turns or 80 turns. However, some embodiments of the present disclosure are not limited thereto.

[0228] In some embodiments, referring to FIG. 14 , the number of turns of the second conductive coil 30 in the light-emitting substrate 100 is less than or equal to 80 turns.

[0229] Since the size of the light-emitting substrate 100 is fixed, that is, the internal space of the light-emitting substrate 100 is limited, when the number of turns of the second conductive coil 30 is large, the line spacing between two adjacent turns of the second conductive coil 30 will be small, the coil routing will be more difficult, and short circuit problems will easily occur.

[0230] Based on this, the number of turns of the second conductive coil 30 in the light-emitting substrate 100 can be set to be less than or equal to 80. When the number of turns of the second conductive coil 30 in the light-emitting substrate 100 is equal to or close to 80, the number of turns of the second conductive coil 30 can be ensured to be large while ensuring sufficient spacing between adjacent turns of the first conductive coil. In other words, the signal quality of the NFC antenna can be improved while preventing short circuits at various locations on the NFC antenna.

[0231] In some examples, please continue to refer to FIG. 14 , the number of turns of the second conductive coil 30 in the light-emitting substrate 100 is less than or equal to 50 turns.

[0232] When the number of turns of the second conductive coil 30 is equal to or close to 50 turns, the signal quality of the NFC antenna in the light-emitting substrate 100 can be improved, and the difficulty of routing the coil of the NFC antenna is reduced.

[0233] For example, the number of turns of the second conductive coil 30 in the light emitting substrate 100 is approximately 10 turns, 15 turns, 20 turns, 30 turns, 40 turns, 50 turns, 60 turns, 70 turns or 80 turns. However, some embodiments of the present disclosure are not limited thereto.

[0234] In some examples, please continue to refer to FIG. 14 , the number of turns of the second conductive coil 30 in the light-emitting substrate 100 may range from 10 turns to 80 turns.

[0235] Setting the number of turns of the second conductive coil 30 in the light-emitting substrate 100 within the above range can not only meet the requirement for the number of turns of the second conductive coil 30 in the light-emitting substrate 100, so that the NFC antenna in the light-emitting substrate 100 has good signal quality, but also meet the requirement for the difficulty of the coil routing of the second conductive coil 30 in the light-emitting substrate 100, so as to prevent short circuits at various positions of the NFC antenna.

[0236] In some examples, the number of turns of the second conductive coil 30 can be set to be approximately equal to the number of turns of the first conductive coil 10. It is understood that in other examples, the number of turns of the second conductive coil 30 can be set to be different from the number of turns of the first conductive coil 10. However, some embodiments of the present disclosure are not limited to this.

[0237] In some embodiments, referring to FIG. 14 , the line width of the second conductive coil 30 in the light-emitting substrate 100 is greater than or equal to 500 μm.

[0238] The wider the width of the second conductive coil 30 in the light-emitting substrate 100, the lower the internal resistance of the second conductive coil 30 and the greater the inductance generated by the second conductive coil 30, thereby improving the signal quality of the NFC antenna. Furthermore, when the width of the second conductive coil 30 is equal to or close to 500 μm, the wider the width of the second conductive coil 30 can be, which can help reduce the internal resistance of the second conductive coil 30 and, in turn, the internal resistance of the NFC antenna. A greater inductance of the NFC antenna improves the signal quality of the NFC antenna.

[0239] In some examples, the line width of the second conductive coil 30 is approximately 500 μm, 550 μm, 600 μm, or 650 μm, but some embodiments of the present disclosure are not limited thereto.

[0240] It should be noted that, taking the line width of the second conductive coil 30 as an example, which is approximately 500 μm, due to certain uncontrollable errors (such as manufacturing process errors and equipment precision), the line width of the second conductive coil 30 can be considered to meet the 500 μm requirement when the line width of the second conductive coil 30 fluctuates within a range of 5% × 500 μm. In other words, when the line width of the second conductive coil 30 fluctuates within a range of ±25 μm, the line width of the second conductive coil 30 can also be considered to meet the requirement of 500 μm. Other numerical ranges for the line width of the second conductive coil 30 are as described above and are not further detailed here.

[0241] In some examples, the line width of the second conductive coil 30 can be set to be approximately equal to the line width of the first conductive coil 10. It is understood that in other examples, the line width of the second conductive coil 30 can be set to be different from the line width of the first conductive coil 10. However, some embodiments of the present disclosure are not limited to this.

[0242] In some embodiments, referring to FIG. 14 , the second conductive coil 30 in the light-emitting substrate 100 includes multiple turns of conductive wire 30 a , and a second minimum distance D02 between two adjacent turns of conductive wire 30 a is greater than or equal to 10 μm.

[0243] If the second minimum spacing D02 between two adjacent turns of wire 30a in the second conductive coil 30 is too small, the wires 30a in the second conductive coil 30 will be too densely packed, which can easily lead to problems such as short circuits between adjacent wires 30a. Furthermore, the densely packed arrangement of the wires 30a can make routing the second conductive coil 30 more difficult, making it difficult to manufacture.

[0244] Based on this, the second minimum spacing D02 between two adjacent turns of the conductive wire 30a in the second conductive coil 30 can be set to be greater than or equal to 10 μm. When the second minimum spacing D02 between two adjacent turns of the conductive wire 30a in the second conductive coil 30 is equal to or close to 10 μm, the second minimum spacing D02 between two adjacent turns of the conductive wire 30a in the second conductive coil 30 will not be too small, thereby preventing short circuits. The second minimum spacing D02 between two adjacent turns of the conductive wire 30a in the second conductive coil 30 will also not be too large, thereby preventing the second minimum spacing D02 from occupying too much space on the light-emitting substrate 100 and reducing the number of turns of the second conductive coil 30.

[0245] In some examples, the second minimum distance D02 between two adjacent turns of the conductive wire 30a in the second conductive coil 30 is approximately 10 μm, 12 μm, 15 μm, 18 μm, or 20 μm, but the present disclosure is not limited thereto.

[0246] It should be noted that, taking the second minimum spacing D02 between two adjacent turns of the wire 30a in the second conductive coil 30 as an example, which is approximately 10 μm, due to certain uncontrollable errors (such as manufacturing process errors and equipment precision), the second minimum spacing D02 between two adjacent turns of the wire 30a in the second conductive coil 30 can be considered to meet the 10 μm requirement if the error range of the second minimum spacing D02 is within 5% × 10 μm. That is, if the second minimum spacing D02 fluctuates within a range of ±0.5 μm, the second minimum spacing D02 between two adjacent turns of the wire 30a in the second conductive coil 30 can be considered to meet the 10 μm requirement. Other numerical fluctuation ranges for the second minimum spacing D02 between two adjacent turns of the wire 30a in the second conductive coil 30 are as described above and are not further detailed here.

[0247] In some examples, the second minimum spacing D02 of the second conductive coil 30 can be set to be approximately equal to the second minimum spacing D02 of the first conductive coil 10. It is understood that in other examples, the second minimum spacing D02 of the second conductive coil 30 can be set to be different from the second minimum spacing D02 of the first conductive coil 10. However, some embodiments of the present disclosure are not limited to this.

[0248] In some examples, the first conductive coil 10 and the second conductive coil 30 in the light-emitting substrate 100 can be connected in series. The two conductive coils in the light-emitting substrate 100 can be connected in series to increase the number of turns of the NFC antenna, thereby strengthening the magnetic field generated by the NFC antenna and the signal strength of the NFC antenna, thereby improving the signal quality of the NFC antenna.

[0249] For example, the second conductive coil 30 has a first end 31 and a second end 32. The second end 12 of the first conductive coil 10 can be electrically connected to the second end 32 of the second conductive coil 30, wherein the first end 11 of the first conductive coil 10 serves as the first end of the NFC antenna, and the first end 31 of the second conductive coil 30 serves as the second end of the NFC antenna.

[0250] In other examples, as shown in FIG14 , the first conductive coil 10 and the second conductive coil 30 in the light-emitting substrate 100 can be connected in parallel. The parallel arrangement of the two conductive coils in the light-emitting substrate 100 can help reduce the internal resistance of the NFC antenna and improve the signal quality of the NFC antenna.

[0251] For example, the second conductive coil 30 has a first end 31 and a second end 32. The first end 11 of the first conductive coil 10 and the first end 31 of the second conductive coil 30 can be electrically connected, with either the first end 11 of the first conductive coil 10 or the first end 31 of the second conductive coil 30 serving as the first end of the NFC antenna. The second end 12 of the first conductive coil 10 and the second end 32 of the second conductive coil 30 can be electrically connected, with either the second end 12 of the first conductive coil 10 or the second end 32 of the second conductive coil 30 serving as the second end of the NFC antenna. This allows the first conductive coil 10 and the second conductive coil 30 to be arranged in parallel in the light-emitting substrate 100.

[0252] Figure 15 is a cross-sectional view taken along line H-H' in Figure 14. Figure 16 is another cross-sectional view taken along line H-H' in Figure 14.

[0253] In some embodiments, referring to FIG. 15 and FIG. 16 , the first conductive coil 10 and the second conductive coil 30 in the light-emitting substrate 100 are located at the first gate metal layer 01 and the first source / drain metal layer 02 .

[0254] The following description will be made by taking the example of the first conductive coil 10 in the light emitting substrate 100 being located in the first gate metal layer 01 and the second conductive coil 30 being located in the first source / drain metal layer 02 :

[0255] In some examples, the material of the first source / drain metal layer 02 can be copper. Based on this, the second conductive coil 30 can also be made of copper. Since copper has a lower resistance, the heat release line width of the second conductive coil 30 can be thinner, allowing for a greater number of turns of the second conductive coil 30 within a given space. This can increase the magnetic field strength of the second conductive coil 30 and, in turn, improve the quality of near-field communication of the light-emitting substrate 100.

[0256] In some other examples, the second conductive coil 30 may also be located in the first gate metal layer 01 .

[0257] For example, the first gate metal layer 01 can be made of copper. Based on this, the second conductive coil 30 can also be made of copper. Since copper has a lower resistance, the heat release line width of the second conductive coil 30 can be thinner, allowing for a greater number of turns of the second conductive coil 30 within a given space. This can increase the magnetic field strength of the second conductive coil 30 and, in turn, improve the quality of near-field communication of the light-emitting substrate 100.

[0258] In addition, it is understood that in some other embodiments, the second conductive coil 30 may be disposed in other metal film layers in the light-emitting substrate 100, or a separate metal layer may be disposed in the light-emitting substrate 100. The present disclosure is not limited thereto.

[0259] The following description will be made by taking the example of the first conductive coil 10 and the second conductive coil 30 being connected in parallel, the first conductive coil 10 being located in the first gate metal layer 01, and the second conductive coil 30 being located in the first source / drain metal layer 02.

[0260] The first type, as shown in FIG. 15 , is that the first electrode P1 of the light-emitting unit E is equivalent to the anode of the light-emitting unit E and is located in the first electrode metal layer 03 , and the second electrode P2 of the light-emitting unit E is equivalent to the cathode of the light-emitting unit E and is located in the second electrode metal layer 04 .

[0261] The first conductive coil 10 and the second conductive coil 30 are connected in parallel, and the first end 11 of the first conductive coil 10 is electrically connected to the first end 31 of the second conductive coil 30 , and the second end 12 of the first conductive coil 10 is electrically connected to the second end 32 of the second conductive coil 30 .

[0262] The first end 11 of the first conductive coil 10 and the first end 31 of the second conductive coil 30 are electrically connected:

[0263] As shown in FIG15 , a first through-hole is defined in the first interlayer dielectric layer 07 between the first gate metal layer 01 and the first source / drain metal layer 02. The first through-hole can be used to expose the first end 11 of the first conductive coil 10 located in the first gate metal layer 01, thereby electrically connecting the first end 31 of the second conductive coil 30 located in the first source / drain metal layer 02 to the first end 11 of the first conductive coil 10 located in the first gate metal layer 01 through the first through-hole.

[0264] The second end 12 of the first conductive coil 10 and the second end 32 of the second conductive coil 30 are electrically connected:

[0265] 6 , the second end 12 of the first conductive coil 10 includes a first sub-portion G1 and a second sub-portion G2 . The first sub-portion G1 is multiplexed as the control electrode c1 of the P-type transistor T1 , and the second sub-portion G2 is multiplexed as the control electrode c2 of the N-type transistor T2 .

[0266] Based on this, on the basis that the first sub-portion G1 of the second end 12 of the first conductive coil 10 is multiplexed as the control electrode c1 of the P-type transistor T1, and the second sub-portion G2 is multiplexed as the control electrode c2 of the N-type transistor T2, the second end 32 of the second conductive coil 30 is electrically connected to the control electrode c2 of the N-type transistor T2, that is, the second end 12 of the first conductive coil 10 can be electrically connected to the second end 32 of the second conductive coil 30.

[0267] Please continue to refer to Figure 15. A second through hole can be provided in the first interlayer dielectric layer 07 located between the first gate metal layer 01 and the first source-drain metal layer 02. The second through hole is used to expose the control electrode c2 of the N-type transistor T2 located in the first gate metal layer 01, so that the second end 32 of the two conductive coils 30 located in the first source-drain metal layer 02 is electrically connected to the control electrode c2 of the N-type transistor T2 located in the first gate metal layer 01 through the second through hole.

[0268] In some examples, a third through hole may be further provided in the first interlayer dielectric layer 07 between the first gate metal layer 01 and the first source / drain metal layer 02, and the control electrode c1 of the P-type transistor T1 located in the first gate metal layer 01 may be exposed by the third through hole, so that the second end 32 of the two conductive coils 30 located in the first source / drain metal layer 02 can also be electrically connected to the control electrode c1 of the P-type transistor T1 located in the first gate metal layer 01 through the third through hole.

[0269] The first end 11 of the first conductive coil 10 is also electrically connected to the second electrode P2 of the light emitting unit E:

[0270] As shown in FIG15 , since the first end 31 of the second conductive coil 30 is located between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E, the second electrode P2 of the light-emitting unit E can be electrically connected to the first end 11 of the first conductive coil 10 via the first end 31 of the second conductive coil 30 , thereby electrically connecting the first conductive coil 10, the second conductive coil 30, and the light-emitting unit E.

[0271] In some examples, the film layers (planarization layer 08 and light-emitting definition layer 09) between the second electrode metal layer 04 and the first source / drain metal layer 02 are provided with a fourth through hole. The fourth through hole can be used to expose the first end 31 of the second conductive coil 30 located on the first source / drain metal layer 02, so that the second electrode P2 of the light-emitting unit E located on the second electrode metal layer 04 can be electrically connected to the first end 31 of the second conductive coil 30 located on the first source / drain metal layer 02 through the fourth through hole. This achieves electrical connection between the first conductive coil 10, the second conductive coil 30, and the light-emitting unit E.

[0272] Based on this, a segmented punching design is adopted (a first through hole and a fourth through hole are set respectively) to realize the connection between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E. Compared with setting a connecting hole between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E, the through hole depth can be effectively reduced, which is beneficial to reducing the problem of poor contact of the through holes and can also help reduce the difficulty of the punching process.

[0273] In other examples, the light emitting substrate 100 may further include a third connection portion F3 located on the first electrode metal layer 03. The first end 31 of the second conductive coil 30 may be electrically connected to the second electrode P2 of the light emitting unit E through the third connection portion F3.

[0274] For example, the planarization layer 08 between the first source / drain metal layer 02 and the first electrode metal layer 03 may be provided with a fifth through-hole. The fifth through-hole may be used to expose the first end 31 of the second conductive coil 30 located on the first source / drain metal layer 02, so that the third connection portion F3 located on the first electrode metal layer 03 may be electrically connected to the first end 31 of the second conductive coil 30 located on the first source / drain metal layer 02 through the fifth through-hole.

[0275] Furthermore, the light-emitting definition layer 09 located between the first electrode metal layer 03 and the second electrode metal layer 04 may include a sixth through-hole. This sixth through-hole can be used to expose the third connection portion F3 located in the first electrode metal layer 03, thereby electrically connecting the second electrode P2 of the light-emitting unit E located in the second electrode metal layer 04 to the third connection portion F3 located in the first electrode metal layer 03 via the fourth through-hole. This allows the first end 31 of the second conductive coil 30 to be electrically connected to the second electrode P2 of the light-emitting unit E via the third connection portion F3.

[0276] The use of a segmented punching design (providing a first through hole, a fifth through hole, and a fourth through hole respectively) to realize the connection between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E can effectively reduce the depth of the through hole compared to providing a single connection hole between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E, thereby reducing the problem of poor through-hole contact and the difficulty of the punching process.

[0277] It should be noted that, except for the above description, the other structures of the light-emitting substrate 100 shown in FIG15 are similar to those of the light-emitting substrate 100 shown in FIG5 , and reference may be made to the description of the positions of the light-emitting substrate 100 shown in FIG5 .

[0278] The second type, please continue to refer to FIG. 16 , the first electrode P1 of the light emitting unit E is equivalent to the cathode of the light emitting unit E, located in the second electrode metal layer 04 , and the second electrode P2 of the light emitting unit E is equivalent to the anode of the light emitting unit E, located in the first electrode metal layer 03 .

[0279] The first conductive coil 10 and the second conductive coil 30 are connected in parallel, and the first end 11 of the first conductive coil 10 is electrically connected to the first end 31 of the second conductive coil 30 , and the second end 12 of the first conductive coil 10 is electrically connected to the second end 32 of the second conductive coil 30 .

[0280] The first end 11 of the first conductive coil 10 and the first end 31 of the second conductive coil 30 are electrically connected:

[0281] As shown in FIG16 , a first opening is defined in the first interlayer dielectric layer 07 between the first gate metal layer 01 and the first source / drain metal layer 02. The first opening can be used to expose the first end 11 of the first conductive coil 10 located in the first gate metal layer 01, thereby electrically connecting the first end 31 of the second conductive coil 30 located in the first source / drain metal layer 02 to the first end 11 of the first conductive coil 10 located in the first gate metal layer 01 through the first opening.

[0282] The second end 12 of the first conductive coil 10 and the second end 32 of the second conductive coil 30 are electrically connected:

[0283] 6 , the second end 12 of the first conductive coil 10 includes a first sub-portion G1 and a second sub-portion G2 . The first sub-portion G1 is multiplexed as the control electrode c1 of the P-type transistor T1 , and the second sub-portion G2 is multiplexed as the control electrode c2 of the N-type transistor T2 .

[0284] Based on this, on the basis that the first sub-portion G1 of the second end 12 of the first conductive coil 10 is multiplexed as the control electrode c1 of the P-type transistor T1, and the second sub-portion G2 is multiplexed as the control electrode c2 of the N-type transistor T2, the second end 32 of the second conductive coil 30 is electrically connected to the control electrode c2 of the N-type transistor T2, that is, the second end 12 of the first conductive coil 10 can be electrically connected to the second end 32 of the second conductive coil 30.

[0285] Please continue to refer to Figure 16. A second opening can be provided in the first interlayer dielectric layer 07 located between the first gate metal layer 01 and the first source-drain metal layer 02. The second opening is used to expose the control electrode c2 of the N-type transistor T2 located in the first gate metal layer 01, so that the second end 32 of the two conductive coils 30 located in the first source-drain metal layer 02 is electrically connected to the control electrode c2 of the N-type transistor T2 located in the first gate metal layer 01 through the second opening.

[0286] In some examples, a third opening may be further provided in the first interlayer dielectric layer 07 between the first gate metal layer 01 and the first source-drain metal layer 02, and the third opening may be used to expose the control electrode c1 of the P-type transistor T1 located in the first gate metal layer 01, so that the second end 32 of the two conductive coils 30 located in the first source-drain metal layer 02 can also be electrically connected to the control electrode c1 of the P-type transistor T1 located in the first gate metal layer 01 through the third opening.

[0287] The first end 11 of the first conductive coil 10 is also electrically connected to the second electrode P2 of the light emitting unit E:

[0288] As shown in FIG16 , since the first end 31 of the second conductive coil 30 is located between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E, the second electrode P2 of the light-emitting unit E can be electrically connected to the first end 11 of the first conductive coil 10 via the first end 31 of the second conductive coil 30 , thereby electrically connecting the first conductive coil 10, the second conductive coil 30, and the light-emitting unit E.

[0289] In some examples, the planarization layer 08 between the first electrode metal layer 03 and the first source / drain metal layer 02 may be provided with a fourth opening. The fourth opening may be used to expose the first end 31 of the second conductive coil 30 located on the first source / drain metal layer 02, so that the second electrode P2 of the light-emitting unit E located on the first electrode metal layer 03 can be electrically connected to the first end 31 of the second conductive coil 30 located on the first source / drain metal layer 02 through the fourth opening. This achieves electrical connection between the first conductive coil 10, the second conductive coil 30, and the light-emitting unit E.

[0290] Based on this, a segmented punching design is adopted (a first opening and a fourth opening are set respectively) to realize the connection between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E. Compared with setting a single connection hole between the first end 11 of the first conductive coil 10 and the second electrode P2 of the light-emitting unit E, the depth of the opening can be effectively reduced, which is beneficial to reducing the problem of poor contact of the opening and can also help reduce the difficulty of the punching process.

[0291] It should be noted that, except for the above description, the other structures of the light-emitting substrate 100 shown in FIG16 are similar to those of the light-emitting substrate 100 shown in FIG11 , and reference may be made to the description of the positions of the light-emitting substrate 100 shown in FIG11 .

[0292] In summary, some embodiments of the present disclosure provide a light-emitting substrate 100 and a light-emitting device 200. The light-emitting device 200 includes the light-emitting substrate 100. The light-emitting substrate 100 includes a first conductive coil 10, a control circuit 20, and a light-emitting unit E. The control circuit 20 is connected in series between the first conductive coil 10 and the light-emitting unit E. The control circuit 20 uses a first power signal from the first conductive coil 10 to drive the control circuit 20 to conduct. The control circuit 20 can transmit a first voltage signal V2 provided from a first power terminal V to the light-emitting unit E, causing the light-emitting unit E to emit light. Based on this, the light-emitting substrate 100 can integrate the first conductive coil 10 and the light-emitting unit E on the same substrate, that is, simultaneously integrating NFC wireless communication and display on the same substrate.

[0293] Furthermore, because the light-emitting substrate 100 can also utilize the first conductive coil 10 to power the light-emitting unit E, driving the light-emitting unit E to emit light and display, the light-emitting substrate 100 can eliminate the need for a power supply to power the light-emitting unit. This allows for passive driving via electromagnetic induction, simplifying the structure of the light-emitting substrate 100 and contributing to a lighter and thinner light-emitting substrate 100.

[0294] On this basis, since the light emitting device 200 includes the light emitting substrate 100 in any of the above embodiments, the light emitting device 200 has all the beneficial effects described above for the light emitting substrate 100 .

[0295] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A light-emitting substrate, include: A first conductive coil, the first conductive coil having a first end and a second end; the first conductive coil is used to couple with an external coil so that the first conductive coil forms a first power signal; A light-emitting unit, comprising a first electrode and a second electrode; the second electrode of the light-emitting unit is electrically connected to the first end of the first conductive coil; A control circuit, wherein a control end of the control circuit is electrically connected to the second end of the first conductive coil, an input end of the control circuit is electrically connected to a first power supply end, and an output end of the control circuit is electrically connected to a first electrode of the light-emitting unit; wherein the first voltage signal provided by the first power supply end is a DC voltage signal; The control circuit is configured to transmit a first voltage signal received at the first power terminal to the light emitting unit under the control of a first power signal from the first conductive coil, so as to make the light emitting unit emit light.

2. The light-emitting substrate according to claim 1, in, The control circuit comprises: a first control unit, wherein a control terminal of the first control unit and the first conductive coil are electrically connected to a first node, an input terminal of the first control unit is electrically connected to the first power terminal, and an output terminal of the first control unit is electrically connected to a second node; a second control unit, wherein a control terminal of the second control unit and the first conductive coil are electrically connected to the first node, an input terminal of the second control unit is electrically connected to the first power terminal, and an output terminal of the second control unit is electrically connected to the second node; The first node serves as a control end of the control circuit; the second node serves as an output end of the control circuit.

3. The light-emitting substrate according to claim 2, in, The first control unit includes a P-type transistor, and the second control unit includes an N-type transistor.

4. The light-emitting substrate according to claim 3, further comprising: include: substrate substrate; A first gate metal layer, located on one side of the substrate; the first gate metal layer includes a control electrode of the P-type transistor and a control electrode of the N-type transistor; a first source-drain metal layer, located on a side of the first gate metal layer away from the substrate; the first source-drain metal layer includes a first electrode of the P-type transistor, a second electrode of the P-type transistor, a first electrode of the N-type transistor, and a second electrode of the N-type transistor; A first electrode metal layer is located on a side of the first source-drain metal layer away from the substrate; and A second electrode metal layer is located on a side of the first electrode metal layer away from the substrate; Among them, one of the first electrode of the light-emitting unit and the second electrode of the light-emitting unit is located in the first electrode metal layer, and the other is located in the second electrode metal layer.

5. The light-emitting substrate according to claim 4, in, The voltage value of the first voltage signal is greater than 0V; The first electrode of the light emitting unit is located in the first electrode metal layer, and the second electrode of the light emitting unit is located in the second electrode metal layer.

6. The light-emitting substrate according to claim 5, in, The voltage value of the first voltage signal ranges from 2V to 5V.

7. The light-emitting substrate according to claim 5 or 6, in, The first electrode metal layer further includes a first connecting portion; the first end of the first conductive coil is electrically connected to the second electrode of the light-emitting unit through the first connecting portion.

8. The light-emitting substrate according to claim 4, in, The voltage value of the first voltage signal is less than 0V; The first electrode of the light emitting unit is located on the second electrode metal layer, and the second electrode of the light emitting unit is located on the first electrode metal layer.

9. The light-emitting substrate according to claim 8, in, The voltage value of the first voltage signal ranges from -5V to -2V.

10. The light-emitting substrate according to claim 8 or 9, in, The first electrode metal layer further includes a second connection portion; the second electrode of the P-type transistor and the second electrode of the N-type transistor are electrically connected to the first electrode of the light-emitting unit through the second connection portion.

11. The light-emitting substrate according to any one of claims 4 to 10, in, The first conductive coil is located in one of the first gate metal layer and the first source-drain metal layer.

12. The light-emitting substrate according to any one of claims 4 to 11, further comprising: include: A second conductive coil is connected in parallel with the first conductive coil.

13. The light-emitting substrate according to claim 12, in, An orthographic projection of the first conductive coil on the substrate at least partially overlaps with an orthographic projection of the second conductive coil on the substrate.

14. The light-emitting substrate according to claim 12 or 13, in, Of the first conductive coil and the second conductive coil, one is located in the first gate metal layer, and the other is located in the first source-drain metal layer.

15. The light-emitting substrate according to any one of claims 1 to 14, in, The thickness of the first conductive coil is greater than or equal to 1 μm.

16. The light-emitting substrate according to any one of claims 1 to 15, in, The number of turns of the first conductive coil is greater than or equal to 10 turns.

17. The light-emitting substrate according to any one of claims 1 to 16, in, The line width of the first conductive coil is greater than or equal to 500 μm.

18. The light-emitting substrate according to any one of claims 1 to 17, in, The first conductive coil includes a plurality of turns of conductive wire; a first minimum spacing between two adjacent turns of conductive wire is greater than or equal to 10 μm.

19. The light-emitting substrate according to any one of claims 1 to 18, in, The light emitting unit includes a light emitting diode.

20. A light-emitting device, comprising the light-emitting substrate according to any one of claims 1 to 19.

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