Photoelectric conversion device, photoelectric conversion system, and equipment

Abstract

To provide a technique capable of photoelectric conversion which is less likely to be affected by noise and has high accuracy and high quality.SOLUTION: A photoelectric conversion device comprises: pixels having photoelectric conversion elements; signal lines connected to the pixels; a voltage / current conversion part which converts voltage signals of the signal lines to currents; and a conversion part which has an AD conversion circuit of an oversampling type to convert the currents output from the voltage / current conversion part, to digital signals. The voltage / current conversion part converts the voltage signals of the signal lines to currents without sampling and holding, and outputs the converted current to the conversion part.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a photoelectric conversion device, a photoelectric conversion system, and equipment provided with the same.

Background Art

[0002] A solid-state imaging device that performs analog-to-digital conversion after sample-holding a pixel signal is disclosed in Patent Document 1. More specifically, the solid-state imaging device disclosed in Patent Document 1 includes a circuit that sample-holds, as a sample signal voltage, the difference between the voltage of a vertical signal line corresponding to the light reception amount of a pixel and a predetermined reference voltage, and an ADC that performs analog-to-digital conversion on the sample signal voltage.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in a configuration where pixel signals are sample-held and then subjected to analog-to-digital conversion as in conventional devices, the accuracy of analog-to-digital conversion and thus the image quality may deteriorate due to the influence of random noise contained in the pixel signals.

[0005] The present invention has been made in view of the above circumstances, and an object thereof is to provide a technology that is less affected by noise and enables high-precision and high-quality photoelectric conversion.

Means for Solving the Problems

[0006] This disclosure includes a photoelectric conversion device comprising: a pixel having a photoelectric conversion element; a signal line connected to the pixel; a voltage-current conversion unit that converts the voltage signal of the signal line into a current; and a conversion unit having an oversampling type analog-to-digital conversion circuit that converts the current output from the voltage-current conversion unit into a digital signal, wherein there is no sample-and-hold unit between the signal line and the conversion unit.

[0007] This disclosure includes a photoelectric conversion device comprising: a pixel having a photoelectric conversion element; a signal line connected to the pixel; a voltage-current conversion unit that converts a voltage signal of the signal line into a current; and a conversion unit having an oversampling type analog-to-digital conversion circuit that converts the current output from the voltage-current conversion unit into a digital signal, wherein the signal path from the signal line to the conversion unit includes a path without a sample-and-hold unit.

[0008] This disclosure includes a photoelectric conversion device comprising: a pixel having a photoelectric conversion element; a signal line connected to the pixel; a voltage-current conversion unit that converts the voltage signal of the signal line into a current; and a conversion unit having an oversampling type analog-to-digital conversion circuit that converts the current output from the voltage-current conversion unit into a digital signal, wherein the voltage-current conversion unit is configured to output the current obtained by converting the voltage signal of the signal line without sampling and holding to the conversion unit.

[0009] This disclosure includes a photoelectric conversion system having the photoelectric conversion device and a signal processing unit that processes signals output from the photoelectric conversion device.

[0010] This disclosure includes equipment comprising at least one of the following: a photoelectric converter; an optical system corresponding to the photoelectric converter; a control device for controlling the photoelectric converter; a processing device for processing signals output from the photoelectric converter; a display device for displaying information obtained from the photoelectric converter; a storage device for storing information obtained from the photoelectric converter; and a mechanical device that operates based on the information obtained from the photoelectric converter. [Effects of the Invention]

[0011] According to the present invention, it is less likely to be affected by noise, and high-precision and high-quality photoelectric conversion can be achieved.

Brief Description of the Drawings

[0012] [Figure 1] It is a schematic diagram of a photoelectric conversion device related to Example 1. [Figure 2] It is a schematic diagram of a photoelectric conversion device related to Example 1. [Figure 3] It is a schematic diagram of a photoelectric conversion device related to Example 1. [Figure 4] It is a timing diagram of a photoelectric conversion device related to Example 1. [Figure 5] It is a schematic diagram of a photoelectric conversion device related to Example 2. [Figure 6] It is a timing diagram of a photoelectric conversion device related to Example 2. [Figure 7] It is a schematic diagram of a photoelectric conversion device related to Example 3. [Figure 8] It is a schematic diagram of a photoelectric conversion device related to Example 4. [Figure 9] It is a schematic diagram of a photoelectric conversion device related to Example 5. [Figure 10] It is a timing diagram of a photoelectric conversion device related to Example 5. [Figure 11] It is a schematic diagram of a photoelectric conversion device related to Example 6. [Figure 12] It is a timing diagram of a photoelectric conversion device related to Example 6. [Figure 13] It is a schematic diagram of a photoelectric conversion device related to Example 7. [Figure 14] It is a timing diagram of a photoelectric conversion device related to Example 7. [Figure 15] It is a timing diagram of a photoelectric conversion device related to Example 7. [Figure 16] It is a schematic diagram of a photoelectric conversion device related to Example 8. [Figure 17] It is a timing diagram of a photoelectric conversion device related to Example 8. [Figure 18]It is a schematic diagram of a photoelectric conversion device related to a modification of Example 8. [Figure 19] It is a timing chart of a photoelectric conversion device related to a modification of Example 8. [Figure 20] It is a schematic diagram of a photoelectric conversion device related to a modification of Example 8. [Figure 21] It is a schematic diagram of a photoelectric conversion device related to a modification of Example 8. [Figure 22] It is a schematic diagram of a photoelectric conversion device related to a modification of Example 8. [Figure 23] It is a schematic diagram of a photoelectric conversion device related to a modification of Example 8. [Figure 24] It is a schematic diagram of a photoelectric conversion device related to a modification of Example 8. [Figure 25] It is a schematic diagram of a photoelectric conversion system related to Example 9. [Figure 26] It is a schematic diagram of a photoelectric conversion system related to Example 10. [Figure 27] It is a schematic diagram of a photoelectric conversion system related to Example 11. [Figure 28] It is a schematic diagram of a photoelectric conversion system related to Example 12. [Figure 29] It is a schematic diagram of a photoelectric conversion system related to Example 13. [Figure 30] It is a schematic diagram of a photoelectric conversion system related to Example 14.

Modes for Carrying Out the Invention

[0013] (Example 1) FIGS. 1, 2, 3, and 4 are schematic diagrams and timing charts of a photoelectric conversion device related to Example 1. In FIG. 1, 1 is a pixel substrate, 2 is a circuit board, 5 is a pixel portion, 10 is a pixel, 30 is a vertical signal line, 40 is a current source, 50 is a voltage-current conversion unit, 60 is a conversion unit, 90 is a data processing unit, and 100 is an output unit.

[0014] In the pixel portion 5, a plurality of pixels 10 each including a photoelectric conversion element are arranged in a matrix. Here, the row direction refers to the left-right direction in Figure 1, and the column direction refers to the up-down direction in Figure 1. Pixel 10 generates a signal charge corresponding to the incident light.

[0015] In the pixel section 5, vertical signal lines 30 are arranged along the direction of the pixel row, corresponding to the pixel row in which the pixels 10 are arranged. The vertical signal lines 30 transfer signals corresponding to the signal charge generated by the photoelectric conversion element of the pixel 10 from the pixel 10 to the voltage-current conversion section 50.

[0016] The current sources 40 are arranged in accordance with each of the vertical signal lines 30. The current sources 40 supply bias current via the vertical signal lines 30 to the pixel 10 selected for reading out the signal.

[0017] The voltage-to-current conversion unit 50 converts the voltage signal from the vertical signal line 30 into current and supplies it to the conversion unit 60.

[0018] The conversion unit 60 converts the signal current output from the voltage-current conversion unit 50 from analog to digital. In the conversion unit 60, analog-to-digital conversion circuits are connected to each of the vertical signal lines 30. In this embodiment, an oversampling type conversion circuit is used as the analog-to-digital conversion circuit. As an example, a delta-sigma (ΔΣ) type analog-to-digital conversion circuit is used, but it is not limited to this.

[0019] The data processing unit 90 is a digital signal processing unit that processes the digital signal output from the conversion unit 60. For example, it may perform correction processing or interpolation processing on the digital signal output from the conversion unit 60. The output unit 100 outputs the signal processed by the data processing unit 90 to the outside of the chip.

[0020] Figure 2 is a circuit diagram showing an example configuration of pixel 10. Pixel 10 includes a photoelectric conversion element 400, a transfer transistor 410, a reset transistor 455, an amplification transistor 430, and a selection transistor 440. The photoelectric conversion element 400 may be, for example, a photodiode. One of the main electrodes of the photoelectric conversion element 400 is connected to ground potential 450, and it photoelectrically converts received light into a signal charge (e.g., photoelectrons) of an amount corresponding to the amount of light, and stores it. The other of the main electrodes of the photoelectric conversion element 400 is electrically connected to the gate electrode of the amplification transistor 430 via the transfer transistor 410. Node 420, to which the gate electrode of the amplification transistor 430 is electrically connected, functions as a floating diffusion. The floating diffusion is a charge-voltage conversion unit that converts the signal charge generated by the photoelectric conversion element 400 into a signal voltage.

[0021] A transfer signal TX is supplied to the gate electrode of the transfer transistor 410. When the transfer transistor 410 becomes conductive in response to the transfer signal TX, it is photoelectrically converted by the photoelectric conversion element 400, and the signal charge accumulated in the photoelectric conversion element 400 is transferred to the floating diffusion node 420.

[0022] The reset transistor 455 is connected between the power supply potential 460 and node 420. Here, the expression "the transistor is connected between A and B" means that "one of the transistor's main electrodes (source and drain) is connected to A, and the other main electrode is connected to B." In this case, the transistor's gate electrode is not connected to A or B.

[0023] A reset signal RES is supplied to the gate electrode of the reset transistor 455. When the reset transistor 455 becomes conductive in response to the reset signal RES, the potential of node 420 (floating diffusion) is reset to the power supply potential 460. Then, the charge held in the floating diffusion is swept away.

[0024] The amplifying transistor 430 has its gate electrode connected to node 420, one of its main electrodes connected to the power supply potential 460, and the other of its main electrodes connected to the selection transistor 440. The amplifying transistor 430 becomes the input of a source follower that reads out the signal obtained by the photoelectric conversion of the photoelectric conversion element 400. In other words, the other of the main electrodes of the amplifying transistor 430 is connected to the vertical signal line 30 via the selection transistor 440. The amplifying transistor 430 and the current source 40 connected to the vertical signal line 30 constitute a source follower that converts the voltage at node 420 to the potential of the vertical signal line 30.

[0025] The selection transistor 440 is connected between the amplification transistor 430 and the vertical signal line 30. The gate electrode of the selection transistor 440 is supplied with a selection signal SEL. When the selection transistor 440 becomes conductive in response to the selection signal SEL, the pixel 10 is selected, and a signal is output from the amplification transistor 430 to the vertical signal line 30.

[0026] The circuit configuration of pixel 10 is not limited to the configuration shown in Figure 2. For example, it may be connected between the selection transistor 440, the power supply potential 460, and the amplification transistor 430. Also, although Figure 2 shows a so-called 4-transistor (4Tr.) type configuration for pixel 10, comprising a transfer transistor 410, a reset transistor 455, an amplification transistor 430, and a selection transistor 440, it is not limited to this. For example, the selection transistor 440 may be omitted, and a 3Tr. type configuration in which the amplification transistor 430 also functions as a selection transistor may be used. Alternatively, a 5Tr. type or higher configuration with an increased number of transistors may be used. Pixel 10 may sequentially output a reset signal when the potential of node 420 is reset by the reset transistor 455 and the photoelectric conversion element 400 is reset, and a data signal which is the signal level when photoelectric conversion is performed by the photoelectric conversion element 400.

[0027] Figure 3 shows an example of a circuit configuration focusing on the voltage-to-current conversion unit 50 and the conversion unit 60. Figure 3 shows the voltage-to-current conversion unit 50 and the conversion unit 60 arranged corresponding to one vertical signal line 30. The voltage-to-current conversion unit 50 includes current sources 110 and 120, a variable resistor 130, N-type transistors 140 and 150, and P-type transistors 160 and 170.

[0028] As shown in Figure 3, a variable resistor 130 is placed between the source of N-type transistor 140 and the source of N-type transistor 150. A reference voltage REF is applied to the gate of N-type transistor 140, and the voltage of the vertical signal line 30 is applied to the gate of N-type transistor 150. A signal voltage ΔV corresponding to the difference is generated across the variable resistor 130, and if the resistance value of the variable resistor 130 is R, then ΔI = ΔV / R The signal current flows through the variable resistor 130. At this time, the current flowing through the N-type transistor 140 increases by ΔI, and the current flowing through the N-type transistor 150 decreases by ΔI. Since the P-type transistors 160 and 170 form a current mirror, the current flowing through the P-type transistor 170 increases by ΔI. As a result, a signal current of 2ΔI is output from the voltage-to-current conversion unit 50.

[0029] In this embodiment, a ΔΣ type analog-to-digital conversion circuit is used as the conversion unit 60 to correspond to one vertical signal line 30. The ΔΣ type analog-to-digital conversion circuit includes a first integrator, a second integrator, a quantizer 370, and a decimation filter 380. The first integrator is composed of an integrating capacitor 320. The second integrator is a Gm sequester that converts voltage to current. It consists of a 330 and an integrating capacitor 360. A digital-to-analog converter 305, including a current source 300 and a switch 310, is connected to the input node of the first integrator. The digital-to-analog converter 305 controls the current to the first integrator in accordance with the digital signal via the second integrator and quantizer 370. A digital-to-analog converter 345, including a current source 340 and a switch 350, is connected to the input node of the second integrator. The digital-to-analog converter 345 controls the current to the second integrator in accordance with the result of quantizing the output of the second integrator by the quantizer 370.

[0030] In the ΔΣ type analog-to-digital conversion circuit, the quantizer 370 feeds back the previous quantization value to the digital-to-analog converters 305 and 345. Then, the difference between the signal current 2ΔI generated by the voltage-to-current conversion unit 50 and the output current of the digital-to-analog converter 305 is integrated by the first integrator, and the difference between the output current of the Gm cell 330 and the output current of the digital-to-analog converter 345 is integrated by the second integrator. This operation is repeated many times during the AD conversion period (for example, 128 times if the oversampling rate is 128), integrating the noise component from the pixel 10 included in the signal current 2ΔI multiple times. This makes it possible to significantly compress and reduce the noise component of the pixel 10. In this way, by inputting the pixel signal into the ΔΣ type analog-to-digital conversion circuit without sample-and-hold, it is possible to oversample the pixel noise and reduce the pixel noise.

[0031] On the other hand, in conventional photoelectric converters, the pixel signal, which is fixed (sampled) by a sample-and-hold circuit, is input to the analog-to-digital conversion circuit. In such a configuration, the instantaneous value of the pixel signal at the time of sampling is held, so the pixel signal containing pixel noise (random noise originating from the pixel) is converted from analog to digital. Therefore, the effect of reducing pixel noise through oversampling in a ΔΣ type analog-to-digital conversion circuit cannot be obtained. In contrast, the photoelectric converter of this embodiment does not have a sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60. That is, in this embodiment, the signal path from the vertical signal line 30 to the conversion unit 60 includes a path without a sample-and-hold circuit, and by passing through this path, the voltage signal of the vertical signal line 30 can be converted without sample-and-hold and output to the conversion unit 60 as a current 2ΔI. In other words, while conventional devices sample the pixel signal only once with a sample-and-hold circuit, in this embodiment, the pixel signal is sampled multiple times while the vertical signal line 30 to the conversion unit 60 is connected (tracked) for a predetermined period. With this configuration, it is possible to reduce pixel noise and enable high-precision and high-quality photoelectric conversion.

[0032] Let's further explain an example of operation using the timing chart in Figure 4. Between times t0 and t1, the control signal RES in Figure 2 becomes high, turning on the reset transistor 455 and resetting the floating diffusion 420. Accordingly, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES is set to low, turning off the reset transistor 455. At this time, as the potential of the floating diffusion 420 decreases, the potential of the vertical signal line 30 also decreases. After the potential of the vertical signal line 30 stabilizes, AD conversion (NAD) to the reset level is started from time t2. As mentioned above, the voltage-current conversion unit 50 outputs a signal current 2ΔI corresponding to the difference between the reference voltage REF and the potential of the vertical signal line 30. Here, the signal current corresponding to the reset level of the vertical signal line 30 is defined as 2ΔIn. If the NAD period is, for example, 128 clock cycles, the quantized value before the quantizer 370 is fed back to the digital-to-analog converters 305 and 345, while the same quantized value is sent to the decimation filter 380. The decimation filter 380 performs high-precision AD conversion by processing such as moving averages. In addition, by integrating the noise component from the pixel 10 contained in the signal current 2ΔIn multiple times, it is possible to significantly reduce the noise component of the pixel 10.

[0033] Between times t3 and t4, the control signal TX in Figure 2 becomes high, turning on the transfer transistor 410, and photocharge is transferred from the photoelectric conversion element 400 to the floating diffusion 420. The potential of the floating diffusion 420 decreases in proportion to the amount of charge. This causes the potential of the vertical signal line 30 to decrease. After the potential of the vertical signal line 30 stabilizes, AD conversion (SAD) of the signal level of the vertical signal line 30 is started from time t5. Here, the signal current corresponding to the signal level of the vertical signal line 30 is set to 2ΔIs. Even during the SAD period, similar to the NAD period, AD conversion with a significant reduction in the noise component of the pixel 10 is possible. The AD conversion results of the reset level and the signal level are sent to the data processing unit 90, where the difference is taken to perform so-called digital CDS (Correlated Double Sampling) processing.

[0034] As explained above, in this embodiment, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60. Instead, the pixel signal is sampled multiple times while the vertical signal line 30 and the conversion unit 60 are connected (tracked) for a predetermined period. This makes it possible to reduce pixel noise.

[0035] Furthermore, the use of a current-input type ΔΣ analog-to-digital conversion circuit as the conversion unit 60 offers advantages in terms of lowering the voltage.

[0036] Furthermore, the gain can be switched by changing the resistance value of the variable resistor 130.

[0037] In this embodiment, a differential pair was used as the voltage-current conversion unit 50, but the invention is not limited to this. A single-ended voltage-current conversion circuit may also be used. However, a differential configuration is preferable from the viewpoint of PSRR (Power Supply Rejection Ratio).

[0038] (Example 2) Figures 5 and 6 show schematic diagrams and timing charts of the photoelectric converter related to Example 2. Below, only the differences from Figures 3 and 4 of Example 1 will be explained. In Figure 5, there is a switch 200 and a capacitor 210 for sampling and holding the reference voltage REF. This makes it possible to suppress image quality degradation due to noise in the reference voltage REF. Also in Figure 5, there is a capacitor 180 and switches 190 and 220 for clamping the voltage of the vertical signal line 30 and performing auto-zero operation of the voltage-current conversion unit 50. This makes it possible to reduce output current variation due to characteristic variations of the pixel 10 and offset variations of the voltage-current conversion unit 50.

[0039] The operation will be explained using the timing chart in Figure 6. From time t0 to time t2, the control signal BSH is set to a high level, causing switch 200 to be in the ON state. Then, by switching it to a low level at time t2, switch 200 becomes OFF, and remains at a low level during the NAD period from time t4 to t5 and the SAD period from time t7 to t8. This makes it possible to suppress fluctuations in the gate voltage of transistor 140 during the NAD and SAD periods due to random noise in the reference voltage REF. This makes it possible to suppress image quality degradation due to noise in the reference voltage REF. Also, from time t0 to t3, the control signal AZ is set to a high level and the control signal AZb is set to a low level, causing switch 190 to be in the ON state and switch 220 to be in the OFF state. Then, by switching the control signal AZ to a low level and the control signal AZb to a high level at time t3, switch 190 becomes OFF and switch 220 becomes ON. This operation maintains the reset level of the vertical signal line 30 at the clamp capacitance 180. This allows the DC offset of the reset level caused by characteristic variations in pixel 10 (such as threshold variations in the selection transistor 440) to be canceled (auto-zero operation). This makes it possible to reduce the output current variation of the voltage-to-current conversion unit 50.

[0040] In this embodiment, the signal path from the vertical signal line 30 to the conversion unit 60 has a capacitance of 180, but all noise other than the DC component emitted by the pixel 10 is transmitted to the conversion unit 60. However, even in this embodiment, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60, and the pixel signal is sampled multiple times while the vertical signal line 30 and the conversion unit 60 are connected for a predetermined period. This makes it possible to reduce pixel noise.

[0041] (Example 3) Figure 7 shows a schematic diagram of the photoelectric converter related to Embodiment 3. Below, only the differences from Figure 5 of Embodiment 2 will be explained. In Figure 5, the voltage-current conversion unit 50 had a single-stage configuration consisting only of a differential stage, but in this embodiment, it further has N-type transistors 230, 240 and P-type transistors 250, 260, forming a current amplification stage. In Figure 7, signal currents of +ΔI and -ΔI flow through the N-type transistors 140 and 150, as in Figure 5. In this embodiment, the P-type transistor 160 is in a current mirror configuration with the P-type transistor 260, and the P-type transistor 170 is in a current mirror configuration with the P-type transistor 250. As a result, the signal current +ΔI flows through the P-type transistors 160 and 260, and the signal current -ΔI flows through the P-type transistors 170 and 250, and Δ2I is output to the conversion unit 60, as in Figure 5. However, in this case, in Figure 5, the sum of the signal currents of P-type transistors 160 and 170 is 2ΔI, whereas in Figure 7, the sum of the signal currents of P-type transistors 160, 170, 250, and 260 is zero. In other words, in Figure 7, it is possible to suppress the illuminance dependence (dependence on the signal of the vertical signal line 30) of the current consumption of the voltage-current conversion unit 50. This makes it possible to suppress interference between the voltage-current conversion units 50 and suppress image quality degradation.

[0042] Furthermore, in this embodiment as well, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60. Instead, the pixel signal is sampled multiple times while the vertical signal line 30 and the conversion unit 60 are connected for a predetermined period. This makes it possible to reduce pixel noise.

[0043] (Example 4) Figure 8 shows a schematic diagram of the photoelectric converter related to Embodiment 4. Below, only the differences from Figure 5 of Embodiment 2 will be explained. In this embodiment, a differential pair is formed using P-type transistors 140 and 150 in the voltage-current conversion unit 50. A current mirror is also formed using N-type transistors 160 and 170. In this embodiment, when a signal current of +ΔI flows through the P-type transistor 140 due to the difference between the reference voltage REF and the voltage of the vertical signal line 30, a signal current of -ΔI flows through the P-type transistor 150. Then, a signal current of 2ΔI is output from the voltage-current conversion unit 50, as in the above embodiment. Assuming that the currents of current sources 110 and 120 are constant, in this embodiment as well, it is possible to suppress the illuminance dependence (dependence on the signal of the vertical signal line 30) of the current consumption of the voltage-current conversion unit 50, similar to Embodiment 3. Furthermore, compared to Embodiment 3, there are fewer elements, which is advantageous from the viewpoint of saving area. Furthermore, by sharing the GND of N-type transistors 160 and 170 and current source 300, it can be assumed that the current on the GND side can also be kept constant.

[0044] Furthermore, in this embodiment as well, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60. Instead, the pixel signal is sampled multiple times while the vertical signal line 30 and the conversion unit 60 are connected for a predetermined period. This makes it possible to reduce pixel noise.

[0045] (Example 5) Figures 9 and 10 show schematic diagrams and timing charts of the photoelectric converter related to Embodiment 5. Below, only the differences from Figures 3 and 4 of Embodiment 1 will be explained. Figure 9 has a capacitor 500, a switch 510, operational amplifiers 520 and 530, a capacitor 540, a switch 550, current sources 551 and 552, a P-type transistor 560, an N-type transistor 570, a variable resistor 580, and a P-type transistor 590. In Figure 3, the voltage of the vertical signal line 30 and the reference voltage REF were applied directly to the gates of the differential pair transistors 140 and 150 connected to the variable resistor 130. In contrast, in this embodiment, the gates of the P-type transistors 560 and 590 connected to the variable resistor 580 are driven via operational amplifiers 520 and 530. Operational amplifiers 520 and 530 each work to make the source of the P-type transistors 560 and 590 equal to the potential of the forward input terminal of the operational amplifiers 520 and 530. The voltage at the former's forward input terminal is based on the signal from the vertical signal line 30, while the voltage at the latter's forward input terminal is the reference voltage REF. This allows for more ideal voltage-to-current conversion using the variable resistor 580, thereby improving accuracy.

[0046] The following explanation will use the timing chart in Figure 10 to focus on the differences from the chart in Figure 4. Between times t0 and t1, the control signal RES becomes high, turning on the reset transistor 455 and resetting the floating diffusion 420. Accordingly, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES is set to low, turning off the reset transistor 455. At this time, as the potential of the floating diffusion 420 decreases, the potential of the vertical signal line 30 also decreases.

[0047] After the potential of the vertical signal line 30 stabilizes, the control signal CLMP is set to a low level and switch 510 is turned off. This clamps the voltage corresponding to the reset level of the vertical signal line 30 using capacitor 500. This suppresses the influence on the output current from kT / C noise generated at pixel 10 and threshold variation of the amplification transistor 430. The potential of the source of the P-type transistor 590 becomes approximately equal to the reference voltage VC. At time t3, the control signal AZ is set to a low level and switch 550 is turned off. The potential of the source of the P-type transistor 560 becomes approximately equal to the reference voltage REF.

[0048] At time t4, the reset-level AD conversion (NAD) is started. A signal voltage ΔV corresponding to the difference in source voltages between P-type transistors 560 and 590 is generated across the variable resistor 580. If the resistance value of the variable resistor 580 is R, ΔI = ΔV / R The signal current flows through the variable resistor 580 and is output to the conversion unit 60. The random noise component of pixel 10 appears in the vertical signal line 30 and is transmitted to the source of the P-type transistor 590. Therefore, the output current ΔI fluctuates due to the random noise component of pixel 10, but as in the embodiment described above, it is possible to significantly suppress this effect during the NAD period from time t4.

[0049] Between times t5 and t6, the control signal TX becomes high level, turning on the transfer transistor 410, which transfers photocharge from the photoelectric conversion element 400 to the floating diffusion 420. The potential of the floating diffusion 420 decreases in proportion to the amount of charge. This causes the potential of the vertical signal line 30 to decrease. After the potential of the vertical signal line 30 stabilizes, AD conversion (SAD) of the signal level of the vertical signal line 30 is started from time t7. Even during the SAD period, similar to the NAD period, AD conversion with significantly reduced noise components of the pixel 10 is possible. The AD conversion results of the reset level and signal level are sent to the data processing unit 90, and by taking the difference, so-called digital CDS (Correlated Double Sampling) is obtained. Perform the ng) process.

[0050] As explained above, this embodiment makes it possible to perform more ideal voltage-to-current conversion and improve accuracy.

[0051] Furthermore, in this embodiment as well, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60. Instead, the pixel signal is sampled multiple times while the vertical signal line 30 and the conversion unit 60 are connected for a predetermined period. This makes it possible to reduce pixel noise.

[0052] (Example 6) Figures 11 and 12 show schematic diagrams and timing charts of the photoelectric conversion device related to Embodiment 6. Below, only the differences from Figures 9 and 10 of Embodiment 5 will be explained. In this embodiment, the presence of switches 600 and 610 makes it possible to set the source potential of the P-type transistor 560 to the reset level of the vertical signal line 30. As a result, it is possible to suppress the influence on the output current, such as kT / C noise generated at the pixel 10 and threshold variation of the amplification transistor 430, without using the capacitor 500 shown in Figure 9.

[0053] The following explanation will focus on the differences from the chart in Figure 10, using the timing chart in Figure 12. Between times t0 and t1, the control signal RES becomes high, turning on the reset transistor 455 and resetting the floating diffusion 420. Accordingly, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES is set to low, turning off the reset transistor 455. At this time, the potential of the vertical signal line 30 decreases in accordance with the decrease in the potential of the floating diffusion 420.

[0054] After the potential of the vertical signal line 30 stabilizes, at time t2, the control signal AZ_N is set to a low level and switch 550 is turned off. Then, at time t3, the control signal SMP_N is set to a low level and switch 600 is turned off, and at time t4, the control signal HLD_N is set to a high level and switch 610 is turned on. As a result of this series of operations, the source potential of the P-type transistor 560 becomes a potential equivalent to the reset level of the vertical signal line 30. Furthermore, this reset level is a potential that includes the kT / C noise generated at pixel 10 when the control signal RES is set to a low level and the reset transistor 455 is turned off at time t1, as well as the threshold variation of the amplification transistor 430. It is.

[0055] At time t5, the AD conversion (NAD) to the reset level is started. A signal voltage ΔV corresponding to the difference in source voltages between P-type transistors 560 and 590 is generated across the variable resistor 580. If the resistance value of the variable resistor 580 is R, then ΔI = ΔV / R The signal current flows through the variable resistor 580 and is output to the conversion unit 60. At this time, the source voltages of both the P-type transistors 560 and 590 include kT / C noise generated at the pixel 10 and threshold variation of the amplification transistor 430, which helps to suppress the influence on the output current.

[0056] Furthermore, in this embodiment, there is no sample-and-hold circuit between the vertical signal line 30 and the voltage-current conversion unit 50. Instead, the pixel signal is sampled multiple times while the vertical signal line 30 is connected to the conversion unit 60 for a predetermined period. This makes it possible to reduce pixel noise.

[0057] In this embodiment, the voltage-current conversion unit 50 includes a sample-and-hold circuit consisting of an amplifier 530, a capacitor 540, and switches 600 and 610. However, as described above, during both the NAD and SAD periods, the signal and noise of the pixel 10 are transmitted to the conversion unit 60 via the vertical signal line 30, the operational amplifier 520, and the source of the P-type transistor 590, thus being transmitted to the conversion unit 60 without passing through the sample-and-hold circuit. In other words, there is a path between the vertical signal line 30 and the conversion unit 60 that does not pass through the sample-and-hold unit. As a result, even in this embodiment, the pixel signal is sampled multiple times while the vertical signal line 30 is connected to the conversion unit 60 for a predetermined period, thereby reducing pixel noise.

[0058] (Example 7) Figures 13, 14, and 15 show schematic diagrams and timing charts of the photoelectric converter related to Example 7. Below, only the differences from Figures 11 and 12 of Example 6 will be explained. In Figure 13, there are capacitors 650 and switches 660, 670, 680, 690, and 700. This makes it possible to implement a high-speed operation mode in addition to the low-noise operation mode similar to Example 6.

[0059] <Low-noise operating mode> Figure 14 shows the timing chart for operation similar to that of Example 6. As shown in Figure 14, the control signals AZ_S, SMP_S, and HLD_S are always at high, low, and low levels, respectively. As a result, in Figure 13, switch 660 is ON and switches 670 and 680 are OFF. Although not shown in the chart in Figure 14, when the control signal PSEL is at a high level and the control signal RSEL is at a low level, switch 690 is ON and switch 700 is OFF. At this time, the circuit in Figure 13 operates in the same state as in Figure 11, and the chart in Figure 14 enables the same operation as the chart in Figure 12.

[0060] <High-speed operation mode> Figure 15 shows a timing chart for faster operation compared to Figure 14. In this operating mode, the control signal PSEL is at a low level and the control signal RSEL is at a high level, resulting in switch 690 being in the off state and switch 700 being in the on state. The following explanation will focus on the differences from the chart in Figure 14. Between times t0 and t1, the control signal RES becomes high, and the reset transistor 455 turns on, resetting the floating diffusion 420. Accordingly, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES is set to a low level, turning off the reset transistor 455. At this time, as the potential of the floating diffusion 420 decreases, the potential of the vertical signal line 30 also decreases.

[0061] After the potential of the vertical signal line 30 stabilizes, at time t2, the control signal AZ_N is set to a low level and switch 550 is turned off. Then, at time t3, the control signal SMP_N is set to a low level and switch 600 is turned off, and at time t4, the control signal HLD_N is set to a high level and switch 610 is turned on. As a result of this series of operations, the source potential of the P-type transistor 560 becomes a potential equivalent to the reset level of the vertical signal line 30. Furthermore, this reset level is a potential that includes the kT / C noise generated at pixel 10 when the control signal RES is set to a low level and the reset transistor 455 is turned off at time t1, as well as the threshold variation of the amplification transistor 430. It is.

[0062] Between times t5 and t6, the control signal TX becomes high level, turning on the transfer transistor 410, which transmits energy from the photoelectric conversion element 400 to the floating diffusion element 420. Photocharge is transferred. The potential of the floating diffusion 420 decreases in proportion to the amount of charge. This causes the potential of the vertical signal line 30 to decrease. Also, at time t5, switches 660 and 670 are turned on by setting the control signals AZ_S and SMP_S to high levels. After the potential of the vertical signal line 30 stabilizes, at time t7, the control signal AZ_S is set to a low level, turning off switch 660. Then, at time t8, the control signal SMP_S is set to a low level, turning off switch 670, and at time t9, the control signal HLD_S is set to a high level, turning on switch 680. As a result of this series of operations, the source potential of the P-type transistor 590 becomes a potential equivalent to the signal level of the vertical signal line 30.

[0063] AD conversion (AD) starts at time t10. A signal voltage ΔV corresponding to the difference in source voltages between P-type transistors 560 and 590 is generated across the variable resistor 580. If the resistance value of the variable resistor 580 is R, then ΔI = ΔV / R The signal current flows through the variable resistor 580 and is output to the conversion unit 60. At this time, the source voltages of both the P-type transistors 560 and 590 include kT / C noise generated at the pixel 10 and threshold variation of the amplification transistor 430, which helps to suppress the influence on the output current.

[0064] Furthermore, during the AD conversion period, the control signals SMP_N and SMP_S are at a low level, causing switches 600 and 670 to be in the off state. Also, since the control signal PSEL is at a low level, switch 690 is also in the off state. As a result, the vertical signal line 30 and the internal circuitry of the voltage-current conversion unit 50 are not electrically connected, making it possible to start the next pixel readout operation during the AD conversion period. Specifically, in Figure 15, the control signal RES is set to a high level from time t11 during the AD converter period, initiating the pixel reset operation. In this way, a high-speed operation mode can also be implemented.

[0065] In this embodiment, the voltage-to-current conversion unit 50 includes a sample-and-hold circuit composed of an operational amplifier 520, a capacitor 650, and switches 670 and 680. Therefore, although there is a sample-and-hold circuit in the path from the vertical signal line 30 to the conversion unit 60, this sample-and-hold circuit is only used in the high-speed operation mode. In the low-noise operation mode shown in Figure 14, the operational amplifier 520 is operated as a buffer amplifier to drive the conversion unit 60 to sample the signal from the vertical signal line 30 for a predetermined period. In other words, the circuit configuration in the low-noise operation mode is equivalent to that of Embodiment 6, that is, a configuration in which there is a path between the vertical signal line 30 and the conversion unit 60 that does not go through a sample-and-hold circuit. Therefore, in the low-noise operation mode, it is possible to reduce pixel noise as in the above embodiment.

[0066] (Example 8) Figures 16 and 17 show schematic diagrams and timing charts of the photoelectric converter related to Embodiment 8. Below, only the differences from Figures 11 and 12 of Embodiment 6 will be explained. Figure 16 has switches 700, 710, 720, 730, 740 and a capacitor 750. In Figure 11 of Embodiment 6, the vertical signal line 30 was connected to the capacitor 540 via switch 600, but in this embodiment, the circuit allows the capacitor 540 to be connected to the amplifier 520 via switches 700 and 710. That is, the output of amplifier 520 can be input to the input of amplifier 530. This makes it possible to reflect the offset of amplifier 520 in the source potential of the P-type transistor 560. Therefore, it is possible to suppress the effect of the offset of amplifier 520 on the output current.

[0067] The following explanation will use the timing chart in Figure 17 to focus on the differences from the chart in Figure 12. Between times t0 and t1, the control signal RES becomes high, turning on the reset transistor 455 and resetting the floating diffusion 420. Accordingly, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES is set to low, turning off the reset transistor 455. At this time, as the potential of the floating diffusion 420 decreases, the potential of the vertical signal line 30 also decreases.

[0068] After the potential of the vertical signal line 30 stabilizes, the control signal CLMP is set to a low level, and switch 510 is turned off. This clamps the voltage corresponding to the reset level of the vertical signal line 30 using capacitor 500. This suppresses the influence on the output current from kT / C noise generated at pixel 10 and threshold variations of the amplification transistor 430.

[0069] At time t3, the control signal AZ_N is set to a low level, turning off switch 550. Then, at time t4, the control signal SMP_N is set to a low level, turning off switches 700 and 710. At time t5, the control signal HLD_N is set to a high level, turning on switch 610. This sequence of operations results in the source potential of the P-type transistor 560 being the reference voltage VC plus the offset of amplifier 520. At time t6, the control signal SMP_S is set to a high level, turning on switches 720 and 720. As a result, the source potential of the P-type transistor 590 is also the reference voltage VC plus the offset of amplifier 520.

[0070] At time t7, the reset-level AD conversion (NAD) is initiated. At this time, the offset of amplifier 520 is superimposed on both the source potentials of P-type transistors 560 and 590, which reduces the impact on the output current. This reduces output current variation, especially when lowering the resistance of variable resistor 580 to apply gain to the output current, making high-gain operation possible.

[0071] Between times t8 and t9, the control signal TX becomes high, turning on the transfer transistor 410, which transfers photocharge from the photoelectric conversion element 400 to the floating diffusion 420. The potential of the floating diffusion 420 decreases in proportion to the amount of charge. This causes the potential of the vertical signal line 30 to decrease. After the potential of the vertical signal line 30 stabilizes, AD conversion (SAD) of the signal level of the vertical signal line 30 is started at time t10. The AD conversion results of the reset level and the signal level are sent to the data processing unit 90, where the difference is taken to perform so-called digital CDS (Correlated Double Sampling) processing.

[0072] Thus, in this embodiment as well, there is a path between the vertical signal line 30 and the conversion unit 60 that does not involve a sample-and-hold circuit. As a result, in this embodiment as well, the pixel signal is sampled multiple times while the vertical signal line 30 and the conversion unit 60 are connected for a predetermined period of time, thereby reducing pixel noise.

[0073] Furthermore, as shown in Figure 18, a determination circuit 751 may be provided to switch the resistance value of the variable resistor 580 according to the amplitude of the vertical signal line 30. An example of operation is shown in Figure 19. The difference from Figure 17 is that the reset level AD conversion is performed twice at times t7 to t9. For example, in the first NAD1, the variable resistor 580 is set to low resistance for AD conversion, and in the second NAD2, the variable resistor 580 is set to high resistance for AD conversion. Then, before the SAD from time t11, the determination circuit 751 determines the amplitude of the vertical signal line 30, and if the amplitude is determined to be large, the variable resistor 580 is set to high resistance, and if it is determined to be small, it is set to low resistance. Then, in the former case, NAD2 and CDS are performed, and in the latter case, NAD1 and CDS are performed. Through the above operation, it is possible to expand the dynamic range while suppressing the deterioration of CDS performance. It becomes possible.

[0074] Furthermore, as shown in Figure 20, a single-ended amplifier 770 may be used instead of the operational amplifier 530. This allows for a reduction in circuit size. Also, instead of configuring a forward-rotating buffer amplifier with operational amplifier 520, an inverting amplifier may be configured with capacitors 500 and 750. In this case, since both differential inputs of operational amplifier 520 do not depend on the signal of the vertical signal line 30, it is advantageous for lowering the voltage.

[0075] Alternatively, a bias voltage may be supplied to the conversion unit 60 using a bias circuit as shown in Figure 21. In Figure 21, 820 is an operational amplifier, 860 is a resistor, 850 and 870 are N-type transistors, 830 and 840 are P-type transistors, and 810 is a bandgap circuit. The bandgap circuit 810 outputs a voltage of approximately 1.2V with very little temperature dependence. Therefore, the voltage across resistor 860 is also approximately 1.2V, and the current flowing through N-type transistors 850 and 870 and P-type transistors 830 and 840 is 1.2 / R. Here, if resistor 860 is the same type of resistor as variable resistor 580, then the temperature dependence of the current in variable resistor 580 and the temperature dependence of the current flowing through resistor 860 and N-type transistor 850 are equal. This makes it possible to cancel out the temperature dependence of the signal current flowing through variable resistor 580 by linking it with the temperature dependence of the current value of current source 300. This makes it possible to suppress the temperature dependence of the readout gain.

[0076] Note that the bias circuit in Figure 21 is just one example. For example, a bias circuit like the one shown in Figure 22 can also be linked to the temperature dependence of the current-resisting element of the N-type transistor 550.

[0077] Furthermore, the variable resistor 580 and the resistive element 860 can be constructed using, for example, poly resistors, diffused resistors, or metal resistors.

[0078] Furthermore, it is desirable to mount the variable resistor 580 and the resistive element 860 on the same substrate. This makes it possible to equalize process variations and suppress temperature dependence.

[0079] Furthermore, a function for adding (averaging) between columns may be provided. For example, as shown in Figure 23, switches 950 and 951 that short-circuit the signals on the vertical signal line 30 may be provided. Also, as shown in Figure 23, the power control lines (gpwr1, gpwr2) may be separated at the voltage-current conversion unit 50 for odd-numbered columns and even-numbered columns. Similarly, the power control lines (apwr1, apwr2) may be separated at the conversion unit 60 for odd-numbered columns and even-numbered columns. This makes it possible to reduce the number of operations of the voltage-current conversion unit 50 and the conversion unit 60 during inter-column addition, thereby saving power.

[0080] Furthermore, as shown in Figure 24, a second circuit board 3 may be provided, resulting in a three-layer stacked configuration. This allows for distribution of the readout circuit between circuit board 2 and the second circuit board 3, enabling a reduction in chip size and accommodating narrower pixel pitches. Note that Figure 24 is just one example, and modifications may be made, such as providing part of the conversion unit 60 on circuit board 2.

[0081] Furthermore, the form of the photoelectric conversion device is not limited to those described above. For example, the pixel 10 is not limited to that shown in Figure 2. The floating diffusion 420 may be configured to allow switching of its capacitance. Also, the pixel 10 may be configured so that multiple photoelectric conversion elements 400 share the floating diffusion 420. Multiple photoelectric conversion elements 400 may be formed under the same microlens, and the pixel may be configured to detect phase differences. Also, if there are multiple vertical signal lines 30 in one pixel row, the pixel may have multiple selection transistors 440. Also, the pixel may be a hole-accumulation type instead of an electron-based type. Also, the pixel may be a type that outputs using a common-source amplifier circuit or a differential amplifier circuit, rather than a source follower type. stomach.

[0082] (Example 9) The photoelectric conversion system according to Example 9 will be explained with reference to Figure 25. Figure 25 is a block diagram showing the schematic configuration of the photoelectric conversion system related to Example 9.

[0083] The photoelectric conversion devices described in Examples 1 to 8 above are applicable to various photoelectric conversion systems. A photoelectric conversion system comprises at least the photoelectric conversion device according to the above embodiment and a signal processing unit that processes the signal output from the photoelectric conversion device. Examples of devices to which such a photoelectric conversion system can be applied include digital still cameras, digital camcorders, surveillance cameras, photocopiers, fax machines, mobile phones, in-vehicle cameras, observation satellites, sensors, and measuring instruments. Camera modules, which include an optical system such as a lens and an imaging device, are also included in devices to which a photoelectric conversion system is applied. Figure 25 shows a block diagram of a digital still camera as an example of these.

[0084] Figure 25 shows an example of the configuration of an imaging system SYS constructed using an imaging device IS. The imaging system SYS is an information terminal with a camera and imaging functions. The imaging device IS may further include a package PKG that houses the imaging device IC. The package PKG may include a base on which the imaging device IC is fixed, a cover facing the imaging device IC, and connecting members that connect terminals provided on the base and terminals provided on the imaging device IC. The imaging device IS can also mount multiple imaging device ICs side by side in a common package PKG. Furthermore, the imaging device IS can also mount imaging device ICs and other semiconductor devices on top of each other in a common package PKG.

[0085] The imaging system SYS may include an optical system OU that forms an image on the imaging device IS. The imaging system SYS may also include at least one of a control unit CU, a processing unit PU, a display device DU, and a storage device MU. The control unit CU is a device that controls the imaging device IS, and the processing unit PU is a device that processes signals obtained from the imaging device IS. The display device DU is a device that displays images obtained from the imaging device IS, and the storage device MU is a device that stores images obtained from the imaging device IS.

[0086] (Example 10) The equipment to which the photoelectric conversion system of Example 10 is applied will be described with reference to Figures 26A and 26B. Figures 26A and 26B show the configuration of the photoelectric conversion system and equipment of this example.

[0087] Figure 26A shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 2300 has an imaging device 2310. The imaging device 2310 is a photoelectric conversion device as described in any of the embodiments above. The photoelectric conversion system 2300 has an image processing unit 2312 that performs image processing on a plurality of image data acquired by the imaging device 2310, and a parallax acquisition unit 2314 that calculates parallax (phase difference of parallax images) from a plurality of image data acquired by the photoelectric conversion system 2300. The photoelectric conversion system 2300 also has a distance measurement unit 2316 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 2318 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 2314 and the distance measurement unit 2316 are examples of distance information acquisition means that acquire distance information to an object. That is, distance information is information related to parallax, defocus amount, distance to an object, etc. The collision determination unit 2318 may use any of these distance information to determine the possibility of a collision. The distance information acquisition means may be implemented by specially designed hardware or by a software module. Alternatively, FPGA (Field Programmable Gate Array) or ASIC ( This may be implemented by an Application Specific Integrated Circuit (ACU), or by a combination thereof.

[0088] The photoelectric conversion system 2300 is connected to the vehicle information acquisition device 2320 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 2300 is also connected to the control ECU 2330, which is a control unit that outputs a control signal to generate braking force on the vehicle based on the judgment result of the collision judgment unit 2318. The photoelectric conversion system 2300 is also connected to the warning device 2340, which issues a warning to the driver based on the judgment result of the collision judgment unit 2318. For example, if the collision judgment result of the collision judgment unit 2318 indicates a high probability of collision, the control ECU 2330 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 2340 warns the user by sounding an alarm, displaying warning information on a screen such as a car navigation system, or vibrating the seat belt or steering wheel.

[0089] In this embodiment, the photoelectric conversion system 2300 images the area around the vehicle, for example, the front or rear. Figure 26B shows the photoelectric conversion system 2300 when imaging the area in front of the vehicle (imaging range 2350). The vehicle information acquisition device 2320 sends instructions to the photoelectric conversion system 2300 or the imaging device 2310. This configuration can further improve the accuracy of distance measurement.

[0090] The above example illustrates control to prevent collisions with other vehicles, but the photoelectric conversion system can also be applied to control systems that automatically follow other vehicles or automatically stay within their lanes. Furthermore, the photoelectric conversion system can be applied not only to vehicles such as the vehicle itself, but also to mobile objects (mobile devices) such as ships, aircraft, or industrial robots. In addition, it can be applied not only to mobile objects but also to a wide range of devices that utilize object recognition, such as intelligent transportation systems (ITS).

[0091] (Example 11) The equipment to which the photoelectric conversion system of Example 11 is applied will be described with reference to Figure 27. Figure 27 is a block diagram showing an example configuration of a distance image sensor, which is an example of equipment to which the photoelectric conversion system of this embodiment is applied.

[0092] As shown in Figure 27, the distance image sensor 1401 is configured to include an optical system 1402, a photoelectric converter 1403, an image processing circuit 1404, a monitor 1405, and a memory 1406. The distance image sensor 1401 receives light (modulated light or pulsed light) that is projected from the light source device 1411 toward the subject and reflected from the surface of the subject, thereby acquiring a distance image corresponding to the distance to the subject.

[0093] The optical system 1402 is composed of one or more lenses and guides the image light (incident light) from the subject to the photoelectric converter 1403, where it forms an image on the light-receiving surface (sensor part) of the photoelectric converter 1403.

[0094] The photoelectric converter 1403 is one of the photoelectric converters described in each of the above embodiments, and a distance signal indicating the distance obtained from the light received signal output from the photoelectric converter 1403 is supplied to the image processing circuit 1404.

[0095] The image processing circuit 1404 performs image processing to construct a distance image based on the distance signal supplied from the photoelectric converter 1403. The distance image (image data) obtained through this image processing is then supplied to the monitor 1405 for display or supplied to the memory 1406 for storage (recording).

[0096] With the distance image sensor 1401 configured in this way, more accurate distance images can be acquired by applying the photoelectric conversion device described above.

[0097] (Example 12) The equipment to which the photoelectric conversion system related to Example 12 is applied will be described with reference to Figure 28. Figure 28 is a diagram showing an example of a schematic configuration of an endoscopic surgical system, which is equipment to which the photoelectric conversion system of this embodiment is applied.

[0098] Figure 28 illustrates a surgeon (physician) 1131 performing surgery on a patient 1132 on a patient bed 1133 using an endoscopic surgical system 1003. As shown in the figure, the endoscopic surgical system 1003 consists of an endoscope 1100, surgical instruments 1110, and a cart 1134 equipped with various devices for endoscopic surgery.

[0099] The endoscope 1100 consists of a barrel 1101, the tip of which is inserted into the body cavity of the patient 1132 for a predetermined length, and a camera head 1102 connected to the base end of the barrel 1101. In the illustrated example, the endoscope 1100 is shown as a so-called rigid endoscope having a rigid barrel 1101, but the endoscope 1100 may also be configured as a so-called flexible endoscope having a flexible barrel.

[0100] An opening into which an objective lens is fitted is provided at the tip of the endoscope tube 1101. A light source device 1203 is connected to the endoscope 1100. Light generated by the light source device 1203 is guided to the tip of the endoscope tube by a light guide extending inside the endoscope tube 1101, and is irradiated through the objective lens towards the object to be observed inside the body cavity of the patient 1132. The endoscope 1100 may be a straight-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0101] The camera head 1102 contains an optical system and a photoelectric converter. Reflected light from the object being observed (observation light) is focused by the optical system into the photoelectric converter. The photoelectric converter converts the observation light into electrical signals, generating an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The photoelectric converter can be any of the photoelectric converters described in the embodiments described above. The image signal is transmitted as RAW data to the camera control unit (CCU) 1135.

[0102] The CCU1135 consists of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and other components, and comprehensively controls the operation of the endoscope 1100 and the display device 1136. Furthermore, the CCU1135 receives an image signal from the camera head 1102 and performs various image processing operations on that image signal, such as development processing (demosaic processing), to display the image based on that image signal.

[0103] The display device 1136 displays an image based on an image signal that has been processed by the CCU 1135, under control from the CCU 1135.

[0104] The light source device 1203 consists of a light source such as an LED (Light Emitting Diode) and supplies illumination light to the endoscope 1100 when photographing the surgical area, etc.

[0105] The input device 1137 is an input interface for the endoscopic surgical system 1003. The user can input various types of information and instructions to the endoscopic surgical system 1003 via the input device 1137.

[0106] The control device 1138 controls the drive of the energy treatment instrument 1112 for purposes such as tissue cauterization, incision, or blood vessel sealing.

[0107] The light source device 1203, which supplies illumination light to the endoscope 1100 when photographing the surgical area, can be composed of, for example, an LED, a laser light source, or a combination thereof. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so the white balance of the captured image can be adjusted in the light source device 1203. In this case, it is also possible to capture images corresponding to each of the RGB colors in time-division by irradiating the observation target with laser light from each of the RGB laser light sources in time-division and controlling the drive of the image sensor of the camera head 1102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter on the image sensor.

[0108] Furthermore, the light source device 1203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the drive of the image sensor of the camera head 1102 in synchronization with the timing of the change in light intensity, images can be acquired in time-division order, and these images can be combined to generate high dynamic range images without so-called black crushing and white clipping.

[0109] Furthermore, the light source device 1203 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, the wavelength dependence of light absorption in body tissue is utilized. Specifically, by irradiating with narrowband light compared to the irradiation light used during normal observation (i.e., white light), predetermined tissues such as blood vessels on the surface of mucosa can be imaged with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescence generated by irradiation with excitation light. In fluorescence observation, excitation light can be irradiated onto body tissue and fluorescence from the body tissue can be observed, or a reagent such as indocyanine green (ICG) can be injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent can be irradiated onto the body tissue to obtain a fluorescence image. The light source device 1203 may be configured to supply narrowband light and / or excitation light corresponding to such special light observation.

[0110] (Example 13) The equipment to which the photoelectric conversion system related to Example 13 is applied will be described with reference to Figures 29A and 29B.

[0111] Figure 29A shows eyeglasses 1600 (smart glasses), a device to which the photoelectric conversion system of this embodiment is applied. The eyeglasses 1600 have a photoelectric conversion device 1602. The photoelectric conversion device 1602 is the photoelectric conversion device described in each of the embodiments described above. In addition, a display device including a light-emitting device such as an OLED or LED may be provided on the back side of the lens 1601. There may be one or more photoelectric conversion devices 1602. In addition, multiple types of photoelectric conversion devices may be used in combination. The arrangement position of the photoelectric conversion device 1602 is not limited to Figure 29A.

[0112] The eyeglasses 1600 further include a control device 1603. The control device 1603 functions as a power supply that provides power to the photoelectric converter 1602 and the display device. The control device 1603 also controls the operation of the photoelectric converter 1602 and the display device. Furthermore, the control device 1603 functions as a signal processing unit that processes the signals output from the photoelectric converter 1602. The lens 1601 has an optical system formed therein for focusing light onto the photoelectric converter 1602.

[0113] Figure 29B shows eyeglasses 1610 (smart glasses), a device to which the photoelectric conversion system of this embodiment is applied. The arrangement of the photoelectric conversion system differs from that in Figure 29A. Eyeglasses 1610 are controlled The device has a control unit 1612. The control unit 1612 is equipped with a photoelectric converter corresponding to the photoelectric converter 1602 and a display device. The lens 1611 has an optical system formed therein for projecting light emitted from the photoelectric converter and the display device within the control unit 1612, and an image is projected onto the lens 1611. The control unit 1612 functions as a power supply that provides power to the photoelectric converter and the display device, and also controls the operation of the photoelectric converter and the display device. The control unit 1612 may have a gaze detection unit that detects the wearer's gaze. Gaze detection may use infrared light. The infrared light emitter emits infrared light towards the eyeball of the user who is fixating on the displayed image. An image capture image of the eyeball is obtained by detecting the reflected light from the eyeball of the emitted infrared light with an imaging unit having a light-receiving element. By having a reduction means that reduces the light from the infrared light emitter to the display unit in planar view, the deterioration of image quality is reduced.

[0114] The user's gaze towards the displayed image is detected from an image of the eyeball obtained by imaging with infrared light. Any known method can be applied to gaze detection using an image of the eyeball. For example, a gaze detection method based on the Purkinje image obtained by the reflection of the irradiated light from the cornea can be used.

[0115] More specifically, gaze detection processing is performed based on the pupil-corneal reflection method. Using the pupil-corneal reflection method, a gaze vector representing the orientation (rotation angle) of the eyeball is calculated based on the pupil image and Purkinje image contained in the captured image of the eyeball, thereby detecting the user's gaze.

[0116] The display device of this embodiment includes a photoelectric converter having a light-receiving element, and may control the display image of the display device based on the user's gaze information from the photoelectric converter.

[0117] Specifically, the display device determines a first field of view that the user is fixated on, and a second field of view other than the first field of view, based on gaze information. The first and second field of view may be determined by the control device of the display device, or they may be determined by an external control device and received. Within the display area of ​​the display device, the display resolution of the first field of view may be controlled to be higher than that of the second field of view. In other words, the resolution of the second field of view may be lower than that of the first field of view.

[0118] Furthermore, the display area may have a first display area and a second display area different from the first display area, and a higher priority area may be determined from the first and second display areas based on line-of-sight information. The first and second field-of-sight areas may be determined by the control device of the display device, or they may be determined by an external control device and received. The resolution of the higher priority area may be controlled to be higher than the resolution of the areas other than the higher priority area. In other words, the resolution of areas with relatively lower priority may be set lower.

[0119] AI may be used to determine the first field of view area and the areas with higher priority. The AI ​​may be a model configured to estimate the angle of gaze and the distance to the target object at the end of the line of sight from the image of the eye, using the image of the eye and the direction the eye was actually looking in that image as training data. The AI ​​program may be installed in the display device, the photoelectric converter, or an external device. If installed in an external device, it will be transmitted to the display device via communication.

[0120] When display control is based on visual detection, this method is preferably applicable to smart glasses that further include a photoelectric converter for capturing images of the surrounding environment. The smart glasses can display the captured external information in real time.

[0121] (Example 14) The photoelectric conversion device and photoelectric conversion system described above may be applied to electronic devices such as smartphones and tablets.

[0122] Figures 30A and 30B show an example of an electronic device 1500 equipped with a photoelectric converter. Figure 30A shows the front side of the electronic device 1500, and Figure 30B shows the back side of the electronic device 1500.

[0123] As shown in Figure 30A, a display 1510 for displaying images is positioned in the center of the surface of the electronic device 1500. Along the top edge of the surface of the electronic device 1500, front cameras 1521 and 1522 using photoelectric converters, an IR light source 1530 that emits infrared light, and a visible light source 1540 that emits visible light are positioned.

[0124] Furthermore, as shown in Figure 30B, rear cameras 1551 and 1552, which use photoelectric converters, an IR light source 1560 that emits infrared light, and a visible light source 1570 that emits visible light are arranged along the upper edge of the back of the electronic device 1500.

[0125] In the electronic device 1500 configured in this way, by applying the photoelectric converter described above, it is possible to capture, for example, higher-quality images. The photoelectric converter can also be applied to other electronic devices such as infrared sensors, distance measuring sensors using active infrared light sources, security cameras, and personal or biometric authentication cameras. This can improve the accuracy and performance of these electronic devices.

[0126] Although various devices have been described in the above embodiments, further mechanical devices may be included. In a camera, the mechanical device can drive components of the optical system for zooming, focusing, and shutter operation. Alternatively, the mechanical device in a camera can move a photoelectric converter for vibration damping.

[0127] Furthermore, the equipment may be transportation equipment such as vehicles, ships, or aircraft. Mechanical devices in transportation equipment can be used as moving devices. Equipment as transportation equipment is suitable for transporting photoelectric converters or for assisting and / or automating driving (piloting) through imaging functions. Processing devices for assisting and / or automating driving (piloting) can perform processing to operate mechanical devices as moving devices based on information obtained from the photoelectric converter.

[0128] (others) The present invention is not limited to the embodiments described above and can be modified in various ways. For example, examples in which a part of the configuration of one embodiment is added to another embodiment, or in which a part of the configuration of another embodiment is replaced, are also included as embodiments of the present invention. It should be noted that the above embodiments are merely examples of concrete implementations of the present invention, and the technical scope of the present invention should not be interpreted as being limited by them. In other words, the present invention can be implemented in various ways without departing from its technical concept or its main features. [Explanation of Symbols]

[0129] 10: Pixels 30: Vertical signal line 50: Voltage-to-current conversion section 60: Conversion section 400: Photoelectric conversion element

Claims

1. A pixel having a photoelectric conversion element; A signal line connected to the pixel; a voltage-current converter for converting a voltage signal of the signal line into a current; a conversion unit having an oversampling type analog-to-digital conversion circuit that converts the current output from the voltage-to-current conversion unit into a digital signal, There is no sample-and-hold unit between the signal line and the conversion unit. Photoelectric conversion device.

2. an output node of the signal line is connected to an input node of the voltage-to-current converter; an input node of the conversion unit is connected to an output node of the voltage-to-current conversion unit; There is no sample-and-hold unit between the output node of the signal line and the input node of the conversion unit. The photoelectric conversion device according to claim 1 .

3. An output node of the signal line is connected to an input node of the voltage-to-current converter, an input node of the conversion unit is connected to an output node of the voltage-to-current conversion unit; a sample-and-hold unit is not provided between the input node of the voltage-to-current converter and the output node of the voltage-to-current converter; The photoelectric conversion device according to claim 1 .

4. A pixel having a photoelectric conversion element; A signal line connected to the pixel; a voltage-current converter for converting a voltage signal of the signal line into a current; a conversion unit having an oversampling type analog-to-digital conversion circuit that converts the current output from the voltage-to-current conversion unit into a digital signal, a signal path from the signal line to the conversion unit includes a path that does not have a sample-and-hold unit; Photoelectric conversion device.

5. A pixel having a photoelectric conversion element; A signal line connected to the pixel; a voltage-current converter for converting a voltage signal of the signal line into a current; a conversion unit having an oversampling type analog-to-digital conversion circuit that converts the current output from the voltage-to-current conversion unit into a digital signal, the voltage-to-current converter is configured to be able to output the current obtained by converting the voltage signal of the signal line without sampling and holding the voltage signal of the signal line to the converter. Photoelectric conversion device.

6. The voltage-to-current converter includes a differential pair. The photoelectric conversion device according to any one of claims 1 to 5.

7. A resistor is connected between the sources of the two transistors constituting the differential pair. The photoelectric conversion device according to claim 6 .

8. The resistor is a variable resistor. The photoelectric conversion device according to claim 7 .

9. The two transistors are N-type transistors. The photoelectric conversion device according to claim 7 or 8.

10. the voltage-to-current converter includes a differential stage having the differential pair, and an amplifier stage that amplifies an output current of the differential stage; The photoelectric conversion device according to any one of claims 6 to 9.

11. The differential pair is composed of two P-type transistors. The photoelectric conversion device according to claim 6 .

12. the voltage-to-current converter has a capacitance for clamping a voltage corresponding to a reset level of the signal line; The photoelectric conversion device according to any one of claims 1 to 11.

13. the voltage-current converter converts a voltage corresponding to a difference between a reference voltage and a voltage of the signal line into the current; A circuit for sampling and holding the reference voltage. The photoelectric conversion device according to any one of claims 1 to 12.

14. the voltage-to-current converter unit includes a first transistor, a second transistor, a resistor connected between a source of the first transistor and a source of the second transistor, a first amplifier that drives a gate of the first transistor, and a second amplifier that drives a gate of the second transistor. The photoelectric conversion device according to any one of claims 1 to 5.

15. the voltage-to-current converter has a capacitance between at least one of the first amplifier and the second amplifier and the signal line, for clamping a voltage corresponding to a reset level of the signal line; The photoelectric conversion device according to claim 14 .

16. the first amplifier and the second amplifier are each connectable to the signal line; The photoelectric conversion device according to claim 14 or 15.

17. The voltage-to-current converter includes at least one of the first amplifier and the second amplifier. a circuit for sampling and holding the input of the amplifier; The photoelectric conversion device according to any one of claims 14 to 16.

18. The output of the first amplifier can be input to the input of the second amplifier. The photoelectric conversion device according to any one of claims 14 to 17.

19. A photoelectric conversion device according to any one of claims 1 to 18, a signal processing unit that processes a signal output from the photoelectric conversion device; A photoelectric conversion system having the above structure.

20. A photoelectric conversion device according to any one of claims 1 to 18, an optical system corresponding to the photoelectric conversion device; A control device for controlling the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device; An apparatus comprising:

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